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* Makefile.am (GENSCRIPTS): Pass prefix.
[binutils.git] / opcodes / m32c-asm.c
blob9407ed8d2d1446bfb1def1d201fe9afe861199cb
1 /* Assembler interface for targets using CGEN. -*- C -*-
2 CGEN: Cpu tools GENerator
3
4 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 - the resultant file is machine generated, cgen-asm.in isn't
6
7 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005
8 Free Software Foundation, Inc.
9
10 This file is part of the GNU Binutils and GDB, the GNU debugger.
11
12 This program is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2, or (at your option)
15 any later version.
16
17 This program is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
21
22 You should have received a copy of the GNU General Public License
23 along with this program; if not, write to the Free Software Foundation, Inc.,
24 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
25
26 /* ??? Eventually more and more of this stuff can go to cpu-independent files.
27 Keep that in mind. */
28
29 #include "sysdep.h"
30 #include <stdio.h>
31 #include "ansidecl.h"
32 #include "bfd.h"
33 #include "symcat.h"
34 #include "m32c-desc.h"
35 #include "m32c-opc.h"
36 #include "opintl.h"
37 #include "xregex.h"
38 #include "libiberty.h"
39 #include "safe-ctype.h"
40
41 #undef min
42 #define min(a,b) ((a) < (b) ? (a) : (b))
43 #undef max
44 #define max(a,b) ((a) > (b) ? (a) : (b))
45
46 static const char * parse_insn_normal
47 (CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *);
48 \f
49 /* -- assembler routines inserted here. */
50
51 /* -- asm.c */
52 #include "safe-ctype.h"
53
54 #define MACH_M32C 5 /* Must match md_begin. */
55
56 static int
57 m32c_cgen_isa_register (const char **strp)
58 {
59 int u;
60 const char *s = *strp;
61 static char * m32c_register_names [] =
62 {
63 "r0", "r1", "r2", "r3", "r0l", "r0h", "r1l", "r1h",
64 "a0", "a1", "r2r0", "r3r1", "sp", "fb", "dct0", "dct1", "flg", "svf",
65 "drc0", "drc1", "dmd0", "dmd1", "intb", "svp", "vct", "isp", "dma0",
66 "dma1", "dra0", "dra1", "dsa0", "dsa1", 0
67 };
68
69 for (u = 0; m32c_register_names[u]; u++)
70 {
71 int len = strlen (m32c_register_names[u]);
72
73 if (memcmp (m32c_register_names[u], s, len) == 0
74 && (s[len] == 0 || ! ISALNUM (s[len])))
75 return 1;
76 }
77 return 0;
78 }
79
80 #define PARSE_UNSIGNED \
81 do \
82 { \
83 /* Don't successfully parse literals beginning with '['. */ \
84 if (**strp == '[') \
85 return "Invalid literal"; /* Anything -- will not be seen. */ \
86 \
87 errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);\
88 if (errmsg) \
89 return errmsg; \
90 } \
91 while (0)
92
93 #define PARSE_SIGNED \
94 do \
95 { \
96 /* Don't successfully parse literals beginning with '['. */ \
97 if (**strp == '[') \
98 return "Invalid literal"; /* Anything -- will not be seen. */ \
99 \
100 errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value); \
101 if (errmsg) \
102 return errmsg; \
103 } \
104 while (0)
105
106 static const char *
107 parse_unsigned6 (CGEN_CPU_DESC cd, const char **strp,
108 int opindex, unsigned long *valuep)
109 {
110 const char *errmsg = 0;
111 unsigned long value;
112
113 PARSE_UNSIGNED;
114
115 if (value > 0x3f)
116 return _("imm:6 immediate is out of range");
117
118 *valuep = value;
119 return 0;
120 }
121
122 static const char *
123 parse_unsigned8 (CGEN_CPU_DESC cd, const char **strp,
124 int opindex, unsigned long *valuep)
125 {
126 const char *errmsg = 0;
127 unsigned long value;
128 long have_zero = 0;
129
130 if (strncasecmp (*strp, "%dsp8(", 6) == 0)
131 {
132 enum cgen_parse_operand_result result_type;
133 bfd_vma value;
134 const char *errmsg;
135
136 *strp += 6;
137 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_8,
138 & result_type, & value);
139 if (**strp != ')')
140 return _("missing `)'");
141 (*strp) ++;
142
143 if (errmsg == NULL
144 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
145 {
146 return _("%dsp8() takes a symbolic address, not a number");
147 }
148 *valuep = value;
149 return errmsg;
150 }
151
152 if (strncmp (*strp, "0x0", 3) == 0
153 || (**strp == '0' && *(*strp + 1) != 'x'))
154 have_zero = 1;
155
156 PARSE_UNSIGNED;
157
158 if (value > 0xff)
159 return _("dsp:8 immediate is out of range");
160
161 /* If this field may require a relocation then use larger dsp16. */
162 if (! have_zero && value == 0)
163 return _("dsp:8 immediate is out of range");
164
165 *valuep = value;
166 return 0;
167 }
168
169 static const char *
170 parse_signed4 (CGEN_CPU_DESC cd, const char **strp,
171 int opindex, signed long *valuep)
172 {
173 const char *errmsg = 0;
174 signed long value;
175 long have_zero = 0;
176
177 if (strncmp (*strp, "0x0", 3) == 0
178 || (**strp == '0' && *(*strp + 1) != 'x'))
179 have_zero = 1;
180
181 PARSE_SIGNED;
182
183 if (value < -8 || value > 7)
184 return _("Immediate is out of range -8 to 7");
185
186 /* If this field may require a relocation then use larger dsp16. */
187 if (! have_zero && value == 0)
188 return _("Immediate is out of range -8 to 7");
189
190 *valuep = value;
191 return 0;
192 }
193
194 static const char *
195 parse_signed4n (CGEN_CPU_DESC cd, const char **strp,
196 int opindex, signed long *valuep)
197 {
198 const char *errmsg = 0;
199 signed long value;
200 long have_zero = 0;
201
202 if (strncmp (*strp, "0x0", 3) == 0
203 || (**strp == '0' && *(*strp + 1) != 'x'))
204 have_zero = 1;
205
206 PARSE_SIGNED;
207
208 if (value < -7 || value > 8)
209 return _("Immediate is out of range -7 to 8");
210
211 /* If this field may require a relocation then use larger dsp16. */
212 if (! have_zero && value == 0)
213 return _("Immediate is out of range -7 to 8");
214
215 *valuep = -value;
216 return 0;
217 }
218
219 static const char *
220 parse_signed8 (CGEN_CPU_DESC cd, const char **strp,
221 int opindex, signed long *valuep)
222 {
223 const char *errmsg = 0;
224 signed long value;
225
226 if (strncasecmp (*strp, "%hi8(", 5) == 0)
227 {
228 enum cgen_parse_operand_result result_type;
229 bfd_vma value;
230 const char *errmsg;
231
232 *strp += 5;
233 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32C_HI8,
234 & result_type, & value);
235 if (**strp != ')')
236 return _("missing `)'");
237 (*strp) ++;
238
239 if (errmsg == NULL
240 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
241 {
242 value >>= 16;
243 }
244 *valuep = value;
245 return errmsg;
246 }
247
248 PARSE_SIGNED;
249
250 if (value <= 255 && value > 127)
251 value -= 0x100;
252
253 if (value < -128 || value > 127)
254 return _("dsp:8 immediate is out of range");
255
256 *valuep = value;
257 return 0;
258 }
259
260 static const char *
261 parse_unsigned16 (CGEN_CPU_DESC cd, const char **strp,
262 int opindex, unsigned long *valuep)
263 {
264 const char *errmsg = 0;
265 unsigned long value;
266 long have_zero = 0;
267
268 if (strncasecmp (*strp, "%dsp16(", 7) == 0)
269 {
270 enum cgen_parse_operand_result result_type;
271 bfd_vma value;
272 const char *errmsg;
273
274 *strp += 7;
275 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_16,
276 & result_type, & value);
277 if (**strp != ')')
278 return _("missing `)'");
279 (*strp) ++;
280
281 if (errmsg == NULL
282 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
283 {
284 return _("%dsp16() takes a symbolic address, not a number");
285 }
286 *valuep = value;
287 return errmsg;
288 }
289
290 /* Don't successfully parse literals beginning with '['. */
291 if (**strp == '[')
292 return "Invalid literal"; /* Anything -- will not be seen. */
293
294 /* Don't successfully parse register names. */
295 if (m32c_cgen_isa_register (strp))
296 return "Invalid literal"; /* Anything -- will not be seen. */
297
298 if (strncmp (*strp, "0x0", 3) == 0
299 || (**strp == '0' && *(*strp + 1) != 'x'))
300 have_zero = 1;
301
302 errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);
303 if (errmsg)
304 return errmsg;
305
306 if (value > 0xffff)
307 return _("dsp:16 immediate is out of range");
308
309 /* If this field may require a relocation then use larger dsp24. */
310 if (cd->machs == MACH_M32C && ! have_zero && value == 0
311 && (strncmp (*strp, "[a", 2) == 0
312 || **strp == ','
313 || **strp == 0))
314 return _("dsp:16 immediate is out of range");
315
316 *valuep = value;
317 return 0;
318 }
319
320 static const char *
321 parse_signed16 (CGEN_CPU_DESC cd, const char **strp,
322 int opindex, signed long *valuep)
323 {
324 const char *errmsg = 0;
325 signed long value;
326
327 if (strncasecmp (*strp, "%lo16(", 6) == 0)
328 {
329 enum cgen_parse_operand_result result_type;
330 bfd_vma value;
331 const char *errmsg;
332
333 *strp += 6;
334 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_LO16,
335 & result_type, & value);
336 if (**strp != ')')
337 return _("missing `)'");
338 (*strp) ++;
339
340 if (errmsg == NULL
341 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
342 {
343 value &= 0xffff;
344 }
345 *valuep = value;
346 return errmsg;
347 }
348
349 if (strncasecmp (*strp, "%hi16(", 6) == 0)
350 {
351 enum cgen_parse_operand_result result_type;
352 bfd_vma value;
353 const char *errmsg;
354
355 *strp += 6;
356 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_HI16,
357 & result_type, & value);
358 if (**strp != ')')
359 return _("missing `)'");
360 (*strp) ++;
361
362 if (errmsg == NULL
363 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
364 {
365 value >>= 16;
366 }
367 *valuep = value;
368 return errmsg;
369 }
370
371 PARSE_SIGNED;
372
373 if (value <= 65535 && value > 32767)
374 value -= 0x10000;
375
376 if (value < -32768 || value > 32767)
377 return _("dsp:16 immediate is out of range");
378
379 *valuep = value;
380 return 0;
381 }
382
383 static const char *
384 parse_unsigned20 (CGEN_CPU_DESC cd, const char **strp,
385 int opindex, unsigned long *valuep)
386 {
387 const char *errmsg = 0;
388 unsigned long value;
389
390 /* Don't successfully parse literals beginning with '['. */
391 if (**strp == '[')
392 return "Invalid literal"; /* Anything -- will not be seen. */
393
394 /* Don't successfully parse register names. */
395 if (m32c_cgen_isa_register (strp))
396 return "Invalid literal"; /* Anything -- will not be seen. */
397
398 errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);
399 if (errmsg)
400 return errmsg;
401
402 if (value > 0xfffff)
403 return _("dsp:20 immediate is out of range");
404
405 *valuep = value;
406 return 0;
407 }
408
409 static const char *
410 parse_unsigned24 (CGEN_CPU_DESC cd, const char **strp,
411 int opindex, unsigned long *valuep)
412 {
413 const char *errmsg = 0;
414 unsigned long value;
415
416 /* Don't successfully parse literals beginning with '['. */
417 if (**strp == '[')
418 return "Invalid literal"; /* Anything -- will not be seen. */
419
420 /* Don't successfully parse register names. */
421 if (m32c_cgen_isa_register (strp))
422 return "Invalid literal"; /* Anything -- will not be seen. */
423
424 errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);
425 if (errmsg)
426 return errmsg;
427
428 if (value > 0xffffff)
429 return _("dsp:24 immediate is out of range");
430
431 *valuep = value;
432 return 0;
433 }
434
435 /* This should only be used for #imm->reg. */
436 static const char *
437 parse_signed24 (CGEN_CPU_DESC cd, const char **strp,
438 int opindex, signed long *valuep)
439 {
440 const char *errmsg = 0;
441 signed long value;
442
443 PARSE_SIGNED;
444
445 if (value <= 0xffffff && value > 0x7fffff)
446 value -= 0x1000000;
447
448 if (value > 0xffffff)
449 return _("dsp:24 immediate is out of range");
450
451 *valuep = value;
452 return 0;
453 }
454
455 static const char *
456 parse_signed32 (CGEN_CPU_DESC cd, const char **strp,
457 int opindex, signed long *valuep)
458 {
459 const char *errmsg = 0;
460 signed long value;
461
462 errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value);
463 if (errmsg)
464 return errmsg;
465
466 *valuep = value;
467 return 0;
468 }
469
470 static const char *
471 parse_imm1_S (CGEN_CPU_DESC cd, const char **strp,
472 int opindex, signed long *valuep)
473 {
474 const char *errmsg = 0;
475 signed long value;
476
477 errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value);
478 if (errmsg)
479 return errmsg;
480
481 if (value < 1 || value > 2)
482 return _("immediate is out of range 1-2");
483
484 *valuep = value;
485 return 0;
486 }
487
488 static const char *
489 parse_imm3_S (CGEN_CPU_DESC cd, const char **strp,
490 int opindex, signed long *valuep)
491 {
492 const char *errmsg = 0;
493 signed long value;
494
495 errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value);
496 if (errmsg)
497 return errmsg;
498
499 if (value < 1 || value > 8)
500 return _("immediate is out of range 1-8");
501
502 *valuep = value;
503 return 0;
504 }
505
506 static const char *
507 parse_bit3_S (CGEN_CPU_DESC cd, const char **strp,
508 int opindex, signed long *valuep)
509 {
510 const char *errmsg = 0;
511 signed long value;
512
513 errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value);
514 if (errmsg)
515 return errmsg;
516
517 if (value < 0 || value > 7)
518 return _("immediate is out of range 0-7");
519
520 *valuep = value;
521 return 0;
522 }
523
524 static const char *
525 parse_lab_5_3 (CGEN_CPU_DESC cd,
526 const char **strp,
527 int opindex ATTRIBUTE_UNUSED,
528 int opinfo,
529 enum cgen_parse_operand_result *type_addr,
530 bfd_vma *valuep)
531 {
532 const char *errmsg = 0;
533 bfd_vma value;
534 enum cgen_parse_operand_result op_res;
535
536 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_5_3,
537 opinfo, & op_res, & value);
538
539 if (type_addr)
540 *type_addr = op_res;
541
542 if (op_res == CGEN_PARSE_OPERAND_ADDRESS)
543 {
544 /* This is a hack; the field cannot handle near-zero signed
545 offsets that CGEN wants to put in to indicate an "empty"
546 operand at first. */
547 *valuep = 2;
548 return 0;
549 }
550 if (errmsg)
551 return errmsg;
552
553 if (value < 2 || value > 9)
554 return _("immediate is out of range 2-9");
555
556 *valuep = value;
557 return 0;
558 }
559
560 static const char *
561 parse_Bitno16R (CGEN_CPU_DESC cd, const char **strp,
562 int opindex, unsigned long *valuep)
563 {
564 const char *errmsg = 0;
565 unsigned long value;
566
567 errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);
568 if (errmsg)
569 return errmsg;
570
571 if (value > 15)
572 return _("Bit number for indexing general register is out of range 0-15");
573
574 *valuep = value;
575 return 0;
576 }
577
578 static const char *
579 parse_unsigned_bitbase (CGEN_CPU_DESC cd, const char **strp,
580 int opindex, unsigned long *valuep,
581 unsigned bits)
582 {
583 const char *errmsg = 0;
584 unsigned long bit;
585 unsigned long base;
586 const char *newp = *strp;
587 unsigned long long bitbase;
588
589 errmsg = cgen_parse_unsigned_integer (cd, & newp, opindex, & bit);
590 if (errmsg)
591 return errmsg;
592
593 if (*newp != ',')
594 return "Missing base for bit,base:8";
595
596 ++newp;
597 errmsg = cgen_parse_unsigned_integer (cd, & newp, opindex, & base);
598 if (errmsg)
599 return errmsg;
600
601 bitbase = (unsigned long long) bit + ((unsigned long long) base * 8);
602
603 if (bitbase >= (1ull << bits))
604 return _("bit,base is out of range");
605
606 *valuep = bitbase;
607 *strp = newp;
608 return 0;
609 }
610
611 static const char *
612 parse_signed_bitbase (CGEN_CPU_DESC cd, const char **strp,
613 int opindex, signed long *valuep,
614 unsigned bits)
615 {
616 const char *errmsg = 0;
617 unsigned long bit;
618 signed long base;
619 const char *newp = *strp;
620 long long bitbase;
621 long long limit;
622
623 errmsg = cgen_parse_unsigned_integer (cd, & newp, opindex, & bit);
624 if (errmsg)
625 return errmsg;
626
627 if (*newp != ',')
628 return "Missing base for bit,base:8";
629
630 ++newp;
631 errmsg = cgen_parse_signed_integer (cd, & newp, opindex, & base);
632 if (errmsg)
633 return errmsg;
634
635 bitbase = (long long)bit + ((long long)base * 8);
636
637 limit = 1ll << (bits - 1);
638 if (bitbase < -limit || bitbase >= limit)
639 return _("bit,base is out of range");
640
641 *valuep = bitbase;
642 *strp = newp;
643 return 0;
644 }
645
646 static const char *
647 parse_unsigned_bitbase8 (CGEN_CPU_DESC cd, const char **strp,
648 int opindex, unsigned long *valuep)
649 {
650 return parse_unsigned_bitbase (cd, strp, opindex, valuep, 8);
651 }
652
653 static const char *
654 parse_unsigned_bitbase11 (CGEN_CPU_DESC cd, const char **strp,
655 int opindex, unsigned long *valuep)
656 {
657 return parse_unsigned_bitbase (cd, strp, opindex, valuep, 11);
658 }
659
660 static const char *
661 parse_unsigned_bitbase16 (CGEN_CPU_DESC cd, const char **strp,
662 int opindex, unsigned long *valuep)
663 {
664 return parse_unsigned_bitbase (cd, strp, opindex, valuep, 16);
665 }
666
667 static const char *
668 parse_unsigned_bitbase19 (CGEN_CPU_DESC cd, const char **strp,
669 int opindex, unsigned long *valuep)
670 {
671 return parse_unsigned_bitbase (cd, strp, opindex, valuep, 19);
672 }
673
674 static const char *
675 parse_unsigned_bitbase27 (CGEN_CPU_DESC cd, const char **strp,
676 int opindex, unsigned long *valuep)
677 {
678 return parse_unsigned_bitbase (cd, strp, opindex, valuep, 27);
679 }
680
681 static const char *
682 parse_signed_bitbase8 (CGEN_CPU_DESC cd, const char **strp,
683 int opindex, signed long *valuep)
684 {
685 return parse_signed_bitbase (cd, strp, opindex, valuep, 8);
686 }
687
688 static const char *
689 parse_signed_bitbase11 (CGEN_CPU_DESC cd, const char **strp,
690 int opindex, signed long *valuep)
691 {
692 return parse_signed_bitbase (cd, strp, opindex, valuep, 11);
693 }
694
695 static const char *
696 parse_signed_bitbase19 (CGEN_CPU_DESC cd, const char **strp,
697 int opindex, signed long *valuep)
698 {
699 return parse_signed_bitbase (cd, strp, opindex, valuep, 19);
700 }
701
702 /* Parse the suffix as :<char> or as nothing followed by a whitespace. */
703
704 static const char *
705 parse_suffix (const char **strp, char suffix)
706 {
707 const char *newp = *strp;
708
709 if (**strp == ':' && TOLOWER (*(*strp + 1)) == suffix)
710 newp = *strp + 2;
711
712 if (ISSPACE (*newp))
713 {
714 *strp = newp;
715 return 0;
716 }
717
718 return "Invalid suffix"; /* Anything -- will not be seen. */
719 }
720
721 static const char *
722 parse_S (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
723 int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
724 {
725 return parse_suffix (strp, 's');
726 }
727
728 static const char *
729 parse_G (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
730 int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
731 {
732 return parse_suffix (strp, 'g');
733 }
734
735 static const char *
736 parse_Q (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
737 int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
738 {
739 return parse_suffix (strp, 'q');
740 }
741
742 static const char *
743 parse_Z (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
744 int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
745 {
746 return parse_suffix (strp, 'z');
747 }
748
749 /* Parse an empty suffix. Fail if the next char is ':'. */
750
751 static const char *
752 parse_X (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
753 int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
754 {
755 if (**strp == ':')
756 return "Unexpected suffix";
757 return 0;
758 }
759
760 static const char *
761 parse_r0l_r0h (CGEN_CPU_DESC cd, const char **strp,
762 int opindex ATTRIBUTE_UNUSED, signed long *valuep)
763 {
764 const char *errmsg;
765 signed long value;
766 signed long junk;
767 const char *newp = *strp;
768
769 /* Parse r0[hl]. */
770 errmsg = cgen_parse_keyword (cd, & newp, & m32c_cgen_opval_h_r0l_r0h, & value);
771 if (errmsg)
772 return errmsg;
773
774 if (*newp != ',')
775 return _("not a valid r0l/r0h pair");
776 ++newp;
777
778 /* Parse the second register in the pair. */
779 if (value == 0) /* r0l */
780 errmsg = cgen_parse_keyword (cd, & newp, & m32c_cgen_opval_h_r0h, & junk);
781 else
782 errmsg = cgen_parse_keyword (cd, & newp, & m32c_cgen_opval_h_r0l, & junk);
783 if (errmsg)
784 return errmsg;
785
786 *strp = newp;
787 *valuep = ! value;
788 return 0;
789 }
790
791 /* Accept .b or .w in any case. */
792
793 static const char *
794 parse_size (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
795 int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
796 {
797 if (**strp == '.'
798 && (*(*strp + 1) == 'b' || *(*strp + 1) == 'B'
799 || *(*strp + 1) == 'w' || *(*strp + 1) == 'W'))
800 {
801 *strp += 2;
802 return NULL;
803 }
804
805 return _("Invalid size specifier");
806 }
807
808 /* Special check to ensure that instruction exists for given machine. */
809
810 int
811 m32c_cgen_insn_supported (CGEN_CPU_DESC cd,
812 const CGEN_INSN *insn)
813 {
814 int machs = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH);
815 CGEN_BITSET isas = CGEN_INSN_BITSET_ATTR_VALUE (insn, CGEN_INSN_ISA);
816
817 /* If attributes are absent, assume no restriction. */
818 if (machs == 0)
819 machs = ~0;
820
821 return ((machs & cd->machs)
822 && cgen_bitset_intersect_p (& isas, cd->isas));
823 }
824
825 /* Parse a set of registers, R0,R1,A0,A1,SB,FB. */
826
827 static const char *
828 parse_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
829 const char **strp,
830 int opindex ATTRIBUTE_UNUSED,
831 unsigned long *valuep,
832 int push)
833 {
834 const char *errmsg = 0;
835 int regno = 0;
836
837 *valuep = 0;
838 while (**strp && **strp != ')')
839 {
840 if (**strp == 'r' || **strp == 'R')
841 {
842 ++*strp;
843 regno = **strp - '0';
844 if (regno > 4)
845 errmsg = _("Register number is not valid");
846 }
847 else if (**strp == 'a' || **strp == 'A')
848 {
849 ++*strp;
850 regno = **strp - '0';
851 if (regno > 2)
852 errmsg = _("Register number is not valid");
853 regno = **strp - '0' + 4;
854 }
855
856 else if (strncasecmp (*strp, "sb", 2) == 0 || strncasecmp (*strp, "SB", 2) == 0)
857 {
858 regno = 6;
859 ++*strp;
860 }
861
862 else if (strncasecmp (*strp, "fb", 2) == 0 || strncasecmp (*strp, "FB", 2) == 0)
863 {
864 regno = 7;
865 ++*strp;
866 }
867
868 if (push) /* Mask is reversed for push. */
869 *valuep |= 0x80 >> regno;
870 else
871 *valuep |= 1 << regno;
872
873 ++*strp;
874 if (**strp == ',')
875 {
876 if (*(*strp + 1) == ')')
877 break;
878 ++*strp;
879 }
880 }
881
882 if (!*strp)
883 errmsg = _("Register list is not valid");
884
885 return errmsg;
886 }
887
888 #define POP 0
889 #define PUSH 1
890
891 static const char *
892 parse_pop_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
893 const char **strp,
894 int opindex ATTRIBUTE_UNUSED,
895 unsigned long *valuep)
896 {
897 return parse_regset (cd, strp, opindex, valuep, POP);
898 }
899
900 static const char *
901 parse_push_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
902 const char **strp,
903 int opindex ATTRIBUTE_UNUSED,
904 unsigned long *valuep)
905 {
906 return parse_regset (cd, strp, opindex, valuep, PUSH);
907 }
908
909 /* -- dis.c */
910
911 const char * m32c_cgen_parse_operand
912 (CGEN_CPU_DESC, int, const char **, CGEN_FIELDS *);
913
914 /* Main entry point for operand parsing.
915
916 This function is basically just a big switch statement. Earlier versions
917 used tables to look up the function to use, but
918 - if the table contains both assembler and disassembler functions then
919 the disassembler contains much of the assembler and vice-versa,
920 - there's a lot of inlining possibilities as things grow,
921 - using a switch statement avoids the function call overhead.
922
923 This function could be moved into `parse_insn_normal', but keeping it
924 separate makes clear the interface between `parse_insn_normal' and each of
925 the handlers. */
926
927 const char *
928 m32c_cgen_parse_operand (CGEN_CPU_DESC cd,
929 int opindex,
930 const char ** strp,
931 CGEN_FIELDS * fields)
932 {
933 const char * errmsg = NULL;
934 /* Used by scalar operands that still need to be parsed. */
935 long junk ATTRIBUTE_UNUSED;
936
937 switch (opindex)
938 {
939 case M32C_OPERAND_A0 :
940 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_a0, & junk);
941 break;
942 case M32C_OPERAND_A1 :
943 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_a1, & junk);
944 break;
945 case M32C_OPERAND_AN16_PUSH_S :
946 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_4_1);
947 break;
948 case M32C_OPERAND_BIT16AN :
949 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst16_an);
950 break;
951 case M32C_OPERAND_BIT16RN :
952 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_dst16_rn);
953 break;
954 case M32C_OPERAND_BIT3_S :
955 errmsg = parse_bit3_S (cd, strp, M32C_OPERAND_BIT3_S, (long *) (& fields->f_imm3_S));
956 break;
957 case M32C_OPERAND_BIT32ANPREFIXED :
958 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_prefixed);
959 break;
960 case M32C_OPERAND_BIT32ANUNPREFIXED :
961 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_unprefixed);
962 break;
963 case M32C_OPERAND_BIT32RNPREFIXED :
964 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst32_rn_prefixed_QI);
965 break;
966 case M32C_OPERAND_BIT32RNUNPREFIXED :
967 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst32_rn_unprefixed_QI);
968 break;
969 case M32C_OPERAND_BITBASE16_16_S8 :
970 errmsg = parse_signed_bitbase8 (cd, strp, M32C_OPERAND_BITBASE16_16_S8, (long *) (& fields->f_dsp_16_s8));
971 break;
972 case M32C_OPERAND_BITBASE16_16_U16 :
973 errmsg = parse_unsigned_bitbase16 (cd, strp, M32C_OPERAND_BITBASE16_16_U16, (unsigned long *) (& fields->f_dsp_16_u16));
974 break;
975 case M32C_OPERAND_BITBASE16_16_U8 :
976 errmsg = parse_unsigned_bitbase8 (cd, strp, M32C_OPERAND_BITBASE16_16_U8, (unsigned long *) (& fields->f_dsp_16_u8));
977 break;
978 case M32C_OPERAND_BITBASE16_8_U11_S :
979 errmsg = parse_unsigned_bitbase11 (cd, strp, M32C_OPERAND_BITBASE16_8_U11_S, (unsigned long *) (& fields->f_bitbase16_u11_S));
980 break;
981 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
982 errmsg = parse_signed_bitbase11 (cd, strp, M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED, (long *) (& fields->f_bitbase32_16_s11_unprefixed));
983 break;
984 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
985 errmsg = parse_signed_bitbase19 (cd, strp, M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED, (long *) (& fields->f_bitbase32_16_s19_unprefixed));
986 break;
987 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
988 errmsg = parse_unsigned_bitbase11 (cd, strp, M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED, (unsigned long *) (& fields->f_bitbase32_16_u11_unprefixed));
989 break;
990 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
991 errmsg = parse_unsigned_bitbase19 (cd, strp, M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED, (unsigned long *) (& fields->f_bitbase32_16_u19_unprefixed));
992 break;
993 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
994 errmsg = parse_unsigned_bitbase27 (cd, strp, M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED, (unsigned long *) (& fields->f_bitbase32_16_u27_unprefixed));
995 break;
996 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
997 errmsg = parse_signed_bitbase11 (cd, strp, M32C_OPERAND_BITBASE32_24_S11_PREFIXED, (long *) (& fields->f_bitbase32_24_s11_prefixed));
998 break;
999 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
1000 errmsg = parse_signed_bitbase19 (cd, strp, M32C_OPERAND_BITBASE32_24_S19_PREFIXED, (long *) (& fields->f_bitbase32_24_s19_prefixed));
1001 break;
1002 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
1003 errmsg = parse_unsigned_bitbase11 (cd, strp, M32C_OPERAND_BITBASE32_24_U11_PREFIXED, (unsigned long *) (& fields->f_bitbase32_24_u11_prefixed));
1004 break;
1005 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
1006 errmsg = parse_unsigned_bitbase19 (cd, strp, M32C_OPERAND_BITBASE32_24_U19_PREFIXED, (unsigned long *) (& fields->f_bitbase32_24_u19_prefixed));
1007 break;
1008 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
1009 errmsg = parse_unsigned_bitbase27 (cd, strp, M32C_OPERAND_BITBASE32_24_U27_PREFIXED, (unsigned long *) (& fields->f_bitbase32_24_u27_prefixed));
1010 break;
1011 case M32C_OPERAND_BITNO16R :
1012 errmsg = parse_Bitno16R (cd, strp, M32C_OPERAND_BITNO16R, (unsigned long *) (& fields->f_dsp_16_u8));
1013 break;
1014 case M32C_OPERAND_BITNO32PREFIXED :
1015 errmsg = cgen_parse_unsigned_integer (cd, strp, M32C_OPERAND_BITNO32PREFIXED, (unsigned long *) (& fields->f_bitno32_prefixed));
1016 break;
1017 case M32C_OPERAND_BITNO32UNPREFIXED :
1018 errmsg = cgen_parse_unsigned_integer (cd, strp, M32C_OPERAND_BITNO32UNPREFIXED, (unsigned long *) (& fields->f_bitno32_unprefixed));
1019 break;
1020 case M32C_OPERAND_DSP_10_U6 :
1021 errmsg = parse_unsigned6 (cd, strp, M32C_OPERAND_DSP_10_U6, (unsigned long *) (& fields->f_dsp_10_u6));
1022 break;
1023 case M32C_OPERAND_DSP_16_S16 :
1024 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_16_S16, (long *) (& fields->f_dsp_16_s16));
1025 break;
1026 case M32C_OPERAND_DSP_16_S8 :
1027 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_16_S8, (long *) (& fields->f_dsp_16_s8));
1028 break;
1029 case M32C_OPERAND_DSP_16_U16 :
1030 errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_16_U16, (unsigned long *) (& fields->f_dsp_16_u16));
1031 break;
1032 case M32C_OPERAND_DSP_16_U20 :
1033 errmsg = parse_unsigned20 (cd, strp, M32C_OPERAND_DSP_16_U20, (unsigned long *) (& fields->f_dsp_16_u24));
1034 break;
1035 case M32C_OPERAND_DSP_16_U24 :
1036 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_16_U24, (unsigned long *) (& fields->f_dsp_16_u24));
1037 break;
1038 case M32C_OPERAND_DSP_16_U8 :
1039 errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_16_U8, (unsigned long *) (& fields->f_dsp_16_u8));
1040 break;
1041 case M32C_OPERAND_DSP_24_S16 :
1042 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_24_S16, (long *) (& fields->f_dsp_24_s16));
1043 break;
1044 case M32C_OPERAND_DSP_24_S8 :
1045 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_24_S8, (long *) (& fields->f_dsp_24_s8));
1046 break;
1047 case M32C_OPERAND_DSP_24_U16 :
1048 errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_24_U16, (unsigned long *) (& fields->f_dsp_24_u16));
1049 break;
1050 case M32C_OPERAND_DSP_24_U20 :
1051 errmsg = parse_unsigned20 (cd, strp, M32C_OPERAND_DSP_24_U20, (unsigned long *) (& fields->f_dsp_24_u24));
1052 break;
1053 case M32C_OPERAND_DSP_24_U24 :
1054 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_24_U24, (unsigned long *) (& fields->f_dsp_24_u24));
1055 break;
1056 case M32C_OPERAND_DSP_24_U8 :
1057 errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_24_U8, (unsigned long *) (& fields->f_dsp_24_u8));
1058 break;
1059 case M32C_OPERAND_DSP_32_S16 :
1060 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_32_S16, (long *) (& fields->f_dsp_32_s16));
1061 break;
1062 case M32C_OPERAND_DSP_32_S8 :
1063 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_32_S8, (long *) (& fields->f_dsp_32_s8));
1064 break;
1065 case M32C_OPERAND_DSP_32_U16 :
1066 errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_32_U16, (unsigned long *) (& fields->f_dsp_32_u16));
1067 break;
1068 case M32C_OPERAND_DSP_32_U20 :
1069 errmsg = parse_unsigned20 (cd, strp, M32C_OPERAND_DSP_32_U20, (unsigned long *) (& fields->f_dsp_32_u24));
1070 break;
1071 case M32C_OPERAND_DSP_32_U24 :
1072 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_32_U24, (unsigned long *) (& fields->f_dsp_32_u24));
1073 break;
1074 case M32C_OPERAND_DSP_32_U8 :
1075 errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_32_U8, (unsigned long *) (& fields->f_dsp_32_u8));
1076 break;
1077 case M32C_OPERAND_DSP_40_S16 :
1078 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_40_S16, (long *) (& fields->f_dsp_40_s16));
1079 break;
1080 case M32C_OPERAND_DSP_40_S8 :
1081 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_40_S8, (long *) (& fields->f_dsp_40_s8));
1082 break;
1083 case M32C_OPERAND_DSP_40_U16 :
1084 errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_40_U16, (unsigned long *) (& fields->f_dsp_40_u16));
1085 break;
1086 case M32C_OPERAND_DSP_40_U24 :
1087 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_40_U24, (unsigned long *) (& fields->f_dsp_40_u24));
1088 break;
1089 case M32C_OPERAND_DSP_40_U8 :
1090 errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_40_U8, (unsigned long *) (& fields->f_dsp_40_u8));
1091 break;
1092 case M32C_OPERAND_DSP_48_S16 :
1093 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_48_S16, (long *) (& fields->f_dsp_48_s16));
1094 break;
1095 case M32C_OPERAND_DSP_48_S8 :
1096 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_48_S8, (long *) (& fields->f_dsp_48_s8));
1097 break;
1098 case M32C_OPERAND_DSP_48_U16 :
1099 errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_48_U16, (unsigned long *) (& fields->f_dsp_48_u16));
1100 break;
1101 case M32C_OPERAND_DSP_48_U24 :
1102 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_48_U24, (unsigned long *) (& fields->f_dsp_48_u24));
1103 break;
1104 case M32C_OPERAND_DSP_48_U8 :
1105 errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_48_U8, (unsigned long *) (& fields->f_dsp_48_u8));
1106 break;
1107 case M32C_OPERAND_DSP_8_S24 :
1108 errmsg = parse_signed24 (cd, strp, M32C_OPERAND_DSP_8_S24, (long *) (& fields->f_dsp_8_s24));
1109 break;
1110 case M32C_OPERAND_DSP_8_S8 :
1111 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_8_S8, (long *) (& fields->f_dsp_8_s8));
1112 break;
1113 case M32C_OPERAND_DSP_8_U16 :
1114 errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_8_U16, (unsigned long *) (& fields->f_dsp_8_u16));
1115 break;
1116 case M32C_OPERAND_DSP_8_U24 :
1117 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_8_U24, (unsigned long *) (& fields->f_dsp_8_u24));
1118 break;
1119 case M32C_OPERAND_DSP_8_U6 :
1120 errmsg = parse_unsigned6 (cd, strp, M32C_OPERAND_DSP_8_U6, (unsigned long *) (& fields->f_dsp_8_u6));
1121 break;
1122 case M32C_OPERAND_DSP_8_U8 :
1123 errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_8_U8, (unsigned long *) (& fields->f_dsp_8_u8));
1124 break;
1125 case M32C_OPERAND_DST16AN :
1126 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst16_an);
1127 break;
1128 case M32C_OPERAND_DST16AN_S :
1129 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_dst16_an_s);
1130 break;
1131 case M32C_OPERAND_DST16ANHI :
1132 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_dst16_an);
1133 break;
1134 case M32C_OPERAND_DST16ANQI :
1135 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_dst16_an);
1136 break;
1137 case M32C_OPERAND_DST16ANQI_S :
1138 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_dst16_rn_QI_s);
1139 break;
1140 case M32C_OPERAND_DST16ANSI :
1141 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_SI, & fields->f_dst16_an);
1142 break;
1143 case M32C_OPERAND_DST16RNEXTQI :
1144 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_ext_QI, & fields->f_dst16_rn_ext);
1145 break;
1146 case M32C_OPERAND_DST16RNHI :
1147 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_dst16_rn);
1148 break;
1149 case M32C_OPERAND_DST16RNQI :
1150 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst16_rn);
1151 break;
1152 case M32C_OPERAND_DST16RNQI_S :
1153 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0l_r0h, & fields->f_dst16_rn_QI_s);
1154 break;
1155 case M32C_OPERAND_DST16RNSI :
1156 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_dst16_rn);
1157 break;
1158 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
1159 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_unprefixed);
1160 break;
1161 case M32C_OPERAND_DST32ANPREFIXED :
1162 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_prefixed);
1163 break;
1164 case M32C_OPERAND_DST32ANPREFIXEDHI :
1165 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_dst32_an_prefixed);
1166 break;
1167 case M32C_OPERAND_DST32ANPREFIXEDQI :
1168 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_dst32_an_prefixed);
1169 break;
1170 case M32C_OPERAND_DST32ANPREFIXEDSI :
1171 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_prefixed);
1172 break;
1173 case M32C_OPERAND_DST32ANUNPREFIXED :
1174 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_unprefixed);
1175 break;
1176 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
1177 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_dst32_an_unprefixed);
1178 break;
1179 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
1180 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_dst32_an_unprefixed);
1181 break;
1182 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
1183 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_unprefixed);
1184 break;
1185 case M32C_OPERAND_DST32R0HI_S :
1186 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0, & junk);
1187 break;
1188 case M32C_OPERAND_DST32R0QI_S :
1189 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0l, & junk);
1190 break;
1191 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
1192 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_ext_HI, & fields->f_dst32_rn_ext_unprefixed);
1193 break;
1194 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
1195 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_ext_QI, & fields->f_dst32_rn_ext_unprefixed);
1196 break;
1197 case M32C_OPERAND_DST32RNPREFIXEDHI :
1198 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_dst32_rn_prefixed_HI);
1199 break;
1200 case M32C_OPERAND_DST32RNPREFIXEDQI :
1201 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst32_rn_prefixed_QI);
1202 break;
1203 case M32C_OPERAND_DST32RNPREFIXEDSI :
1204 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_dst32_rn_prefixed_SI);
1205 break;
1206 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
1207 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_dst32_rn_unprefixed_HI);
1208 break;
1209 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
1210 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst32_rn_unprefixed_QI);
1211 break;
1212 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
1213 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_dst32_rn_unprefixed_SI);
1214 break;
1215 case M32C_OPERAND_G :
1216 errmsg = parse_G (cd, strp, M32C_OPERAND_G, (long *) (& junk));
1217 break;
1218 case M32C_OPERAND_IMM_12_S4 :
1219 errmsg = parse_signed4 (cd, strp, M32C_OPERAND_IMM_12_S4, (long *) (& fields->f_imm_12_s4));
1220 break;
1221 case M32C_OPERAND_IMM_12_S4N :
1222 errmsg = parse_signed4n (cd, strp, M32C_OPERAND_IMM_12_S4N, (long *) (& fields->f_imm_12_s4));
1223 break;
1224 case M32C_OPERAND_IMM_13_U3 :
1225 errmsg = parse_signed4 (cd, strp, M32C_OPERAND_IMM_13_U3, (long *) (& fields->f_imm_13_u3));
1226 break;
1227 case M32C_OPERAND_IMM_16_HI :
1228 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_16_HI, (long *) (& fields->f_dsp_16_s16));
1229 break;
1230 case M32C_OPERAND_IMM_16_QI :
1231 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_16_QI, (long *) (& fields->f_dsp_16_s8));
1232 break;
1233 case M32C_OPERAND_IMM_16_SI :
1234 errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_16_SI, (long *) (& fields->f_dsp_16_s32));
1235 break;
1236 case M32C_OPERAND_IMM_20_S4 :
1237 errmsg = parse_signed4 (cd, strp, M32C_OPERAND_IMM_20_S4, (long *) (& fields->f_imm_20_s4));
1238 break;
1239 case M32C_OPERAND_IMM_24_HI :
1240 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_24_HI, (long *) (& fields->f_dsp_24_s16));
1241 break;
1242 case M32C_OPERAND_IMM_24_QI :
1243 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_24_QI, (long *) (& fields->f_dsp_24_s8));
1244 break;
1245 case M32C_OPERAND_IMM_24_SI :
1246 errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_24_SI, (long *) (& fields->f_dsp_24_s32));
1247 break;
1248 case M32C_OPERAND_IMM_32_HI :
1249 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_32_HI, (long *) (& fields->f_dsp_32_s16));
1250 break;
1251 case M32C_OPERAND_IMM_32_QI :
1252 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_32_QI, (long *) (& fields->f_dsp_32_s8));
1253 break;
1254 case M32C_OPERAND_IMM_32_SI :
1255 errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_32_SI, (long *) (& fields->f_dsp_32_s32));
1256 break;
1257 case M32C_OPERAND_IMM_40_HI :
1258 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_40_HI, (long *) (& fields->f_dsp_40_s16));
1259 break;
1260 case M32C_OPERAND_IMM_40_QI :
1261 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_40_QI, (long *) (& fields->f_dsp_40_s8));
1262 break;
1263 case M32C_OPERAND_IMM_40_SI :
1264 errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_40_SI, (long *) (& fields->f_dsp_40_s32));
1265 break;
1266 case M32C_OPERAND_IMM_48_HI :
1267 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_48_HI, (long *) (& fields->f_dsp_48_s16));
1268 break;
1269 case M32C_OPERAND_IMM_48_QI :
1270 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_48_QI, (long *) (& fields->f_dsp_48_s8));
1271 break;
1272 case M32C_OPERAND_IMM_48_SI :
1273 errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_48_SI, (long *) (& fields->f_dsp_48_s32));
1274 break;
1275 case M32C_OPERAND_IMM_56_HI :
1276 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_56_HI, (long *) (& fields->f_dsp_56_s16));
1277 break;
1278 case M32C_OPERAND_IMM_56_QI :
1279 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_56_QI, (long *) (& fields->f_dsp_56_s8));
1280 break;
1281 case M32C_OPERAND_IMM_64_HI :
1282 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_64_HI, (long *) (& fields->f_dsp_64_s16));
1283 break;
1284 case M32C_OPERAND_IMM_8_HI :
1285 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_8_HI, (long *) (& fields->f_dsp_8_s16));
1286 break;
1287 case M32C_OPERAND_IMM_8_QI :
1288 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_8_QI, (long *) (& fields->f_dsp_8_s8));
1289 break;
1290 case M32C_OPERAND_IMM_8_S4 :
1291 errmsg = parse_signed4 (cd, strp, M32C_OPERAND_IMM_8_S4, (long *) (& fields->f_imm_8_s4));
1292 break;
1293 case M32C_OPERAND_IMM_8_S4N :
1294 errmsg = parse_signed4n (cd, strp, M32C_OPERAND_IMM_8_S4N, (long *) (& fields->f_imm_8_s4));
1295 break;
1296 case M32C_OPERAND_IMM_SH_12_S4 :
1297 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_shimm, & fields->f_imm_12_s4);
1298 break;
1299 case M32C_OPERAND_IMM_SH_20_S4 :
1300 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_shimm, & fields->f_imm_20_s4);
1301 break;
1302 case M32C_OPERAND_IMM_SH_8_S4 :
1303 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_shimm, & fields->f_imm_8_s4);
1304 break;
1305 case M32C_OPERAND_IMM1_S :
1306 errmsg = parse_imm1_S (cd, strp, M32C_OPERAND_IMM1_S, (long *) (& fields->f_imm1_S));
1307 break;
1308 case M32C_OPERAND_IMM3_S :
1309 errmsg = parse_imm3_S (cd, strp, M32C_OPERAND_IMM3_S, (long *) (& fields->f_imm3_S));
1310 break;
1311 case M32C_OPERAND_LAB_16_8 :
1312 {
1313 bfd_vma value = 0;
1314 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_16_8, 0, NULL, & value);
1315 fields->f_lab_16_8 = value;
1316 }
1317 break;
1318 case M32C_OPERAND_LAB_24_8 :
1319 {
1320 bfd_vma value = 0;
1321 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_24_8, 0, NULL, & value);
1322 fields->f_lab_24_8 = value;
1323 }
1324 break;
1325 case M32C_OPERAND_LAB_32_8 :
1326 {
1327 bfd_vma value = 0;
1328 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_32_8, 0, NULL, & value);
1329 fields->f_lab_32_8 = value;
1330 }
1331 break;
1332 case M32C_OPERAND_LAB_40_8 :
1333 {
1334 bfd_vma value = 0;
1335 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_40_8, 0, NULL, & value);
1336 fields->f_lab_40_8 = value;
1337 }
1338 break;
1339 case M32C_OPERAND_LAB_5_3 :
1340 {
1341 bfd_vma value = 0;
1342 errmsg = parse_lab_5_3 (cd, strp, M32C_OPERAND_LAB_5_3, 0, NULL, & value);
1343 fields->f_lab_5_3 = value;
1344 }
1345 break;
1346 case M32C_OPERAND_LAB_8_16 :
1347 {
1348 bfd_vma value = 0;
1349 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_8_16, 0, NULL, & value);
1350 fields->f_lab_8_16 = value;
1351 }
1352 break;
1353 case M32C_OPERAND_LAB_8_24 :
1354 {
1355 bfd_vma value = 0;
1356 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_8_24, 0, NULL, & value);
1357 fields->f_lab_8_24 = value;
1358 }
1359 break;
1360 case M32C_OPERAND_LAB_8_8 :
1361 {
1362 bfd_vma value = 0;
1363 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_8_8, 0, NULL, & value);
1364 fields->f_lab_8_8 = value;
1365 }
1366 break;
1367 case M32C_OPERAND_LAB32_JMP_S :
1368 {
1369 bfd_vma value = 0;
1370 errmsg = parse_lab_5_3 (cd, strp, M32C_OPERAND_LAB32_JMP_S, 0, NULL, & value);
1371 fields->f_lab32_jmp_s = value;
1372 }
1373 break;
1374 case M32C_OPERAND_Q :
1375 errmsg = parse_Q (cd, strp, M32C_OPERAND_Q, (long *) (& junk));
1376 break;
1377 case M32C_OPERAND_R0 :
1378 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0, & junk);
1379 break;
1380 case M32C_OPERAND_R0H :
1381 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0h, & junk);
1382 break;
1383 case M32C_OPERAND_R0L :
1384 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0l, & junk);
1385 break;
1386 case M32C_OPERAND_R1 :
1387 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r1, & junk);
1388 break;
1389 case M32C_OPERAND_R1R2R0 :
1390 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r1r2r0, & junk);
1391 break;
1392 case M32C_OPERAND_R2 :
1393 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r2, & junk);
1394 break;
1395 case M32C_OPERAND_R2R0 :
1396 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r2r0, & junk);
1397 break;
1398 case M32C_OPERAND_R3 :
1399 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r3, & junk);
1400 break;
1401 case M32C_OPERAND_R3R1 :
1402 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r3r1, & junk);
1403 break;
1404 case M32C_OPERAND_REGSETPOP :
1405 errmsg = parse_pop_regset (cd, strp, M32C_OPERAND_REGSETPOP, (unsigned long *) (& fields->f_8_8));
1406 break;
1407 case M32C_OPERAND_REGSETPUSH :
1408 errmsg = parse_push_regset (cd, strp, M32C_OPERAND_REGSETPUSH, (unsigned long *) (& fields->f_8_8));
1409 break;
1410 case M32C_OPERAND_RN16_PUSH_S :
1411 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_4_1);
1412 break;
1413 case M32C_OPERAND_S :
1414 errmsg = parse_S (cd, strp, M32C_OPERAND_S, (long *) (& junk));
1415 break;
1416 case M32C_OPERAND_SRC16AN :
1417 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src16_an);
1418 break;
1419 case M32C_OPERAND_SRC16ANHI :
1420 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_src16_an);
1421 break;
1422 case M32C_OPERAND_SRC16ANQI :
1423 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_src16_an);
1424 break;
1425 case M32C_OPERAND_SRC16RNHI :
1426 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_src16_rn);
1427 break;
1428 case M32C_OPERAND_SRC16RNQI :
1429 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_src16_rn);
1430 break;
1431 case M32C_OPERAND_SRC32ANPREFIXED :
1432 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src32_an_prefixed);
1433 break;
1434 case M32C_OPERAND_SRC32ANPREFIXEDHI :
1435 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_src32_an_prefixed);
1436 break;
1437 case M32C_OPERAND_SRC32ANPREFIXEDQI :
1438 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_src32_an_prefixed);
1439 break;
1440 case M32C_OPERAND_SRC32ANPREFIXEDSI :
1441 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src32_an_prefixed);
1442 break;
1443 case M32C_OPERAND_SRC32ANUNPREFIXED :
1444 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src32_an_unprefixed);
1445 break;
1446 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
1447 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_src32_an_unprefixed);
1448 break;
1449 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
1450 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_src32_an_unprefixed);
1451 break;
1452 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
1453 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src32_an_unprefixed);
1454 break;
1455 case M32C_OPERAND_SRC32RNPREFIXEDHI :
1456 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_src32_rn_prefixed_HI);
1457 break;
1458 case M32C_OPERAND_SRC32RNPREFIXEDQI :
1459 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_src32_rn_prefixed_QI);
1460 break;
1461 case M32C_OPERAND_SRC32RNPREFIXEDSI :
1462 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_src32_rn_prefixed_SI);
1463 break;
1464 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
1465 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_src32_rn_unprefixed_HI);
1466 break;
1467 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
1468 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_src32_rn_unprefixed_QI);
1469 break;
1470 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
1471 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_src32_rn_unprefixed_SI);
1472 break;
1473 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
1474 errmsg = parse_r0l_r0h (cd, strp, M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL, (long *) (& fields->f_5_1));
1475 break;
1476 case M32C_OPERAND_X :
1477 errmsg = parse_X (cd, strp, M32C_OPERAND_X, (long *) (& junk));
1478 break;
1479 case M32C_OPERAND_Z :
1480 errmsg = parse_Z (cd, strp, M32C_OPERAND_Z, (long *) (& junk));
1481 break;
1482 case M32C_OPERAND_COND16_16 :
1483 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16, & fields->f_dsp_16_u8);
1484 break;
1485 case M32C_OPERAND_COND16_24 :
1486 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16, & fields->f_dsp_24_u8);
1487 break;
1488 case M32C_OPERAND_COND16_32 :
1489 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16, & fields->f_dsp_32_u8);
1490 break;
1491 case M32C_OPERAND_COND16C :
1492 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16c, & fields->f_cond16);
1493 break;
1494 case M32C_OPERAND_COND16J :
1495 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16j, & fields->f_cond16);
1496 break;
1497 case M32C_OPERAND_COND16J5 :
1498 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16j_5, & fields->f_cond16j_5);
1499 break;
1500 case M32C_OPERAND_COND32 :
1501 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_cond32);
1502 break;
1503 case M32C_OPERAND_COND32_16 :
1504 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_dsp_16_u8);
1505 break;
1506 case M32C_OPERAND_COND32_24 :
1507 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_dsp_24_u8);
1508 break;
1509 case M32C_OPERAND_COND32_32 :
1510 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_dsp_32_u8);
1511 break;
1512 case M32C_OPERAND_COND32_40 :
1513 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_dsp_40_u8);
1514 break;
1515 case M32C_OPERAND_COND32J :
1516 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_cond32j);
1517 break;
1518 case M32C_OPERAND_CR1_PREFIXED_32 :
1519 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr1_32, & fields->f_21_3);
1520 break;
1521 case M32C_OPERAND_CR1_UNPREFIXED_32 :
1522 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr1_32, & fields->f_13_3);
1523 break;
1524 case M32C_OPERAND_CR16 :
1525 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr_16, & fields->f_9_3);
1526 break;
1527 case M32C_OPERAND_CR2_32 :
1528 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr2_32, & fields->f_13_3);
1529 break;
1530 case M32C_OPERAND_CR3_PREFIXED_32 :
1531 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr3_32, & fields->f_21_3);
1532 break;
1533 case M32C_OPERAND_CR3_UNPREFIXED_32 :
1534 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr3_32, & fields->f_13_3);
1535 break;
1536 case M32C_OPERAND_FLAGS16 :
1537 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_flags, & fields->f_9_3);
1538 break;
1539 case M32C_OPERAND_FLAGS32 :
1540 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_flags, & fields->f_13_3);
1541 break;
1542 case M32C_OPERAND_SCCOND32 :
1543 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_cond16);
1544 break;
1545 case M32C_OPERAND_SIZE :
1546 errmsg = parse_size (cd, strp, M32C_OPERAND_SIZE, (long *) (& junk));
1547 break;
1548
1549 default :
1550 /* xgettext:c-format */
1551 fprintf (stderr, _("Unrecognized field %d while parsing.\n"), opindex);
1552 abort ();
1553 }
1554
1555 return errmsg;
1556 }
1557
1558 cgen_parse_fn * const m32c_cgen_parse_handlers[] =
1559 {
1560 parse_insn_normal,
1561 };
1562
1563 void
1564 m32c_cgen_init_asm (CGEN_CPU_DESC cd)
1565 {
1566 m32c_cgen_init_opcode_table (cd);
1567 m32c_cgen_init_ibld_table (cd);
1568 cd->parse_handlers = & m32c_cgen_parse_handlers[0];
1569 cd->parse_operand = m32c_cgen_parse_operand;
1570 }
1571
1572 \f
1573
1574 /* Regex construction routine.
1575
1576 This translates an opcode syntax string into a regex string,
1577 by replacing any non-character syntax element (such as an
1578 opcode) with the pattern '.*'
1579
1580 It then compiles the regex and stores it in the opcode, for
1581 later use by m32c_cgen_assemble_insn
1582
1583 Returns NULL for success, an error message for failure. */
1584
1585 char *
1586 m32c_cgen_build_insn_regex (CGEN_INSN *insn)
1587 {
1588 CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn);
1589 const char *mnem = CGEN_INSN_MNEMONIC (insn);
1590 char rxbuf[CGEN_MAX_RX_ELEMENTS];
1591 char *rx = rxbuf;
1592 const CGEN_SYNTAX_CHAR_TYPE *syn;
1593 int reg_err;
1594
1595 syn = CGEN_SYNTAX_STRING (CGEN_OPCODE_SYNTAX (opc));
1596
1597 /* Mnemonics come first in the syntax string. */
1598 if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
1599 return _("missing mnemonic in syntax string");
1600 ++syn;
1601
1602 /* Generate a case sensitive regular expression that emulates case
1603 insensitive matching in the "C" locale. We cannot generate a case
1604 insensitive regular expression because in Turkish locales, 'i' and 'I'
1605 are not equal modulo case conversion. */
1606
1607 /* Copy the literal mnemonic out of the insn. */
1608 for (; *mnem; mnem++)
1609 {
1610 char c = *mnem;
1611
1612 if (ISALPHA (c))
1613 {
1614 *rx++ = '[';
1615 *rx++ = TOLOWER (c);
1616 *rx++ = TOUPPER (c);
1617 *rx++ = ']';
1618 }
1619 else
1620 *rx++ = c;
1621 }
1622
1623 /* Copy any remaining literals from the syntax string into the rx. */
1624 for(; * syn != 0 && rx <= rxbuf + (CGEN_MAX_RX_ELEMENTS - 7 - 4); ++syn)
1625 {
1626 if (CGEN_SYNTAX_CHAR_P (* syn))
1627 {
1628 char c = CGEN_SYNTAX_CHAR (* syn);
1629
1630 switch (c)
1631 {
1632 /* Escape any regex metacharacters in the syntax. */
1633 case '.': case '[': case '\\':
1634 case '*': case '^': case '$':
1635
1636 #ifdef CGEN_ESCAPE_EXTENDED_REGEX
1637 case '?': case '{': case '}':
1638 case '(': case ')': case '*':
1639 case '|': case '+': case ']':
1640 #endif
1641 *rx++ = '\\';
1642 *rx++ = c;
1643 break;
1644
1645 default:
1646 if (ISALPHA (c))
1647 {
1648 *rx++ = '[';
1649 *rx++ = TOLOWER (c);
1650 *rx++ = TOUPPER (c);
1651 *rx++ = ']';
1652 }
1653 else
1654 *rx++ = c;
1655 break;
1656 }
1657 }
1658 else
1659 {
1660 /* Replace non-syntax fields with globs. */
1661 *rx++ = '.';
1662 *rx++ = '*';
1663 }
1664 }
1665
1666 /* Trailing whitespace ok. */
1667 * rx++ = '[';
1668 * rx++ = ' ';
1669 * rx++ = '\t';
1670 * rx++ = ']';
1671 * rx++ = '*';
1672
1673 /* But anchor it after that. */
1674 * rx++ = '$';
1675 * rx = '\0';
1676
1677 CGEN_INSN_RX (insn) = xmalloc (sizeof (regex_t));
1678 reg_err = regcomp ((regex_t *) CGEN_INSN_RX (insn), rxbuf, REG_NOSUB);
1679
1680 if (reg_err == 0)
1681 return NULL;
1682 else
1683 {
1684 static char msg[80];
1685
1686 regerror (reg_err, (regex_t *) CGEN_INSN_RX (insn), msg, 80);
1687 regfree ((regex_t *) CGEN_INSN_RX (insn));
1688 free (CGEN_INSN_RX (insn));
1689 (CGEN_INSN_RX (insn)) = NULL;
1690 return msg;
1691 }
1692 }
1693
1694 \f
1695 /* Default insn parser.
1696
1697 The syntax string is scanned and operands are parsed and stored in FIELDS.
1698 Relocs are queued as we go via other callbacks.
1699
1700 ??? Note that this is currently an all-or-nothing parser. If we fail to
1701 parse the instruction, we return 0 and the caller will start over from
1702 the beginning. Backtracking will be necessary in parsing subexpressions,
1703 but that can be handled there. Not handling backtracking here may get
1704 expensive in the case of the m68k. Deal with later.
1705
1706 Returns NULL for success, an error message for failure. */
1707
1708 static const char *
1709 parse_insn_normal (CGEN_CPU_DESC cd,
1710 const CGEN_INSN *insn,
1711 const char **strp,
1712 CGEN_FIELDS *fields)
1713 {
1714 /* ??? Runtime added insns not handled yet. */
1715 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
1716 const char *str = *strp;
1717 const char *errmsg;
1718 const char *p;
1719 const CGEN_SYNTAX_CHAR_TYPE * syn;
1720 #ifdef CGEN_MNEMONIC_OPERANDS
1721 /* FIXME: wip */
1722 int past_opcode_p;
1723 #endif
1724
1725 /* For now we assume the mnemonic is first (there are no leading operands).
1726 We can parse it without needing to set up operand parsing.
1727 GAS's input scrubber will ensure mnemonics are lowercase, but we may
1728 not be called from GAS. */
1729 p = CGEN_INSN_MNEMONIC (insn);
1730 while (*p && TOLOWER (*p) == TOLOWER (*str))
1731 ++p, ++str;
1732
1733 if (* p)
1734 return _("unrecognized instruction");
1735
1736 #ifndef CGEN_MNEMONIC_OPERANDS
1737 if (* str && ! ISSPACE (* str))
1738 return _("unrecognized instruction");
1739 #endif
1740
1741 CGEN_INIT_PARSE (cd);
1742 cgen_init_parse_operand (cd);
1743 #ifdef CGEN_MNEMONIC_OPERANDS
1744 past_opcode_p = 0;
1745 #endif
1746
1747 /* We don't check for (*str != '\0') here because we want to parse
1748 any trailing fake arguments in the syntax string. */
1749 syn = CGEN_SYNTAX_STRING (syntax);
1750
1751 /* Mnemonics come first for now, ensure valid string. */
1752 if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
1753 abort ();
1754
1755 ++syn;
1756
1757 while (* syn != 0)
1758 {
1759 /* Non operand chars must match exactly. */
1760 if (CGEN_SYNTAX_CHAR_P (* syn))
1761 {
1762 /* FIXME: While we allow for non-GAS callers above, we assume the
1763 first char after the mnemonic part is a space. */
1764 /* FIXME: We also take inappropriate advantage of the fact that
1765 GAS's input scrubber will remove extraneous blanks. */
1766 if (TOLOWER (*str) == TOLOWER (CGEN_SYNTAX_CHAR (* syn)))
1767 {
1768 #ifdef CGEN_MNEMONIC_OPERANDS
1769 if (CGEN_SYNTAX_CHAR(* syn) == ' ')
1770 past_opcode_p = 1;
1771 #endif
1772 ++ syn;
1773 ++ str;
1774 }
1775 else if (*str)
1776 {
1777 /* Syntax char didn't match. Can't be this insn. */
1778 static char msg [80];
1779
1780 /* xgettext:c-format */
1781 sprintf (msg, _("syntax error (expected char `%c', found `%c')"),
1782 CGEN_SYNTAX_CHAR(*syn), *str);
1783 return msg;
1784 }
1785 else
1786 {
1787 /* Ran out of input. */
1788 static char msg [80];
1789
1790 /* xgettext:c-format */
1791 sprintf (msg, _("syntax error (expected char `%c', found end of instruction)"),
1792 CGEN_SYNTAX_CHAR(*syn));
1793 return msg;
1794 }
1795 continue;
1796 }
1797
1798 /* We have an operand of some sort. */
1799 errmsg = cd->parse_operand (cd, CGEN_SYNTAX_FIELD (*syn),
1800 &str, fields);
1801 if (errmsg)
1802 return errmsg;
1803
1804 /* Done with this operand, continue with next one. */
1805 ++ syn;
1806 }
1807
1808 /* If we're at the end of the syntax string, we're done. */
1809 if (* syn == 0)
1810 {
1811 /* FIXME: For the moment we assume a valid `str' can only contain
1812 blanks now. IE: We needn't try again with a longer version of
1813 the insn and it is assumed that longer versions of insns appear
1814 before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3). */
1815 while (ISSPACE (* str))
1816 ++ str;
1817
1818 if (* str != '\0')
1819 return _("junk at end of line"); /* FIXME: would like to include `str' */
1820
1821 return NULL;
1822 }
1823
1824 /* We couldn't parse it. */
1825 return _("unrecognized instruction");
1826 }
1827 \f
1828 /* Main entry point.
1829 This routine is called for each instruction to be assembled.
1830 STR points to the insn to be assembled.
1831 We assume all necessary tables have been initialized.
1832 The assembled instruction, less any fixups, is stored in BUF.
1833 Remember that if CGEN_INT_INSN_P then BUF is an int and thus the value
1834 still needs to be converted to target byte order, otherwise BUF is an array
1835 of bytes in target byte order.
1836 The result is a pointer to the insn's entry in the opcode table,
1837 or NULL if an error occured (an error message will have already been
1838 printed).
1839
1840 Note that when processing (non-alias) macro-insns,
1841 this function recurses.
1842
1843 ??? It's possible to make this cpu-independent.
1844 One would have to deal with a few minor things.
1845 At this point in time doing so would be more of a curiosity than useful
1846 [for example this file isn't _that_ big], but keeping the possibility in
1847 mind helps keep the design clean. */
1848
1849 const CGEN_INSN *
1850 m32c_cgen_assemble_insn (CGEN_CPU_DESC cd,
1851 const char *str,
1852 CGEN_FIELDS *fields,
1853 CGEN_INSN_BYTES_PTR buf,
1854 char **errmsg)
1855 {
1856 const char *start;
1857 CGEN_INSN_LIST *ilist;
1858 const char *parse_errmsg = NULL;
1859 const char *insert_errmsg = NULL;
1860 int recognized_mnemonic = 0;
1861
1862 /* Skip leading white space. */
1863 while (ISSPACE (* str))
1864 ++ str;
1865
1866 /* The instructions are stored in hashed lists.
1867 Get the first in the list. */
1868 ilist = CGEN_ASM_LOOKUP_INSN (cd, str);
1869
1870 /* Keep looking until we find a match. */
1871 start = str;
1872 for ( ; ilist != NULL ; ilist = CGEN_ASM_NEXT_INSN (ilist))
1873 {
1874 const CGEN_INSN *insn = ilist->insn;
1875 recognized_mnemonic = 1;
1876
1877 #ifdef CGEN_VALIDATE_INSN_SUPPORTED
1878 /* Not usually needed as unsupported opcodes
1879 shouldn't be in the hash lists. */
1880 /* Is this insn supported by the selected cpu? */
1881 if (! m32c_cgen_insn_supported (cd, insn))
1882 continue;
1883 #endif
1884 /* If the RELAXED attribute is set, this is an insn that shouldn't be
1885 chosen immediately. Instead, it is used during assembler/linker
1886 relaxation if possible. */
1887 if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED) != 0)
1888 continue;
1889
1890 str = start;
1891
1892 /* Skip this insn if str doesn't look right lexically. */
1893 if (CGEN_INSN_RX (insn) != NULL &&
1894 regexec ((regex_t *) CGEN_INSN_RX (insn), str, 0, NULL, 0) == REG_NOMATCH)
1895 continue;
1896
1897 /* Allow parse/insert handlers to obtain length of insn. */
1898 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
1899
1900 parse_errmsg = CGEN_PARSE_FN (cd, insn) (cd, insn, & str, fields);
1901 if (parse_errmsg != NULL)
1902 continue;
1903
1904 /* ??? 0 is passed for `pc'. */
1905 insert_errmsg = CGEN_INSERT_FN (cd, insn) (cd, insn, fields, buf,
1906 (bfd_vma) 0);
1907 if (insert_errmsg != NULL)
1908 continue;
1909
1910 /* It is up to the caller to actually output the insn and any
1911 queued relocs. */
1912 return insn;
1913 }
1914
1915 {
1916 static char errbuf[150];
1917 #ifdef CGEN_VERBOSE_ASSEMBLER_ERRORS
1918 const char *tmp_errmsg;
1919
1920 /* If requesting verbose error messages, use insert_errmsg.
1921 Failing that, use parse_errmsg. */
1922 tmp_errmsg = (insert_errmsg ? insert_errmsg :
1923 parse_errmsg ? parse_errmsg :
1924 recognized_mnemonic ?
1925 _("unrecognized form of instruction") :
1926 _("unrecognized instruction"));
1927
1928 if (strlen (start) > 50)
1929 /* xgettext:c-format */
1930 sprintf (errbuf, "%s `%.50s...'", tmp_errmsg, start);
1931 else
1932 /* xgettext:c-format */
1933 sprintf (errbuf, "%s `%.50s'", tmp_errmsg, start);
1934 #else
1935 if (strlen (start) > 50)
1936 /* xgettext:c-format */
1937 sprintf (errbuf, _("bad instruction `%.50s...'"), start);
1938 else
1939 /* xgettext:c-format */
1940 sprintf (errbuf, _("bad instruction `%.50s'"), start);
1941 #endif
1942
1943 *errmsg = errbuf;
1944 return NULL;
1945 }
1946 }
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