opcodes/i386-init.h

   1 /* This file is automatically generated by i386-gen.  Do not edit!  */
   2 /* Copyright 2007, 2008  Free Software Foundation, Inc.
   3
   4    This file is part of the GNU opcodes library.
   5
   6    This library is free software; you can redistribute it and/or modify
   7    it under the terms of the GNU General Public License as published by
   8    the Free Software Foundation; either version 3, or (at your option)
   9    any later version.
  10
  11    It is distributed in the hope that it will be useful, but WITHOUT
  12    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  13    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  14    License for more details.
  15
  16    You should have received a copy of the GNU General Public License
  17    along with this program; if not, write to the Free Software
  18    Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
  19    MA 02110-1301, USA.  */
  20
  21 #define CPU_UNKNOWN_FLAGS \
  22   { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,  \
  23       1, 1, 1, 1, 1, 1, 1, 0, 1, 1 } }
  24
  25 #define CPU_GENERIC32_FLAGS \
  26   { { 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,  \
  27       0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
  28
  29 #define CPU_GENERIC64_FLAGS \
  30   { { 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0,  \
  31       0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
  32
  33 #define CPU_NONE_FLAGS \
  34   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,  \
  35       0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
  36
  37 #define CPU_I186_FLAGS \
  38   { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,  \
  39       0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
  40
  41 #define CPU_I286_FLAGS \
  42   { { 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,  \
  43       0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
  44
  45 #define CPU_I386_FLAGS \
  46   { { 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,  \
  47       0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
  48
  49 #define CPU_I486_FLAGS \
  50   { { 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,  \
  51       0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
  52
  53 #define CPU_I586_FLAGS \
  54   { { 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,  \
  55       0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
  56
  57 #define CPU_I686_FLAGS \
  58   { { 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,  \
  59       0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
  60
  61 #define CPU_P2_FLAGS \
  62   { { 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,  \
  63       0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
  64
  65 #define CPU_P3_FLAGS \
  66   { { 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0,  \
  67       0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
  68
  69 #define CPU_P4_FLAGS \
  70   { { 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0,  \
  71       0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
  72
  73 #define CPU_NOCONA_FLAGS \
  74   { { 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0,  \
  75       0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }
  76
  77 #define CPU_CORE_FLAGS \
  78   { { 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0,  \
  79       0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
  80
  81 #define CPU_CORE2_FLAGS \
  82   { { 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0,  \
  83       1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }
  84
  85 #define CPU_K6_FLAGS \
  86   { { 1, 1, 1, 1, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,  \
  87       0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
  88
  89 #define CPU_K6_2_FLAGS \
  90   { { 1, 1, 1, 1, 1, 0, 0, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0,  \
  91       0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
  92
  93 #define CPU_ATHLON_FLAGS \
  94   { { 1, 1, 1, 1, 1, 1, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0,  \
  95       0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
  96
  97 #define CPU_K8_FLAGS \
  98   { { 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,  \
  99       0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }
 100
 101 #define CPU_AMDFAM10_FLAGS \
 102   { { 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0,  \
 103       0, 1, 1, 0, 0, 0, 1, 0, 0, 0 } }
 104
 105 #define CPU_MMX_FLAGS \
 106   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,  \
 107       0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
 108
 109 #define CPU_SSE_FLAGS \
 110   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0,  \
 111       0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
 112
 113 #define CPU_SSE2_FLAGS \
 114   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0,  \
 115       0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
 116
 117 #define CPU_SSE3_FLAGS \
 118   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0,  \
 119       0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
 120
 121 #define CPU_SSSE3_FLAGS \
 122   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0,  \
 123       1, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
 124
 125 #define CPU_SSE4_1_FLAGS \
 126   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0,  \
 127       1, 0, 0, 1, 0, 0, 0, 0, 0, 0 } }
 128
 129 #define CPU_SSE4_2_FLAGS \
 130   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0,  \
 131       1, 0, 0, 1, 1, 0, 0, 0, 0, 0 } }
 132
 133 #define CPU_VMX_FLAGS \
 134   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,  \
 135       0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
 136
 137 #define CPU_SMX_FLAGS \
 138   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,  \
 139       0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
 140
 141 #define CPU_3DNOW_FLAGS \
 142   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0,  \
 143       0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
 144
 145 #define CPU_3DNOWA_FLAGS \
 146   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0,  \
 147       0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
 148
 149 #define CPU_PADLOCK_FLAGS \
 150   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0,  \
 151       0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
 152
 153 #define CPU_SVME_FLAGS \
 154   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0,  \
 155       0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
 156
 157 #define CPU_SSE4A_FLAGS \
 158   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0,  \
 159       0, 1, 0, 0, 0, 0, 0, 0, 0, 0 } }
 160
 161 #define CPU_ABM_FLAGS \
 162   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,  \
 163       0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } }
 164
 165 #define CPU_SSE5_FLAGS \
 166   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0,  \
 167       0, 1, 1, 0, 0, 1, 0, 0, 0, 0 } }
 168
 169
 170 #define OPERAND_TYPE_NONE \
 171   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 172       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 173       0, 0, 0 } }
 174
 175 #define OPERAND_TYPE_REG8 \
 176   { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 177       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 178       0, 0, 0 } }
 179
 180 #define OPERAND_TYPE_REG16 \
 181   { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 182       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 183       0, 0, 0 } }
 184
 185 #define OPERAND_TYPE_REG32 \
 186   { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 187       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 188       0, 0, 0 } }
 189
 190 #define OPERAND_TYPE_REG64 \
 191   { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 192       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 193       0, 0, 0 } }
 194
 195 #define OPERAND_TYPE_IMM1 \
 196   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, \
 197       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 198       0, 0, 0 } }
 199
 200 #define OPERAND_TYPE_IMM8 \
 201   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, \
 202       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 203       0, 0, 0 } }
 204
 205 #define OPERAND_TYPE_IMM8S \
 206   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, \
 207       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 208       0, 0, 0 } }
 209
 210 #define OPERAND_TYPE_IMM16 \
 211   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
 212       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 213       0, 0, 0 } }
 214
 215 #define OPERAND_TYPE_IMM32 \
 216   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \
 217       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 218       0, 0, 0 } }
 219
 220 #define OPERAND_TYPE_IMM32S \
 221   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, \
 222       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 223       0, 0, 0 } }
 224
 225 #define OPERAND_TYPE_IMM64 \
 226   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
 227       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 228       0, 0, 0 } }
 229
 230 #define OPERAND_TYPE_BASEINDEX \
 231   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 232       0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 233       0, 0, 0 } }
 234
 235 #define OPERAND_TYPE_DISP8 \
 236   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
 237       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 238       0, 0, 0 } }
 239
 240 #define OPERAND_TYPE_DISP16 \
 241   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 242       1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 243       0, 0, 0 } }
 244
 245 #define OPERAND_TYPE_DISP32 \
 246   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 247       0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 248       0, 0, 0 } }
 249
 250 #define OPERAND_TYPE_DISP32S \
 251   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 252       0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 253       0, 0, 0 } }
 254
 255 #define OPERAND_TYPE_DISP64 \
 256   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 257       0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 258       0, 0, 0 } }
 259
 260 #define OPERAND_TYPE_INOUTPORTREG \
 261   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 262       0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 263       0, 0, 0 } }
 264
 265 #define OPERAND_TYPE_SHIFTCOUNT \
 266   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 267       0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 268       0, 0, 0 } }
 269
 270 #define OPERAND_TYPE_CONTROL \
 271   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 272       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 273       0, 0, 0 } }
 274
 275 #define OPERAND_TYPE_TEST \
 276   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 277       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 278       0, 0, 0 } }
 279
 280 #define OPERAND_TYPE_DEBUG \
 281   { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 282       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 283       0, 0, 0 } }
 284
 285 #define OPERAND_TYPE_FLOATREG \
 286   { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 287       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 288       0, 0, 0 } }
 289
 290 #define OPERAND_TYPE_FLOATACC \
 291   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 292       0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 293       0, 0, 0 } }
 294
 295 #define OPERAND_TYPE_SREG2 \
 296   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 297       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 298       0, 0, 0 } }
 299
 300 #define OPERAND_TYPE_SREG3 \
 301   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
 302       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 303       0, 0, 0 } }
 304
 305 #define OPERAND_TYPE_ACC \
 306   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 307       0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 308       0, 0, 0 } }
 309
 310 #define OPERAND_TYPE_JUMPABSOLUTE \
 311   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 312       0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 313       0, 0, 0 } }
 314
 315 #define OPERAND_TYPE_REGMMX \
 316   { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 317       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 318       0, 0, 0 } }
 319
 320 #define OPERAND_TYPE_REGXMM \
 321   { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 322       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 323       0, 0, 0 } }
 324
 325 #define OPERAND_TYPE_ESSEG \
 326   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 327       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 328       0, 0, 0 } }
 329
 330 #define OPERAND_TYPE_ACC32 \
 331   { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 332       0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
 333       0, 0, 0 } }
 334
 335 #define OPERAND_TYPE_ACC64 \
 336   { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 337       0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, \
 338       0, 0, 0 } }
 339
 340 #define OPERAND_TYPE_REG16_INOUTPORTREG \
 341   { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 342       0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 343       0, 0, 0 } }
 344
 345 #define OPERAND_TYPE_DISP16_32 \
 346   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 347       1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 348       0, 0, 0 } }
 349
 350 #define OPERAND_TYPE_ANYDISP \
 351   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
 352       1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 353       0, 0, 0 } }
 354
 355 #define OPERAND_TYPE_IMM16_32 \
 356   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, \
 357       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 358       0, 0, 0 } }
 359
 360 #define OPERAND_TYPE_IMM16_32S \
 361   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, \
 362       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 363       0, 0, 0 } }
 364
 365 #define OPERAND_TYPE_IMM16_32_32S \
 366   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
 367       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 368       0, 0, 0 } }
 369
 370 #define OPERAND_TYPE_IMM32_32S_DISP32 \
 371   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, \
 372       0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 373       0, 0, 0 } }
 374
 375 #define OPERAND_TYPE_IMM64_DISP64 \
 376   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
 377       0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 378       0, 0, 0 } }
 379
 380 #define OPERAND_TYPE_IMM32_32S_64_DISP32 \
 381   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, \
 382       0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 383       0, 0, 0 } }
 384
 385 #define OPERAND_TYPE_IMM32_32S_64_DISP32_64 \
 386   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, \
 387       0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 388       0, 0, 0 } }