include/opcode/hppa.h

   1 /* Table of opcodes for the PA-RISC.
   2    Copyright (C) 1990, 1991, 1993, 1995, 1999 Free Software Foundation, Inc.
   3
   4    Contributed by the Center for Software Science at the
   5    University of Utah (pa-gdb-bugs@cs.utah.edu).
   6
   7 This file is part of GAS, the GNU Assembler, and GDB, the GNU disassembler.
   8
   9 GAS/GDB is free software; you can redistribute it and/or modify
  10 it under the terms of the GNU General Public License as published by
  11 the Free Software Foundation; either version 1, or (at your option)
  12 any later version.
  13
  14 GAS/GDB is distributed in the hope that it will be useful,
  15 but WITHOUT ANY WARRANTY; without even the implied warranty of
  16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17 GNU General Public License for more details.
  18
  19 You should have received a copy of the GNU General Public License
  20 along with GAS or GDB; see the file COPYING.  If not, write to
  21 the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
  22
  23 #if !defined(__STDC__) && !defined(const)
  24 #define const
  25 #endif
  26
  27 /*
  28  * Structure of an opcode table entry.
  29  */
  30
  31 /* There are two kinds of delay slot nullification: normal which is
  32  * controled by the nullification bit, and conditional, which depends
  33  * on the direction of the branch and its success or failure.
  34  *
  35  * NONE is unfortunately #defined in the hiux system include files.
  36  * #undef it away.
  37  */
  38 #undef NONE
  39 struct pa_opcode
  40 {
  41     const char *name;
  42     unsigned long int match;    /* Bits that must be set...  */
  43     unsigned long int mask;     /* ... in these bits. */
  44     char *args;
  45     enum pa_arch arch;
  46     char flags;
  47 };
  48
  49 /* Enable/disable strict syntax checking.  Not currently used, but will
  50    be necessary for PA2.0 support in the future.  */
  51 #define FLAG_STRICT 0x1
  52
  53 /*
  54    All hppa opcodes are 32 bits.
  55
  56    The match component is a mask saying which bits must match a
  57    particular opcode in order for an instruction to be an instance
  58    of that opcode.
  59
  60    The args component is a string containing one character for each operand of
  61    the instruction.  Characters used as a prefix allow any second character to
  62    be used without conflicting with the main operand characters.
  63
  64    Bit positions in this description follow HP usage of lsb = 31,
  65    "at" is lsb of field.
  66
  67    In the args field, the following characters must match exactly:
  68
  69         '+,() '
  70
  71    In the args field, the following characters are unused:
  72
  73         '  "         -  /   34 6789:;< > @'
  74         '  C         M             [\]  '
  75         '    e g                     } '
  76
  77    Here are all the characters:
  78
  79         ' !"#$%&'()*+-,./0123456789:;<=>?@'
  80         'ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_'
  81         'abcdefghijklmnopqrstuvwxyz{|}~'
  82
  83 Kinds of operands:
  84    x    integer register field at 15.
  85    b    integer register field at 10.
  86    t    integer register field at 31.
  87    a    integer register field at 10 and 15 (for PERMH)
  88    5    5 bit immediate at 15.
  89    s    2 bit space specifier at 17.
  90    S    3 bit space specifier at 18.
  91    V    5 bit immediate value at 31
  92    i    11 bit immediate value at 31
  93    j    14 bit immediate value at 31
  94    k    21 bit immediate value at 31
  95    l    16 bit immediate value at 31 (wide mode only, unusual encoding).
  96    n    nullification for branch instructions
  97    N    nullification for spop and copr instructions
  98    w    12 bit branch displacement
  99    W    17 bit branch displacement (PC relative)
 100    X    22 bit branch displacement (PC relative)
 101    z    17 bit branch displacement (just a number, not an address)
 102
 103 Also these:
 104
 105    .    2 bit shift amount at 25
 106    *    4 bit shift amount at 25
 107    p    5 bit shift count at 26 (to support the SHD instruction) encoded as
 108         31-p
 109    ~    6 bit shift count at 20,22:26 encoded as 63-~.
 110    P    5 bit bit position at 26
 111    q    6 bit bit position at 20,22:26
 112    T    5 bit field length at 31 (encoded as 32-T)
 113    %    6 bit field length at 23,27:31 (variable extract/deposit)
 114    |    6 bit field length at 19,27:31 (fixed extract/deposit)
 115    A    13 bit immediate at 18 (to support the BREAK instruction)
 116    ^    like b, but describes a control register
 117    !    sar (cr11) register
 118    D    26 bit immediate at 31 (to support the DIAG instruction)
 119    $    9 bit immediate at 28 (to support POPBTS)
 120
 121    v    3 bit Special Function Unit identifier at 25
 122    O    20 bit Special Function Unit operation split between 15 bits at 20
 123         and 5 bits at 31
 124    o    15 bit Special Function Unit operation at 20
 125    2    22 bit Special Function Unit operation split between 17 bits at 20
 126         and 5 bits at 31
 127    1    15 bit Special Function Unit operation split between 10 bits at 20
 128         and 5 bits at 31
 129    0    10 bit Special Function Unit operation split between 5 bits at 20
 130         and 5 bits at 31
 131    u    3 bit coprocessor unit identifier at 25
 132    F    Source Floating Point Operand Format Completer encoded 2 bits at 20
 133    I    Source Floating Point Operand Format Completer encoded 1 bits at 20
 134         (for 0xe format FP instructions)
 135    G    Destination Floating Point Operand Format Completer encoded 2 bits at 18
 136    H    Floating Point Operand Format at 26 for 'fmpyadd' and 'fmpysub'
 137         (very similar to 'F')
 138
 139    r    5 bit immediate value at 31 (for the break instruction)
 140         (very similar to V above, except the value is unsigned instead of
 141         low_sign_ext)
 142    R    5 bit immediate value at 15 (for the ssm, rsm, probei instructions)
 143         (same as r above, except the value is in a different location)
 144    U    10 bit immediate value at 15 (for SSM, RSM on pa2.0)
 145    Q    5 bit immediate value at 10 (a bit position specified in
 146         the bb instruction. It's the same as r above, except the
 147         value is in a different location)
 148    B    5 bit immediate value at 10 (a bit position specified in
 149         the bb instruction. Similar to Q, but 64bit handling is
 150         different.
 151    Z    %r1 -- implicit target of addil instruction.
 152    L    ,%r2 completer for new syntax branch
 153    {    Source format completer for fcnv
 154    _    Destination format completer for fcnv
 155    h    cbit for fcmp
 156    =    gfx tests for ftest
 157    d    14bit offset for single precision FP long load/store.
 158    #    14bit offset for double precision FP load long/store.
 159    J    Yet another 14bit offset with an unusual encoding.
 160    K    Yet another 14bit offset with an unusual encoding.
 161    y    16bit offset for single precision FP long load/store (PA2.0 wide).
 162    &    16bit offset for double precision FP long load/store (PA2.0 wide).
 163    Y    %sr0,%r31 -- implicit target of be,l instruction.
 164    @    implicit immediate value of 0
 165
 166 Completer operands all have 'c' as the prefix:
 167
 168    cx   indexed load completer.
 169    cm   short load and store completer.
 170    cq   long load and store completer (like cm, but inserted into a
 171         different location in the target instruction).
 172    cs   store bytes short completer.
 173    ce   long load/store completer for LDW/STW with a different encoding than the
 174         others
 175    cc   load cache control hint
 176    cd   load and clear cache control hint
 177    cC   store cache control hint
 178    co   ordered access
 179
 180    cp   branch link and push completer
 181    cP   branch pop completer
 182    cl   branch link completer
 183    cg   branch gate completer
 184
 185    cw   read/write completer for PROBE
 186    cW   wide completer for MFCTL
 187    cL   local processor completer for cache control
 188    cZ   System Control Completer (to support LPA, LHA, etc.)
 189
 190    ci   correction completer for DCOR
 191    ca   add completer
 192    cy   32 bit add carry completer
 193    cY   64 bit add carry completer
 194    cv   signed overflow trap completer
 195    ct   trap on condition completer for ADDI, SUB
 196    cT   trap on condition completer for UADDCM
 197    cb   32 bit borrow completer for SUB
 198    cB   64 bit borrow completer for SUB
 199
 200    ch   left/right half completer
 201    cH   signed/unsigned saturation completer
 202    cS   signed/unsigned completer at 21
 203    c*   permutation completer
 204
 205 Condition operands all have '?' as the prefix:
 206
 207    ?f   Floating point compare conditions (encoded as 5 bits at 31)
 208
 209    ?a   add conditions
 210    ?A   64 bit add conditions
 211    ?@   add branch conditions followed by nullify
 212    ?d   non-negated add branch conditions
 213    ?D   negated add branch conditions
 214    ?w   wide mode non-negated add branch conditions
 215    ?W   wide mode negated add branch conditions
 216
 217    ?s   compare/subtract conditions
 218    ?S   64 bit compare/subtract conditions
 219    ?t   non-negated compare and branch conditions
 220    ?n   32 bit compare and branch conditions followed by nullify
 221    ?N   64 bit compare and branch conditions followed by nullify
 222    ?Q   64 bit compare and branch conditions for CMPIB instruction
 223
 224    ?l   logical conditions
 225    ?L   64 bit logical conditions
 226
 227    ?b   branch on bit conditions
 228    ?B   64 bit branch on bit conditions
 229
 230    ?x   shift/extract/deposit conditions
 231    ?X   64 bit shift/extract/deposit conditions
 232    ?y   shift/extract/deposit conditions followed by nullify for conditional
 233         branches
 234
 235    ?u   unit conditions
 236    ?U   64 bit unit conditions
 237
 238 Floating point registers all have 'f' as a prefix:
 239
 240    ft   target register at 31
 241    fT   target register with L/R halves at 31
 242    fa   operand 1 register at 10
 243    fA   operand 1 register with L/R halves at 10
 244    fX   Same as fA, except prints a space before register during disasm
 245    fb   operand 2 register at 15
 246    fB   operand 2 register with L/R halves at 15
 247    fC   operand 3 register with L/R halves at 16:18,21:23
 248    fe   Like fT, but encoding is different.
 249    fE   Same as fe, except prints a space before register during disasm.
 250    fx   target register at 15 (only for PA 2.0 long format FLDD/FSTD).
 251
 252 Float registers for fmpyadd and fmpysub:
 253
 254    fi   mult operand 1 register at 10
 255    fj   mult operand 2 register at 15
 256    fk   mult target register at 20
 257    fl   add/sub operand register at 25
 258    fm   add/sub target register at 31
 259
 260 */
 261
 262
 263 /* List of characters not to put a space after.  Note that
 264    "," is included, as the "spopN" operations use literal
 265    commas in their completer sections.  */
 266 static const char *const completer_chars = ",CcY<>?!@+&U~FfGHINnOoZMadu|/=0123%e$m}";
 267
 268 /* The order of the opcodes in this table is significant:
 269
 270    * The assembler requires that all instances of the same mnemonic must be
 271    consecutive.  If they aren't, the assembler will bomb at runtime.
 272
 273    * The disassembler should not care about the order of the opcodes.  */
 274
 275 static const struct pa_opcode pa_opcodes[] =
 276 {
 277
 278 /* Pseudo-instructions.  */
 279
 280 { "ldi",        0x34000000, 0xffe0c000, "j,x", pa10, 0},/* ldo val(r0),r */
 281
 282 { "call",       0xe800f000, 0xfc1ffffd, "n(b)", pa20, FLAG_STRICT},
 283 { "call",       0xe800a000, 0xffe0e000, "nW", pa10, FLAG_STRICT},
 284 { "ret",        0xe840d000, 0xfffffffd, "n", pa20, FLAG_STRICT},
 285
 286 { "cmpib",      0xec000000, 0xfc000000, "?Qn5,b,w", pa20, FLAG_STRICT},
 287 { "cmpib",      0x84000000, 0xf4000000, "?nn5,b,w", pa10, FLAG_STRICT},
 288 { "comib",      0x84000000, 0xfc000000, "?nn5,b,w", pa10, 0}, /* comib{tf}*/
 289 /* This entry is for the disassembler only.  It will never be used by
 290    assembler.  */
 291 { "comib",      0x8c000000, 0xfc000000, "?nn5,b,w", pa10, 0}, /* comib{tf}*/
 292 { "cmpb",       0x9c000000, 0xdc000000, "?Nnx,b,w", pa20, FLAG_STRICT},
 293 { "cmpb",       0x80000000, 0xf4000000, "?nnx,b,w", pa10, FLAG_STRICT},
 294 { "comb",       0x80000000, 0xfc000000, "?nnx,b,w", pa10, 0}, /* comb{tf} */
 295 /* This entry is for the disassembler only.  It will never be used by
 296    assembler.  */
 297 { "comb",       0x88000000, 0xfc000000, "?nnx,b,w", pa10, 0}, /* comb{tf} */
 298 { "addb",       0xa0000000, 0xf4000000, "?Wnx,b,w", pa20, FLAG_STRICT},
 299 { "addb",       0xa0000000, 0xfc000000, "?@nx,b,w", pa10, 0}, /* addb{tf} */
 300 /* This entry is for the disassembler only.  It will never be used by
 301    assembler.  */
 302 { "addb",       0xa8000000, 0xfc000000, "?@nx,b,w", pa10, 0},
 303 { "addib",      0xa4000000, 0xf4000000, "?Wn5,b,w", pa20, FLAG_STRICT},
 304 { "addib",      0xa4000000, 0xfc000000, "?@n5,b,w", pa10, 0}, /* addib{tf}*/
 305 /* This entry is for the disassembler only.  It will never be used by
 306    assembler.  */
 307 { "addib",      0xac000000, 0xfc000000, "?@n5,b,w", pa10, 0}, /* addib{tf}*/
 308 { "nop",        0x08000240, 0xffffffff, "", pa10, 0},      /* or 0,0,0 */
 309 { "copy",       0x08000240, 0xffe0ffe0, "x,t", pa10, 0},   /* or r,0,t */
 310 { "mtsar",      0x01601840, 0xffe0ffff, "x", pa10, 0}, /* mtctl r,cr11 */
 311
 312 /* Loads and Stores for integer registers.  */
 313
 314 { "ldd",        0x0c0010e0, 0xfc1f33e0, "cocc@(s,b),t", pa20, FLAG_STRICT},
 315 { "ldd",        0x0c0010e0, 0xfc1f33e0, "cocc@(b),t", pa20, FLAG_STRICT},
 316 { "ldd",        0x0c0000c0, 0xfc0013c0, "cxccx(s,b),t", pa20, FLAG_STRICT},
 317 { "ldd",        0x0c0000c0, 0xfc0013c0, "cxccx(b),t", pa20, FLAG_STRICT},
 318 { "ldd",        0x0c0010c0, 0xfc0013c0, "cmcc5(s,b),t", pa20, FLAG_STRICT},
 319 { "ldd",        0x0c0010c0, 0xfc0013c0, "cmcc5(b),t", pa20, FLAG_STRICT},
 320 { "ldd",        0x50000000, 0xfc000002, "cq&(b),x", pa20w, FLAG_STRICT},
 321 { "ldd",        0x50000000, 0xfc000002, "cq#(b),x", pa20, FLAG_STRICT},
 322 { "ldw",        0x48000000, 0xfc000000, "l(b),x", pa20w, FLAG_STRICT},
 323 { "ldw",        0x0c000080, 0xfc0013c0, "cxccx(s,b),t", pa10, FLAG_STRICT},
 324 { "ldw",        0x0c000080, 0xfc0013c0, "cxccx(b),t", pa10, FLAG_STRICT},
 325 { "ldw",        0x0c0010a0, 0xfc1f33e0, "cocc@(s,b),t", pa20, FLAG_STRICT},
 326 { "ldw",        0x0c0010a0, 0xfc1f33e0, "cocc@(b),t", pa20, FLAG_STRICT},
 327 { "ldw",        0x0c001080, 0xfc0013c0, "cmcc5(s,b),t", pa10, FLAG_STRICT},
 328 { "ldw",        0x0c001080, 0xfc0013c0, "cmcc5(b),t", pa10, FLAG_STRICT},
 329 { "ldw",        0x4c000000, 0xfc000000, "ceJ(s,b),x", pa10, FLAG_STRICT},
 330 { "ldw",        0x4c000000, 0xfc000000, "ceJ(b),x", pa10, FLAG_STRICT},
 331 { "ldw",        0x5c000004, 0xfc000006, "ceK(s,b),x", pa20, FLAG_STRICT},
 332 { "ldw",        0x5c000004, 0xfc000006, "ceK(b),x", pa20, FLAG_STRICT},
 333 { "ldw",        0x48000000, 0xfc000000, "j(s,b),x", pa10, 0},
 334 { "ldw",        0x48000000, 0xfc000000, "j(s,b),x", pa10, 0},
 335 { "ldw",        0x48000000, 0xfc000000, "j(b),x", pa10, 0},
 336 { "ldh",        0x44000000, 0xfc000000, "l(b),x", pa20w, FLAG_STRICT},
 337 { "ldh",        0x0c000040, 0xfc0013c0, "cxccx(s,b),t", pa10, FLAG_STRICT},
 338 { "ldh",        0x0c000040, 0xfc0013c0, "cxccx(b),t", pa10, FLAG_STRICT},
 339 { "ldh",        0x0c001060, 0xfc1f33e0, "cocc@(s,b),t", pa20, FLAG_STRICT},
 340 { "ldh",        0x0c001060, 0xfc1f33e0, "cocc@(b),t", pa20, FLAG_STRICT},
 341 { "ldh",        0x0c001040, 0xfc0013c0, "cmcc5(s,b),t", pa10, FLAG_STRICT},
 342 { "ldh",        0x0c001040, 0xfc0013c0, "cmcc5(b),t", pa10, FLAG_STRICT},
 343 { "ldh",        0x44000000, 0xfc000000, "j(s,b),x", pa10, 0},
 344 { "ldh",        0x44000000, 0xfc000000, "j(b),x", pa10, 0},
 345 { "ldb",        0x40000000, 0xfc000000, "l(b),x", pa20w, FLAG_STRICT},
 346 { "ldb",        0x0c000000, 0xfc0013c0, "cxccx(s,b),t", pa10, FLAG_STRICT},
 347 { "ldb",        0x0c000000, 0xfc0013c0, "cxccx(b),t", pa10, FLAG_STRICT},
 348 { "ldb",        0x0c001020, 0xfc1f33e0, "cocc@(s,b),t", pa20, FLAG_STRICT},
 349 { "ldb",        0x0c001020, 0xfc1f33e0, "cocc@(b),t", pa20, FLAG_STRICT},
 350 { "ldb",        0x0c001000, 0xfc0013c0, "cmcc5(s,b),t", pa10, FLAG_STRICT},
 351 { "ldb",        0x0c001000, 0xfc0013c0, "cmcc5(b),t", pa10, FLAG_STRICT},
 352 { "ldb",        0x40000000, 0xfc000000, "j(s,b),x", pa10, 0},
 353 { "ldb",        0x40000000, 0xfc000000, "j(b),x", pa10, 0},
 354 { "std",        0x0c0012e0, 0xfc0033ff, "cocCx,@(s,b)", pa20, FLAG_STRICT},
 355 { "std",        0x0c0012e0, 0xfc0033ff, "cocCx,@(b)", pa20, FLAG_STRICT},
 356 { "std",        0x0c0012c0, 0xfc0013c0, "cmcCx,V(s,b)", pa20, FLAG_STRICT},
 357 { "std",        0x0c0012c0, 0xfc0013c0, "cmcCx,V(b)", pa20, FLAG_STRICT},
 358 { "std",        0x70000000, 0xfc000002, "cqx,&(b)", pa20w, FLAG_STRICT},
 359 { "std",        0x70000000, 0xfc000002, "cqx,#(b)", pa20, FLAG_STRICT},
 360 { "stw",        0x68000000, 0xfc000000, "x,l(b)", pa20w, FLAG_STRICT},
 361 { "stw",        0x0c0012a0, 0xfc0013ff, "cocCx,@(s,b)", pa20, FLAG_STRICT},
 362 { "stw",        0x0c0012a0, 0xfc0013ff, "cocCx,@(b)", pa20, FLAG_STRICT},
 363 { "stw",        0x0c001280, 0xfc0013c0, "cmcCx,V(s,b)", pa10, FLAG_STRICT},
 364 { "stw",        0x0c001280, 0xfc0013c0, "cmcCx,V(b)", pa10, FLAG_STRICT},
 365 { "stw",        0x6c000000, 0xfc000000, "cex,J(s,b)", pa10, FLAG_STRICT},
 366 { "stw",        0x6c000000, 0xfc000000, "cex,J(b)", pa10, FLAG_STRICT},
 367 { "stw",        0x7c000004, 0xfc000006, "cex,K(s,b)", pa20, FLAG_STRICT},
 368 { "stw",        0x7c000004, 0xfc000006, "cex,K(b)", pa20, FLAG_STRICT},
 369 { "stw",        0x68000000, 0xfc000000, "x,j(s,b)", pa10, 0},
 370 { "stw",        0x68000000, 0xfc000000, "x,j(b)", pa10, 0},
 371 { "sth",        0x64000000, 0xfc000000, "x,l(b)", pa20w, FLAG_STRICT},
 372 { "sth",        0x0c001260, 0xfc0033ff, "cocCx,@(s,b)", pa20, FLAG_STRICT},
 373 { "sth",        0x0c001260, 0xfc0033ff, "cocCx,@(b)", pa20, FLAG_STRICT},
 374 { "sth",        0x0c001240, 0xfc0013c0, "cmcCx,V(s,b)", pa10, FLAG_STRICT},
 375 { "sth",        0x0c001240, 0xfc0013c0, "cmcCx,V(b)", pa10, FLAG_STRICT},
 376 { "sth",        0x64000000, 0xfc000000, "x,j(s,b)", pa10, 0},
 377 { "sth",        0x64000000, 0xfc000000, "x,j(b)", pa10, 0},
 378 { "stb",        0x60000000, 0xfc000000, "x,l(b)", pa20w, FLAG_STRICT},
 379 { "stb",        0x0c001220, 0xfc0033ff, "cocCx,@(s,b)", pa20, FLAG_STRICT},
 380 { "stb",        0x0c001220, 0xfc0033ff, "cocCx,@(b)", pa20, FLAG_STRICT},
 381 { "stb",        0x0c001200, 0xfc0013c0, "cmcCx,V(s,b)", pa10, FLAG_STRICT},
 382 { "stb",        0x0c001200, 0xfc0013c0, "cmcCx,V(b)", pa10, FLAG_STRICT},
 383 { "stb",        0x60000000, 0xfc000000, "x,j(s,b)", pa10, 0},
 384 { "stb",        0x60000000, 0xfc000000, "x,j(b)", pa10, 0},
 385 { "ldwm",       0x4c000000, 0xfc000000, "j(s,b),x", pa10, 0},
 386 { "ldwm",       0x4c000000, 0xfc000000, "j(b),x", pa10, 0},
 387 { "stwm",       0x6c000000, 0xfc000000, "x,j(s,b)", pa10, 0},
 388 { "stwm",       0x6c000000, 0xfc000000, "x,j(b)", pa10, 0},
 389 { "ldwx",       0x0c000080, 0xfc001fc0, "cxx(s,b),t", pa10, 0},
 390 { "ldwx",       0x0c000080, 0xfc001fc0, "cxx(b),t", pa10, 0},
 391 { "ldhx",       0x0c000040, 0xfc001fc0, "cxx(s,b),t", pa10, 0},
 392 { "ldhx",       0x0c000040, 0xfc001fc0, "cxx(b),t", pa10, 0},
 393 { "ldbx",       0x0c000000, 0xfc001fc0, "cxx(s,b),t", pa10, 0},
 394 { "ldbx",       0x0c000000, 0xfc001fc0, "cxx(b),t", pa10, 0},
 395 { "ldwa",       0x0c000180, 0xfc00d3c0, "cxccx(b),t", pa10, FLAG_STRICT},
 396 { "ldwa",       0x0c001180, 0xfc00d3c0, "cmcc5(b),t", pa10, FLAG_STRICT},
 397 { "ldcw",       0x0c0001c0, 0xfc0013c0, "cxcdx(s,b),t", pa10, FLAG_STRICT},
 398 { "ldcw",       0x0c0001c0, 0xfc0013c0, "cxcdx(b),t", pa10, FLAG_STRICT},
 399 { "ldcw",       0x0c0011c0, 0xfc0013c0, "cmcd5(s,b),t", pa10, FLAG_STRICT},
 400 { "ldcw",       0x0c0011c0, 0xfc0013c0, "cmcd5(b),t", pa10, FLAG_STRICT},
 401 { "stwa",       0x0c0013a0, 0xfc00d3ff, "cocCx,@(b)", pa20, FLAG_STRICT},
 402 { "stwa",       0x0c001380, 0xfc00d3c0, "cmcCx,V(b)", pa10, FLAG_STRICT},
 403 { "stby",       0x0c001300, 0xfc0013c0, "cscCx,V(s,b)", pa10, FLAG_STRICT},
 404 { "stby",       0x0c001300, 0xfc0013c0, "cscCx,V(b)", pa10, FLAG_STRICT},
 405 { "ldda",       0x0c000100, 0xfc00d3c0, "cxccx(b),t", pa20, FLAG_STRICT},
 406 { "ldda",       0x0c001100, 0xfc00d3c0, "cmcc5(b),t", pa20, FLAG_STRICT},
 407 { "ldcd",       0x0c000140, 0xfc0013c0, "cxcdx(s,b),t", pa20, FLAG_STRICT},
 408 { "ldcd",       0x0c000140, 0xfc0013c0, "cxcdx(b),t", pa20, FLAG_STRICT},
 409 { "ldcd",       0x0c001140, 0xfc0013c0, "cmcd5(s,b),t", pa20, FLAG_STRICT},
 410 { "ldcd",       0x0c001140, 0xfc0013c0, "cmcd5(b),t", pa20, FLAG_STRICT},
 411 { "stda",       0x0c0013e0, 0xfc0033ff, "cocCx,@(s,b)", pa20, FLAG_STRICT},
 412 { "stda",       0x0c0013e0, 0xfc0033ff, "cocCx,@(b)", pa20, FLAG_STRICT},
 413 { "stda",       0x0c0013c0, 0xfc0013c0, "cmcCx,V(s,b)", pa20, FLAG_STRICT},
 414 { "stda",       0x0c0013c0, 0xfc0013c0, "cmcCx,V(b)", pa20, FLAG_STRICT},
 415 { "ldwax",      0x0c000180, 0xfc00dfc0, "cxx(b),t", pa10, 0},
 416 { "ldcwx",      0x0c0001c0, 0xfc001fc0, "cxx(s,b),t", pa10, 0},
 417 { "ldcwx",      0x0c0001c0, 0xfc001fc0, "cxx(b),t", pa10, 0},
 418 { "ldws",       0x0c001080, 0xfc001fc0, "cm5(s,b),t", pa10, 0},
 419 { "ldws",       0x0c001080, 0xfc001fc0, "cm5(b),t", pa10, 0},
 420 { "ldhs",       0x0c001040, 0xfc001fc0, "cm5(s,b),t", pa10, 0},
 421 { "ldhs",       0x0c001040, 0xfc001fc0, "cm5(b),t", pa10, 0},
 422 { "ldbs",       0x0c001000, 0xfc001fc0, "cm5(s,b),t", pa10, 0},
 423 { "ldbs",       0x0c001000, 0xfc001fc0, "cm5(b),t", pa10, 0},
 424 { "ldwas",      0x0c001180, 0xfc00dfc0, "cm5(b),t", pa10, 0},
 425 { "ldcws",      0x0c0011c0, 0xfc001fc0, "cm5(s,b),t", pa10, 0},
 426 { "ldcws",      0x0c0011c0, 0xfc001fc0, "cm5(b),t", pa10, 0},
 427 { "stws",       0x0c001280, 0xfc001fc0, "cmx,V(s,b)", pa10, 0},
 428 { "stws",       0x0c001280, 0xfc001fc0, "cmx,V(b)", pa10, 0},
 429 { "sths",       0x0c001240, 0xfc001fc0, "cmx,V(s,b)", pa10, 0},
 430 { "sths",       0x0c001240, 0xfc001fc0, "cmx,V(b)", pa10, 0},
 431 { "stbs",       0x0c001200, 0xfc001fc0, "cmx,V(s,b)", pa10, 0},
 432 { "stbs",       0x0c001200, 0xfc001fc0, "cmx,V(b)", pa10, 0},
 433 { "stwas",      0x0c001380, 0xfc00dfc0, "cmx,V(b)", pa10, 0},
 434 { "stdby",      0x0c001340, 0xfc0013c0, "cscCx,V(s,b)", pa20, FLAG_STRICT},
 435 { "stdby",      0x0c001340, 0xfc0013c0, "cscCx,V(b)", pa20, FLAG_STRICT},
 436 { "stbys",      0x0c001300, 0xfc001fc0, "csx,V(s,b)", pa10, 0},
 437 { "stbys",      0x0c001300, 0xfc001fc0, "csx,V(b)", pa10, 0},
 438
 439 /* Immediate instructions.  */
 440 { "ldo",        0x34000000, 0xfc00c000, "j(b),x", pa10, 0},
 441 { "ldil",       0x20000000, 0xfc000000, "k,b", pa10, 0},
 442 { "addil",      0x28000000, 0xfc000000, "k,b,Z", pa10, 0},
 443 { "addil",      0x28000000, 0xfc000000, "k,b", pa10, 0},
 444
 445 /* Branching instructions.  */
 446 { "b",          0xe8008000, 0xfc00e000, "cpnXL", pa20, FLAG_STRICT},
 447 { "b",          0xe800a000, 0xfc00e000, "clnXL", pa20, FLAG_STRICT},
 448 { "b",          0xe8000000, 0xfc00e000, "clnW,b", pa10, FLAG_STRICT},
 449 { "b",          0xe8002000, 0xfc00e000, "cgnW,b", pa10, FLAG_STRICT},
 450 { "b",          0xe8000000, 0xffe0e000, "nW", pa10, 0},  /* b,l foo,r0 */
 451 { "bl",         0xe8000000, 0xfc00e000, "nW,b", pa10, 0},
 452 { "gate",       0xe8002000, 0xfc00e000, "nW,b", pa10, 0},
 453 { "blr",        0xe8004000, 0xfc00e001, "nx,b", pa10, 0},
 454 { "bv",         0xe800c000, 0xfc00fffd, "nx(b)", pa10, 0},
 455 { "bv",         0xe800c000, 0xfc00fffd, "n(b)", pa10, 0},
 456 { "bve",        0xe800f001, 0xfc1ffffd, "cpn(b)L", pa20, FLAG_STRICT},
 457 { "bve",        0xe800f000, 0xfc1ffffd, "cln(b)L", pa20, FLAG_STRICT},
 458 { "bve",        0xe800d001, 0xfc1ffffd, "cPn(b)", pa20, FLAG_STRICT},
 459 { "bve",        0xe800d000, 0xfc1ffffd, "n(b)", pa20, FLAG_STRICT},
 460 { "be",         0xe4000000, 0xfc000000, "clnz(S,b),Y", pa10, FLAG_STRICT},
 461 { "be",         0xe4000000, 0xfc000000, "clnz(b),Y", pa10, FLAG_STRICT},
 462 { "be",         0xe0000000, 0xfc000000, "nz(S,b)", pa10, 0},
 463 { "be",         0xe0000000, 0xfc000000, "nz(b)", pa10, 0},
 464 { "ble",        0xe4000000, 0xfc000000, "nz(S,b)", pa10, 0},
 465 { "movb",       0xc8000000, 0xfc000000, "?ynx,b,w", pa10, 0},
 466 { "movib",      0xcc000000, 0xfc000000, "?yn5,b,w", pa10, 0},
 467 { "combt",      0x80000000, 0xfc000000, "?tnx,b,w", pa10, 0},
 468 { "combf",      0x88000000, 0xfc000000, "?tnx,b,w", pa10, 0},
 469 { "comibt",     0x84000000, 0xfc000000, "?tn5,b,w", pa10, 0},
 470 { "comibf",     0x8c000000, 0xfc000000, "?tn5,b,w", pa10, 0},
 471 { "addbt",      0xa0000000, 0xfc000000, "?dnx,b,w", pa10, 0},
 472 { "addbf",      0xa8000000, 0xfc000000, "?dnx,b,w", pa10, 0},
 473 { "addibt",     0xa4000000, 0xfc000000, "?dn5,b,w", pa10, 0},
 474 { "addibf",     0xac000000, 0xfc000000, "?dn5,b,w", pa10, 0},
 475 { "bb",         0xc0006000, 0xffe06000, "?Bnx,!,w", pa20, FLAG_STRICT},
 476 { "bb",         0xc4004000, 0xfc004000, "?Bnx,B,w", pa20, FLAG_STRICT},
 477 { "bb",         0xc0004000, 0xffe06000, "?bnx,!,w", pa10, FLAG_STRICT},
 478 { "bb",         0xc4004000, 0xfc004000, "?bnx,Q,w", pa10, 0},
 479 { "bvb",        0xc0004000, 0xffe04000, "?bnx,w", pa10, 0},
 480 { "clrbts",     0xe8004005, 0xffffffff, "", pa20, FLAG_STRICT},
 481 { "popbts",     0xe8004005, 0xfffff007, "$", pa20, FLAG_STRICT},
 482 { "pushnom",    0xe8004001, 0xffffffff, "", pa20, FLAG_STRICT},
 483 { "pushbts",    0xe8004001, 0xffe0ffff, "x", pa20, FLAG_STRICT},
 484
 485 /* Computation Instructions.  */
 486
 487 { "cmpclr",     0x080008a0, 0xfc000fe0, "?Sx,b,t", pa20, FLAG_STRICT},
 488 { "cmpclr",     0x08000880, 0xfc000fe0, "?sx,b,t", pa10, FLAG_STRICT},
 489 { "comclr",     0x08000880, 0xfc000fe0, "?sx,b,t", pa10, 0},
 490 { "or",         0x08000260, 0xfc000fe0, "?Lx,b,t", pa20, FLAG_STRICT},
 491 { "or",         0x08000240, 0xfc000fe0, "?lx,b,t", pa10, 0},
 492 { "xor",        0x080002a0, 0xfc000fe0, "?Lx,b,t", pa20, FLAG_STRICT},
 493 { "xor",        0x08000280, 0xfc000fe0, "?lx,b,t", pa10, 0},
 494 { "and",        0x08000220, 0xfc000fe0, "?Lx,b,t", pa20, FLAG_STRICT},
 495 { "and",        0x08000200, 0xfc000fe0, "?lx,b,t", pa10, 0},
 496 { "andcm",      0x08000020, 0xfc000fe0, "?Lx,b,t", pa20, FLAG_STRICT},
 497 { "andcm",      0x08000000, 0xfc000fe0, "?lx,b,t", pa10, 0},
 498 { "uxor",       0x080003a0, 0xfc000fe0, "?Ux,b,t", pa20, FLAG_STRICT},
 499 { "uxor",       0x08000380, 0xfc000fe0, "?ux,b,t", pa10, 0},
 500 { "uaddcm",     0x080009a0, 0xfc000fa0, "cT?Ux,b,t", pa20, FLAG_STRICT},
 501 { "uaddcm",     0x08000980, 0xfc000fa0, "cT?ux,b,t", pa10, FLAG_STRICT},
 502 { "uaddcm",     0x08000980, 0xfc000fe0, "?ux,b,t", pa10, 0},
 503 { "uaddcmt",    0x080009c0, 0xfc000fe0, "?ux,b,t", pa10, 0},
 504 { "dcor",       0x08000ba0, 0xfc1f0fa0, "ci?Ub,t", pa20, FLAG_STRICT},
 505 { "dcor",       0x08000b80, 0xfc1f0fa0, "ci?ub,t", pa10, FLAG_STRICT},
 506 { "dcor",       0x08000b80, 0xfc1f0fe0, "?ub,t",   pa10, 0},
 507 { "idcor",      0x08000bc0, 0xfc1f0fe0, "?ub,t",   pa10, 0},
 508 { "addi",       0xb0000000, 0xfc000000, "ct?ai,b,x", pa10, FLAG_STRICT},
 509 { "addi",       0xb4000000, 0xfc000000, "cv?ai,b,x", pa10, FLAG_STRICT},
 510 { "addi",       0xb4000000, 0xfc000800, "?ai,b,x", pa10, 0},
 511 { "addio",      0xb4000800, 0xfc000800, "?ai,b,x", pa10, 0},
 512 { "addit",      0xb0000000, 0xfc000800, "?ai,b,x", pa10, 0},
 513 { "addito",     0xb0000800, 0xfc000800, "?ai,b,x", pa10, 0},
 514 { "add",        0x08000720, 0xfc0007e0, "cY?Ax,b,t", pa20, FLAG_STRICT},
 515 { "add",        0x08000700, 0xfc0007e0, "cy?ax,b,t", pa10, FLAG_STRICT},
 516 { "add",        0x08000220, 0xfc0003e0, "ca?Ax,b,t", pa20, FLAG_STRICT},
 517 { "add",        0x08000200, 0xfc0003e0, "ca?ax,b,t", pa10, FLAG_STRICT},
 518 { "add",        0x08000600, 0xfc000fe0, "?ax,b,t", pa10, 0},
 519 { "addl",       0x08000a00, 0xfc000fe0, "?ax,b,t", pa10, 0},
 520 { "addo",       0x08000e00, 0xfc000fe0, "?ax,b,t", pa10, 0},
 521 { "addc",       0x08000700, 0xfc000fe0, "?ax,b,t", pa10, 0},
 522 { "addco",      0x08000f00, 0xfc000fe0, "?ax,b,t", pa10, 0},
 523 { "sub",        0x080004e0, 0xfc0007e0, "ct?Sx,b,t", pa20, FLAG_STRICT},
 524 { "sub",        0x080004c0, 0xfc0007e0, "ct?sx,b,t", pa10, FLAG_STRICT},
 525 { "sub",        0x08000520, 0xfc0007e0, "cB?Sx,b,t", pa20, FLAG_STRICT},
 526 { "sub",        0x08000500, 0xfc0007e0, "cb?sx,b,t", pa10, FLAG_STRICT},
 527 { "sub",        0x08000420, 0xfc0007e0, "cv?Sx,b,t", pa20, FLAG_STRICT},
 528 { "sub",        0x08000400, 0xfc0007e0, "cv?sx,b,t", pa10, FLAG_STRICT},
 529 { "sub",        0x08000400, 0xfc000fe0, "?sx,b,t", pa10, 0},
 530 { "subo",       0x08000c00, 0xfc000fe0, "?sx,b,t", pa10, 0},
 531 { "subb",       0x08000500, 0xfc000fe0, "?sx,b,t", pa10, 0},
 532 { "subbo",      0x08000d00, 0xfc000fe0, "?sx,b,t", pa10, 0},
 533 { "subt",       0x080004c0, 0xfc000fe0, "?sx,b,t", pa10, 0},
 534 { "subto",      0x08000cc0, 0xfc000fe0, "?sx,b,t", pa10, 0},
 535 { "ds",         0x08000440, 0xfc000fe0, "?sx,b,t", pa10, 0},
 536 { "subi",       0x94000000, 0xfc000000, "cv?si,b,x", pa10, FLAG_STRICT},
 537 { "subi",       0x94000000, 0xfc000800, "?si,b,x", pa10, 0},
 538 { "subio",      0x94000800, 0xfc000800, "?si,b,x", pa10, 0},
 539 { "cmpiclr",    0x90000800, 0xfc000800, "?Si,b,x", pa20, FLAG_STRICT},
 540 { "cmpiclr",    0x90000000, 0xfc000800, "?si,b,x", pa10, FLAG_STRICT},
 541 { "comiclr",    0x90000000, 0xfc000800, "?si,b,x", pa10, 0},
 542 { "shladd",     0x08000220, 0xfc000320, "ca?Ax,.,b,t", pa20, FLAG_STRICT},
 543 { "shladd",     0x08000200, 0xfc000320, "ca?ax,.,b,t", pa10, FLAG_STRICT},
 544 { "sh1add",     0x08000640, 0xfc000fe0, "?ax,b,t", pa10, 0},
 545 { "sh1addl",    0x08000a40, 0xfc000fe0, "?ax,b,t", pa10, 0},
 546 { "sh1addo",    0x08000e40, 0xfc000fe0, "?ax,b,t", pa10, 0},
 547 { "sh2add",     0x08000680, 0xfc000fe0, "?ax,b,t", pa10, 0},
 548 { "sh2addl",    0x08000a80, 0xfc000fe0, "?ax,b,t", pa10, 0},
 549 { "sh2addo",    0x08000e80, 0xfc000fe0, "?ax,b,t", pa10, 0},
 550 { "sh3add",     0x080006c0, 0xfc000fe0, "?ax,b,t", pa10, 0},
 551 { "sh3addl",    0x08000ac0, 0xfc000fe0, "?ax,b,t", pa10, 0},
 552 { "sh3addo",    0x08000ec0, 0xfc000fe0, "?ax,b,t", pa10, 0},
 553
 554 /* Subword Operation Instructions.  */
 555
 556 { "hadd",       0x08000300, 0xfc00ff20, "cHx,b,t", pa20, FLAG_STRICT},
 557 { "havg",       0x080002c0, 0xfc00ffe0, "x,b,t", pa20, FLAG_STRICT},
 558 { "hshl",       0xf8008800, 0xffe0fc20, "x,*,t", pa20, FLAG_STRICT},
 559 { "hshladd",    0x08000700, 0xfc00ff20, "x,.,b,t", pa20, FLAG_STRICT},
 560 { "hshr",       0xf800c800, 0xfc1ff820, "cSb,*,t", pa20, FLAG_STRICT},
 561 { "hshradd",    0x08000500, 0xfc00ff20, "x,.,b,t", pa20, FLAG_STRICT},
 562 { "hsub",       0x08000100, 0xfc00ff20, "cHx,b,t", pa20, FLAG_STRICT},
 563 { "mixh",       0xf8008400, 0xfc009fe0, "chx,b,t", pa20, FLAG_STRICT},
 564 { "mixw",       0xf8008000, 0xfc009fe0, "chx,b,t", pa20, FLAG_STRICT},
 565 { "permh",      0xf8000000, 0xfc009020, "c*a,t", pa20, FLAG_STRICT},
 566
 567
 568 /* Extract and Deposit Instructions.  */
 569
 570 { "shrpd",      0xd0000200, 0xfc001fe0, "?Xx,b,!,t", pa20, FLAG_STRICT},
 571 { "shrpd",      0xd0000400, 0xfc001400, "?Xx,b,~,t", pa20, FLAG_STRICT},
 572 { "shrpw",      0xd0000000, 0xfc001fe0, "?xx,b,!,t", pa10, FLAG_STRICT},
 573 { "shrpw",      0xd0000800, 0xfc001c00, "?xx,b,p,t", pa10, FLAG_STRICT},
 574 { "vshd",       0xd0000000, 0xfc001fe0, "?xx,b,t", pa10, 0},
 575 { "shd",        0xd0000800, 0xfc001c00, "?xx,b,p,t", pa10, 0},
 576 { "extrd",      0xd0001200, 0xfc001ae0, "cS?Xb,!,%,x", pa20, FLAG_STRICT},
 577 { "extrd",      0xd8000000, 0xfc000000, "cS?Xb,q,|,x", pa20, FLAG_STRICT},
 578 { "extrw",      0xd0001000, 0xfc001be0, "cS?xb,!,T,x", pa10, FLAG_STRICT},
 579 { "extrw",      0xd0001800, 0xfc001800, "cS?xb,P,T,x", pa10, FLAG_STRICT},
 580 { "vextru",     0xd0001000, 0xfc001fe0, "?xb,T,x", pa10, 0},
 581 { "vextrs",     0xd0001400, 0xfc001fe0, "?xb,T,x", pa10, 0},
 582 { "extru",      0xd0001800, 0xfc001c00, "?xb,P,T,x", pa10, 0},
 583 { "extrs",      0xd0001c00, 0xfc001c00, "?xb,P,T,x", pa10, 0},
 584 { "depd",       0xd4000200, 0xfc001ae0, "cz?Xx,!,%,b", pa20, FLAG_STRICT},
 585 { "depd",       0xf0000000, 0xfc000000, "cz?Xx,~,|,b", pa20, FLAG_STRICT},
 586 { "depdi",      0xd4001200, 0xfc001ae0, "cz?X5,!,%,b", pa20, FLAG_STRICT},
 587 { "depdi",      0xf4000000, 0xfc000000, "cz?X5,~,|,b", pa20, FLAG_STRICT},
 588 { "depw",       0xd4000000, 0xfc001be0, "cz?xx,!,T,b", pa10, FLAG_STRICT},
 589 { "depw",       0xd4000800, 0xfc001800, "cz?xx,p,T,b", pa10, FLAG_STRICT},
 590 { "depwi",      0xd4001000, 0xfc001be0, "cz?x5,!,T,b", pa10, FLAG_STRICT},
 591 { "depwi",      0xd4001800, 0xfc001800, "cz?x5,p,T,b", pa10, FLAG_STRICT},
 592 { "zvdep",      0xd4000000, 0xfc001fe0, "?xx,T,b", pa10, 0},
 593 { "vdep",       0xd4000400, 0xfc001fe0, "?xx,T,b", pa10, 0},
 594 { "zdep",       0xd4000800, 0xfc001c00, "?xx,p,T,b", pa10, 0},
 595 { "dep",        0xd4000c00, 0xfc001c00, "?xx,p,T,b", pa10, 0},
 596 { "zvdepi",     0xd4001000, 0xfc001fe0, "?x5,T,b", pa10, 0},
 597 { "vdepi",      0xd4001400, 0xfc001fe0, "?x5,T,b", pa10, 0},
 598 { "zdepi",      0xd4001800, 0xfc001c00, "?x5,p,T,b", pa10, 0},
 599 { "depi",       0xd4001c00, 0xfc001c00, "?x5,p,T,b", pa10, 0},
 600
 601 /* System Control Instructions.  */
 602
 603 { "break",      0x00000000, 0xfc001fe0, "r,A", pa10, 0},
 604 { "rfi",        0x00000c00, 0xffffff1f, "cr", pa10, FLAG_STRICT},
 605 { "rfi",        0x00000c00, 0xffffffff, "", pa10, 0},
 606 { "rfir",       0x00000ca0, 0xffffffff, "", pa11, 0},
 607 { "ssm",        0x00000d60, 0xfc00ffe0, "U,t", pa20, FLAG_STRICT},
 608 { "ssm",        0x00000d60, 0xffe0ffe0, "R,t", pa10, 0},
 609 { "rsm",        0x00000e60, 0xfc00ffe0, "U,t", pa20, FLAG_STRICT},
 610 { "rsm",        0x00000e60, 0xffe0ffe0, "R,t", pa10, 0},
 611 { "mtsm",       0x00001860, 0xffe0ffff, "x", pa10, 0},
 612 { "ldsid",      0x000010a0, 0xfc1f3fe0, "(s,b),t", pa10, 0},
 613 { "ldsid",      0x000010a0, 0xfc1f3fe0, "(b),t", pa10, 0},
 614 { "mtsp",       0x00001820, 0xffe01fff, "x,S", pa10, 0},
 615 { "mtctl",      0x00001840, 0xfc00ffff, "x,^", pa10, 0},
 616 { "mtsarcm",    0x016018C0, 0xffe0ffff, "x", pa20, FLAG_STRICT},
 617 { "mfia",       0x000014A0, 0xffffffe0, "t", pa20, FLAG_STRICT},
 618 { "mfsp",       0x000004a0, 0xffff1fe0, "S,t", pa10, 0},
 619 { "mfctl",      0x016048a0, 0xffffffe0, "cW!,t", pa20, FLAG_STRICT},
 620 { "mfctl",      0x000008a0, 0xfc1fffe0, "^,t", pa10, 0},
 621 { "sync",       0x00000400, 0xffffffff, "", pa10, 0},
 622 { "syncdma",    0x00100400, 0xffffffff, "", pa10, 0},
 623 { "probe",      0x04001180, 0xfc003fa0, "cw(s,b),x,t", pa10, FLAG_STRICT},
 624 { "probe",      0x04001180, 0xfc003fa0, "cw(b),x,t", pa10, FLAG_STRICT},
 625 { "probei",     0x04003180, 0xfc003fa0, "cw(s,b),R,t", pa10, FLAG_STRICT},
 626 { "probei",     0x04003180, 0xfc003fa0, "cw(b),R,t", pa10, FLAG_STRICT},
 627 { "prober",     0x04001180, 0xfc003fe0, "(s,b),x,t", pa10, 0},
 628 { "prober",     0x04001180, 0xfc003fe0, "(b),x,t", pa10, 0},
 629 { "proberi",    0x04003180, 0xfc003fe0, "(s,b),R,t", pa10, 0},
 630 { "proberi",    0x04003180, 0xfc003fe0, "(b),R,t", pa10, 0},
 631 { "probew",     0x040011c0, 0xfc003fe0, "(s,b),x,t", pa10, 0},
 632 { "probew",     0x040011c0, 0xfc003fe0, "(b),x,t", pa10, 0},
 633 { "probewi",    0x040031c0, 0xfc003fe0, "(s,b),R,t", pa10, 0},
 634 { "probewi",    0x040031c0, 0xfc003fe0, "(b),R,t", pa10, 0},
 635 { "lpa",        0x04001340, 0xfc003fc0, "cZx(s,b),t", pa10, 0},
 636 { "lpa",        0x04001340, 0xfc003fc0, "cZx(b),t", pa10, 0},
 637 { "lha",        0x04001300, 0xfc003fc0, "cZx(s,b),t", pa10, 0},
 638 { "lha",        0x04001300, 0xfc003fc0, "cZx(b),t", pa10, 0},
 639 { "lci",        0x04001300, 0xfc003fe0, "x(s,b),t", pa10, 0},
 640 { "lci",        0x04001300, 0xfc003fe0, "x(b),t", pa10, 0},
 641 { "pdtlb",      0x04001600, 0xfc003fdf, "cLcZx(s,b)", pa20, FLAG_STRICT},
 642 { "pdtlb",      0x04001600, 0xfc003fdf, "cLcZx(b)", pa20, FLAG_STRICT},
 643 { "pdtlb",      0x04001200, 0xfc003fdf, "cZx(s,b)", pa10, 0},
 644 { "pdtlb",      0x04001200, 0xfc003fdf, "cZx(b)", pa10, 0},
 645 { "pitlb",      0x04000600, 0xfc001fdf, "cLcZx(S,b)", pa20, FLAG_STRICT},
 646 { "pitlb",      0x04000600, 0xfc001fdf, "cLcZx(b)", pa20, FLAG_STRICT},
 647 { "pitlb",      0x04000200, 0xfc001fdf, "cZx(S,b)", pa10, 0},
 648 { "pitlb",      0x04000200, 0xfc001fdf, "cZx(b)", pa10, 0},
 649 { "pdtlbe",     0x04001240, 0xfc003fdf, "cZx(s,b)", pa10, 0},
 650 { "pdtlbe",     0x04001240, 0xfc003fdf, "cZx(b)", pa10, 0},
 651 { "pitlbe",     0x04000240, 0xfc001fdf, "cZx(S,b)", pa10, 0},
 652 { "pitlbe",     0x04000240, 0xfc001fdf, "cZx(b)", pa10, 0},
 653 { "idtlba",     0x04001040, 0xfc003fff, "x,(s,b)", pa10, 0},
 654 { "idtlba",     0x04001040, 0xfc003fff, "x,(b)", pa10, 0},
 655 { "iitlba",     0x04000040, 0xfc001fff, "x,(S,b)", pa10, 0},
 656 { "iitlba",     0x04000040, 0xfc001fff, "x,(b)", pa10, 0},
 657 { "idtlbp",     0x04001000, 0xfc003fff, "x,(s,b)", pa10, 0},
 658 { "idtlbp",     0x04001000, 0xfc003fff, "x,(b)", pa10, 0},
 659 { "iitlbp",     0x04000000, 0xfc001fff, "x,(S,b)", pa10, 0},
 660 { "iitlbp",     0x04000000, 0xfc001fff, "x,(b)", pa10, 0},
 661 { "pdc",        0x04001380, 0xfc003fdf, "cZx(s,b)", pa10, 0},
 662 { "pdc",        0x04001380, 0xfc003fdf, "cZx(b)", pa10, 0},
 663 { "fdc",        0x04001280, 0xfc003fdf, "cZx(s,b)", pa10, 0},
 664 { "fdc",        0x04001280, 0xfc003fdf, "cZx(b)", pa10, 0},
 665 { "fic",        0x04000280, 0xfc001fdf, "cZx(S,b)", pa10, 0},
 666 { "fic",        0x04000280, 0xfc001fdf, "cZx(b)", pa10, 0},
 667 { "fdce",       0x040012c0, 0xfc003fdf, "cZx(s,b)", pa10, 0},
 668 { "fdce",       0x040012c0, 0xfc003fdf, "cZx(b)", pa10, 0},
 669 { "fice",       0x040002c0, 0xfc001fdf, "cZx(S,b)", pa10, 0},
 670 { "fice",       0x040002c0, 0xfc001fdf, "cZx(b)", pa10, 0},
 671 { "diag",       0x14000000, 0xfc000000, "D", pa10, 0},
 672 { "idtlbt",     0x04001800, 0xfc00ffff, "x,b", pa20, FLAG_STRICT},
 673 { "iitlbt",     0x04000800, 0xfc00ffff, "x,b", pa20, FLAG_STRICT},
 674
 675 /* These may be specific to certain versions of the PA.  Joel claimed
 676    they were 72000 (7200?) specific.  However, I'm almost certain the
 677    mtcpu/mfcpu were undocumented, but available in the older 700 machines.  */
 678 { "mtcpu",      0x14001600, 0xfc00ffff, "x,^", pa10, 0},
 679 { "mfcpu",      0x14001A00, 0xfc00ffff, "^,x", pa10, 0},
 680 { "tocen",      0x14403600, 0xffffffff, "", pa10, 0},
 681 { "tocdis",     0x14401620, 0xffffffff, "", pa10, 0},
 682 { "shdwgr",     0x14402600, 0xffffffff, "", pa10, 0},
 683 { "grshdw",     0x14400620, 0xffffffff, "", pa10, 0},
 684
 685 /* gfw and gfr are not in the HP PA 1.1 manual, but they are in either
 686    the Timex FPU or the Mustang ERS (not sure which) manual.  */
 687 { "gfw",        0x04001680, 0xfc003fdf, "cZx(s,b)", pa11, 0},
 688 { "gfw",        0x04001680, 0xfc003fdf, "cZx(b)", pa11, 0},
 689 { "gfr",        0x04001a80, 0xfc003fdf, "cZx(s,b)", pa11, 0},
 690 { "gfr",        0x04001a80, 0xfc003fdf, "cZx(b)", pa11, 0},
 691
 692 /* Floating Point Coprocessor Instructions.  */
 693
 694 { "fldw",       0x24001020, 0xfc1f33a0, "cocc@(s,b),fT", pa20, FLAG_STRICT},
 695 { "fldw",       0x24001020, 0xfc1f33a0, "cocc@(b),fT", pa20, FLAG_STRICT},
 696 { "fldw",       0x24000000, 0xfc001380, "cxccx(s,b),fT", pa10, FLAG_STRICT},
 697 { "fldw",       0x24000000, 0xfc001380, "cxccx(b),fT", pa10, FLAG_STRICT},
 698 { "fldw",       0x24001000, 0xfc001380, "cmcc5(s,b),fT", pa10, FLAG_STRICT},
 699 { "fldw",       0x24001000, 0xfc001380, "cmcc5(b),fT", pa10, FLAG_STRICT},
 700 { "fldw",       0x5c000000, 0xfc000004, "y(b),fe", pa20w, FLAG_STRICT},
 701 { "fldw",       0x58000000, 0xfc000000, "cJy(b),fe", pa20w, FLAG_STRICT},
 702 { "fldw",       0x5c000000, 0xfc000004, "d(b),fe", pa20, FLAG_STRICT},
 703 { "fldw",       0x58000000, 0xfc000000, "cJd(b),fe", pa20, FLAG_STRICT},
 704 { "fldd",       0x2c001020, 0xfc1f33e0, "cocc@(s,b),ft", pa20, FLAG_STRICT},
 705 { "fldd",       0x2c001020, 0xfc1f33e0, "cocc@(b),ft", pa20, FLAG_STRICT},
 706 { "fldd",       0x2c000000, 0xfc0013c0, "cxccx(s,b),ft", pa10, FLAG_STRICT},
 707 { "fldd",       0x2c000000, 0xfc0013c0, "cxccx(b),ft", pa10, FLAG_STRICT},
 708 { "fldd",       0x2c001000, 0xfc0013c0, "cmcc5(s,b),ft", pa10, FLAG_STRICT},
 709 { "fldd",       0x2c001000, 0xfc0013c0, "cmcc5(b),ft", pa10, FLAG_STRICT},
 710 { "fldd",       0x50000002, 0xfc000002, "cq&(b),fx", pa20w, FLAG_STRICT},
 711 { "fldd",       0x50000002, 0xfc000002, "cq#(b),fx", pa20, FLAG_STRICT},
 712 { "fstw",       0x24001220, 0xfc1f33a0, "cocCfT,@(s,b)", pa10, FLAG_STRICT},
 713 { "fstw",       0x24001220, 0xfc1f33a0, "cocCfT,@(b)", pa10, FLAG_STRICT},
 714 { "fstw",       0x24000200, 0xfc001380, "cxcCfT,x(s,b)", pa10, FLAG_STRICT},
 715 { "fstw",       0x24000200, 0xfc001380, "cxcCfT,x(b)", pa10, FLAG_STRICT},
 716 { "fstw",       0x24001200, 0xfc001380, "cmcCfT,5(s,b)", pa10, FLAG_STRICT},
 717 { "fstw",       0x24001200, 0xfc001380, "cmcCfT,5(b)", pa10, FLAG_STRICT},
 718 { "fstw",       0x7c000000, 0xfc000004, "fE,y(b)", pa20w, FLAG_STRICT},
 719 { "fstw",       0x78000000, 0xfc000000, "cJfe,y(b)", pa20w, FLAG_STRICT},
 720 { "fstw",       0x7c000000, 0xfc000004, "fe,d(b)", pa20, FLAG_STRICT},
 721 { "fstw",       0x78000000, 0xfc000000, "cJfe,d(b)", pa20, FLAG_STRICT},
 722 { "fstd",       0x2c001220, 0xfc1f33e0, "cocCft,@(s,b)", pa10, FLAG_STRICT},
 723 { "fstd",       0x2c001220, 0xfc1f33e0, "cocCft,@(b)", pa10, FLAG_STRICT},
 724 { "fstd",       0x2c000200, 0xfc0013c0, "cxcCft,x(s,b)", pa10, FLAG_STRICT},
 725 { "fstd",       0x2c000200, 0xfc0013c0, "cxcCft,x(b)", pa10, FLAG_STRICT},
 726 { "fstd",       0x2c001200, 0xfc0013c0, "cmcCft,5(s,b)", pa10, FLAG_STRICT},
 727 { "fstd",       0x2c001200, 0xfc0013c0, "cmcCft,5(b)", pa10, FLAG_STRICT},
 728 { "fstd",       0x70000002, 0xfc000002, "cqfx,&(b)", pa20w, FLAG_STRICT},
 729 { "fstd",       0x70000002, 0xfc000002, "cqfx,#(b)", pa20, FLAG_STRICT},
 730 { "fldwx",      0x24000000, 0xfc001f80, "cxx(s,b),fT", pa10, 0},
 731 { "fldwx",      0x24000000, 0xfc001f80, "cxx(b),fT", pa10, 0},
 732 { "flddx",      0x2c000000, 0xfc001fc0, "cxx(s,b),ft", pa10, 0},
 733 { "flddx",      0x2c000000, 0xfc001fc0, "cxx(b),ft", pa10, 0},
 734 { "fstwx",      0x24000200, 0xfc001f80, "cxfT,x(s,b)", pa10, 0},
 735 { "fstwx",      0x24000200, 0xfc001f80, "cxfT,x(b)", pa10, 0},
 736 { "fstdx",      0x2c000200, 0xfc001fc0, "cxft,x(s,b)", pa10, 0},
 737 { "fstdx",      0x2c000200, 0xfc001fc0, "cxft,x(b)", pa10, 0},
 738 { "fstqx",      0x3c000200, 0xfc001fc0, "cxft,x(s,b)", pa10, 0},
 739 { "fstqx",      0x3c000200, 0xfc001fc0, "cxft,x(b)", pa10, 0},
 740 { "fldws",      0x24001000, 0xfc001f80, "cm5(s,b),fT", pa10, 0},
 741 { "fldws",      0x24001000, 0xfc001f80, "cm5(b),fT", pa10, 0},
 742 { "fldds",      0x2c001000, 0xfc001fc0, "cm5(s,b),ft", pa10, 0},
 743 { "fldds",      0x2c001000, 0xfc001fc0, "cm5(b),ft", pa10, 0},
 744 { "fstws",      0x24001200, 0xfc001f80, "cmfT,5(s,b)", pa10, 0},
 745 { "fstws",      0x24001200, 0xfc001f80, "cmfT,5(b)", pa10, 0},
 746 { "fstds",      0x2c001200, 0xfc001fc0, "cmft,5(s,b)", pa10, 0},
 747 { "fstds",      0x2c001200, 0xfc001fc0, "cmft,5(b)", pa10, 0},
 748 { "fstqs",      0x3c001200, 0xfc001fc0, "cmft,5(s,b)", pa10, 0},
 749 { "fstqs",      0x3c001200, 0xfc001fc0, "cmft,5(b)", pa10, 0},
 750 { "fadd",       0x30000600, 0xfc00e7e0, "Ffa,fb,fT", pa10, 0},
 751 { "fadd",       0x38000600, 0xfc00e720, "IfA,fB,fT", pa10, 0},
 752 { "fsub",       0x30002600, 0xfc00e7e0, "Ffa,fb,fT", pa10, 0},
 753 { "fsub",       0x38002600, 0xfc00e720, "IfA,fB,fT", pa10, 0},
 754 { "fmpy",       0x30004600, 0xfc00e7e0, "Ffa,fb,fT", pa10, 0},
 755 { "fmpy",       0x38004600, 0xfc00e720, "IfA,fB,fT", pa10, 0},
 756 { "fdiv",       0x30006600, 0xfc00e7e0, "Ffa,fb,fT", pa10, 0},
 757 { "fdiv",       0x38006600, 0xfc00e720, "IfA,fB,fT", pa10, 0},
 758 { "fsqrt",      0x30008000, 0xfc1fe7e0, "Ffa,fT", pa10, 0},
 759 { "fsqrt",      0x38008000, 0xfc1fe720, "FfA,fT", pa10, 0},
 760 { "fabs",       0x30006000, 0xfc1fe7e0, "Ffa,fT", pa10, 0},
 761 { "fabs",       0x38006000, 0xfc1fe720, "FfA,fT", pa10, 0},
 762 { "frem",       0x30008600, 0xfc00e7e0, "Ffa,fb,fT", pa10, 0},
 763 { "frem",       0x38008600, 0xfc00e720, "FfA,fB,fT", pa10, 0},
 764 { "frnd",       0x3000a000, 0xfc1fe7e0, "Ffa,fT", pa10, 0},
 765 { "frnd",       0x3800a000, 0xfc1fe720, "FfA,fT", pa10, 0},
 766 { "fcpy",       0x30004000, 0xfc1fe7e0, "Ffa,fT", pa10, 0},
 767 { "fcpy",       0x38004000, 0xfc1fe720, "FfA,fT", pa10, 0},
 768 { "fcnvff",     0x30000200, 0xfc1f87e0, "FGfa,fT", pa10, 0},
 769 { "fcnvff",     0x38000200, 0xfc1f8720, "FGfA,fT", pa10, 0},
 770 { "fcnvxf",     0x30008200, 0xfc1f87e0, "FGfa,fT", pa10, 0},
 771 { "fcnvxf",     0x38008200, 0xfc1f8720, "FGfA,fT", pa10, 0},
 772 { "fcnvfx",     0x30010200, 0xfc1f87e0, "FGfa,fT", pa10, 0},
 773 { "fcnvfx",     0x38010200, 0xfc1f8720, "FGfA,fT", pa10, 0},
 774 { "fcnvfxt",    0x30018200, 0xfc1f87e0, "FGfa,fT", pa10, 0},
 775 { "fcnvfxt",    0x38018200, 0xfc1f8720, "FGfA,fT", pa10, 0},
 776 { "fmpyfadd",   0xb8000000, 0xfc000020, "IfA,fB,fC,fT", pa20, FLAG_STRICT},
 777 { "fmpynfadd",  0xb8000020, 0xfc000020, "IfA,fB,fC,fT", pa20, FLAG_STRICT},
 778 { "fneg",       0x3000c000, 0xfc1fe7e0, "Ffa,fT", pa20, FLAG_STRICT},
 779 { "fneg",       0x3800c000, 0xfc1fe720, "IfA,fT", pa20, FLAG_STRICT},
 780 { "fnegabs",    0x3000e000, 0xfc1fe7e0, "Ffa,fT", pa20, FLAG_STRICT},
 781 { "fnegabs",    0x3800e000, 0xfc1fe720, "IfA,fT", pa20, FLAG_STRICT},
 782 { "fcnv",       0x30000200, 0xfc1c0720, "{_fa,fT", pa20, FLAG_STRICT},
 783 { "fcnv",       0x38000200, 0xfc1c0720, "FGfA,fT", pa20, FLAG_STRICT},
 784 { "fcmp",       0x30000400, 0xfc0007e0, "F?ffa,fb,h", pa20, FLAG_STRICT},
 785 { "fcmp",       0x38000400, 0xfc000720, "I?ffA,fB,h", pa20, FLAG_STRICT},
 786 { "fcmp",       0x30000400, 0xfc00e7e0, "F?ffa,fb", pa10, 0},
 787 { "fcmp",       0x38000400, 0xfc00e720, "I?ffA,fB", pa10, 0},
 788 { "xmpyu",      0x38004700, 0xfc00e720, "fX,fB,fT", pa11, 0},
 789 { "fmpyadd",    0x18000000, 0xfc000000, "Hfi,fj,fk,fl,fm", pa11, 0},
 790 { "fmpysub",    0x98000000, 0xfc000000, "Hfi,fj,fk,fl,fm", pa11, 0},
 791 { "ftest",      0x30002420, 0xffffffe0, ",=", pa20, FLAG_STRICT},
 792 { "ftest",      0x30000420, 0xffff1fff, "m", pa20, FLAG_STRICT},
 793 { "ftest",      0x30002420, 0xffffffff, "", pa10, 0},
 794 { "fid",        0x30000000, 0xffffffff, "", pa11, 0},
 795
 796 /* Performance Monitor Instructions.  */
 797
 798 { "pmdis",      0x30000280, 0xffffffdf, "N", pa20, FLAG_STRICT},
 799 { "pmenb",      0x30000680, 0xffffffff, "", pa20, FLAG_STRICT},
 800
 801 /* Assist Instructions.  */
 802
 803 { "spop0",      0x10000000, 0xfc000600, "v,ON", pa10, 0},
 804 { "spop1",      0x10000200, 0xfc000600, "v,oNt", pa10, 0},
 805 { "spop2",      0x10000400, 0xfc000600, "v,1Nb", pa10, 0},
 806 { "spop3",      0x10000600, 0xfc000600, "v,0Nx,b", pa10, 0},
 807 { "copr",       0x30000000, 0xfc000000, "u,2N", pa10, 0},
 808 { "cldwx",      0x24000000, 0xfc001e00, "ucxx(s,b),t", pa10, 0},
 809 { "cldwx",      0x24000000, 0xfc001e00, "ucxx(b),t", pa10, 0},
 810 { "clddx",      0x2c000000, 0xfc001e00, "ucxx(s,b),t", pa10, 0},
 811 { "clddx",      0x2c000000, 0xfc001e00, "ucxx(b),t", pa10, 0},
 812 { "cstwx",      0x24000200, 0xfc001e00, "ucxt,x(s,b)", pa10, 0},
 813 { "cstwx",      0x24000200, 0xfc001e00, "ucxt,x(b)", pa10, 0},
 814 { "cstdx",      0x2c000200, 0xfc001e00, "ucxt,x(s,b)", pa10, 0},
 815 { "cstdx",      0x2c000200, 0xfc001e00, "ucxt,x(b)", pa10, 0},
 816 { "cldws",      0x24001000, 0xfc001e00, "ucm5(s,b),t", pa10, 0},
 817 { "cldws",      0x24001000, 0xfc001e00, "ucm5(b),t", pa10, 0},
 818 { "cldds",      0x2c001000, 0xfc001e00, "ucm5(s,b),t", pa10, 0},
 819 { "cldds",      0x2c001000, 0xfc001e00, "ucm5(b),t", pa10, 0},
 820 { "cstws",      0x24001200, 0xfc001e00, "ucmt,5(s,b)", pa10, 0},
 821 { "cstws",      0x24001200, 0xfc001e00, "ucmt,5(b)", pa10, 0},
 822 { "cstds",      0x2c001200, 0xfc001e00, "ucmt,5(s,b)", pa10, 0},
 823 { "cstds",      0x2c001200, 0xfc001e00, "ucmt,5(b)", pa10, 0},
 824 { "cldw",       0x24000000, 0xfc001e00, "ucxx(s,b),t", pa10, FLAG_STRICT},
 825 { "cldw",       0x24000000, 0xfc001e00, "ucxx(b),t", pa10, FLAG_STRICT},
 826 { "cldw",       0x24001000, 0xfc001e00, "ucm5(s,b),t", pa10, FLAG_STRICT},
 827 { "cldw",       0x24001000, 0xfc001e00, "ucm5(b),t", pa10, FLAG_STRICT},
 828 { "cldd",       0x2c000000, 0xfc001e00, "ucxx(s,b),t", pa10, FLAG_STRICT},
 829 { "cldd",       0x2c000000, 0xfc001e00, "ucxx(b),t", pa10, FLAG_STRICT},
 830 { "cldd",       0x2c001000, 0xfc001e00, "ucm5(s,b),t", pa10, FLAG_STRICT},
 831 { "cldd",       0x2c001000, 0xfc001e00, "ucm5(b),t", pa20, FLAG_STRICT},
 832 { "cstw",       0x24000200, 0xfc001e00, "ucxt,x(s,b)", pa10, FLAG_STRICT},
 833 { "cstw",       0x24000200, 0xfc001e00, "ucxt,x(b)", pa10, FLAG_STRICT},
 834 { "cstw",       0x24001200, 0xfc001e00, "ucmt,5(s,b)", pa10, FLAG_STRICT},
 835 { "cstw",       0x24001200, 0xfc001e00, "ucmt,5(b)", pa10, FLAG_STRICT},
 836 { "cstd",       0x2c000200, 0xfc001e00, "ucxt,x(s,b)", pa10, FLAG_STRICT},
 837 { "cstd",       0x2c000200, 0xfc001e00, "ucxt,x(b)", pa10, FLAG_STRICT},
 838 { "cstd",       0x2c001200, 0xfc001e00, "ucmt,5(s,b)", pa10, FLAG_STRICT},
 839 { "cstd",       0x2c001200, 0xfc001e00, "ucmt,5(b)", pa10, FLAG_STRICT},
 840 };
 841
 842 #define NUMOPCODES ((sizeof pa_opcodes)/(sizeof pa_opcodes[0]))
 843
 844 /* SKV 12/18/92. Added some denotations for various operands.  */
 845
 846 #define PA_IMM11_AT_31 'i'
 847 #define PA_IMM14_AT_31 'j'
 848 #define PA_IMM21_AT_31 'k'
 849 #define PA_DISP12 'w'
 850 #define PA_DISP17 'W'
 851
 852 #define N_HPPA_OPERAND_FORMATS 5