1 /* tc-msp430.c -- Assembler code for the Texas Instruments MSP430
3 Copyright (C) 2002, 2003, 2004 Free Software Foundation, Inc.
4 Contributed by Dmitry Diky <diwil@mail.ru>
6 This file is part of GAS, the GNU Assembler.
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
28 #define PUSH_1X_WORKAROUND
31 #include "opcode/msp430.h"
32 #include "safe-ctype.h"
34 const char comment_chars
[] = ";";
35 const char line_comment_chars
[] = "#";
36 const char line_separator_chars
[] = "";
37 const char EXP_CHARS
[] = "eE";
38 const char FLT_CHARS
[] = "dD";
40 /* Handle long expressions. */
41 extern LITTLENUM_TYPE generic_bignum
[];
43 static struct hash_control
*msp430_hash
;
45 static unsigned int msp430_operands
46 PARAMS ((struct msp430_opcode_s
*, char *));
47 static int msp430_srcoperand
48 PARAMS ((struct msp430_operand_s
*, char *, int, int *));
49 static int msp430_dstoperand
50 PARAMS ((struct msp430_operand_s
*, char *, int));
51 static char *parse_exp
52 PARAMS ((char *, expressionS
*));
53 static inline char *skip_space
57 static void msp430_set_arch
59 static void show_mcu_list
61 static void del_spaces
64 #define MAX_OP_LEN 256
73 #define MSP430_ISA_11 11
74 #define MSP430_ISA_110 110
75 #define MSP430_ISA_12 12
76 #define MSP430_ISA_13 13
77 #define MSP430_ISA_14 14
78 #define MSP430_ISA_15 15
79 #define MSP430_ISA_16 16
80 #define MSP430_ISA_31 31
81 #define MSP430_ISA_32 32
82 #define MSP430_ISA_33 33
83 #define MSP430_ISA_41 41
84 #define MSP430_ISA_42 42
85 #define MSP430_ISA_43 43
86 #define MSP430_ISA_44 44
88 #define CHECK_RELOC_MSP430 ((imm_op || byte_op)?BFD_RELOC_MSP430_16_BYTE:BFD_RELOC_MSP430_16)
89 #define CHECK_RELOC_MSP430_PCREL ((imm_op || byte_op)?BFD_RELOC_MSP430_16_PCREL_BYTE:BFD_RELOC_MSP430_16_PCREL)
91 static struct mcu_type_s mcu_types
[] =
93 {"msp1", MSP430_ISA_11
, bfd_mach_msp11
},
94 {"msp2", MSP430_ISA_14
, bfd_mach_msp14
},
95 {"msp430x110", MSP430_ISA_11
, bfd_mach_msp11
},
96 {"msp430x112", MSP430_ISA_11
, bfd_mach_msp11
},
97 {"msp430x1101",MSP430_ISA_110
, bfd_mach_msp110
},
98 {"msp430x1111",MSP430_ISA_110
, bfd_mach_msp110
},
99 {"msp430x1121",MSP430_ISA_110
, bfd_mach_msp110
},
100 {"msp430x1122",MSP430_ISA_11
, bfd_mach_msp110
},
101 {"msp430x1132",MSP430_ISA_11
, bfd_mach_msp110
},
103 {"msp430x122", MSP430_ISA_12
, bfd_mach_msp12
},
104 {"msp430x123", MSP430_ISA_12
, bfd_mach_msp12
},
105 {"msp430x1222",MSP430_ISA_12
, bfd_mach_msp12
},
106 {"msp430x1232",MSP430_ISA_12
, bfd_mach_msp12
},
108 {"msp430x133", MSP430_ISA_13
, bfd_mach_msp13
},
109 {"msp430x135", MSP430_ISA_13
, bfd_mach_msp13
},
110 {"msp430x1331",MSP430_ISA_13
, bfd_mach_msp13
},
111 {"msp430x1351",MSP430_ISA_13
, bfd_mach_msp13
},
112 {"msp430x147", MSP430_ISA_14
, bfd_mach_msp14
},
113 {"msp430x148", MSP430_ISA_14
, bfd_mach_msp14
},
114 {"msp430x149", MSP430_ISA_14
, bfd_mach_msp14
},
116 {"msp430x155", MSP430_ISA_15
, bfd_mach_msp15
},
117 {"msp430x156", MSP430_ISA_15
, bfd_mach_msp15
},
118 {"msp430x157", MSP430_ISA_15
, bfd_mach_msp15
},
119 {"msp430x167", MSP430_ISA_16
, bfd_mach_msp16
},
120 {"msp430x168", MSP430_ISA_16
, bfd_mach_msp16
},
121 {"msp430x169", MSP430_ISA_16
, bfd_mach_msp16
},
122 {"msp430x1610", MSP430_ISA_16
, bfd_mach_msp16
},
123 {"msp430x1611", MSP430_ISA_16
, bfd_mach_msp16
},
124 {"msp430x1612", MSP430_ISA_16
, bfd_mach_msp16
},
126 {"msp430x311", MSP430_ISA_31
, bfd_mach_msp31
},
127 {"msp430x312", MSP430_ISA_31
, bfd_mach_msp31
},
128 {"msp430x313", MSP430_ISA_31
, bfd_mach_msp31
},
129 {"msp430x314", MSP430_ISA_31
, bfd_mach_msp31
},
130 {"msp430x315", MSP430_ISA_31
, bfd_mach_msp31
},
131 {"msp430x323", MSP430_ISA_32
, bfd_mach_msp32
},
132 {"msp430x325", MSP430_ISA_32
, bfd_mach_msp32
},
133 {"msp430x336", MSP430_ISA_33
, bfd_mach_msp33
},
134 {"msp430x337", MSP430_ISA_33
, bfd_mach_msp33
},
136 {"msp430x412", MSP430_ISA_41
, bfd_mach_msp41
},
137 {"msp430x413", MSP430_ISA_41
, bfd_mach_msp41
},
138 {"msp430x415", MSP430_ISA_41
, bfd_mach_msp41
},
139 {"msp430x417", MSP430_ISA_41
, bfd_mach_msp41
},
141 {"msp430xE423", MSP430_ISA_42
, bfd_mach_msp42
},
142 {"msp430xE425", MSP430_ISA_42
, bfd_mach_msp42
},
143 {"msp430xE427", MSP430_ISA_42
, bfd_mach_msp42
},
145 {"msp430xW423", MSP430_ISA_42
, bfd_mach_msp42
},
146 {"msp430xW425", MSP430_ISA_42
, bfd_mach_msp42
},
147 {"msp430xW427", MSP430_ISA_42
, bfd_mach_msp42
},
149 {"msp430xG437", MSP430_ISA_43
, bfd_mach_msp43
},
150 {"msp430xG438", MSP430_ISA_43
, bfd_mach_msp43
},
151 {"msp430xG439", MSP430_ISA_43
, bfd_mach_msp43
},
153 {"msp430x435", MSP430_ISA_43
, bfd_mach_msp43
},
154 {"msp430x436", MSP430_ISA_43
, bfd_mach_msp43
},
155 {"msp430x437", MSP430_ISA_43
, bfd_mach_msp43
},
156 {"msp430x447", MSP430_ISA_44
, bfd_mach_msp44
},
157 {"msp430x448", MSP430_ISA_44
, bfd_mach_msp44
},
158 {"msp430x449", MSP430_ISA_44
, bfd_mach_msp44
},
164 static struct mcu_type_s default_mcu
=
165 { "msp430x11", MSP430_ISA_11
, bfd_mach_msp11
};
167 static struct mcu_type_s
*msp430_mcu
= &default_mcu
;
169 const pseudo_typeS md_pseudo_table
[] =
171 {"arch", msp430_set_arch
, 0},
175 #define OPTION_MMCU 'm'
177 const char *md_shortopts
= "m:";
179 struct option md_longopts
[] =
181 {"mmcu", required_argument
, NULL
, OPTION_MMCU
},
182 {NULL
, no_argument
, NULL
, 0}
185 size_t md_longopts_size
= sizeof (md_longopts
);
188 show_mcu_list (stream
)
193 fprintf (stream
, _("Known MCU names:\n"));
195 for (i
= 0; mcu_types
[i
].name
; i
++)
196 fprintf (stream
, _("\t %s\n"), mcu_types
[i
].name
);
198 fprintf (stream
, "\n");
202 md_show_usage (FILE *stream
)
205 _("MSP430 options:\n"
206 " -mmcu=[msp430-name] select microcontroller type\n"
207 " msp430x110 msp430x112\n"
208 " msp430x1101 msp430x1111\n"
209 " msp430x1121 msp430x1122 msp430x1132\n"
210 " msp430x122 msp430x123\n"
211 " msp430x1222 msp430x1232\n"
212 " msp430x133 msp430x135\n"
213 " msp430x1331 msp430x1351\n"
214 " msp430x147 msp430x148 msp430x149\n"
215 " msp430x155 msp430x156 msp430x157\n"
216 " msp430x167 msp430x168 msp430x169\n"
217 " msp430x1610 msp430x1611 msp430x1612\n"
218 " msp430x311 msp430x312 msp430x313 msp430x314 msp430x315\n"
219 " msp430x323 msp430x325\n"
220 " msp430x336 msp430x337\n"
221 " msp430x412 msp430x413 msp430x415 msp430x417\n"
222 " msp430xE423 msp430xE425 msp430E427\n"
223 " msp430xW423 msp430xW425 msp430W427\n"
224 " msp430xG437 msp430xG438 msp430G439\n"
225 " msp430x435 msp430x436 msp430x437\n"
226 " msp430x447 msp430x448 msp430x449\n"));
228 show_mcu_list (stream
);
232 extract_word (char *from
, char *to
, int limit
)
238 /* Drop leading whitespace. */
239 from
= skip_space (from
);
242 /* Find the op code end. */
243 for (op_start
= op_end
= from
; *op_end
!= 0 && is_part_of_name (*op_end
);)
245 to
[size
++] = *op_end
++;
246 if (size
+ 1 >= limit
)
255 msp430_set_arch (dummy
)
256 int dummy ATTRIBUTE_UNUSED
;
258 char *str
= (char *) alloca (32); /* 32 for good measure. */
260 input_line_pointer
= extract_word (input_line_pointer
, str
, 32);
262 md_parse_option (OPTION_MMCU
, str
);
263 bfd_set_arch_mach (stdoutput
, TARGET_ARCH
, msp430_mcu
->mach
);
267 md_parse_option (c
, arg
)
276 for (i
= 0; mcu_types
[i
].name
; ++i
)
277 if (strcmp (mcu_types
[i
].name
, arg
) == 0)
280 if (!mcu_types
[i
].name
)
282 show_mcu_list (stderr
);
283 as_fatal (_("unknown MCU: %s\n"), arg
);
286 if (msp430_mcu
== &default_mcu
|| msp430_mcu
->mach
== mcu_types
[i
].mach
)
287 msp430_mcu
= &mcu_types
[i
];
289 as_fatal (_("redefinition of mcu type %s' to %s'"),
290 msp430_mcu
->name
, mcu_types
[i
].name
);
298 md_undefined_symbol (name
)
299 char *name ATTRIBUTE_UNUSED
;
313 /* Delete spaces from s: X ( r 1 2) => X(r12). */
325 while (ISSPACE (*m
) && *m
)
327 memmove (s
, m
, strlen (m
) + 1);
334 /* Extract one word from FROM and copy it to TO. Delimeters are ",;\n" */
337 extract_operand (char *from
, char *to
, int limit
)
341 /* Drop leading whitespace. */
342 from
= skip_space (from
);
344 while (size
< limit
&& *from
)
346 *(to
+ size
) = *from
;
347 if (*from
== ',' || *from
== ';' || *from
== '\n')
362 extract_cmd (char *from
, char *to
, int limit
)
366 while (*from
&& ! ISSPACE (*from
) && *from
!= '.' && limit
> size
)
368 *(to
+ size
) = *from
;
378 /* Turn a string in input_line_pointer into a floating point constant
379 of type TYPE, and store the appropriate bytes in *LITP. The number
380 of LITTLENUMS emitted is stored in *SIZEP. An error message is
381 returned, or NULL on OK. */
384 md_atof (type
, litP
, sizeP
)
390 LITTLENUM_TYPE words
[4];
391 LITTLENUM_TYPE
*wordP
;
404 return _("bad call to md_atof");
407 t
= atof_ieee (input_line_pointer
, type
, words
);
409 input_line_pointer
= t
;
411 *sizeP
= prec
* sizeof (LITTLENUM_TYPE
);
413 /* This loop outputs the LITTLENUMs in REVERSE order. */
414 for (wordP
= words
+ prec
- 1; prec
--;)
416 md_number_to_chars (litP
, (valueT
) (*wordP
--), sizeof (LITTLENUM_TYPE
));
417 litP
+= sizeof (LITTLENUM_TYPE
);
424 md_convert_frag (abfd
, sec
, fragP
)
425 bfd
*abfd ATTRIBUTE_UNUSED
;
426 asection
*sec ATTRIBUTE_UNUSED
;
427 fragS
*fragP ATTRIBUTE_UNUSED
;
435 struct msp430_opcode_s
*opcode
;
436 msp430_hash
= hash_new ();
438 for (opcode
= msp430_opcodes
; opcode
->name
; opcode
++)
439 hash_insert (msp430_hash
, opcode
->name
, (char *) opcode
);
441 bfd_set_arch_mach (stdoutput
, TARGET_ARCH
, msp430_mcu
->mach
);
448 struct msp430_opcode_s
*opcode
;
452 str
= skip_space (str
); /* Skip leading spaces. */
453 str
= extract_cmd (str
, cmd
, sizeof (cmd
));
455 while (cmd
[i
] && i
< sizeof (cmd
))
457 char a
= TOLOWER (cmd
[i
]);
464 as_bad (_("can't find opcode "));
468 opcode
= (struct msp430_opcode_s
*) hash_find (msp430_hash
, cmd
);
472 as_bad (_("unknown opcode `%s'"), cmd
);
477 char *__t
= input_line_pointer
;
478 msp430_operands (opcode
, str
);
479 input_line_pointer
= __t
;
483 /* Parse instruction operands.
484 Return binary opcode. */
487 msp430_operands (opcode
, line
)
488 struct msp430_opcode_s
*opcode
;
491 int bin
= opcode
->bin_opcode
; /* opcode mask. */
493 char l1
[MAX_OP_LEN
], l2
[MAX_OP_LEN
];
496 struct msp430_operand_s op1
, op2
;
498 static short ZEROS
= 0;
501 /* opcode is the one from opcodes table
502 line contains something like
507 /* Check if byte or word operation. */
508 if (*line
== '.' && TOLOWER (*(line
+ 1)) == 'b')
510 bin
|= BYTE_OPERATION
;
517 while (! ISSPACE (*line
) && *line
)
520 if (opcode
->insn_opnumb
&& (!*line
|| *line
== '\n'))
522 as_bad (_("instruction %s requires %d operand(s)"),
523 opcode
->name
, opcode
->insn_opnumb
);
527 memset (l1
, 0, sizeof (l1
));
528 memset (l2
, 0, sizeof (l2
));
529 memset (&op1
, 0, sizeof (op1
));
530 memset (&op2
, 0, sizeof (op2
));
536 case 0: /* Emulated. */
537 switch (opcode
->insn_opnumb
)
540 /* Set/clear bits instructions. */
542 frag
= frag_more (__is
);
543 bfd_putl16 ((bfd_vma
) bin
, frag
);
546 /* Something which works with destination operand. */
547 line
= extract_operand (line
, l1
, sizeof (l1
));
548 res
= msp430_dstoperand (&op1
, l1
, opcode
->bin_opcode
);
552 bin
|= (op1
.reg
| (op1
.am
<< 7));
554 frag
= frag_more (2 * __is
);
555 where
= frag
- frag_now
->fr_literal
;
556 bfd_putl16 ((bfd_vma
) bin
, frag
);
558 if (op1
.mode
== OP_EXP
)
561 bfd_putl16 ((bfd_vma
) ZEROS
, frag
+ 2);
564 fix_new_exp (frag_now
, where
, 2,
565 &(op1
.exp
), FALSE
, CHECK_RELOC_MSP430
);
567 fix_new_exp (frag_now
, where
, 2,
568 &(op1
.exp
), TRUE
, CHECK_RELOC_MSP430_PCREL
);
574 /* Shift instruction. */
575 line
= extract_operand (line
, l1
, sizeof (l1
));
576 strncpy (l2
, l1
, sizeof (l2
));
577 l2
[sizeof (l2
) - 1] = '\0';
578 res
= msp430_srcoperand (&op1
, l1
, opcode
->bin_opcode
, &imm_op
);
579 res
+= msp430_dstoperand (&op2
, l2
, opcode
->bin_opcode
);
582 break; /* An error occurred. All warnings were done before. */
584 bin
|= (op2
.reg
| (op1
.reg
<< 8) | (op1
.am
<< 4) | (op2
.am
<< 7));
586 __is
= 1 + op1
.ol
+ op2
.ol
; /* insn size in words. */
587 frag
= frag_more (2 * __is
);
588 where
= frag
- frag_now
->fr_literal
;
589 bfd_putl16 ((bfd_vma
) bin
, frag
);
591 if (op1
.mode
== OP_EXP
)
593 where
+= 2; /* Advance 'where' as we do not know _where_. */
594 bfd_putl16 ((bfd_vma
) ZEROS
, frag
+ 2);
596 if (op1
.reg
|| (op1
.reg
== 0 && op1
.am
== 3)) /* Not PC relative. */
597 fix_new_exp (frag_now
, where
, 2,
598 &(op1
.exp
), FALSE
, CHECK_RELOC_MSP430
);
600 fix_new_exp (frag_now
, where
, 2,
601 &(op1
.exp
), TRUE
, CHECK_RELOC_MSP430_PCREL
);
604 if (op2
.mode
== OP_EXP
)
607 bfd_putl16 ((bfd_vma
) ZEROS
, frag
+ 2 + ((__is
== 3) ? 2 : 0));
609 if (op2
.reg
) /* Not PC relative. */
610 fix_new_exp (frag_now
, where
+ 2, 2,
611 &(op2
.exp
), FALSE
, CHECK_RELOC_MSP430
);
613 fix_new_exp (frag_now
, where
+ 2, 2,
614 &(op2
.exp
), TRUE
, CHECK_RELOC_MSP430_PCREL
);
619 /* Branch instruction => mov dst, r0. */
620 line
= extract_operand (line
, l1
, sizeof (l1
));
622 res
= msp430_srcoperand (&op1
, l1
, opcode
->bin_opcode
, &imm_op
);
629 bin
|= ((op1
.reg
<< 8) | (op1
.am
<< 4));
631 frag
= frag_more (2 * __is
);
632 where
= frag
- frag_now
->fr_literal
;
633 bfd_putl16 ((bfd_vma
) bin
, frag
);
635 if (op1
.mode
== OP_EXP
)
638 bfd_putl16 ((bfd_vma
) ZEROS
, frag
+ 2);
640 if (op1
.reg
|| (op1
.reg
== 0 && op1
.am
== 3))
641 fix_new_exp (frag_now
, where
, 2,
642 &(op1
.exp
), FALSE
, CHECK_RELOC_MSP430
);
644 fix_new_exp (frag_now
, where
, 2,
645 &(op1
.exp
), TRUE
, CHECK_RELOC_MSP430_PCREL
);
651 case 1: /* Format 1, double operand. */
652 line
= extract_operand (line
, l1
, sizeof (l1
));
653 line
= extract_operand (line
, l2
, sizeof (l2
));
654 res
= msp430_srcoperand (&op1
, l1
, opcode
->bin_opcode
, &imm_op
);
655 res
+= msp430_dstoperand (&op2
, l2
, opcode
->bin_opcode
);
658 break; /* Error occurred. All warnings were done before. */
660 bin
|= (op2
.reg
| (op1
.reg
<< 8) | (op1
.am
<< 4) | (op2
.am
<< 7));
662 __is
= 1 + op1
.ol
+ op2
.ol
; /* insn size in words. */
663 frag
= frag_more (2 * __is
);
664 where
= frag
- frag_now
->fr_literal
;
665 bfd_putl16 ((bfd_vma
) bin
, frag
);
667 if (op1
.mode
== OP_EXP
)
669 where
+= 2; /* Advance where as we do not know _where_. */
670 bfd_putl16 ((bfd_vma
) ZEROS
, frag
+ 2);
672 if (op1
.reg
|| (op1
.reg
== 0 && op1
.am
== 3)) /* Not PC relative. */
673 fix_new_exp (frag_now
, where
, 2,
674 &(op1
.exp
), FALSE
, CHECK_RELOC_MSP430
);
676 fix_new_exp (frag_now
, where
, 2,
677 &(op1
.exp
), TRUE
, CHECK_RELOC_MSP430_PCREL
);
680 if (op2
.mode
== OP_EXP
)
683 bfd_putl16 ((bfd_vma
) ZEROS
, frag
+ 2 + ((__is
== 3) ? 2 : 0));
685 if (op2
.reg
) /* Not PC relative. */
686 fix_new_exp (frag_now
, where
+ 2, 2,
687 &(op2
.exp
), FALSE
, CHECK_RELOC_MSP430
);
689 fix_new_exp (frag_now
, where
+ 2, 2,
690 &(op2
.exp
), TRUE
, CHECK_RELOC_MSP430_PCREL
);
694 case 2: /* Single-operand mostly instr. */
695 if (opcode
->insn_opnumb
== 0)
697 /* reti instruction. */
698 frag
= frag_more (2);
699 bfd_putl16 ((bfd_vma
) bin
, frag
);
703 line
= extract_operand (line
, l1
, sizeof (l1
));
704 res
= msp430_srcoperand (&op1
, l1
, opcode
->bin_opcode
, &imm_op
);
706 break; /* Error in operand. */
708 bin
|= op1
.reg
| (op1
.am
<< 4);
710 frag
= frag_more (2 * __is
);
711 where
= frag
- frag_now
->fr_literal
;
712 bfd_putl16 ((bfd_vma
) bin
, frag
);
714 if (op1
.mode
== OP_EXP
)
716 bfd_putl16 ((bfd_vma
) ZEROS
, frag
+ 2);
718 if (op1
.reg
|| (op1
.reg
== 0 && op1
.am
== 3)) /* Not PC relative. */
719 fix_new_exp (frag_now
, where
+ 2, 2,
720 &(op1
.exp
), FALSE
, CHECK_RELOC_MSP430
);
722 fix_new_exp (frag_now
, where
+ 2, 2,
723 &(op1
.exp
), TRUE
, CHECK_RELOC_MSP430_PCREL
);
727 case 3: /* Conditional jumps instructions. */
728 line
= extract_operand (line
, l1
, sizeof (l1
));
739 frag
= frag_more (2); /* Instr size is 1 word. */
741 /* In order to handle something like:
745 jz 4 ; skip next 4 bytes
748 nop ; will jump here if r5 positive or zero
750 jCOND -n ;assumes jump n bytes backward:
760 jCOND $n ; jump from PC in either direction. */
762 if (exp
.X_op
== O_constant
)
764 int x
= exp
.X_add_number
;
768 as_warn (_("Even number required. Rounded to %d"), x
+ 1);
772 if ((*l1
== '$' && x
> 0) || x
< 0)
777 if (x
> 512 || x
< -511)
779 as_bad (_("Wrong displacement %d"), x
<< 1);
784 bfd_putl16 ((bfd_vma
) bin
, frag
);
786 else if (exp
.X_op
== O_symbol
&& *l1
!= '$')
788 where
= frag
- frag_now
->fr_literal
;
789 fix_new_exp (frag_now
, where
, 2,
790 &exp
, TRUE
, BFD_RELOC_MSP430_10_PCREL
);
792 bfd_putl16 ((bfd_vma
) bin
, frag
);
796 as_bad (_("instruction requires label sans '$'"));
802 ("instruction requires label or value in range -511:512"));
808 as_bad (_("instruction requires label"));
814 as_bad (_("Ilegal instruction or not implmented opcode."));
817 input_line_pointer
= line
;
822 msp430_dstoperand (op
, l
, bin
)
823 struct msp430_operand_s
*op
;
828 int ret
= msp430_srcoperand (op
, l
, bin
, &dummy
);
839 parse_exp (__tl
, &(op
->exp
));
840 if (op
->exp
.X_op
!= O_constant
|| op
->exp
.X_add_number
!= 0)
842 as_bad (_("Internal bug. Try to use 0(r%d) instead of @r%d"),
852 ("this addressing mode is not applicable for destination operand"));
863 /* If this is a reg numb, str 't' must be a number from 0 - 15. */
865 if (strlen (t
) > 2 && *(t
+ 2) != '+')
870 if ((*t
< '0' || *t
> '9') && *t
!= '+')
883 msp430_srcoperand (op
, l
, bin
, imm_op
)
884 struct msp430_operand_s
*op
;
891 /* Check if an immediate #VALUE. The hash sign should be only at the beginning! */
898 /* Check if there is:
899 llo(x) - least significant 16 bits, x &= 0xffff
900 lhi(x) - x = (x >> 16) & 0xffff,
901 hlo(x) - x = (x >> 32) & 0xffff,
902 hhi(x) - x = (x >> 48) & 0xffff
903 The value _MUST_ be constant expression: #hlo(1231231231). */
907 if (strncasecmp (h
, "#llo(", 5) == 0)
912 else if (strncasecmp (h
, "#lhi(", 5) == 0)
917 else if (strncasecmp (h
, "#hlo(", 5) == 0)
922 else if (strncasecmp (h
, "#hhi(", 5) == 0)
927 else if (strncasecmp (h
, "#lo(", 4) == 0)
932 else if (strncasecmp (h
, "#hi(", 4) == 0)
938 op
->reg
= 0; /* Reg PC. */
940 op
->ol
= 1; /* Immediate will follow an instruction. */
943 parse_exp (__tl
, &(op
->exp
));
944 if (op
->exp
.X_op
== O_constant
)
946 int x
= op
->exp
.X_add_number
;
951 op
->exp
.X_add_number
= x
;
953 else if (vshift
== 1)
955 x
= (x
>> 16) & 0xffff;
956 op
->exp
.X_add_number
= x
;
961 op
->exp
.X_add_number
= -1;
963 op
->exp
.X_add_number
= 0; /* Nothing left. */
964 x
= op
->exp
.X_add_number
;
967 if (op
->exp
.X_add_number
> 65535 || op
->exp
.X_add_number
< -32768)
969 as_bad (_("value %ld out of range. Use #lo() or #hi()"), x
);
973 /* Now check constants. */
974 /* Substitute register mode with a constant generator if applicable. */
976 x
= (short) x
; /* Extend sign. */
1008 #ifdef PUSH_1X_WORKAROUND
1011 /* Remove warning as confusing.
1012 as_warn(_("Hardware push bug workaround")); */
1025 #ifdef PUSH_1X_WORKAROUND
1028 /* Remove warning as confusing.
1029 as_warn(_("Hardware push bug workaround")); */
1041 else if (op
->exp
.X_op
== O_symbol
)
1045 else if (op
->exp
.X_op
== O_big
)
1050 op
->exp
.X_op
= O_constant
;
1051 op
->exp
.X_add_number
= 0xffff & generic_bignum
[vshift
];
1052 x
= op
->exp
.X_add_number
;
1057 ("unknown expression in operand %s. use #llo() #lhi() #hlo() #hhi() "),
1107 as_bad (_("unknown operand %s"), l
);
1112 /* Check if absolute &VALUE (assume that we can construct something like ((a&b)<<7 + 25). */
1117 op
->reg
= 2; /* reg 2 in absolute addr mode. */
1118 op
->am
= 1; /* mode As == 01 bin. */
1119 op
->ol
= 1; /* Immediate value followed by instruction. */
1121 parse_exp (__tl
, &(op
->exp
));
1123 if (op
->exp
.X_op
== O_constant
)
1125 int x
= op
->exp
.X_add_number
;
1126 if (x
> 65535 || x
< -32768)
1128 as_bad (_("value out of range: %d"), x
);
1132 else if (op
->exp
.X_op
== O_symbol
)
1137 as_bad (_("unknown expression in operand %s"), l
);
1143 /* Check if indirect register mode @Rn / postincrement @Rn+. */
1147 char *m
= strchr (l
, '+');
1151 as_bad (_("unknown addressing mode %s"), l
);
1156 if (*t
!= 'r' && *t
!= 'R')
1158 as_bad (_("unknown addressing mode %s"), l
);
1162 t
++; /* Points to the reg value. */
1166 as_bad (_("Bad register name r%s"), t
);
1174 *m
= 0; /* strip '+' */
1176 if (op
->reg
< 0 || op
->reg
> 15)
1178 as_bad (_("MSP430 does not have %d registers"), op
->reg
);
1185 /* Check if register indexed X(Rn). */
1188 char *h
= strrchr (l
, '(');
1189 char *m
= strrchr (l
, ')');
1198 as_bad (_("')' required"));
1205 /* Extract a register. */
1206 t
++; /* Advance pointer. */
1208 if (*t
!= 'r' && *t
!= 'R')
1211 ("unknown operator %s. Did you mean X(Rn) or #[hl][hl][oi](CONST) ?"),
1218 if (op
->reg
> 9 || op
->reg
< 0)
1220 as_bad (_("unknown operator (r%s substituded as a register name"),
1227 op
->reg
= op
->reg
* 10;
1228 op
->reg
+= *t
- '0';
1232 as_bad (_("unknown operator %s"), l
);
1237 as_bad (_("r2 should not be used in indexed addressing mode"));
1241 if (*(t
+ 1) != ')')
1243 as_bad (_("unknown operator %s"), l
);
1248 /* Extract constant. */
1252 parse_exp (__tl
, &(op
->exp
));
1253 if (op
->exp
.X_op
== O_constant
)
1255 int x
= op
->exp
.X_add_number
;
1257 if (x
> 65535 || x
< -32768)
1259 as_bad (_("value out of range: %d"), x
);
1271 else if (op
->exp
.X_op
== O_symbol
)
1276 as_bad (_("unknown expression in operand %s"), l
);
1284 /* Register mode 'mov r1,r2'. */
1289 /* Operand should be a register. */
1290 if (*t
== 'r' || *t
== 'R')
1292 int x
= atoi (t
+ 1);
1294 if (check_reg (t
+ 1))
1297 if (x
< 0 || x
> 15)
1298 break; /* Symbolic mode. */
1309 /* Symbolic mode 'mov a, b' == 'mov x(pc), y(pc)'. */
1318 /* alpha/number underline dot for labels. */
1319 if (! ISALNUM (*t
) && *t
!= '_' && *t
!= '.')
1321 as_bad (_("unknown operand %s"), l
);
1328 op
->reg
= 0; /* PC relative... be careful. */
1332 parse_exp (__tl
, &(op
->exp
));
1338 as_bad (_("unknown addressing mode for operand %s"), l
);
1343 /* GAS will call this function for each section at the end of the assembly,
1344 to permit the CPU backend to adjust the alignment of a section. */
1347 md_section_align (seg
, addr
)
1351 int align
= bfd_get_section_alignment (stdoutput
, seg
);
1353 return ((addr
+ (1 << align
) - 1) & (-1 << align
));
1356 /* If you define this macro, it should return the offset between the
1357 address of a PC relative fixup and the position from which the PC
1358 relative adjustment should be made. On many processors, the base
1359 of a PC relative instruction is the next instruction, so this
1360 macro would return the length of an instruction. */
1363 md_pcrel_from_section (fixp
, sec
)
1367 if (fixp
->fx_addsy
!= (symbolS
*) NULL
1368 && (!S_IS_DEFINED (fixp
->fx_addsy
)
1369 || (S_GET_SEGMENT (fixp
->fx_addsy
) != sec
)))
1372 return fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
1375 /* GAS will call this for each fixup. It should store the correct
1376 value in the object file. */
1379 md_apply_fix3 (fixp
, valuep
, seg
)
1384 unsigned char *where
;
1388 if (fixp
->fx_addsy
== (symbolS
*) NULL
)
1393 else if (fixp
->fx_pcrel
)
1395 segT s
= S_GET_SEGMENT (fixp
->fx_addsy
);
1397 if (fixp
->fx_addsy
&& (s
== seg
|| s
== absolute_section
))
1399 value
= S_GET_VALUE (fixp
->fx_addsy
) + *valuep
;
1407 value
= fixp
->fx_offset
;
1409 if (fixp
->fx_subsy
!= (symbolS
*) NULL
)
1411 if (S_GET_SEGMENT (fixp
->fx_subsy
) == absolute_section
)
1413 value
-= S_GET_VALUE (fixp
->fx_subsy
);
1418 /* We don't actually support subtracting a symbol. */
1419 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
1420 _("expression too complex"));
1425 switch (fixp
->fx_r_type
)
1428 fixp
->fx_no_overflow
= 1;
1430 case BFD_RELOC_MSP430_10_PCREL
:
1436 /* Fetch the instruction, insert the fully resolved operand
1437 value, and stuff the instruction back again. */
1439 where
= fixp
->fx_frag
->fr_literal
+ fixp
->fx_where
;
1441 insn
= bfd_getl16 (where
);
1443 switch (fixp
->fx_r_type
)
1445 case BFD_RELOC_MSP430_10_PCREL
:
1447 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
1448 _("odd address operand: %ld"), value
);
1450 /* Jumps are in words. */
1452 --value
; /* Correct PC. */
1454 if (value
< -512 || value
> 511)
1455 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
1456 _("operand out of range: %ld"), value
);
1458 value
&= 0x3ff; /* get rid of extended sign */
1459 bfd_putl16 ((bfd_vma
) (value
| insn
), where
);
1462 case BFD_RELOC_MSP430_16_PCREL
:
1464 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
1465 _("odd address operand: %ld"), value
);
1467 /* Nothing to be corrected here. */
1468 if (value
< -32768 || value
> 65536)
1469 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
1470 _("operand out of range: %ld"), value
);
1472 value
&= 0xffff; /* Get rid of extended sign. */
1473 bfd_putl16 ((bfd_vma
) value
, where
);
1476 case BFD_RELOC_MSP430_16_PCREL_BYTE
:
1477 /* Nothing to be corrected here. */
1478 if (value
< -32768 || value
> 65536)
1479 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
1480 _("operand out of range: %ld"), value
);
1482 value
&= 0xffff; /* Get rid of extended sign. */
1483 bfd_putl16 ((bfd_vma
) value
, where
);
1487 bfd_putl16 ((bfd_vma
) value
, where
);
1490 case BFD_RELOC_MSP430_16
:
1492 case BFD_RELOC_MSP430_16_BYTE
:
1494 bfd_putl16 ((bfd_vma
) value
, where
);
1498 as_fatal (_("line %d: unknown relocation type: 0x%x"),
1499 fixp
->fx_line
, fixp
->fx_r_type
);
1505 fixp
->fx_addnumber
= value
;
1509 /* A `BFD_ASSEMBLER' GAS will call this to generate a reloc. GAS
1510 will pass the resulting reloc to `bfd_install_relocation'. This
1511 currently works poorly, as `bfd_install_relocation' often does the
1512 wrong thing, and instances of `tc_gen_reloc' have been written to
1513 work around the problems, which in turns makes it difficult to fix
1514 `bfd_install_relocation'. */
1516 /* If while processing a fixup, a reloc really needs to be created
1517 then it is done here. */
1520 tc_gen_reloc (seg
, fixp
)
1521 asection
*seg ATTRIBUTE_UNUSED
;
1526 reloc
= (arelent
*) xmalloc (sizeof (arelent
));
1528 reloc
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
1529 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
1531 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
1532 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
1533 if (reloc
->howto
== (reloc_howto_type
*) NULL
)
1535 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
1536 _("reloc %d not supported by object file format"),
1537 (int) fixp
->fx_r_type
);
1541 if (fixp
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
1542 || fixp
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
1543 reloc
->address
= fixp
->fx_offset
;
1545 reloc
->addend
= fixp
->fx_offset
;
1550 /* Parse ordinary expression. */
1557 input_line_pointer
= s
;
1559 if (op
->X_op
== O_absent
)
1560 as_bad (_("missing operand"));
1561 return input_line_pointer
;
1566 md_estimate_size_before_relax (fragp
, seg
)
1567 fragS
*fragp ATTRIBUTE_UNUSED
;
1568 asection
*seg ATTRIBUTE_UNUSED
;