gas/itbl-ops.c

   1 /* itbl-ops.c
   2    Copyright 1997, 1999, 2000, 2001, 2002, 2003, 2005, 2006
   3    Free Software Foundation, Inc.
   4
   5    This file is part of GAS, the GNU Assembler.
   6
   7    GAS is free software; you can redistribute it and/or modify
   8    it under the terms of the GNU General Public License as published by
   9    the Free Software Foundation; either version 2, or (at your option)
  10    any later version.
  11
  12    GAS is distributed in the hope that it will be useful,
  13    but WITHOUT ANY WARRANTY; without even the implied warranty of
  14    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15    GNU General Public License for more details.
  16
  17    You should have received a copy of the GNU General Public License
  18    along with GAS; see the file COPYING.  If not, write to the Free
  19    Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
  20    02110-1301, USA.  */
  21
  22 /*======================================================================*/
  23 /*
  24  * Herein lies the support for dynamic specification of processor
  25  * instructions and registers.  Mnemonics, values, and formats for each
  26  * instruction and register are specified in an ascii file consisting of
  27  * table entries.  The grammar for the table is defined in the document
  28  * "Processor instruction table specification".
  29  *
  30  * Instructions use the gnu assembler syntax, with the addition of
  31  * allowing mnemonics for register.
  32  * Eg. "func $2,reg3,0x100,symbol ; comment"
  33  *      func - opcode name
  34  *      $n - register n
  35  *      reg3 - mnemonic for processor's register defined in table
  36  *      0xddd..d - immediate value
  37  *      symbol - address of label or external symbol
  38  *
  39  * First, itbl_parse reads in the table of register and instruction
  40  * names and formats, and builds a list of entries for each
  41  * processor/type combination.  lex and yacc are used to parse
  42  * the entries in the table and call functions defined here to
  43  * add each entry to our list.
  44  *
  45  * Then, when assembling or disassembling, these functions are called to
  46  * 1) get information on a processor's registers and
  47  * 2) assemble/disassemble an instruction.
  48  * To assemble(disassemble) an instruction, the function
  49  * itbl_assemble(itbl_disassemble) is called to search the list of
  50  * instruction entries, and if a match is found, uses the format
  51  * described in the instruction entry structure to complete the action.
  52  *
  53  * Eg. Suppose we have a Mips coprocessor "cop3" with data register "d2"
  54  * and we want to define function "pig" which takes two operands.
  55  *
  56  * Given the table entries:
  57  *      "p3 insn pig 0x1:24-21 dreg:20-16 immed:15-0"
  58  *      "p3 dreg d2 0x2"
  59  * and that the instruction encoding for coprocessor pz has encoding:
  60  *      #define MIPS_ENCODE_COP_NUM(z) ((0x21|(z<<1))<<25)
  61  *      #define ITBL_ENCODE_PNUM(pnum) MIPS_ENCODE_COP_NUM(pnum)
  62  *
  63  * a structure to describe the instruction might look something like:
  64  *      struct itbl_entry = {
  65  *      e_processor processor = e_p3
  66  *      e_type type = e_insn
  67  *      char *name = "pig"
  68  *      uint value = 0x1
  69  *      uint flags = 0
  70  *      struct itbl_range range = 24-21
  71  *      struct itbl_field *field = {
  72  *              e_type type = e_dreg
  73  *              struct itbl_range range = 20-16
  74  *              struct itbl_field *next = {
  75  *                      e_type type = e_immed
  76  *                      struct itbl_range range = 15-0
  77  *                      struct itbl_field *next = 0
  78  *                      };
  79  *              };
  80  *      struct itbl_entry *next = 0
  81  *      };
  82  *
  83  * And the assembler instructions:
  84  *      "pig d2,0x100"
  85  *      "pig $2,0x100"
  86  *
  87  * would both assemble to the hex value:
  88  *      "0x4e220100"
  89  *
  90  */
  91
  92 #include "as.h"
  93 #include "itbl-ops.h"
  94 #include <itbl-parse.h>
  95
  96 /* #define DEBUG */
  97
  98 #ifdef DEBUG
  99 #include <assert.h>
 100 #define ASSERT(x) assert(x)
 101 #define DBG(x) printf x
 102 #else
 103 #define ASSERT(x)
 104 #define DBG(x)
 105 #endif
 106
 107 #ifndef min
 108 #define min(a,b) (a<b?a:b)
 109 #endif
 110
 111 int itbl_have_entries = 0;
 112
 113 /*======================================================================*/
 114 /* structures for keeping itbl format entries */
 115
 116 struct itbl_range {
 117   int sbit;                     /* mask starting bit position */
 118   int ebit;                     /* mask ending bit position */
 119 };
 120
 121 struct itbl_field {
 122   e_type type;                  /* dreg/creg/greg/immed/symb */
 123   struct itbl_range range;      /* field's bitfield range within instruction */
 124   unsigned long flags;          /* field flags */
 125   struct itbl_field *next;      /* next field in list */
 126 };
 127
 128 /* These structures define the instructions and registers for a processor.
 129  * If the type is an instruction, the structure defines the format of an
 130  * instruction where the fields are the list of operands.
 131  * The flags field below uses the same values as those defined in the
 132  * gnu assembler and are machine specific.  */
 133 struct itbl_entry {
 134   e_processor processor;        /* processor number */
 135   e_type type;                  /* dreg/creg/greg/insn */
 136   char *name;                   /* mnemionic name for insn/register */
 137   unsigned long value;          /* opcode/instruction mask/register number */
 138   unsigned long flags;          /* effects of the instruction */
 139   struct itbl_range range;      /* bit range within instruction for value */
 140   struct itbl_field *fields;    /* list of operand definitions (if any) */
 141   struct itbl_entry *next;      /* next entry */
 142 };
 143
 144 /* local data and structures */
 145
 146 static int itbl_num_opcodes = 0;
 147 /* Array of entries for each processor and entry type */
 148 static struct itbl_entry *entries[e_nprocs][e_ntypes] = {
 149   {0, 0, 0, 0, 0, 0},
 150   {0, 0, 0, 0, 0, 0},
 151   {0, 0, 0, 0, 0, 0},
 152   {0, 0, 0, 0, 0, 0}
 153 };
 154
 155 /* local prototypes */
 156 static unsigned long build_opcode (struct itbl_entry *e);
 157 static e_type get_type (int yytype);
 158 static e_processor get_processor (int yyproc);
 159 static struct itbl_entry **get_entries (e_processor processor,
 160                                         e_type type);
 161 static struct itbl_entry *find_entry_byname (e_processor processor,
 162                                         e_type type, char *name);
 163 static struct itbl_entry *find_entry_byval (e_processor processor,
 164                         e_type type, unsigned long val, struct itbl_range *r);
 165 static struct itbl_entry *alloc_entry (e_processor processor,
 166                 e_type type, char *name, unsigned long value);
 167 static unsigned long apply_range (unsigned long value, struct itbl_range r);
 168 static unsigned long extract_range (unsigned long value, struct itbl_range r);
 169 static struct itbl_field *alloc_field (e_type type, int sbit,
 170                                         int ebit, unsigned long flags);
 171
 172 /*======================================================================*/
 173 /* Interfaces to the parser */
 174
 175 /* Open the table and use lex and yacc to parse the entries.
 176  * Return 1 for failure; 0 for success.  */
 177
 178 int
 179 itbl_parse (char *insntbl)
 180 {
 181   extern FILE *yyin;
 182   extern int yyparse (void);
 183
 184   yyin = fopen (insntbl, FOPEN_RT);
 185   if (yyin == 0)
 186     {
 187       printf ("Can't open processor instruction specification file \"%s\"\n",
 188               insntbl);
 189       return 1;
 190     }
 191
 192   while (yyparse ())
 193     ;
 194
 195   fclose (yyin);
 196   itbl_have_entries = 1;
 197   return 0;
 198 }
 199
 200 /* Add a register entry */
 201
 202 struct itbl_entry *
 203 itbl_add_reg (int yyprocessor, int yytype, char *regname,
 204               int regnum)
 205 {
 206   return alloc_entry (get_processor (yyprocessor), get_type (yytype), regname,
 207                       (unsigned long) regnum);
 208 }
 209
 210 /* Add an instruction entry */
 211
 212 struct itbl_entry *
 213 itbl_add_insn (int yyprocessor, char *name, unsigned long value,
 214                int sbit, int ebit, unsigned long flags)
 215 {
 216   struct itbl_entry *e;
 217   e = alloc_entry (get_processor (yyprocessor), e_insn, name, value);
 218   if (e)
 219     {
 220       e->range.sbit = sbit;
 221       e->range.ebit = ebit;
 222       e->flags = flags;
 223       itbl_num_opcodes++;
 224     }
 225   return e;
 226 }
 227
 228 /* Add an operand to an instruction entry */
 229
 230 struct itbl_field *
 231 itbl_add_operand (struct itbl_entry *e, int yytype, int sbit,
 232                   int ebit, unsigned long flags)
 233 {
 234   struct itbl_field *f, **last_f;
 235   if (!e)
 236     return 0;
 237   /* Add to end of fields' list.  */
 238   f = alloc_field (get_type (yytype), sbit, ebit, flags);
 239   if (f)
 240     {
 241       last_f = &e->fields;
 242       while (*last_f)
 243         last_f = &(*last_f)->next;
 244       *last_f = f;
 245       f->next = 0;
 246     }
 247   return f;
 248 }
 249
 250 /*======================================================================*/
 251 /* Interfaces for assembler and disassembler */
 252
 253 #ifndef STAND_ALONE
 254 static void append_insns_as_macros (void);
 255
 256 /* Initialize for gas.  */
 257
 258 void
 259 itbl_init (void)
 260 {
 261   struct itbl_entry *e, **es;
 262   e_processor procn;
 263   e_type type;
 264
 265   if (!itbl_have_entries)
 266     return;
 267
 268   /* Since register names don't have a prefix, put them in the symbol table so
 269      they can't be used as symbols.  This simplifies argument parsing as
 270      we can let gas parse registers for us.  */
 271   /* Use symbol_create instead of symbol_new so we don't try to
 272      output registers into the object file's symbol table.  */
 273
 274   for (type = e_regtype0; type < e_nregtypes; type++)
 275     for (procn = e_p0; procn < e_nprocs; procn++)
 276       {
 277         es = get_entries (procn, type);
 278         for (e = *es; e; e = e->next)
 279           {
 280             symbol_table_insert (symbol_create (e->name, reg_section,
 281                                                 e->value, &zero_address_frag));
 282           }
 283       }
 284   append_insns_as_macros ();
 285 }
 286
 287 /* Append insns to opcodes table and increase number of opcodes
 288  * Structure of opcodes table:
 289  * struct itbl_opcode
 290  * {
 291  *   const char *name;
 292  *   const char *args;          - string describing the arguments.
 293  *   unsigned long match;       - opcode, or ISA level if pinfo=INSN_MACRO
 294  *   unsigned long mask;        - opcode mask, or macro id if pinfo=INSN_MACRO
 295  *   unsigned long pinfo;       - insn flags, or INSN_MACRO
 296  * };
 297  * examples:
 298  *      {"li",      "t,i",  0x34000000, 0xffe00000, WR_t    },
 299  *      {"li",      "t,I",  0,    (int) M_LI,   INSN_MACRO  },
 300  */
 301
 302 static char *form_args (struct itbl_entry *e);
 303 static void
 304 append_insns_as_macros (void)
 305 {
 306   struct ITBL_OPCODE_STRUCT *new_opcodes, *o;
 307   struct itbl_entry *e, **es;
 308   int n, id, size, new_size, new_num_opcodes;
 309
 310   if (!itbl_have_entries)
 311     return;
 312
 313   if (!itbl_num_opcodes)        /* no new instructions to add! */
 314     {
 315       return;
 316     }
 317   DBG (("previous num_opcodes=%d\n", ITBL_NUM_OPCODES));
 318
 319   new_num_opcodes = ITBL_NUM_OPCODES + itbl_num_opcodes;
 320   ASSERT (new_num_opcodes >= itbl_num_opcodes);
 321
 322   size = sizeof (struct ITBL_OPCODE_STRUCT) * ITBL_NUM_OPCODES;
 323   ASSERT (size >= 0);
 324   DBG (("I get=%d\n", size / sizeof (ITBL_OPCODES[0])));
 325
 326   new_size = sizeof (struct ITBL_OPCODE_STRUCT) * new_num_opcodes;
 327   ASSERT (new_size > size);
 328
 329   /* FIXME since ITBL_OPCODES culd be a static table,
 330                 we can't realloc or delete the old memory.  */
 331   new_opcodes = (struct ITBL_OPCODE_STRUCT *) malloc (new_size);
 332   if (!new_opcodes)
 333     {
 334       printf (_("Unable to allocate memory for new instructions\n"));
 335       return;
 336     }
 337   if (size)                     /* copy preexisting opcodes table */
 338     memcpy (new_opcodes, ITBL_OPCODES, size);
 339
 340   /* FIXME! some NUMOPCODES are calculated expressions.
 341                 These need to be changed before itbls can be supported.  */
 342
 343   id = ITBL_NUM_MACROS;         /* begin the next macro id after the last */
 344   o = &new_opcodes[ITBL_NUM_OPCODES];   /* append macro to opcodes list */
 345   for (n = e_p0; n < e_nprocs; n++)
 346     {
 347       es = get_entries (n, e_insn);
 348       for (e = *es; e; e = e->next)
 349         {
 350           /* name,    args,   mask,       match,  pinfo
 351                  * {"li",      "t,i",  0x34000000, 0xffe00000, WR_t    },
 352                  * {"li",      "t,I",  0,    (int) M_LI,   INSN_MACRO  },
 353                  * Construct args from itbl_fields.
 354                 */
 355           o->name = e->name;
 356           o->args = strdup (form_args (e));
 357           o->mask = apply_range (e->value, e->range);
 358           /* FIXME how to catch during assembly? */
 359           /* mask to identify this insn */
 360           o->match = apply_range (e->value, e->range);
 361           o->pinfo = 0;
 362
 363 #ifdef USE_MACROS
 364           o->mask = id++;       /* FIXME how to catch during assembly? */
 365           o->match = 0;         /* for macros, the insn_isa number */
 366           o->pinfo = INSN_MACRO;
 367 #endif
 368
 369           /* Don't add instructions which caused an error */
 370           if (o->args)
 371             o++;
 372           else
 373             new_num_opcodes--;
 374         }
 375     }
 376   ITBL_OPCODES = new_opcodes;
 377   ITBL_NUM_OPCODES = new_num_opcodes;
 378
 379   /* FIXME
 380                 At this point, we can free the entries, as they should have
 381                 been added to the assembler's tables.
 382                 Don't free name though, since name is being used by the new
 383                 opcodes table.
 384
 385                 Eventually, we should also free the new opcodes table itself
 386                 on exit.
 387         */
 388 }
 389
 390 static char *
 391 form_args (struct itbl_entry *e)
 392 {
 393   static char s[31];
 394   char c = 0, *p = s;
 395   struct itbl_field *f;
 396
 397   ASSERT (e);
 398   for (f = e->fields; f; f = f->next)
 399     {
 400       switch (f->type)
 401         {
 402         case e_dreg:
 403           c = 'd';
 404           break;
 405         case e_creg:
 406           c = 't';
 407           break;
 408         case e_greg:
 409           c = 's';
 410           break;
 411         case e_immed:
 412           c = 'i';
 413           break;
 414         case e_addr:
 415           c = 'a';
 416           break;
 417         default:
 418           c = 0;                /* ignore; unknown field type */
 419         }
 420       if (c)
 421         {
 422           if (p != s)
 423             *p++ = ',';
 424           *p++ = c;
 425         }
 426     }
 427   *p = 0;
 428   return s;
 429 }
 430 #endif /* !STAND_ALONE */
 431
 432 /* Get processor's register name from val */
 433
 434 int
 435 itbl_get_reg_val (char *name, unsigned long *pval)
 436 {
 437   e_type t;
 438   e_processor p;
 439
 440   for (p = e_p0; p < e_nprocs; p++)
 441     {
 442       for (t = e_regtype0; t < e_nregtypes; t++)
 443         {
 444           if (itbl_get_val (p, t, name, pval))
 445             return 1;
 446         }
 447     }
 448   return 0;
 449 }
 450
 451 char *
 452 itbl_get_name (e_processor processor, e_type type, unsigned long val)
 453 {
 454   struct itbl_entry *r;
 455   /* type depends on instruction passed */
 456   r = find_entry_byval (processor, type, val, 0);
 457   if (r)
 458     return r->name;
 459   else
 460     return 0;                   /* error; invalid operand */
 461 }
 462
 463 /* Get processor's register value from name */
 464
 465 int
 466 itbl_get_val (e_processor processor, e_type type, char *name,
 467               unsigned long *pval)
 468 {
 469   struct itbl_entry *r;
 470   /* type depends on instruction passed */
 471   r = find_entry_byname (processor, type, name);
 472   if (r == NULL)
 473     return 0;
 474   *pval = r->value;
 475   return 1;
 476 }
 477
 478 /* Assemble instruction "name" with operands "s".
 479  * name - name of instruction
 480  * s - operands
 481  * returns - long word for assembled instruction */
 482
 483 unsigned long
 484 itbl_assemble (char *name, char *s)
 485 {
 486   unsigned long opcode;
 487   struct itbl_entry *e = NULL;
 488   struct itbl_field *f;
 489   char *n;
 490   int processor;
 491
 492   if (!name || !*name)
 493     return 0;                   /* error!  must have an opcode name/expr */
 494
 495   /* find entry in list of instructions for all processors */
 496   for (processor = 0; processor < e_nprocs; processor++)
 497     {
 498       e = find_entry_byname (processor, e_insn, name);
 499       if (e)
 500         break;
 501     }
 502   if (!e)
 503     return 0;                   /* opcode not in table; invalid instruction */
 504   opcode = build_opcode (e);
 505
 506   /* parse opcode's args (if any) */
 507   for (f = e->fields; f; f = f->next)   /* for each arg, ...  */
 508     {
 509       struct itbl_entry *r;
 510       unsigned long value;
 511       if (!s || !*s)
 512         return 0;               /* error - not enough operands */
 513       n = itbl_get_field (&s);
 514       /* n should be in form $n or 0xhhh (are symbol names valid?? */
 515       switch (f->type)
 516         {
 517         case e_dreg:
 518         case e_creg:
 519         case e_greg:
 520           /* Accept either a string name
 521                          * or '$' followed by the register number */
 522           if (*n == '$')
 523             {
 524               n++;
 525               value = strtol (n, 0, 10);
 526               /* FIXME! could have "0l"... then what?? */
 527               if (value == 0 && *n != '0')
 528                 return 0;       /* error; invalid operand */
 529             }
 530           else
 531             {
 532               r = find_entry_byname (e->processor, f->type, n);
 533               if (r)
 534                 value = r->value;
 535               else
 536                 return 0;       /* error; invalid operand */
 537             }
 538           break;
 539         case e_addr:
 540           /* use assembler's symbol table to find symbol */
 541           /* FIXME!! Do we need this?
 542                                 if so, what about relocs??
 543                                 my_getExpression (&imm_expr, s);
 544                                 return 0;       /-* error; invalid operand *-/
 545                                 break;
 546                         */
 547           /* If not a symbol, fall thru to IMMED */
 548         case e_immed:
 549           if (*n == '0' && *(n + 1) == 'x')     /* hex begins 0x...  */
 550             {
 551               n += 2;
 552               value = strtol (n, 0, 16);
 553               /* FIXME! could have "0xl"... then what?? */
 554             }
 555           else
 556             {
 557               value = strtol (n, 0, 10);
 558               /* FIXME! could have "0l"... then what?? */
 559               if (value == 0 && *n != '0')
 560                 return 0;       /* error; invalid operand */
 561             }
 562           break;
 563         default:
 564           return 0;             /* error; invalid field spec */
 565         }
 566       opcode |= apply_range (value, f->range);
 567     }
 568   if (s && *s)
 569     return 0;                   /* error - too many operands */
 570   return opcode;                /* done! */
 571 }
 572
 573 /* Disassemble instruction "insn".
 574  * insn - instruction
 575  * s - buffer to hold disassembled instruction
 576  * returns - 1 if succeeded; 0 if failed
 577  */
 578
 579 int
 580 itbl_disassemble (char *s, unsigned long insn)
 581 {
 582   e_processor processor;
 583   struct itbl_entry *e;
 584   struct itbl_field *f;
 585
 586   if (!ITBL_IS_INSN (insn))
 587     return 0;                   /* error */
 588   processor = get_processor (ITBL_DECODE_PNUM (insn));
 589
 590   /* find entry in list */
 591   e = find_entry_byval (processor, e_insn, insn, 0);
 592   if (!e)
 593     return 0;                   /* opcode not in table; invalid instruction */
 594   strcpy (s, e->name);
 595
 596   /* Parse insn's args (if any).  */
 597   for (f = e->fields; f; f = f->next)   /* for each arg, ...  */
 598     {
 599       struct itbl_entry *r;
 600       unsigned long value;
 601
 602       if (f == e->fields)       /* First operand is preceded by tab.  */
 603         strcat (s, "\t");
 604       else                      /* ','s separate following operands.  */
 605         strcat (s, ",");
 606       value = extract_range (insn, f->range);
 607       /* n should be in form $n or 0xhhh (are symbol names valid?? */
 608       switch (f->type)
 609         {
 610         case e_dreg:
 611         case e_creg:
 612         case e_greg:
 613           /* Accept either a string name
 614              or '$' followed by the register number.  */
 615           r = find_entry_byval (e->processor, f->type, value, &f->range);
 616           if (r)
 617             strcat (s, r->name);
 618           else
 619             sprintf (s, "%s$%lu", s, value);
 620           break;
 621         case e_addr:
 622           /* Use assembler's symbol table to find symbol.  */
 623           /* FIXME!! Do we need this?  If so, what about relocs??  */
 624           /* If not a symbol, fall through to IMMED.  */
 625         case e_immed:
 626           sprintf (s, "%s0x%lx", s, value);
 627           break;
 628         default:
 629           return 0;             /* error; invalid field spec */
 630         }
 631     }
 632   return 1;                     /* Done!  */
 633 }
 634
 635 /*======================================================================*/
 636 /*
 637  * Local functions for manipulating private structures containing
 638  * the names and format for the new instructions and registers
 639  * for each processor.
 640  */
 641
 642 /* Calculate instruction's opcode and function values from entry */
 643
 644 static unsigned long
 645 build_opcode (struct itbl_entry *e)
 646 {
 647   unsigned long opcode;
 648
 649   opcode = apply_range (e->value, e->range);
 650   opcode |= ITBL_ENCODE_PNUM (e->processor);
 651   return opcode;
 652 }
 653
 654 /* Calculate absolute value given the relative value and bit position range
 655  * within the instruction.
 656  * The range is inclusive where 0 is least significant bit.
 657  * A range of { 24, 20 } will have a mask of
 658  * bit   3           2            1
 659  * pos: 1098 7654 3210 9876 5432 1098 7654 3210
 660  * bin: 0000 0001 1111 0000 0000 0000 0000 0000
 661  * hex:    0    1    f    0    0    0    0    0
 662  * mask: 0x01f00000.
 663  */
 664
 665 static unsigned long
 666 apply_range (unsigned long rval, struct itbl_range r)
 667 {
 668   unsigned long mask;
 669   unsigned long aval;
 670   int len = MAX_BITPOS - r.sbit;
 671
 672   ASSERT (r.sbit >= r.ebit);
 673   ASSERT (MAX_BITPOS >= r.sbit);
 674   ASSERT (r.ebit >= 0);
 675
 676   /* create mask by truncating 1s by shifting */
 677   mask = 0xffffffff << len;
 678   mask = mask >> len;
 679   mask = mask >> r.ebit;
 680   mask = mask << r.ebit;
 681
 682   aval = (rval << r.ebit) & mask;
 683   return aval;
 684 }
 685
 686 /* Calculate relative value given the absolute value and bit position range
 687  * within the instruction.  */
 688
 689 static unsigned long
 690 extract_range (unsigned long aval, struct itbl_range r)
 691 {
 692   unsigned long mask;
 693   unsigned long rval;
 694   int len = MAX_BITPOS - r.sbit;
 695
 696   /* create mask by truncating 1s by shifting */
 697   mask = 0xffffffff << len;
 698   mask = mask >> len;
 699   mask = mask >> r.ebit;
 700   mask = mask << r.ebit;
 701
 702   rval = (aval & mask) >> r.ebit;
 703   return rval;
 704 }
 705
 706 /* Extract processor's assembly instruction field name from s;
 707  * forms are "n args" "n,args" or "n" */
 708 /* Return next argument from string pointer "s" and advance s.
 709  * delimiters are " ,()" */
 710
 711 char *
 712 itbl_get_field (char **S)
 713 {
 714   static char n[128];
 715   char *s;
 716   int len;
 717
 718   s = *S;
 719   if (!s || !*s)
 720     return 0;
 721   /* FIXME: This is a weird set of delimiters.  */
 722   len = strcspn (s, " \t,()");
 723   ASSERT (128 > len + 1);
 724   strncpy (n, s, len);
 725   n[len] = 0;
 726   if (s[len] == '\0')
 727     s = 0;                      /* no more args */
 728   else
 729     s += len + 1;               /* advance to next arg */
 730
 731   *S = s;
 732   return n;
 733 }
 734
 735 /* Search entries for a given processor and type
 736  * to find one matching the name "n".
 737  * Return a pointer to the entry */
 738
 739 static struct itbl_entry *
 740 find_entry_byname (e_processor processor,
 741                    e_type type, char *n)
 742 {
 743   struct itbl_entry *e, **es;
 744
 745   es = get_entries (processor, type);
 746   for (e = *es; e; e = e->next) /* for each entry, ...  */
 747     {
 748       if (!strcmp (e->name, n))
 749         return e;
 750     }
 751   return 0;
 752 }
 753
 754 /* Search entries for a given processor and type
 755  * to find one matching the value "val" for the range "r".
 756  * Return a pointer to the entry.
 757  * This function is used for disassembling fields of an instruction.
 758  */
 759
 760 static struct itbl_entry *
 761 find_entry_byval (e_processor processor, e_type type,
 762                   unsigned long val, struct itbl_range *r)
 763 {
 764   struct itbl_entry *e, **es;
 765   unsigned long eval;
 766
 767   es = get_entries (processor, type);
 768   for (e = *es; e; e = e->next) /* for each entry, ...  */
 769     {
 770       if (processor != e->processor)
 771         continue;
 772       /* For insns, we might not know the range of the opcode,
 773          * so a range of 0 will allow this routine to match against
 774          * the range of the entry to be compared with.
 775          * This could cause ambiguities.
 776          * For operands, we get an extracted value and a range.
 777          */
 778       /* if range is 0, mask val against the range of the compared entry.  */
 779       if (r == 0)               /* if no range passed, must be whole 32-bits
 780                          * so create 32-bit value from entry's range */
 781         {
 782           eval = apply_range (e->value, e->range);
 783           val &= apply_range (0xffffffff, e->range);
 784         }
 785       else if ((r->sbit == e->range.sbit && r->ebit == e->range.ebit)
 786                || (e->range.sbit == 0 && e->range.ebit == 0))
 787         {
 788           eval = apply_range (e->value, *r);
 789           val = apply_range (val, *r);
 790         }
 791       else
 792         continue;
 793       if (val == eval)
 794         return e;
 795     }
 796   return 0;
 797 }
 798
 799 /* Return a pointer to the list of entries for a given processor and type.  */
 800
 801 static struct itbl_entry **
 802 get_entries (e_processor processor, e_type type)
 803 {
 804   return &entries[processor][type];
 805 }
 806
 807 /* Return an integral value for the processor passed from yyparse.  */
 808
 809 static e_processor
 810 get_processor (int yyproc)
 811 {
 812   /* translate from yacc's processor to enum */
 813   if (yyproc >= e_p0 && yyproc < e_nprocs)
 814     return (e_processor) yyproc;
 815   return e_invproc;             /* error; invalid processor */
 816 }
 817
 818 /* Return an integral value for the entry type passed from yyparse.  */
 819
 820 static e_type
 821 get_type (int yytype)
 822 {
 823   switch (yytype)
 824     {
 825       /* translate from yacc's type to enum */
 826     case INSN:
 827       return e_insn;
 828     case DREG:
 829       return e_dreg;
 830     case CREG:
 831       return e_creg;
 832     case GREG:
 833       return e_greg;
 834     case ADDR:
 835       return e_addr;
 836     case IMMED:
 837       return e_immed;
 838     default:
 839       return e_invtype;         /* error; invalid type */
 840     }
 841 }
 842
 843 /* Allocate and initialize an entry */
 844
 845 static struct itbl_entry *
 846 alloc_entry (e_processor processor, e_type type,
 847              char *name, unsigned long value)
 848 {
 849   struct itbl_entry *e, **es;
 850   if (!name)
 851     return 0;
 852   e = (struct itbl_entry *) malloc (sizeof (struct itbl_entry));
 853   if (e)
 854     {
 855       memset (e, 0, sizeof (struct itbl_entry));
 856       e->name = (char *) malloc (sizeof (strlen (name)) + 1);
 857       if (e->name)
 858         strcpy (e->name, name);
 859       e->processor = processor;
 860       e->type = type;
 861       e->value = value;
 862       es = get_entries (e->processor, e->type);
 863       e->next = *es;
 864       *es = e;
 865     }
 866   return e;
 867 }
 868
 869 /* Allocate and initialize an entry's field */
 870
 871 static struct itbl_field *
 872 alloc_field (e_type type, int sbit, int ebit,
 873              unsigned long flags)
 874 {
 875   struct itbl_field *f;
 876   f = (struct itbl_field *) malloc (sizeof (struct itbl_field));
 877   if (f)
 878     {
 879       memset (f, 0, sizeof (struct itbl_field));
 880       f->type = type;
 881       f->range.sbit = sbit;
 882       f->range.ebit = ebit;
 883       f->flags = flags;
 884     }
 885   return f;
 886 }