1 /* Print i386 instructions for GDB, the GNU debugger.
2 Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2001, 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
21 /* 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
23 modified by John Hassey (hassey@dg-rtp.dg.com)
24 x86-64 support added by Jan Hubicka (jh@suse.cz)
25 VIA PadLock support by Michal Ludvig (mludvig@suse.cz). */
27 /* The main tables describing the instructions is essentially a copy
28 of the "Opcode Map" chapter (Appendix A) of the Intel 80386
29 Programmers Manual. Usually, there is a capital letter, followed
30 by a small letter. The capital letter tell the addressing mode,
31 and the small letter tells about the operand size. Refer to
32 the Intel manual for details. */
42 #ifndef UNIXWARE_COMPAT
43 /* Set non-zero for broken, compatible instructions. Set to zero for
44 non-broken opcodes. */
45 #define UNIXWARE_COMPAT 1
48 static int fetch_data (struct disassemble_info
*, bfd_byte
*);
49 static void ckprefix (void);
50 static const char *prefix_name (int, int);
51 static int print_insn (bfd_vma
, disassemble_info
*);
52 static void dofloat (int);
53 static void OP_ST (int, int);
54 static void OP_STi (int, int);
55 static int putop (const char *, int);
56 static void oappend (const char *);
57 static void append_seg (void);
58 static void OP_indirE (int, int);
59 static void print_operand_value (char *, int, bfd_vma
);
60 static void OP_E (int, int);
61 static void OP_G (int, int);
62 static bfd_vma
get64 (void);
63 static bfd_signed_vma
get32 (void);
64 static bfd_signed_vma
get32s (void);
65 static int get16 (void);
66 static void set_op (bfd_vma
, int);
67 static void OP_REG (int, int);
68 static void OP_IMREG (int, int);
69 static void OP_I (int, int);
70 static void OP_I64 (int, int);
71 static void OP_sI (int, int);
72 static void OP_J (int, int);
73 static void OP_SEG (int, int);
74 static void OP_DIR (int, int);
75 static void OP_OFF (int, int);
76 static void OP_OFF64 (int, int);
77 static void ptr_reg (int, int);
78 static void OP_ESreg (int, int);
79 static void OP_DSreg (int, int);
80 static void OP_C (int, int);
81 static void OP_D (int, int);
82 static void OP_T (int, int);
83 static void OP_Rd (int, int);
84 static void OP_MMX (int, int);
85 static void OP_XMM (int, int);
86 static void OP_EM (int, int);
87 static void OP_EX (int, int);
88 static void OP_EMC (int,int);
89 static void OP_MXC (int,int);
90 static void OP_MS (int, int);
91 static void OP_XS (int, int);
92 static void OP_M (int, int);
93 static void OP_VMX (int, int);
94 static void OP_0fae (int, int);
95 static void OP_0f07 (int, int);
96 static void NOP_Fixup1 (int, int);
97 static void NOP_Fixup2 (int, int);
98 static void OP_3DNowSuffix (int, int);
99 static void OP_SIMD_Suffix (int, int);
100 static void SIMD_Fixup (int, int);
101 static void PNI_Fixup (int, int);
102 static void SVME_Fixup (int, int);
103 static void INVLPG_Fixup (int, int);
104 static void BadOp (void);
105 static void VMX_Fixup (int, int);
106 static void REP_Fixup (int, int);
107 static void CMPXCHG8B_Fixup (int, int);
110 /* Points to first byte not fetched. */
111 bfd_byte
*max_fetched
;
112 bfd_byte the_buffer
[MAXLEN
];
118 /* The opcode for the fwait instruction, which we treat as a prefix
120 #define FWAIT_OPCODE (0x9b)
129 enum address_mode address_mode
;
131 /* Flags for the prefixes for the current instruction. See below. */
134 /* REX prefix the current instruction. See below. */
136 /* Bits of REX we've already used. */
142 /* Mark parts used in the REX prefix. When we are testing for
143 empty prefix (for 8bit register REX extension), just mask it
144 out. Otherwise test for REX bit is excuse for existence of REX
145 only in case value is nonzero. */
146 #define USED_REX(value) \
149 rex_used |= (rex & value) ? (value) | 0x40 : 0; \
154 /* Flags for prefixes which we somehow handled when printing the
155 current instruction. */
156 static int used_prefixes
;
158 /* Flags stored in PREFIXES. */
159 #define PREFIX_REPZ 1
160 #define PREFIX_REPNZ 2
161 #define PREFIX_LOCK 4
163 #define PREFIX_SS 0x10
164 #define PREFIX_DS 0x20
165 #define PREFIX_ES 0x40
166 #define PREFIX_FS 0x80
167 #define PREFIX_GS 0x100
168 #define PREFIX_DATA 0x200
169 #define PREFIX_ADDR 0x400
170 #define PREFIX_FWAIT 0x800
172 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
173 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
175 #define FETCH_DATA(info, addr) \
176 ((addr) <= ((struct dis_private *) (info->private_data))->max_fetched \
177 ? 1 : fetch_data ((info), (addr)))
180 fetch_data (struct disassemble_info
*info
, bfd_byte
*addr
)
183 struct dis_private
*priv
= (struct dis_private
*) info
->private_data
;
184 bfd_vma start
= priv
->insn_start
+ (priv
->max_fetched
- priv
->the_buffer
);
186 if (addr
<= priv
->the_buffer
+ MAXLEN
)
187 status
= (*info
->read_memory_func
) (start
,
189 addr
- priv
->max_fetched
,
195 /* If we did manage to read at least one byte, then
196 print_insn_i386 will do something sensible. Otherwise, print
197 an error. We do that here because this is where we know
199 if (priv
->max_fetched
== priv
->the_buffer
)
200 (*info
->memory_error_func
) (status
, start
, info
);
201 longjmp (priv
->bailout
, 1);
204 priv
->max_fetched
= addr
;
210 #define Eb OP_E, b_mode
211 #define Ev OP_E, v_mode
212 #define Ed OP_E, d_mode
213 #define Edq OP_E, dq_mode
214 #define Edqw OP_E, dqw_mode
215 #define indirEv OP_indirE, stack_v_mode
216 #define indirEp OP_indirE, f_mode
217 #define stackEv OP_E, stack_v_mode
218 #define Em OP_E, m_mode
219 #define Ew OP_E, w_mode
220 #define M OP_M, 0 /* lea, lgdt, etc. */
221 #define Ma OP_M, v_mode
222 #define Mp OP_M, f_mode /* 32 or 48 bit memory operand for LDS, LES etc */
223 #define Mq OP_M, q_mode
224 #define Gb OP_G, b_mode
225 #define Gv OP_G, v_mode
226 #define Gd OP_G, d_mode
227 #define Gdq OP_G, dq_mode
228 #define Gm OP_G, m_mode
229 #define Gw OP_G, w_mode
230 #define Rd OP_Rd, d_mode
231 #define Rm OP_Rd, m_mode
232 #define Ib OP_I, b_mode
233 #define sIb OP_sI, b_mode /* sign extened byte */
234 #define Iv OP_I, v_mode
235 #define Iq OP_I, q_mode
236 #define Iv64 OP_I64, v_mode
237 #define Iw OP_I, w_mode
238 #define I1 OP_I, const_1_mode
239 #define Jb OP_J, b_mode
240 #define Jv OP_J, v_mode
241 #define Cm OP_C, m_mode
242 #define Dm OP_D, m_mode
243 #define Td OP_T, d_mode
245 #define RMeAX OP_REG, eAX_reg
246 #define RMeBX OP_REG, eBX_reg
247 #define RMeCX OP_REG, eCX_reg
248 #define RMeDX OP_REG, eDX_reg
249 #define RMeSP OP_REG, eSP_reg
250 #define RMeBP OP_REG, eBP_reg
251 #define RMeSI OP_REG, eSI_reg
252 #define RMeDI OP_REG, eDI_reg
253 #define RMrAX OP_REG, rAX_reg
254 #define RMrBX OP_REG, rBX_reg
255 #define RMrCX OP_REG, rCX_reg
256 #define RMrDX OP_REG, rDX_reg
257 #define RMrSP OP_REG, rSP_reg
258 #define RMrBP OP_REG, rBP_reg
259 #define RMrSI OP_REG, rSI_reg
260 #define RMrDI OP_REG, rDI_reg
261 #define RMAL OP_REG, al_reg
262 #define RMAL OP_REG, al_reg
263 #define RMCL OP_REG, cl_reg
264 #define RMDL OP_REG, dl_reg
265 #define RMBL OP_REG, bl_reg
266 #define RMAH OP_REG, ah_reg
267 #define RMCH OP_REG, ch_reg
268 #define RMDH OP_REG, dh_reg
269 #define RMBH OP_REG, bh_reg
270 #define RMAX OP_REG, ax_reg
271 #define RMDX OP_REG, dx_reg
273 #define eAX OP_IMREG, eAX_reg
274 #define eBX OP_IMREG, eBX_reg
275 #define eCX OP_IMREG, eCX_reg
276 #define eDX OP_IMREG, eDX_reg
277 #define eSP OP_IMREG, eSP_reg
278 #define eBP OP_IMREG, eBP_reg
279 #define eSI OP_IMREG, eSI_reg
280 #define eDI OP_IMREG, eDI_reg
281 #define AL OP_IMREG, al_reg
282 #define CL OP_IMREG, cl_reg
283 #define DL OP_IMREG, dl_reg
284 #define BL OP_IMREG, bl_reg
285 #define AH OP_IMREG, ah_reg
286 #define CH OP_IMREG, ch_reg
287 #define DH OP_IMREG, dh_reg
288 #define BH OP_IMREG, bh_reg
289 #define AX OP_IMREG, ax_reg
290 #define DX OP_IMREG, dx_reg
291 #define zAX OP_IMREG, z_mode_ax_reg
292 #define indirDX OP_IMREG, indir_dx_reg
294 #define Sw OP_SEG, w_mode
295 #define Sv OP_SEG, v_mode
297 #define Ob OP_OFF64, b_mode
298 #define Ov OP_OFF64, v_mode
299 #define Xb OP_DSreg, eSI_reg
300 #define Xv OP_DSreg, eSI_reg
301 #define Xz OP_DSreg, eSI_reg
302 #define Yb OP_ESreg, eDI_reg
303 #define Yv OP_ESreg, eDI_reg
304 #define DSBX OP_DSreg, eBX_reg
306 #define es OP_REG, es_reg
307 #define ss OP_REG, ss_reg
308 #define cs OP_REG, cs_reg
309 #define ds OP_REG, ds_reg
310 #define fs OP_REG, fs_reg
311 #define gs OP_REG, gs_reg
315 #define EM OP_EM, v_mode
316 #define EX OP_EX, v_mode
317 #define MS OP_MS, v_mode
318 #define XS OP_XS, v_mode
319 #define EMC OP_EMC, v_mode
320 #define MXC OP_MXC, 0
321 #define VM OP_VMX, q_mode
322 #define OPSUF OP_3DNowSuffix, 0
323 #define OPSIMD OP_SIMD_Suffix, 0
325 /* Used handle "rep" prefix for string instructions. */
326 #define Xbr REP_Fixup, eSI_reg
327 #define Xvr REP_Fixup, eSI_reg
328 #define Ybr REP_Fixup, eDI_reg
329 #define Yvr REP_Fixup, eDI_reg
330 #define Yzr REP_Fixup, eDI_reg
331 #define indirDXr REP_Fixup, indir_dx_reg
332 #define ALr REP_Fixup, al_reg
333 #define eAXr REP_Fixup, eAX_reg
335 #define cond_jump_flag NULL, cond_jump_mode
336 #define loop_jcxz_flag NULL, loop_jcxz_mode
338 /* bits in sizeflag */
339 #define SUFFIX_ALWAYS 4
343 #define b_mode 1 /* byte operand */
344 #define v_mode 2 /* operand size depends on prefixes */
345 #define w_mode 3 /* word operand */
346 #define d_mode 4 /* double word operand */
347 #define q_mode 5 /* quad word operand */
348 #define t_mode 6 /* ten-byte operand */
349 #define x_mode 7 /* 16-byte XMM operand */
350 #define m_mode 8 /* d_mode in 32bit, q_mode in 64bit mode. */
351 #define cond_jump_mode 9
352 #define loop_jcxz_mode 10
353 #define dq_mode 11 /* operand size depends on REX prefixes. */
354 #define dqw_mode 12 /* registers like dq_mode, memory like w_mode. */
355 #define f_mode 13 /* 4- or 6-byte pointer operand */
356 #define const_1_mode 14
357 #define stack_v_mode 15 /* v_mode for stack-related opcodes. */
358 #define z_mode 16 /* non-quad operand size depends on prefixes */
359 #define o_mode 17 /* 16-byte operand */
404 #define z_mode_ax_reg 149
405 #define indir_dx_reg 150
409 #define USE_PREFIX_USER_TABLE 3
410 #define X86_64_SPECIAL 4
411 #define IS_3BYTE_OPCODE 5
413 #define FLOAT NULL, NULL, FLOATCODE, NULL, 0, NULL, 0, NULL, 0
415 #define GRP1b NULL, NULL, USE_GROUPS, NULL, 0, NULL, 0, NULL, 0
416 #define GRP1S NULL, NULL, USE_GROUPS, NULL, 1, NULL, 0, NULL, 0
417 #define GRP1Ss NULL, NULL, USE_GROUPS, NULL, 2, NULL, 0, NULL, 0
418 #define GRP2b NULL, NULL, USE_GROUPS, NULL, 3, NULL, 0, NULL, 0
419 #define GRP2S NULL, NULL, USE_GROUPS, NULL, 4, NULL, 0, NULL, 0
420 #define GRP2b_one NULL, NULL, USE_GROUPS, NULL, 5, NULL, 0, NULL, 0
421 #define GRP2S_one NULL, NULL, USE_GROUPS, NULL, 6, NULL, 0, NULL, 0
422 #define GRP2b_cl NULL, NULL, USE_GROUPS, NULL, 7, NULL, 0, NULL, 0
423 #define GRP2S_cl NULL, NULL, USE_GROUPS, NULL, 8, NULL, 0, NULL, 0
424 #define GRP3b NULL, NULL, USE_GROUPS, NULL, 9, NULL, 0, NULL, 0
425 #define GRP3S NULL, NULL, USE_GROUPS, NULL, 10, NULL, 0, NULL, 0
426 #define GRP4 NULL, NULL, USE_GROUPS, NULL, 11, NULL, 0, NULL, 0
427 #define GRP5 NULL, NULL, USE_GROUPS, NULL, 12, NULL, 0, NULL, 0
428 #define GRP6 NULL, NULL, USE_GROUPS, NULL, 13, NULL, 0, NULL, 0
429 #define GRP7 NULL, NULL, USE_GROUPS, NULL, 14, NULL, 0, NULL, 0
430 #define GRP8 NULL, NULL, USE_GROUPS, NULL, 15, NULL, 0, NULL, 0
431 #define GRP9 NULL, NULL, USE_GROUPS, NULL, 16, NULL, 0, NULL, 0
432 #define GRP11_C6 NULL, NULL, USE_GROUPS, NULL, 17, NULL, 0, NULL, 0
433 #define GRP11_C7 NULL, NULL, USE_GROUPS, NULL, 18, NULL, 0, NULL, 0
434 #define GRP12 NULL, NULL, USE_GROUPS, NULL, 19, NULL, 0, NULL, 0
435 #define GRP13 NULL, NULL, USE_GROUPS, NULL, 20, NULL, 0, NULL, 0
436 #define GRP14 NULL, NULL, USE_GROUPS, NULL, 21, NULL, 0, NULL, 0
437 #define GRP15 NULL, NULL, USE_GROUPS, NULL, 22, NULL, 0, NULL, 0
438 #define GRP16 NULL, NULL, USE_GROUPS, NULL, 23, NULL, 0, NULL, 0
439 #define GRPAMD NULL, NULL, USE_GROUPS, NULL, 24, NULL, 0, NULL, 0
440 #define GRPPADLCK1 NULL, NULL, USE_GROUPS, NULL, 25, NULL, 0, NULL, 0
441 #define GRPPADLCK2 NULL, NULL, USE_GROUPS, NULL, 26, NULL, 0, NULL, 0
443 #define PREGRP0 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 0, NULL, 0, NULL, 0
444 #define PREGRP1 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 1, NULL, 0, NULL, 0
445 #define PREGRP2 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 2, NULL, 0, NULL, 0
446 #define PREGRP3 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 3, NULL, 0, NULL, 0
447 #define PREGRP4 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 4, NULL, 0, NULL, 0
448 #define PREGRP5 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 5, NULL, 0, NULL, 0
449 #define PREGRP6 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 6, NULL, 0, NULL, 0
450 #define PREGRP7 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 7, NULL, 0, NULL, 0
451 #define PREGRP8 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 8, NULL, 0, NULL, 0
452 #define PREGRP9 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 9, NULL, 0, NULL, 0
453 #define PREGRP10 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 10, NULL, 0, NULL, 0
454 #define PREGRP11 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 11, NULL, 0, NULL, 0
455 #define PREGRP12 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 12, NULL, 0, NULL, 0
456 #define PREGRP13 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 13, NULL, 0, NULL, 0
457 #define PREGRP14 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 14, NULL, 0, NULL, 0
458 #define PREGRP15 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 15, NULL, 0, NULL, 0
459 #define PREGRP16 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 16, NULL, 0, NULL, 0
460 #define PREGRP17 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 17, NULL, 0, NULL, 0
461 #define PREGRP18 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 18, NULL, 0, NULL, 0
462 #define PREGRP19 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 19, NULL, 0, NULL, 0
463 #define PREGRP20 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 20, NULL, 0, NULL, 0
464 #define PREGRP21 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 21, NULL, 0, NULL, 0
465 #define PREGRP22 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 22, NULL, 0, NULL, 0
466 #define PREGRP23 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 23, NULL, 0, NULL, 0
467 #define PREGRP24 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 24, NULL, 0, NULL, 0
468 #define PREGRP25 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 25, NULL, 0, NULL, 0
469 #define PREGRP26 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 26, NULL, 0, NULL, 0
470 #define PREGRP27 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 27, NULL, 0, NULL, 0
471 #define PREGRP28 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 28, NULL, 0, NULL, 0
472 #define PREGRP29 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 29, NULL, 0, NULL, 0
473 #define PREGRP30 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 30, NULL, 0, NULL, 0
474 #define PREGRP31 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 31, NULL, 0, NULL, 0
475 #define PREGRP32 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 32, NULL, 0, NULL, 0
476 #define PREGRP33 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 33, NULL, 0, NULL, 0
477 #define PREGRP34 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 34, NULL, 0, NULL, 0
478 #define PREGRP35 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 35, NULL, 0, NULL, 0
479 #define PREGRP36 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 36, NULL, 0, NULL, 0
480 #define PREGRP37 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 37, NULL, 0, NULL, 0
483 #define X86_64_0 NULL, NULL, X86_64_SPECIAL, NULL, 0, NULL, 0, NULL, 0
484 #define X86_64_1 NULL, NULL, X86_64_SPECIAL, NULL, 1, NULL, 0, NULL, 0
485 #define X86_64_2 NULL, NULL, X86_64_SPECIAL, NULL, 2, NULL, 0, NULL, 0
486 #define X86_64_3 NULL, NULL, X86_64_SPECIAL, NULL, 3, NULL, 0, NULL, 0
488 #define THREE_BYTE_0 NULL, NULL, IS_3BYTE_OPCODE, NULL, 0, NULL, 0, NULL, 0
489 #define THREE_BYTE_1 NULL, NULL, IS_3BYTE_OPCODE, NULL, 1, NULL, 0, NULL, 0
491 typedef void (*op_rtn
) (int bytemode
, int sizeflag
);
505 /* Upper case letters in the instruction names here are macros.
506 'A' => print 'b' if no register operands or suffix_always is true
507 'B' => print 'b' if suffix_always is true
508 'C' => print 's' or 'l' ('w' or 'd' in Intel mode) depending on operand
510 'D' => print 'w' if no register operands or 'w', 'l' or 'q', if
511 . suffix_always is true
512 'E' => print 'e' if 32-bit form of jcxz
513 'F' => print 'w' or 'l' depending on address size prefix (loop insns)
514 'G' => print 'w' or 'l' depending on operand size prefix (i/o insns)
515 'H' => print ",pt" or ",pn" branch hint
516 'I' => honor following macro letter even in Intel mode (implemented only
517 . for some of the macro letters)
519 'L' => print 'l' if suffix_always is true
520 'N' => print 'n' if instruction has no wait "prefix"
521 'O' => print 'd' or 'o' (or 'q' in Intel mode)
522 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
523 . or suffix_always is true. print 'q' if rex prefix is present.
524 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always
526 'R' => print 'w', 'l' or 'q' ('d' for 'l' and 'e' in Intel mode)
527 'S' => print 'w', 'l' or 'q' if suffix_always is true
528 'T' => print 'q' in 64bit mode and behave as 'P' otherwise
529 'U' => print 'q' in 64bit mode and behave as 'Q' otherwise
530 'V' => print 'q' in 64bit mode and behave as 'S' otherwise
531 'W' => print 'b', 'w' or 'l' ('d' in Intel mode)
532 'X' => print 's', 'd' depending on data16 prefix (for XMM)
533 'Y' => 'q' if instruction has an REX 64bit overwrite prefix
534 'Z' => print 'q' in 64bit mode and behave as 'L' otherwise
536 Many of the above letters print nothing in Intel mode. See "putop"
539 Braces '{' and '}', and vertical bars '|', indicate alternative
540 mnemonic strings for AT&T, Intel, X86_64 AT&T, and X86_64 Intel
541 modes. In cases where there are only two alternatives, the X86_64
542 instruction is reserved, and "(bad)" is printed.
545 static const struct dis386 dis386
[] = {
547 { "addB", Eb
, Gb
, XX
, XX
},
548 { "addS", Ev
, Gv
, XX
, XX
},
549 { "addB", Gb
, Eb
, XX
, XX
},
550 { "addS", Gv
, Ev
, XX
, XX
},
551 { "addB", AL
, Ib
, XX
, XX
},
552 { "addS", eAX
, Iv
, XX
, XX
},
553 { "push{T|}", es
, XX
, XX
, XX
},
554 { "pop{T|}", es
, XX
, XX
, XX
},
556 { "orB", Eb
, Gb
, XX
, XX
},
557 { "orS", Ev
, Gv
, XX
, XX
},
558 { "orB", Gb
, Eb
, XX
, XX
},
559 { "orS", Gv
, Ev
, XX
, XX
},
560 { "orB", AL
, Ib
, XX
, XX
},
561 { "orS", eAX
, Iv
, XX
, XX
},
562 { "push{T|}", cs
, XX
, XX
, XX
},
563 { "(bad)", XX
, XX
, XX
, XX
}, /* 0x0f extended opcode escape */
565 { "adcB", Eb
, Gb
, XX
, XX
},
566 { "adcS", Ev
, Gv
, XX
, XX
},
567 { "adcB", Gb
, Eb
, XX
, XX
},
568 { "adcS", Gv
, Ev
, XX
, XX
},
569 { "adcB", AL
, Ib
, XX
, XX
},
570 { "adcS", eAX
, Iv
, XX
, XX
},
571 { "push{T|}", ss
, XX
, XX
, XX
},
572 { "pop{T|}", ss
, XX
, XX
, XX
},
574 { "sbbB", Eb
, Gb
, XX
, XX
},
575 { "sbbS", Ev
, Gv
, XX
, XX
},
576 { "sbbB", Gb
, Eb
, XX
, XX
},
577 { "sbbS", Gv
, Ev
, XX
, XX
},
578 { "sbbB", AL
, Ib
, XX
, XX
},
579 { "sbbS", eAX
, Iv
, XX
, XX
},
580 { "push{T|}", ds
, XX
, XX
, XX
},
581 { "pop{T|}", ds
, XX
, XX
, XX
},
583 { "andB", Eb
, Gb
, XX
, XX
},
584 { "andS", Ev
, Gv
, XX
, XX
},
585 { "andB", Gb
, Eb
, XX
, XX
},
586 { "andS", Gv
, Ev
, XX
, XX
},
587 { "andB", AL
, Ib
, XX
, XX
},
588 { "andS", eAX
, Iv
, XX
, XX
},
589 { "(bad)", XX
, XX
, XX
, XX
}, /* SEG ES prefix */
590 { "daa{|}", XX
, XX
, XX
, XX
},
592 { "subB", Eb
, Gb
, XX
, XX
},
593 { "subS", Ev
, Gv
, XX
, XX
},
594 { "subB", Gb
, Eb
, XX
, XX
},
595 { "subS", Gv
, Ev
, XX
, XX
},
596 { "subB", AL
, Ib
, XX
, XX
},
597 { "subS", eAX
, Iv
, XX
, XX
},
598 { "(bad)", XX
, XX
, XX
, XX
}, /* SEG CS prefix */
599 { "das{|}", XX
, XX
, XX
, XX
},
601 { "xorB", Eb
, Gb
, XX
, XX
},
602 { "xorS", Ev
, Gv
, XX
, XX
},
603 { "xorB", Gb
, Eb
, XX
, XX
},
604 { "xorS", Gv
, Ev
, XX
, XX
},
605 { "xorB", AL
, Ib
, XX
, XX
},
606 { "xorS", eAX
, Iv
, XX
, XX
},
607 { "(bad)", XX
, XX
, XX
, XX
}, /* SEG SS prefix */
608 { "aaa{|}", XX
, XX
, XX
, XX
},
610 { "cmpB", Eb
, Gb
, XX
, XX
},
611 { "cmpS", Ev
, Gv
, XX
, XX
},
612 { "cmpB", Gb
, Eb
, XX
, XX
},
613 { "cmpS", Gv
, Ev
, XX
, XX
},
614 { "cmpB", AL
, Ib
, XX
, XX
},
615 { "cmpS", eAX
, Iv
, XX
, XX
},
616 { "(bad)", XX
, XX
, XX
, XX
}, /* SEG DS prefix */
617 { "aas{|}", XX
, XX
, XX
, XX
},
619 { "inc{S|}", RMeAX
, XX
, XX
, XX
},
620 { "inc{S|}", RMeCX
, XX
, XX
, XX
},
621 { "inc{S|}", RMeDX
, XX
, XX
, XX
},
622 { "inc{S|}", RMeBX
, XX
, XX
, XX
},
623 { "inc{S|}", RMeSP
, XX
, XX
, XX
},
624 { "inc{S|}", RMeBP
, XX
, XX
, XX
},
625 { "inc{S|}", RMeSI
, XX
, XX
, XX
},
626 { "inc{S|}", RMeDI
, XX
, XX
, XX
},
628 { "dec{S|}", RMeAX
, XX
, XX
, XX
},
629 { "dec{S|}", RMeCX
, XX
, XX
, XX
},
630 { "dec{S|}", RMeDX
, XX
, XX
, XX
},
631 { "dec{S|}", RMeBX
, XX
, XX
, XX
},
632 { "dec{S|}", RMeSP
, XX
, XX
, XX
},
633 { "dec{S|}", RMeBP
, XX
, XX
, XX
},
634 { "dec{S|}", RMeSI
, XX
, XX
, XX
},
635 { "dec{S|}", RMeDI
, XX
, XX
, XX
},
637 { "pushV", RMrAX
, XX
, XX
, XX
},
638 { "pushV", RMrCX
, XX
, XX
, XX
},
639 { "pushV", RMrDX
, XX
, XX
, XX
},
640 { "pushV", RMrBX
, XX
, XX
, XX
},
641 { "pushV", RMrSP
, XX
, XX
, XX
},
642 { "pushV", RMrBP
, XX
, XX
, XX
},
643 { "pushV", RMrSI
, XX
, XX
, XX
},
644 { "pushV", RMrDI
, XX
, XX
, XX
},
646 { "popV", RMrAX
, XX
, XX
, XX
},
647 { "popV", RMrCX
, XX
, XX
, XX
},
648 { "popV", RMrDX
, XX
, XX
, XX
},
649 { "popV", RMrBX
, XX
, XX
, XX
},
650 { "popV", RMrSP
, XX
, XX
, XX
},
651 { "popV", RMrBP
, XX
, XX
, XX
},
652 { "popV", RMrSI
, XX
, XX
, XX
},
653 { "popV", RMrDI
, XX
, XX
, XX
},
659 { "(bad)", XX
, XX
, XX
, XX
}, /* seg fs */
660 { "(bad)", XX
, XX
, XX
, XX
}, /* seg gs */
661 { "(bad)", XX
, XX
, XX
, XX
}, /* op size prefix */
662 { "(bad)", XX
, XX
, XX
, XX
}, /* adr size prefix */
664 { "pushT", Iq
, XX
, XX
, XX
},
665 { "imulS", Gv
, Ev
, Iv
, XX
},
666 { "pushT", sIb
, XX
, XX
, XX
},
667 { "imulS", Gv
, Ev
, sIb
, XX
},
668 { "ins{b||b|}", Ybr
, indirDX
, XX
, XX
},
669 { "ins{R||G|}", Yzr
, indirDX
, XX
, XX
},
670 { "outs{b||b|}", indirDXr
, Xb
, XX
, XX
},
671 { "outs{R||G|}", indirDXr
, Xz
, XX
, XX
},
673 { "joH", Jb
, XX
, cond_jump_flag
, XX
},
674 { "jnoH", Jb
, XX
, cond_jump_flag
, XX
},
675 { "jbH", Jb
, XX
, cond_jump_flag
, XX
},
676 { "jaeH", Jb
, XX
, cond_jump_flag
, XX
},
677 { "jeH", Jb
, XX
, cond_jump_flag
, XX
},
678 { "jneH", Jb
, XX
, cond_jump_flag
, XX
},
679 { "jbeH", Jb
, XX
, cond_jump_flag
, XX
},
680 { "jaH", Jb
, XX
, cond_jump_flag
, XX
},
682 { "jsH", Jb
, XX
, cond_jump_flag
, XX
},
683 { "jnsH", Jb
, XX
, cond_jump_flag
, XX
},
684 { "jpH", Jb
, XX
, cond_jump_flag
, XX
},
685 { "jnpH", Jb
, XX
, cond_jump_flag
, XX
},
686 { "jlH", Jb
, XX
, cond_jump_flag
, XX
},
687 { "jgeH", Jb
, XX
, cond_jump_flag
, XX
},
688 { "jleH", Jb
, XX
, cond_jump_flag
, XX
},
689 { "jgH", Jb
, XX
, cond_jump_flag
, XX
},
693 { "(bad)", XX
, XX
, XX
, XX
},
695 { "testB", Eb
, Gb
, XX
, XX
},
696 { "testS", Ev
, Gv
, XX
, XX
},
697 { "xchgB", Eb
, Gb
, XX
, XX
},
698 { "xchgS", Ev
, Gv
, XX
, XX
},
700 { "movB", Eb
, Gb
, XX
, XX
},
701 { "movS", Ev
, Gv
, XX
, XX
},
702 { "movB", Gb
, Eb
, XX
, XX
},
703 { "movS", Gv
, Ev
, XX
, XX
},
704 { "movD", Sv
, Sw
, XX
, XX
},
705 { "leaS", Gv
, M
, XX
, XX
},
706 { "movD", Sw
, Sv
, XX
, XX
},
707 { "popU", stackEv
, XX
, XX
, XX
},
709 { "xchgS", NOP_Fixup1
, eAX_reg
, NOP_Fixup2
, eAX_reg
, XX
, XX
},
710 { "xchgS", RMeCX
, eAX
, XX
, XX
},
711 { "xchgS", RMeDX
, eAX
, XX
, XX
},
712 { "xchgS", RMeBX
, eAX
, XX
, XX
},
713 { "xchgS", RMeSP
, eAX
, XX
, XX
},
714 { "xchgS", RMeBP
, eAX
, XX
, XX
},
715 { "xchgS", RMeSI
, eAX
, XX
, XX
},
716 { "xchgS", RMeDI
, eAX
, XX
, XX
},
718 { "cW{t||t|}R", XX
, XX
, XX
, XX
},
719 { "cR{t||t|}O", XX
, XX
, XX
, XX
},
720 { "Jcall{T|}", Ap
, XX
, XX
, XX
},
721 { "(bad)", XX
, XX
, XX
, XX
}, /* fwait */
722 { "pushfT", XX
, XX
, XX
, XX
},
723 { "popfT", XX
, XX
, XX
, XX
},
724 { "sahf{|}", XX
, XX
, XX
, XX
},
725 { "lahf{|}", XX
, XX
, XX
, XX
},
727 { "movB", AL
, Ob
, XX
, XX
},
728 { "movS", eAX
, Ov
, XX
, XX
},
729 { "movB", Ob
, AL
, XX
, XX
},
730 { "movS", Ov
, eAX
, XX
, XX
},
731 { "movs{b||b|}", Ybr
, Xb
, XX
, XX
},
732 { "movs{R||R|}", Yvr
, Xv
, XX
, XX
},
733 { "cmps{b||b|}", Xb
, Yb
, XX
, XX
},
734 { "cmps{R||R|}", Xv
, Yv
, XX
, XX
},
736 { "testB", AL
, Ib
, XX
, XX
},
737 { "testS", eAX
, Iv
, XX
, XX
},
738 { "stosB", Ybr
, AL
, XX
, XX
},
739 { "stosS", Yvr
, eAX
, XX
, XX
},
740 { "lodsB", ALr
, Xb
, XX
, XX
},
741 { "lodsS", eAXr
, Xv
, XX
, XX
},
742 { "scasB", AL
, Yb
, XX
, XX
},
743 { "scasS", eAX
, Yv
, XX
, XX
},
745 { "movB", RMAL
, Ib
, XX
, XX
},
746 { "movB", RMCL
, Ib
, XX
, XX
},
747 { "movB", RMDL
, Ib
, XX
, XX
},
748 { "movB", RMBL
, Ib
, XX
, XX
},
749 { "movB", RMAH
, Ib
, XX
, XX
},
750 { "movB", RMCH
, Ib
, XX
, XX
},
751 { "movB", RMDH
, Ib
, XX
, XX
},
752 { "movB", RMBH
, Ib
, XX
, XX
},
754 { "movS", RMeAX
, Iv64
, XX
, XX
},
755 { "movS", RMeCX
, Iv64
, XX
, XX
},
756 { "movS", RMeDX
, Iv64
, XX
, XX
},
757 { "movS", RMeBX
, Iv64
, XX
, XX
},
758 { "movS", RMeSP
, Iv64
, XX
, XX
},
759 { "movS", RMeBP
, Iv64
, XX
, XX
},
760 { "movS", RMeSI
, Iv64
, XX
, XX
},
761 { "movS", RMeDI
, Iv64
, XX
, XX
},
765 { "retT", Iw
, XX
, XX
, XX
},
766 { "retT", XX
, XX
, XX
, XX
},
767 { "les{S|}", Gv
, Mp
, XX
, XX
},
768 { "ldsS", Gv
, Mp
, XX
, XX
},
772 { "enterT", Iw
, Ib
, XX
, XX
},
773 { "leaveT", XX
, XX
, XX
, XX
},
774 { "lretP", Iw
, XX
, XX
, XX
},
775 { "lretP", XX
, XX
, XX
, XX
},
776 { "int3", XX
, XX
, XX
, XX
},
777 { "int", Ib
, XX
, XX
, XX
},
778 { "into{|}", XX
, XX
, XX
, XX
},
779 { "iretP", XX
, XX
, XX
, XX
},
785 { "aam{|}", sIb
, XX
, XX
, XX
},
786 { "aad{|}", sIb
, XX
, XX
, XX
},
787 { "(bad)", XX
, XX
, XX
, XX
},
788 { "xlat", DSBX
, XX
, XX
, XX
},
799 { "loopneFH", Jb
, XX
, loop_jcxz_flag
, XX
},
800 { "loopeFH", Jb
, XX
, loop_jcxz_flag
, XX
},
801 { "loopFH", Jb
, XX
, loop_jcxz_flag
, XX
},
802 { "jEcxzH", Jb
, XX
, loop_jcxz_flag
, XX
},
803 { "inB", AL
, Ib
, XX
, XX
},
804 { "inG", zAX
, Ib
, XX
, XX
},
805 { "outB", Ib
, AL
, XX
, XX
},
806 { "outG", Ib
, zAX
, XX
, XX
},
808 { "callT", Jv
, XX
, XX
, XX
},
809 { "jmpT", Jv
, XX
, XX
, XX
},
810 { "Jjmp{T|}", Ap
, XX
, XX
, XX
},
811 { "jmp", Jb
, XX
, XX
, XX
},
812 { "inB", AL
, indirDX
, XX
, XX
},
813 { "inG", zAX
, indirDX
, XX
, XX
},
814 { "outB", indirDX
, AL
, XX
, XX
},
815 { "outG", indirDX
, zAX
, XX
, XX
},
817 { "(bad)", XX
, XX
, XX
, XX
}, /* lock prefix */
818 { "icebp", XX
, XX
, XX
, XX
},
819 { "(bad)", XX
, XX
, XX
, XX
}, /* repne */
820 { "(bad)", XX
, XX
, XX
, XX
}, /* repz */
821 { "hlt", XX
, XX
, XX
, XX
},
822 { "cmc", XX
, XX
, XX
, XX
},
826 { "clc", XX
, XX
, XX
, XX
},
827 { "stc", XX
, XX
, XX
, XX
},
828 { "cli", XX
, XX
, XX
, XX
},
829 { "sti", XX
, XX
, XX
, XX
},
830 { "cld", XX
, XX
, XX
, XX
},
831 { "std", XX
, XX
, XX
, XX
},
836 static const struct dis386 dis386_twobyte
[] = {
840 { "larS", Gv
, Ew
, XX
, XX
},
841 { "lslS", Gv
, Ew
, XX
, XX
},
842 { "(bad)", XX
, XX
, XX
, XX
},
843 { "syscall", XX
, XX
, XX
, XX
},
844 { "clts", XX
, XX
, XX
, XX
},
845 { "sysretP", XX
, XX
, XX
, XX
},
847 { "invd", XX
, XX
, XX
, XX
},
848 { "wbinvd", XX
, XX
, XX
, XX
},
849 { "(bad)", XX
, XX
, XX
, XX
},
850 { "ud2a", XX
, XX
, XX
, XX
},
851 { "(bad)", XX
, XX
, XX
, XX
},
853 { "femms", XX
, XX
, XX
, XX
},
854 { "", MX
, EM
, OPSUF
, XX
}, /* See OP_3DNowSuffix. */
859 { "movlpX", EX
, XM
, SIMD_Fixup
, 'h', XX
},
860 { "unpcklpX", XM
, EX
, XX
, XX
},
861 { "unpckhpX", XM
, EX
, XX
, XX
},
863 { "movhpX", EX
, XM
, SIMD_Fixup
, 'l', XX
},
866 { "(bad)", XX
, XX
, XX
, XX
},
867 { "(bad)", XX
, XX
, XX
, XX
},
868 { "(bad)", XX
, XX
, XX
, XX
},
869 { "(bad)", XX
, XX
, XX
, XX
},
870 { "(bad)", XX
, XX
, XX
, XX
},
871 { "(bad)", XX
, XX
, XX
, XX
},
872 { "nopQ", Ev
, XX
, XX
, XX
},
874 { "movZ", Rm
, Cm
, XX
, XX
},
875 { "movZ", Rm
, Dm
, XX
, XX
},
876 { "movZ", Cm
, Rm
, XX
, XX
},
877 { "movZ", Dm
, Rm
, XX
, XX
},
878 { "movL", Rd
, Td
, XX
, XX
},
879 { "(bad)", XX
, XX
, XX
, XX
},
880 { "movL", Td
, Rd
, XX
, XX
},
881 { "(bad)", XX
, XX
, XX
, XX
},
883 { "movapX", XM
, EX
, XX
, XX
},
884 { "movapX", EX
, XM
, XX
, XX
},
889 { "ucomisX", XM
,EX
, XX
, XX
},
890 { "comisX", XM
,EX
, XX
, XX
},
892 { "wrmsr", XX
, XX
, XX
, XX
},
893 { "rdtsc", XX
, XX
, XX
, XX
},
894 { "rdmsr", XX
, XX
, XX
, XX
},
895 { "rdpmc", XX
, XX
, XX
, XX
},
896 { "sysenter", XX
, XX
, XX
, XX
},
897 { "sysexit", XX
, XX
, XX
, XX
},
898 { "(bad)", XX
, XX
, XX
, XX
},
899 { "(bad)", XX
, XX
, XX
, XX
},
902 { "(bad)", XX
, XX
, XX
, XX
},
904 { "(bad)", XX
, XX
, XX
, XX
},
905 { "(bad)", XX
, XX
, XX
, XX
},
906 { "(bad)", XX
, XX
, XX
, XX
},
907 { "(bad)", XX
, XX
, XX
, XX
},
908 { "(bad)", XX
, XX
, XX
, XX
},
910 { "cmovo", Gv
, Ev
, XX
, XX
},
911 { "cmovno", Gv
, Ev
, XX
, XX
},
912 { "cmovb", Gv
, Ev
, XX
, XX
},
913 { "cmovae", Gv
, Ev
, XX
, XX
},
914 { "cmove", Gv
, Ev
, XX
, XX
},
915 { "cmovne", Gv
, Ev
, XX
, XX
},
916 { "cmovbe", Gv
, Ev
, XX
, XX
},
917 { "cmova", Gv
, Ev
, XX
, XX
},
919 { "cmovs", Gv
, Ev
, XX
, XX
},
920 { "cmovns", Gv
, Ev
, XX
, XX
},
921 { "cmovp", Gv
, Ev
, XX
, XX
},
922 { "cmovnp", Gv
, Ev
, XX
, XX
},
923 { "cmovl", Gv
, Ev
, XX
, XX
},
924 { "cmovge", Gv
, Ev
, XX
, XX
},
925 { "cmovle", Gv
, Ev
, XX
, XX
},
926 { "cmovg", Gv
, Ev
, XX
, XX
},
928 { "movmskpX", Gdq
, XS
, XX
, XX
},
932 { "andpX", XM
, EX
, XX
, XX
},
933 { "andnpX", XM
, EX
, XX
, XX
},
934 { "orpX", XM
, EX
, XX
, XX
},
935 { "xorpX", XM
, EX
, XX
, XX
},
946 { "punpcklbw", MX
, EM
, XX
, XX
},
947 { "punpcklwd", MX
, EM
, XX
, XX
},
948 { "punpckldq", MX
, EM
, XX
, XX
},
949 { "packsswb", MX
, EM
, XX
, XX
},
950 { "pcmpgtb", MX
, EM
, XX
, XX
},
951 { "pcmpgtw", MX
, EM
, XX
, XX
},
952 { "pcmpgtd", MX
, EM
, XX
, XX
},
953 { "packuswb", MX
, EM
, XX
, XX
},
955 { "punpckhbw", MX
, EM
, XX
, XX
},
956 { "punpckhwd", MX
, EM
, XX
, XX
},
957 { "punpckhdq", MX
, EM
, XX
, XX
},
958 { "packssdw", MX
, EM
, XX
, XX
},
961 { "movd", MX
, Edq
, XX
, XX
},
968 { "pcmpeqb", MX
, EM
, XX
, XX
},
969 { "pcmpeqw", MX
, EM
, XX
, XX
},
970 { "pcmpeqd", MX
, EM
, XX
, XX
},
971 { "emms", XX
, XX
, XX
, XX
},
975 { "(bad)", XX
, XX
, XX
, XX
},
976 { "(bad)", XX
, XX
, XX
, XX
},
982 { "joH", Jv
, XX
, cond_jump_flag
, XX
},
983 { "jnoH", Jv
, XX
, cond_jump_flag
, XX
},
984 { "jbH", Jv
, XX
, cond_jump_flag
, XX
},
985 { "jaeH", Jv
, XX
, cond_jump_flag
, XX
},
986 { "jeH", Jv
, XX
, cond_jump_flag
, XX
},
987 { "jneH", Jv
, XX
, cond_jump_flag
, XX
},
988 { "jbeH", Jv
, XX
, cond_jump_flag
, XX
},
989 { "jaH", Jv
, XX
, cond_jump_flag
, XX
},
991 { "jsH", Jv
, XX
, cond_jump_flag
, XX
},
992 { "jnsH", Jv
, XX
, cond_jump_flag
, XX
},
993 { "jpH", Jv
, XX
, cond_jump_flag
, XX
},
994 { "jnpH", Jv
, XX
, cond_jump_flag
, XX
},
995 { "jlH", Jv
, XX
, cond_jump_flag
, XX
},
996 { "jgeH", Jv
, XX
, cond_jump_flag
, XX
},
997 { "jleH", Jv
, XX
, cond_jump_flag
, XX
},
998 { "jgH", Jv
, XX
, cond_jump_flag
, XX
},
1000 { "seto", Eb
, XX
, XX
, XX
},
1001 { "setno", Eb
, XX
, XX
, XX
},
1002 { "setb", Eb
, XX
, XX
, XX
},
1003 { "setae", Eb
, XX
, XX
, XX
},
1004 { "sete", Eb
, XX
, XX
, XX
},
1005 { "setne", Eb
, XX
, XX
, XX
},
1006 { "setbe", Eb
, XX
, XX
, XX
},
1007 { "seta", Eb
, XX
, XX
, XX
},
1009 { "sets", Eb
, XX
, XX
, XX
},
1010 { "setns", Eb
, XX
, XX
, XX
},
1011 { "setp", Eb
, XX
, XX
, XX
},
1012 { "setnp", Eb
, XX
, XX
, XX
},
1013 { "setl", Eb
, XX
, XX
, XX
},
1014 { "setge", Eb
, XX
, XX
, XX
},
1015 { "setle", Eb
, XX
, XX
, XX
},
1016 { "setg", Eb
, XX
, XX
, XX
},
1018 { "pushT", fs
, XX
, XX
, XX
},
1019 { "popT", fs
, XX
, XX
, XX
},
1020 { "cpuid", XX
, XX
, XX
, XX
},
1021 { "btS", Ev
, Gv
, XX
, XX
},
1022 { "shldS", Ev
, Gv
, Ib
, XX
},
1023 { "shldS", Ev
, Gv
, CL
, XX
},
1027 { "pushT", gs
, XX
, XX
, XX
},
1028 { "popT", gs
, XX
, XX
, XX
},
1029 { "rsm", XX
, XX
, XX
, XX
},
1030 { "btsS", Ev
, Gv
, XX
, XX
},
1031 { "shrdS", Ev
, Gv
, Ib
, XX
},
1032 { "shrdS", Ev
, Gv
, CL
, XX
},
1034 { "imulS", Gv
, Ev
, XX
, XX
},
1036 { "cmpxchgB", Eb
, Gb
, XX
, XX
},
1037 { "cmpxchgS", Ev
, Gv
, XX
, XX
},
1038 { "lssS", Gv
, Mp
, XX
, XX
},
1039 { "btrS", Ev
, Gv
, XX
, XX
},
1040 { "lfsS", Gv
, Mp
, XX
, XX
},
1041 { "lgsS", Gv
, Mp
, XX
, XX
},
1042 { "movz{bR|x|bR|x}", Gv
, Eb
, XX
, XX
},
1043 { "movz{wR|x|wR|x}", Gv
, Ew
, XX
, XX
}, /* yes, there really is movzww ! */
1046 { "ud2b", XX
, XX
, XX
, XX
},
1048 { "btcS", Ev
, Gv
, XX
, XX
},
1049 { "bsfS", Gv
, Ev
, XX
, XX
},
1051 { "movs{bR|x|bR|x}", Gv
, Eb
, XX
, XX
},
1052 { "movs{wR|x|wR|x}", Gv
, Ew
, XX
, XX
}, /* yes, there really is movsww ! */
1054 { "xaddB", Eb
, Gb
, XX
, XX
},
1055 { "xaddS", Ev
, Gv
, XX
, XX
},
1057 { "movntiS", Ev
, Gv
, XX
, XX
},
1058 { "pinsrw", MX
, Edqw
, Ib
, XX
},
1059 { "pextrw", Gdq
, MS
, Ib
, XX
},
1060 { "shufpX", XM
, EX
, Ib
, XX
},
1063 { "bswap", RMeAX
, XX
, XX
, XX
},
1064 { "bswap", RMeCX
, XX
, XX
, XX
},
1065 { "bswap", RMeDX
, XX
, XX
, XX
},
1066 { "bswap", RMeBX
, XX
, XX
, XX
},
1067 { "bswap", RMeSP
, XX
, XX
, XX
},
1068 { "bswap", RMeBP
, XX
, XX
, XX
},
1069 { "bswap", RMeSI
, XX
, XX
, XX
},
1070 { "bswap", RMeDI
, XX
, XX
, XX
},
1073 { "psrlw", MX
, EM
, XX
, XX
},
1074 { "psrld", MX
, EM
, XX
, XX
},
1075 { "psrlq", MX
, EM
, XX
, XX
},
1076 { "paddq", MX
, EM
, XX
, XX
},
1077 { "pmullw", MX
, EM
, XX
, XX
},
1079 { "pmovmskb", Gdq
, MS
, XX
, XX
},
1081 { "psubusb", MX
, EM
, XX
, XX
},
1082 { "psubusw", MX
, EM
, XX
, XX
},
1083 { "pminub", MX
, EM
, XX
, XX
},
1084 { "pand", MX
, EM
, XX
, XX
},
1085 { "paddusb", MX
, EM
, XX
, XX
},
1086 { "paddusw", MX
, EM
, XX
, XX
},
1087 { "pmaxub", MX
, EM
, XX
, XX
},
1088 { "pandn", MX
, EM
, XX
, XX
},
1090 { "pavgb", MX
, EM
, XX
, XX
},
1091 { "psraw", MX
, EM
, XX
, XX
},
1092 { "psrad", MX
, EM
, XX
, XX
},
1093 { "pavgw", MX
, EM
, XX
, XX
},
1094 { "pmulhuw", MX
, EM
, XX
, XX
},
1095 { "pmulhw", MX
, EM
, XX
, XX
},
1099 { "psubsb", MX
, EM
, XX
, XX
},
1100 { "psubsw", MX
, EM
, XX
, XX
},
1101 { "pminsw", MX
, EM
, XX
, XX
},
1102 { "por", MX
, EM
, XX
, XX
},
1103 { "paddsb", MX
, EM
, XX
, XX
},
1104 { "paddsw", MX
, EM
, XX
, XX
},
1105 { "pmaxsw", MX
, EM
, XX
, XX
},
1106 { "pxor", MX
, EM
, XX
, XX
},
1109 { "psllw", MX
, EM
, XX
, XX
},
1110 { "pslld", MX
, EM
, XX
, XX
},
1111 { "psllq", MX
, EM
, XX
, XX
},
1112 { "pmuludq", MX
, EM
, XX
, XX
},
1113 { "pmaddwd", MX
, EM
, XX
, XX
},
1114 { "psadbw", MX
, EM
, XX
, XX
},
1117 { "psubb", MX
, EM
, XX
, XX
},
1118 { "psubw", MX
, EM
, XX
, XX
},
1119 { "psubd", MX
, EM
, XX
, XX
},
1120 { "psubq", MX
, EM
, XX
, XX
},
1121 { "paddb", MX
, EM
, XX
, XX
},
1122 { "paddw", MX
, EM
, XX
, XX
},
1123 { "paddd", MX
, EM
, XX
, XX
},
1124 { "(bad)", XX
, XX
, XX
, XX
}
1127 static const unsigned char onebyte_has_modrm
[256] = {
1128 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1129 /* ------------------------------- */
1130 /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
1131 /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */
1132 /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */
1133 /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */
1134 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */
1135 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */
1136 /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */
1137 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */
1138 /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */
1139 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */
1140 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */
1141 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */
1142 /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */
1143 /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */
1144 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */
1145 /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */
1146 /* ------------------------------- */
1147 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1150 static const unsigned char twobyte_has_modrm
[256] = {
1151 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1152 /* ------------------------------- */
1153 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
1154 /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,1, /* 1f */
1155 /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */
1156 /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
1157 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
1158 /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */
1159 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */
1160 /* 70 */ 1,1,1,1,1,1,1,0,1,1,0,0,1,1,1,1, /* 7f */
1161 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1162 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
1163 /* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */
1164 /* b0 */ 1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1, /* bf */
1165 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
1166 /* d0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
1167 /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */
1168 /* f0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */
1169 /* ------------------------------- */
1170 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1173 static const unsigned char twobyte_uses_DATA_prefix
[256] = {
1174 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1175 /* ------------------------------- */
1176 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1177 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
1178 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
1179 /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
1180 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1181 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1182 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */
1183 /* 70 */ 1,0,0,0,0,0,0,0,1,1,0,0,1,1,1,1, /* 7f */
1184 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1185 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1186 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1187 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1188 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1189 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1190 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1191 /* f0 */ 1,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0 /* ff */
1192 /* ------------------------------- */
1193 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1196 static const unsigned char twobyte_uses_REPNZ_prefix
[256] = {
1197 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1198 /* ------------------------------- */
1199 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1200 /* 10 */ 1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1201 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
1202 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1203 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1204 /* 50 */ 0,1,0,0,0,0,0,0,1,1,1,0,1,1,1,1, /* 5f */
1205 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1206 /* 70 */ 1,0,0,0,0,0,0,0,1,1,0,0,1,1,0,0, /* 7f */
1207 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1208 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1209 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1210 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1211 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1212 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1213 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1214 /* f0 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1215 /* ------------------------------- */
1216 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1219 static const unsigned char twobyte_uses_REPZ_prefix
[256] = {
1220 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1221 /* ------------------------------- */
1222 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1223 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
1224 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
1225 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1226 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1227 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1228 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1, /* 6f */
1229 /* 70 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1, /* 7f */
1230 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1231 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1232 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1233 /* b0 */ 0,0,0,0,0,0,0,0,1,0,0,0,0,1,0,0, /* bf */
1234 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1235 /* d0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1236 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1237 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1238 /* ------------------------------- */
1239 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1242 /* This is used to determine if opcode 0f 38 XX uses DATA prefix. */
1243 static const unsigned char threebyte_0x38_uses_DATA_prefix
[256] = {
1244 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1245 /* ------------------------------- */
1246 /* 00 */ 1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0, /* 0f */
1247 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,0, /* 1f */
1248 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1249 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1250 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1251 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1252 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1253 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1254 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1255 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1256 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1257 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1258 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1259 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1260 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1261 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1262 /* ------------------------------- */
1263 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1266 /* This is used to determine if opcode 0f 38 XX uses REPNZ prefix. */
1267 static const unsigned char threebyte_0x38_uses_REPNZ_prefix
[256] = {
1268 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1269 /* ------------------------------- */
1270 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1271 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1272 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1273 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1274 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1275 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1276 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1277 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1278 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1279 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1280 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1281 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1282 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1283 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1284 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1285 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1286 /* ------------------------------- */
1287 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1290 /* This is used to determine if opcode 0f 38 XX uses REPZ prefix. */
1291 static const unsigned char threebyte_0x38_uses_REPZ_prefix
[256] = {
1292 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1293 /* ------------------------------- */
1294 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1295 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1296 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1297 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1298 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1299 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1300 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1301 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1302 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1303 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1304 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1305 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1306 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1307 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1308 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1309 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1310 /* ------------------------------- */
1311 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1314 /* This is used to determine if opcode 0f 3a XX uses DATA prefix. */
1315 static const unsigned char threebyte_0x3a_uses_DATA_prefix
[256] = {
1316 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1317 /* ------------------------------- */
1318 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1, /* 0f */
1319 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1320 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1321 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1322 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1323 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1324 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1325 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1326 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1327 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1328 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1329 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1330 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1331 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1332 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1333 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1334 /* ------------------------------- */
1335 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1338 /* This is used to determine if opcode 0f 3a XX uses REPNZ prefix. */
1339 static const unsigned char threebyte_0x3a_uses_REPNZ_prefix
[256] = {
1340 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1341 /* ------------------------------- */
1342 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1343 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1344 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1345 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1346 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1347 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1348 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1349 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1350 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1351 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1352 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1353 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1354 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1355 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1356 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1357 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1358 /* ------------------------------- */
1359 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1362 /* This is used to determine if opcode 0f 3a XX uses REPZ prefix. */
1363 static const unsigned char threebyte_0x3a_uses_REPZ_prefix
[256] = {
1364 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1365 /* ------------------------------- */
1366 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1367 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1368 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1369 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1370 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1371 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1372 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1373 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1374 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1375 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1376 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1377 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1378 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1379 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1380 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1381 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1382 /* ------------------------------- */
1383 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1386 static char obuf
[100];
1388 static char scratchbuf
[100];
1389 static unsigned char *start_codep
;
1390 static unsigned char *insn_codep
;
1391 static unsigned char *codep
;
1392 static disassemble_info
*the_info
;
1396 static unsigned char need_modrm
;
1398 /* If we are accessing mod/rm/reg without need_modrm set, then the
1399 values are stale. Hitting this abort likely indicates that you
1400 need to update onebyte_has_modrm or twobyte_has_modrm. */
1401 #define MODRM_CHECK if (!need_modrm) abort ()
1403 static const char **names64
;
1404 static const char **names32
;
1405 static const char **names16
;
1406 static const char **names8
;
1407 static const char **names8rex
;
1408 static const char **names_seg
;
1409 static const char **index16
;
1411 static const char *intel_names64
[] = {
1412 "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
1413 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1415 static const char *intel_names32
[] = {
1416 "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi",
1417 "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d"
1419 static const char *intel_names16
[] = {
1420 "ax", "cx", "dx", "bx", "sp", "bp", "si", "di",
1421 "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w"
1423 static const char *intel_names8
[] = {
1424 "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh",
1426 static const char *intel_names8rex
[] = {
1427 "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil",
1428 "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b"
1430 static const char *intel_names_seg
[] = {
1431 "es", "cs", "ss", "ds", "fs", "gs", "?", "?",
1433 static const char *intel_index16
[] = {
1434 "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx"
1437 static const char *att_names64
[] = {
1438 "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi",
1439 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
1441 static const char *att_names32
[] = {
1442 "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi",
1443 "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
1445 static const char *att_names16
[] = {
1446 "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di",
1447 "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
1449 static const char *att_names8
[] = {
1450 "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh",
1452 static const char *att_names8rex
[] = {
1453 "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil",
1454 "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
1456 static const char *att_names_seg
[] = {
1457 "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?",
1459 static const char *att_index16
[] = {
1460 "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx"
1463 static const struct dis386 grps
[][8] = {
1466 { "addA", Eb
, Ib
, XX
, XX
},
1467 { "orA", Eb
, Ib
, XX
, XX
},
1468 { "adcA", Eb
, Ib
, XX
, XX
},
1469 { "sbbA", Eb
, Ib
, XX
, XX
},
1470 { "andA", Eb
, Ib
, XX
, XX
},
1471 { "subA", Eb
, Ib
, XX
, XX
},
1472 { "xorA", Eb
, Ib
, XX
, XX
},
1473 { "cmpA", Eb
, Ib
, XX
, XX
}
1477 { "addQ", Ev
, Iv
, XX
, XX
},
1478 { "orQ", Ev
, Iv
, XX
, XX
},
1479 { "adcQ", Ev
, Iv
, XX
, XX
},
1480 { "sbbQ", Ev
, Iv
, XX
, XX
},
1481 { "andQ", Ev
, Iv
, XX
, XX
},
1482 { "subQ", Ev
, Iv
, XX
, XX
},
1483 { "xorQ", Ev
, Iv
, XX
, XX
},
1484 { "cmpQ", Ev
, Iv
, XX
, XX
}
1488 { "addQ", Ev
, sIb
, XX
, XX
},
1489 { "orQ", Ev
, sIb
, XX
, XX
},
1490 { "adcQ", Ev
, sIb
, XX
, XX
},
1491 { "sbbQ", Ev
, sIb
, XX
, XX
},
1492 { "andQ", Ev
, sIb
, XX
, XX
},
1493 { "subQ", Ev
, sIb
, XX
, XX
},
1494 { "xorQ", Ev
, sIb
, XX
, XX
},
1495 { "cmpQ", Ev
, sIb
, XX
, XX
}
1499 { "rolA", Eb
, Ib
, XX
, XX
},
1500 { "rorA", Eb
, Ib
, XX
, XX
},
1501 { "rclA", Eb
, Ib
, XX
, XX
},
1502 { "rcrA", Eb
, Ib
, XX
, XX
},
1503 { "shlA", Eb
, Ib
, XX
, XX
},
1504 { "shrA", Eb
, Ib
, XX
, XX
},
1505 { "(bad)", XX
, XX
, XX
, XX
},
1506 { "sarA", Eb
, Ib
, XX
, XX
},
1510 { "rolQ", Ev
, Ib
, XX
, XX
},
1511 { "rorQ", Ev
, Ib
, XX
, XX
},
1512 { "rclQ", Ev
, Ib
, XX
, XX
},
1513 { "rcrQ", Ev
, Ib
, XX
, XX
},
1514 { "shlQ", Ev
, Ib
, XX
, XX
},
1515 { "shrQ", Ev
, Ib
, XX
, XX
},
1516 { "(bad)", XX
, XX
, XX
, XX
},
1517 { "sarQ", Ev
, Ib
, XX
, XX
},
1521 { "rolA", Eb
, I1
, XX
, XX
},
1522 { "rorA", Eb
, I1
, XX
, XX
},
1523 { "rclA", Eb
, I1
, XX
, XX
},
1524 { "rcrA", Eb
, I1
, XX
, XX
},
1525 { "shlA", Eb
, I1
, XX
, XX
},
1526 { "shrA", Eb
, I1
, XX
, XX
},
1527 { "(bad)", XX
, XX
, XX
, XX
},
1528 { "sarA", Eb
, I1
, XX
, XX
},
1532 { "rolQ", Ev
, I1
, XX
, XX
},
1533 { "rorQ", Ev
, I1
, XX
, XX
},
1534 { "rclQ", Ev
, I1
, XX
, XX
},
1535 { "rcrQ", Ev
, I1
, XX
, XX
},
1536 { "shlQ", Ev
, I1
, XX
, XX
},
1537 { "shrQ", Ev
, I1
, XX
, XX
},
1538 { "(bad)", XX
, XX
, XX
, XX
},
1539 { "sarQ", Ev
, I1
, XX
, XX
},
1543 { "rolA", Eb
, CL
, XX
, XX
},
1544 { "rorA", Eb
, CL
, XX
, XX
},
1545 { "rclA", Eb
, CL
, XX
, XX
},
1546 { "rcrA", Eb
, CL
, XX
, XX
},
1547 { "shlA", Eb
, CL
, XX
, XX
},
1548 { "shrA", Eb
, CL
, XX
, XX
},
1549 { "(bad)", XX
, XX
, XX
, XX
},
1550 { "sarA", Eb
, CL
, XX
, XX
},
1554 { "rolQ", Ev
, CL
, XX
, XX
},
1555 { "rorQ", Ev
, CL
, XX
, XX
},
1556 { "rclQ", Ev
, CL
, XX
, XX
},
1557 { "rcrQ", Ev
, CL
, XX
, XX
},
1558 { "shlQ", Ev
, CL
, XX
, XX
},
1559 { "shrQ", Ev
, CL
, XX
, XX
},
1560 { "(bad)", XX
, XX
, XX
, XX
},
1561 { "sarQ", Ev
, CL
, XX
, XX
}
1565 { "testA", Eb
, Ib
, XX
, XX
},
1566 { "(bad)", Eb
, XX
, XX
, XX
},
1567 { "notA", Eb
, XX
, XX
, XX
},
1568 { "negA", Eb
, XX
, XX
, XX
},
1569 { "mulA", Eb
, XX
, XX
, XX
}, /* Don't print the implicit %al register, */
1570 { "imulA", Eb
, XX
, XX
, XX
}, /* to distinguish these opcodes from other */
1571 { "divA", Eb
, XX
, XX
, XX
}, /* mul/imul opcodes. Do the same for div */
1572 { "idivA", Eb
, XX
, XX
, XX
} /* and idiv for consistency. */
1576 { "testQ", Ev
, Iv
, XX
, XX
},
1577 { "(bad)", XX
, XX
, XX
, XX
},
1578 { "notQ", Ev
, XX
, XX
, XX
},
1579 { "negQ", Ev
, XX
, XX
, XX
},
1580 { "mulQ", Ev
, XX
, XX
, XX
}, /* Don't print the implicit register. */
1581 { "imulQ", Ev
, XX
, XX
, XX
},
1582 { "divQ", Ev
, XX
, XX
, XX
},
1583 { "idivQ", Ev
, XX
, XX
, XX
},
1587 { "incA", Eb
, XX
, XX
, XX
},
1588 { "decA", Eb
, XX
, XX
, XX
},
1589 { "(bad)", XX
, XX
, XX
, XX
},
1590 { "(bad)", XX
, XX
, XX
, XX
},
1591 { "(bad)", XX
, XX
, XX
, XX
},
1592 { "(bad)", XX
, XX
, XX
, XX
},
1593 { "(bad)", XX
, XX
, XX
, XX
},
1594 { "(bad)", XX
, XX
, XX
, XX
},
1598 { "incQ", Ev
, XX
, XX
, XX
},
1599 { "decQ", Ev
, XX
, XX
, XX
},
1600 { "callT", indirEv
, XX
, XX
, XX
},
1601 { "JcallT", indirEp
, XX
, XX
, XX
},
1602 { "jmpT", indirEv
, XX
, XX
, XX
},
1603 { "JjmpT", indirEp
, XX
, XX
, XX
},
1604 { "pushU", stackEv
, XX
, XX
, XX
},
1605 { "(bad)", XX
, XX
, XX
, XX
},
1609 { "sldtD", Sv
, XX
, XX
, XX
},
1610 { "strD", Sv
, XX
, XX
, XX
},
1611 { "lldt", Ew
, XX
, XX
, XX
},
1612 { "ltr", Ew
, XX
, XX
, XX
},
1613 { "verr", Ew
, XX
, XX
, XX
},
1614 { "verw", Ew
, XX
, XX
, XX
},
1615 { "(bad)", XX
, XX
, XX
, XX
},
1616 { "(bad)", XX
, XX
, XX
, XX
}
1620 { "sgdt{Q|IQ||}", VMX_Fixup
, 0, XX
, XX
, XX
},
1621 { "sidt{Q|IQ||}", PNI_Fixup
, 0, XX
, XX
, XX
},
1622 { "lgdt{Q|Q||}", M
, XX
, XX
, XX
},
1623 { "lidt{Q|Q||}", SVME_Fixup
, 0, XX
, XX
, XX
},
1624 { "smswD", Sv
, XX
, XX
, XX
},
1625 { "(bad)", XX
, XX
, XX
, XX
},
1626 { "lmsw", Ew
, XX
, XX
, XX
},
1627 { "invlpg", INVLPG_Fixup
, w_mode
, XX
, XX
, XX
},
1631 { "(bad)", XX
, XX
, XX
, XX
},
1632 { "(bad)", XX
, XX
, XX
, XX
},
1633 { "(bad)", XX
, XX
, XX
, XX
},
1634 { "(bad)", XX
, XX
, XX
, XX
},
1635 { "btQ", Ev
, Ib
, XX
, XX
},
1636 { "btsQ", Ev
, Ib
, XX
, XX
},
1637 { "btrQ", Ev
, Ib
, XX
, XX
},
1638 { "btcQ", Ev
, Ib
, XX
, XX
},
1642 { "(bad)", XX
, XX
, XX
, XX
},
1643 { "cmpxchg8b", CMPXCHG8B_Fixup
, q_mode
, XX
, XX
, XX
},
1644 { "(bad)", XX
, XX
, XX
, XX
},
1645 { "(bad)", XX
, XX
, XX
, XX
},
1646 { "(bad)", XX
, XX
, XX
, XX
},
1647 { "(bad)", XX
, XX
, XX
, XX
},
1648 { "", VM
, XX
, XX
, XX
}, /* See OP_VMX. */
1649 { "vmptrst", Mq
, XX
, XX
, XX
},
1653 { "movA", Eb
, Ib
, XX
, XX
},
1654 { "(bad)", XX
, XX
, XX
, XX
},
1655 { "(bad)", XX
, XX
, XX
, XX
},
1656 { "(bad)", XX
, XX
, XX
, XX
},
1657 { "(bad)", XX
, XX
, XX
, XX
},
1658 { "(bad)", XX
, XX
, XX
, XX
},
1659 { "(bad)", XX
, XX
, XX
, XX
},
1660 { "(bad)", XX
, XX
, XX
, XX
},
1664 { "movQ", Ev
, Iv
, XX
, XX
},
1665 { "(bad)", XX
, XX
, XX
, XX
},
1666 { "(bad)", XX
, XX
, XX
, XX
},
1667 { "(bad)", XX
, XX
, XX
, XX
},
1668 { "(bad)", XX
, XX
, XX
, XX
},
1669 { "(bad)", XX
, XX
, XX
, XX
},
1670 { "(bad)", XX
, XX
, XX
, XX
},
1671 { "(bad)", XX
, XX
, XX
, XX
},
1675 { "(bad)", XX
, XX
, XX
, XX
},
1676 { "(bad)", XX
, XX
, XX
, XX
},
1677 { "psrlw", MS
, Ib
, XX
, XX
},
1678 { "(bad)", XX
, XX
, XX
, XX
},
1679 { "psraw", MS
, Ib
, XX
, XX
},
1680 { "(bad)", XX
, XX
, XX
, XX
},
1681 { "psllw", MS
, Ib
, XX
, XX
},
1682 { "(bad)", XX
, XX
, XX
, XX
},
1686 { "(bad)", XX
, XX
, XX
, XX
},
1687 { "(bad)", XX
, XX
, XX
, XX
},
1688 { "psrld", MS
, Ib
, XX
, XX
},
1689 { "(bad)", XX
, XX
, XX
, XX
},
1690 { "psrad", MS
, Ib
, XX
, XX
},
1691 { "(bad)", XX
, XX
, XX
, XX
},
1692 { "pslld", MS
, Ib
, XX
, XX
},
1693 { "(bad)", XX
, XX
, XX
, XX
},
1697 { "(bad)", XX
, XX
, XX
, XX
},
1698 { "(bad)", XX
, XX
, XX
, XX
},
1699 { "psrlq", MS
, Ib
, XX
, XX
},
1700 { "psrldq", MS
, Ib
, XX
, XX
},
1701 { "(bad)", XX
, XX
, XX
, XX
},
1702 { "(bad)", XX
, XX
, XX
, XX
},
1703 { "psllq", MS
, Ib
, XX
, XX
},
1704 { "pslldq", MS
, Ib
, XX
, XX
},
1708 { "fxsave", Ev
, XX
, XX
, XX
},
1709 { "fxrstor", Ev
, XX
, XX
, XX
},
1710 { "ldmxcsr", Ev
, XX
, XX
, XX
},
1711 { "stmxcsr", Ev
, XX
, XX
, XX
},
1712 { "(bad)", XX
, XX
, XX
, XX
},
1713 { "lfence", OP_0fae
, 0, XX
, XX
, XX
},
1714 { "mfence", OP_0fae
, 0, XX
, XX
, XX
},
1715 { "clflush", OP_0fae
, 0, XX
, XX
, XX
},
1719 { "prefetchnta", Ev
, XX
, XX
, XX
},
1720 { "prefetcht0", Ev
, XX
, XX
, XX
},
1721 { "prefetcht1", Ev
, XX
, XX
, XX
},
1722 { "prefetcht2", Ev
, XX
, XX
, XX
},
1723 { "(bad)", XX
, XX
, XX
, XX
},
1724 { "(bad)", XX
, XX
, XX
, XX
},
1725 { "(bad)", XX
, XX
, XX
, XX
},
1726 { "(bad)", XX
, XX
, XX
, XX
},
1730 { "prefetch", Eb
, XX
, XX
, XX
},
1731 { "prefetchw", Eb
, XX
, XX
, XX
},
1732 { "(bad)", XX
, XX
, XX
, XX
},
1733 { "(bad)", XX
, XX
, XX
, XX
},
1734 { "(bad)", XX
, XX
, XX
, XX
},
1735 { "(bad)", XX
, XX
, XX
, XX
},
1736 { "(bad)", XX
, XX
, XX
, XX
},
1737 { "(bad)", XX
, XX
, XX
, XX
},
1741 { "xstore-rng", OP_0f07
, 0, XX
, XX
, XX
},
1742 { "xcrypt-ecb", OP_0f07
, 0, XX
, XX
, XX
},
1743 { "xcrypt-cbc", OP_0f07
, 0, XX
, XX
, XX
},
1744 { "xcrypt-ctr", OP_0f07
, 0, XX
, XX
, XX
},
1745 { "xcrypt-cfb", OP_0f07
, 0, XX
, XX
, XX
},
1746 { "xcrypt-ofb", OP_0f07
, 0, XX
, XX
, XX
},
1747 { "(bad)", OP_0f07
, 0, XX
, XX
, XX
},
1748 { "(bad)", OP_0f07
, 0, XX
, XX
, XX
},
1752 { "montmul", OP_0f07
, 0, XX
, XX
, XX
},
1753 { "xsha1", OP_0f07
, 0, XX
, XX
, XX
},
1754 { "xsha256", OP_0f07
, 0, XX
, XX
, XX
},
1755 { "(bad)", OP_0f07
, 0, XX
, XX
, XX
},
1756 { "(bad)", OP_0f07
, 0, XX
, XX
, XX
},
1757 { "(bad)", OP_0f07
, 0, XX
, XX
, XX
},
1758 { "(bad)", OP_0f07
, 0, XX
, XX
, XX
},
1759 { "(bad)", OP_0f07
, 0, XX
, XX
, XX
},
1763 static const struct dis386 prefix_user_table
[][4] = {
1766 { "addps", XM
, EX
, XX
, XX
},
1767 { "addss", XM
, EX
, XX
, XX
},
1768 { "addpd", XM
, EX
, XX
, XX
},
1769 { "addsd", XM
, EX
, XX
, XX
},
1773 { "", XM
, EX
, OPSIMD
, XX
}, /* See OP_SIMD_SUFFIX. */
1774 { "", XM
, EX
, OPSIMD
, XX
},
1775 { "", XM
, EX
, OPSIMD
, XX
},
1776 { "", XM
, EX
, OPSIMD
, XX
},
1780 { "cvtpi2ps", XM
, EMC
, XX
, XX
},
1781 { "cvtsi2ssY", XM
, Ev
, XX
, XX
},
1782 { "cvtpi2pd", XM
, EMC
, XX
, XX
},
1783 { "cvtsi2sdY", XM
, Ev
, XX
, XX
},
1787 { "cvtps2pi", MXC
, EX
, XX
, XX
},
1788 { "cvtss2siY", Gv
, EX
, XX
, XX
},
1789 { "cvtpd2pi", MXC
, EX
, XX
, XX
},
1790 { "cvtsd2siY", Gv
, EX
, XX
, XX
},
1794 { "cvttps2pi", MXC
, EX
, XX
, XX
},
1795 { "cvttss2siY", Gv
, EX
, XX
, XX
},
1796 { "cvttpd2pi", MXC
, EX
, XX
, XX
},
1797 { "cvttsd2siY", Gv
, EX
, XX
, XX
},
1801 { "divps", XM
, EX
, XX
, XX
},
1802 { "divss", XM
, EX
, XX
, XX
},
1803 { "divpd", XM
, EX
, XX
, XX
},
1804 { "divsd", XM
, EX
, XX
, XX
},
1808 { "maxps", XM
, EX
, XX
, XX
},
1809 { "maxss", XM
, EX
, XX
, XX
},
1810 { "maxpd", XM
, EX
, XX
, XX
},
1811 { "maxsd", XM
, EX
, XX
, XX
},
1815 { "minps", XM
, EX
, XX
, XX
},
1816 { "minss", XM
, EX
, XX
, XX
},
1817 { "minpd", XM
, EX
, XX
, XX
},
1818 { "minsd", XM
, EX
, XX
, XX
},
1822 { "movups", XM
, EX
, XX
, XX
},
1823 { "movss", XM
, EX
, XX
, XX
},
1824 { "movupd", XM
, EX
, XX
, XX
},
1825 { "movsd", XM
, EX
, XX
, XX
},
1829 { "movups", EX
, XM
, XX
, XX
},
1830 { "movss", EX
, XM
, XX
, XX
},
1831 { "movupd", EX
, XM
, XX
, XX
},
1832 { "movsd", EX
, XM
, XX
, XX
},
1836 { "mulps", XM
, EX
, XX
, XX
},
1837 { "mulss", XM
, EX
, XX
, XX
},
1838 { "mulpd", XM
, EX
, XX
, XX
},
1839 { "mulsd", XM
, EX
, XX
, XX
},
1843 { "rcpps", XM
, EX
, XX
, XX
},
1844 { "rcpss", XM
, EX
, XX
, XX
},
1845 { "(bad)", XM
, EX
, XX
, XX
},
1846 { "(bad)", XM
, EX
, XX
, XX
},
1850 { "rsqrtps", XM
, EX
, XX
, XX
},
1851 { "rsqrtss", XM
, EX
, XX
, XX
},
1852 { "(bad)", XM
, EX
, XX
, XX
},
1853 { "(bad)", XM
, EX
, XX
, XX
},
1857 { "sqrtps", XM
, EX
, XX
, XX
},
1858 { "sqrtss", XM
, EX
, XX
, XX
},
1859 { "sqrtpd", XM
, EX
, XX
, XX
},
1860 { "sqrtsd", XM
, EX
, XX
, XX
},
1864 { "subps", XM
, EX
, XX
, XX
},
1865 { "subss", XM
, EX
, XX
, XX
},
1866 { "subpd", XM
, EX
, XX
, XX
},
1867 { "subsd", XM
, EX
, XX
, XX
},
1871 { "(bad)", XM
, EX
, XX
, XX
},
1872 { "cvtdq2pd", XM
, EX
, XX
, XX
},
1873 { "cvttpd2dq", XM
, EX
, XX
, XX
},
1874 { "cvtpd2dq", XM
, EX
, XX
, XX
},
1878 { "cvtdq2ps", XM
, EX
, XX
, XX
},
1879 { "cvttps2dq",XM
, EX
, XX
, XX
},
1880 { "cvtps2dq",XM
, EX
, XX
, XX
},
1881 { "(bad)", XM
, EX
, XX
, XX
},
1885 { "cvtps2pd", XM
, EX
, XX
, XX
},
1886 { "cvtss2sd", XM
, EX
, XX
, XX
},
1887 { "cvtpd2ps", XM
, EX
, XX
, XX
},
1888 { "cvtsd2ss", XM
, EX
, XX
, XX
},
1892 { "maskmovq", MX
, MS
, XX
, XX
},
1893 { "(bad)", XM
, EX
, XX
, XX
},
1894 { "maskmovdqu", XM
, XS
, XX
, XX
},
1895 { "(bad)", XM
, EX
, XX
, XX
},
1899 { "movq", MX
, EM
, XX
, XX
},
1900 { "movdqu", XM
, EX
, XX
, XX
},
1901 { "movdqa", XM
, EX
, XX
, XX
},
1902 { "(bad)", XM
, EX
, XX
, XX
},
1906 { "movq", EM
, MX
, XX
, XX
},
1907 { "movdqu", EX
, XM
, XX
, XX
},
1908 { "movdqa", EX
, XM
, XX
, XX
},
1909 { "(bad)", EX
, XM
, XX
, XX
},
1913 { "(bad)", EX
, XM
, XX
, XX
},
1914 { "movq2dq", XM
, MS
, XX
, XX
},
1915 { "movq", EX
, XM
, XX
, XX
},
1916 { "movdq2q", MX
, XS
, XX
, XX
},
1920 { "pshufw", MX
, EM
, Ib
, XX
},
1921 { "pshufhw", XM
, EX
, Ib
, XX
},
1922 { "pshufd", XM
, EX
, Ib
, XX
},
1923 { "pshuflw", XM
, EX
, Ib
, XX
},
1927 { "movd", Edq
, MX
, XX
, XX
},
1928 { "movq", XM
, EX
, XX
, XX
},
1929 { "movd", Edq
, XM
, XX
, XX
},
1930 { "(bad)", Ed
, XM
, XX
, XX
},
1934 { "(bad)", MX
, EX
, XX
, XX
},
1935 { "(bad)", XM
, EX
, XX
, XX
},
1936 { "punpckhqdq", XM
, EX
, XX
, XX
},
1937 { "(bad)", XM
, EX
, XX
, XX
},
1941 { "movntq", EM
, MX
, XX
, XX
},
1942 { "(bad)", EM
, XM
, XX
, XX
},
1943 { "movntdq", EM
, XM
, XX
, XX
},
1944 { "(bad)", EM
, XM
, XX
, XX
},
1948 { "(bad)", MX
, EX
, XX
, XX
},
1949 { "(bad)", XM
, EX
, XX
, XX
},
1950 { "punpcklqdq", XM
, EX
, XX
, XX
},
1951 { "(bad)", XM
, EX
, XX
, XX
},
1955 { "(bad)", MX
, EX
, XX
, XX
},
1956 { "(bad)", XM
, EX
, XX
, XX
},
1957 { "addsubpd", XM
, EX
, XX
, XX
},
1958 { "addsubps", XM
, EX
, XX
, XX
},
1962 { "(bad)", MX
, EX
, XX
, XX
},
1963 { "(bad)", XM
, EX
, XX
, XX
},
1964 { "haddpd", XM
, EX
, XX
, XX
},
1965 { "haddps", XM
, EX
, XX
, XX
},
1969 { "(bad)", MX
, EX
, XX
, XX
},
1970 { "(bad)", XM
, EX
, XX
, XX
},
1971 { "hsubpd", XM
, EX
, XX
, XX
},
1972 { "hsubps", XM
, EX
, XX
, XX
},
1976 { "movlpX", XM
, EX
, SIMD_Fixup
, 'h', XX
}, /* really only 2 operands */
1977 { "movsldup", XM
, EX
, XX
, XX
},
1978 { "movlpd", XM
, EX
, XX
, XX
},
1979 { "movddup", XM
, EX
, XX
, XX
},
1983 { "movhpX", XM
, EX
, SIMD_Fixup
, 'l', XX
},
1984 { "movshdup", XM
, EX
, XX
, XX
},
1985 { "movhpd", XM
, EX
, XX
, XX
},
1986 { "(bad)", XM
, EX
, XX
, XX
},
1990 { "(bad)", XM
, EX
, XX
, XX
},
1991 { "(bad)", XM
, EX
, XX
, XX
},
1992 { "(bad)", XM
, EX
, XX
, XX
},
1993 { "lddqu", XM
, M
, XX
, XX
},
1997 {"movntps",Ev
, XM
, XX
, XX
},
1998 {"movntss",Ev
, XM
, XX
, XX
},
1999 {"movntpd",Ev
, XM
, XX
, XX
},
2000 {"movntsd",Ev
, XM
, XX
, XX
},
2005 {"vmread", Em
, Gm
, XX
, XX
},
2006 {"(bad)", XX
, XX
, XX
, XX
},
2007 {"extrq", XS
, Ib
, Ib
, XX
},
2008 {"insertq",XM
, XS
, Ib
, Ib
},
2013 {"vmwrite", Gm
, Em
, XX
, XX
},
2014 {"(bad)", XX
, XX
, XX
, XX
},
2015 {"extrq", XM
, XS
, XX
, XX
},
2016 {"insertq", XM
, XS
, XX
, XX
},
2021 { "bsrS", Gv
, Ev
, XX
, XX
},
2022 { "lzcntS", Gv
, Ev
, XX
, XX
},
2023 { "bsrS", Gv
, Ev
, XX
, XX
},
2024 { "(bad)", XX
, XX
, XX
, XX
},
2029 { "(bad)", XX
, XX
, XX
, XX
},
2030 { "popcntS",Gv
, Ev
, XX
, XX
},
2031 { "(bad)", XX
, XX
, XX
, XX
},
2032 { "(bad)", XX
, XX
, XX
, XX
},
2036 static const struct dis386 x86_64_table
[][2] = {
2038 { "pusha{P|}", XX
, XX
, XX
, XX
},
2039 { "(bad)", XX
, XX
, XX
, XX
},
2042 { "popa{P|}", XX
, XX
, XX
, XX
},
2043 { "(bad)", XX
, XX
, XX
, XX
},
2046 { "bound{S|}", Gv
, Ma
, XX
, XX
},
2047 { "(bad)", XX
, XX
, XX
, XX
},
2050 { "arpl", Ew
, Gw
, XX
, XX
},
2051 { "movs{||lq|xd}", Gv
, Ed
, XX
, XX
},
2055 static const struct dis386 three_byte_table
[][256] = {
2059 { "pshufb", MX
, EM
, XX
, XX
},
2060 { "phaddw", MX
, EM
, XX
, XX
},
2061 { "phaddd", MX
, EM
, XX
, XX
},
2062 { "phaddsw", MX
, EM
, XX
, XX
},
2063 { "pmaddubsw", MX
, EM
, XX
, XX
},
2064 { "phsubw", MX
, EM
, XX
, XX
},
2065 { "phsubd", MX
, EM
, XX
, XX
},
2066 { "phsubsw", MX
, EM
, XX
, XX
},
2068 { "psignb", MX
, EM
, XX
, XX
},
2069 { "psignw", MX
, EM
, XX
, XX
},
2070 { "psignd", MX
, EM
, XX
, XX
},
2071 { "pmulhrsw", MX
, EM
, XX
, XX
},
2072 { "(bad)", XX
, XX
, XX
, XX
},
2073 { "(bad)", XX
, XX
, XX
, XX
},
2074 { "(bad)", XX
, XX
, XX
, XX
},
2075 { "(bad)", XX
, XX
, XX
, XX
},
2077 { "(bad)", XX
, XX
, XX
, XX
},
2078 { "(bad)", XX
, XX
, XX
, XX
},
2079 { "(bad)", XX
, XX
, XX
, XX
},
2080 { "(bad)", XX
, XX
, XX
, XX
},
2081 { "(bad)", XX
, XX
, XX
, XX
},
2082 { "(bad)", XX
, XX
, XX
, XX
},
2083 { "(bad)", XX
, XX
, XX
, XX
},
2084 { "(bad)", XX
, XX
, XX
, XX
},
2086 { "(bad)", XX
, XX
, XX
, XX
},
2087 { "(bad)", XX
, XX
, XX
, XX
},
2088 { "(bad)", XX
, XX
, XX
, XX
},
2089 { "(bad)", XX
, XX
, XX
, XX
},
2090 { "pabsb", MX
, EM
, XX
, XX
},
2091 { "pabsw", MX
, EM
, XX
, XX
},
2092 { "pabsd", MX
, EM
, XX
, XX
},
2093 { "(bad)", XX
, XX
, XX
, XX
},
2095 { "(bad)", XX
, XX
, XX
, XX
},
2096 { "(bad)", XX
, XX
, XX
, XX
},
2097 { "(bad)", XX
, XX
, XX
, XX
},
2098 { "(bad)", XX
, XX
, XX
, XX
},
2099 { "(bad)", XX
, XX
, XX
, XX
},
2100 { "(bad)", XX
, XX
, XX
, XX
},
2101 { "(bad)", XX
, XX
, XX
, XX
},
2102 { "(bad)", XX
, XX
, XX
, XX
},
2104 { "(bad)", XX
, XX
, XX
, XX
},
2105 { "(bad)", XX
, XX
, XX
, XX
},
2106 { "(bad)", XX
, XX
, XX
, XX
},
2107 { "(bad)", XX
, XX
, XX
, XX
},
2108 { "(bad)", XX
, XX
, XX
, XX
},
2109 { "(bad)", XX
, XX
, XX
, XX
},
2110 { "(bad)", XX
, XX
, XX
, XX
},
2111 { "(bad)", XX
, XX
, XX
, XX
},
2113 { "(bad)", XX
, XX
, XX
, XX
},
2114 { "(bad)", XX
, XX
, XX
, XX
},
2115 { "(bad)", XX
, XX
, XX
, XX
},
2116 { "(bad)", XX
, XX
, XX
, XX
},
2117 { "(bad)", XX
, XX
, XX
, XX
},
2118 { "(bad)", XX
, XX
, XX
, XX
},
2119 { "(bad)", XX
, XX
, XX
, XX
},
2120 { "(bad)", XX
, XX
, XX
, XX
},
2122 { "(bad)", XX
, XX
, XX
, XX
},
2123 { "(bad)", XX
, XX
, XX
, XX
},
2124 { "(bad)", XX
, XX
, XX
, XX
},
2125 { "(bad)", XX
, XX
, XX
, XX
},
2126 { "(bad)", XX
, XX
, XX
, XX
},
2127 { "(bad)", XX
, XX
, XX
, XX
},
2128 { "(bad)", XX
, XX
, XX
, XX
},
2129 { "(bad)", XX
, XX
, XX
, XX
},
2131 { "(bad)", XX
, XX
, XX
, XX
},
2132 { "(bad)", XX
, XX
, XX
, XX
},
2133 { "(bad)", XX
, XX
, XX
, XX
},
2134 { "(bad)", XX
, XX
, XX
, XX
},
2135 { "(bad)", XX
, XX
, XX
, XX
},
2136 { "(bad)", XX
, XX
, XX
, XX
},
2137 { "(bad)", XX
, XX
, XX
, XX
},
2138 { "(bad)", XX
, XX
, XX
, XX
},
2140 { "(bad)", XX
, XX
, XX
, XX
},
2141 { "(bad)", XX
, XX
, XX
, XX
},
2142 { "(bad)", XX
, XX
, XX
, XX
},
2143 { "(bad)", XX
, XX
, XX
, XX
},
2144 { "(bad)", XX
, XX
, XX
, XX
},
2145 { "(bad)", XX
, XX
, XX
, XX
},
2146 { "(bad)", XX
, XX
, XX
, XX
},
2147 { "(bad)", XX
, XX
, XX
, XX
},
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, XX
, XX
},
2535 { "(bad)", XX
, XX
, XX
, XX
},
2536 { "(bad)", XX
, XX
, XX
, XX
},
2537 { "(bad)", XX
, XX
, XX
, XX
},
2539 { "(bad)", XX
, XX
, XX
, XX
},
2540 { "(bad)", XX
, XX
, XX
, XX
},
2541 { "(bad)", XX
, XX
, XX
, XX
},
2542 { "(bad)", XX
, XX
, XX
, XX
},
2543 { "(bad)", XX
, XX
, XX
, XX
},
2544 { "(bad)", XX
, XX
, XX
, XX
},
2545 { "(bad)", XX
, XX
, XX
, XX
},
2546 { "(bad)", XX
, XX
, XX
, XX
},
2548 { "(bad)", XX
, XX
, XX
, XX
},
2549 { "(bad)", XX
, XX
, XX
, XX
},
2550 { "(bad)", XX
, XX
, XX
, XX
},
2551 { "(bad)", XX
, XX
, XX
, XX
},
2552 { "(bad)", XX
, XX
, XX
, XX
},
2553 { "(bad)", XX
, XX
, XX
, XX
},
2554 { "(bad)", XX
, XX
, XX
, XX
},
2555 { "(bad)", XX
, XX
, XX
, XX
},
2557 { "(bad)", XX
, XX
, XX
, XX
},
2558 { "(bad)", XX
, XX
, XX
, XX
},
2559 { "(bad)", XX
, XX
, XX
, XX
},
2560 { "(bad)", XX
, XX
, XX
, XX
},
2561 { "(bad)", XX
, XX
, XX
, XX
},
2562 { "(bad)", XX
, XX
, XX
, XX
},
2563 { "(bad)", XX
, XX
, XX
, XX
},
2564 { "(bad)", XX
, XX
, XX
, XX
},
2566 { "(bad)", XX
, XX
, XX
, XX
},
2567 { "(bad)", XX
, XX
, XX
, XX
},
2568 { "(bad)", XX
, XX
, XX
, XX
},
2569 { "(bad)", XX
, XX
, XX
, XX
},
2570 { "(bad)", XX
, XX
, XX
, XX
},
2571 { "(bad)", XX
, XX
, XX
, XX
},
2572 { "(bad)", XX
, XX
, XX
, XX
},
2573 { "(bad)", XX
, XX
, XX
, XX
},
2575 { "(bad)", XX
, XX
, XX
, XX
},
2576 { "(bad)", XX
, XX
, XX
, XX
},
2577 { "(bad)", XX
, XX
, XX
, XX
},
2578 { "(bad)", XX
, XX
, XX
, XX
},
2579 { "(bad)", XX
, XX
, XX
, XX
},
2580 { "(bad)", XX
, XX
, XX
, XX
},
2581 { "(bad)", XX
, XX
, XX
, XX
},
2582 { "(bad)", XX
, XX
, XX
, XX
},
2584 { "(bad)", XX
, XX
, XX
, XX
},
2585 { "(bad)", XX
, XX
, XX
, XX
},
2586 { "(bad)", XX
, XX
, XX
, XX
},
2587 { "(bad)", XX
, XX
, XX
, XX
},
2588 { "(bad)", XX
, XX
, XX
, XX
},
2589 { "(bad)", XX
, XX
, XX
, XX
},
2590 { "(bad)", XX
, XX
, XX
, XX
},
2591 { "(bad)", XX
, XX
, XX
, XX
},
2593 { "(bad)", XX
, XX
, XX
, XX
},
2594 { "(bad)", XX
, XX
, XX
, XX
},
2595 { "(bad)", XX
, XX
, XX
, XX
},
2596 { "(bad)", XX
, XX
, XX
, XX
},
2597 { "(bad)", XX
, XX
, XX
, XX
},
2598 { "(bad)", XX
, XX
, XX
, XX
},
2599 { "(bad)", XX
, XX
, XX
, XX
},
2600 { "(bad)", XX
, XX
, XX
, XX
},
2602 { "(bad)", XX
, XX
, XX
, XX
},
2603 { "(bad)", XX
, XX
, XX
, XX
},
2604 { "(bad)", XX
, XX
, XX
, XX
},
2605 { "(bad)", XX
, XX
, XX
, XX
},
2606 { "(bad)", XX
, XX
, XX
, XX
},
2607 { "(bad)", XX
, XX
, XX
, XX
},
2608 { "(bad)", XX
, XX
, XX
, XX
},
2609 { "(bad)", XX
, XX
, XX
, XX
},
2611 { "(bad)", XX
, XX
, XX
, XX
},
2612 { "(bad)", XX
, XX
, XX
, XX
},
2613 { "(bad)", XX
, XX
, XX
, XX
},
2614 { "(bad)", XX
, XX
, XX
, XX
},
2615 { "(bad)", XX
, XX
, XX
, XX
},
2616 { "(bad)", XX
, XX
, XX
, XX
},
2617 { "(bad)", XX
, XX
, XX
, XX
},
2618 { "(bad)", XX
, XX
, XX
, XX
},
2620 { "(bad)", XX
, XX
, XX
, XX
},
2621 { "(bad)", XX
, XX
, XX
, XX
},
2622 { "(bad)", XX
, XX
, XX
, XX
},
2623 { "(bad)", XX
, XX
, XX
, XX
},
2624 { "(bad)", XX
, XX
, XX
, XX
},
2625 { "(bad)", XX
, XX
, XX
, XX
},
2626 { "(bad)", XX
, XX
, XX
, XX
},
2627 { "(bad)", XX
, XX
, XX
, XX
},
2629 { "(bad)", XX
, XX
, XX
, XX
},
2630 { "(bad)", XX
, XX
, XX
, XX
},
2631 { "(bad)", XX
, XX
, XX
, XX
},
2632 { "(bad)", XX
, XX
, XX
, XX
},
2633 { "(bad)", XX
, XX
, XX
, XX
},
2634 { "(bad)", XX
, XX
, XX
, XX
},
2635 { "(bad)", XX
, XX
, XX
, XX
},
2636 { "(bad)", XX
, XX
, XX
, XX
}
2640 #define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
2652 FETCH_DATA (the_info
, codep
+ 1);
2656 /* REX prefixes family. */
2673 if (address_mode
== mode_64bit
)
2679 prefixes
|= PREFIX_REPZ
;
2682 prefixes
|= PREFIX_REPNZ
;
2685 prefixes
|= PREFIX_LOCK
;
2688 prefixes
|= PREFIX_CS
;
2691 prefixes
|= PREFIX_SS
;
2694 prefixes
|= PREFIX_DS
;
2697 prefixes
|= PREFIX_ES
;
2700 prefixes
|= PREFIX_FS
;
2703 prefixes
|= PREFIX_GS
;
2706 prefixes
|= PREFIX_DATA
;
2709 prefixes
|= PREFIX_ADDR
;
2712 /* fwait is really an instruction. If there are prefixes
2713 before the fwait, they belong to the fwait, *not* to the
2714 following instruction. */
2715 if (prefixes
|| rex
)
2717 prefixes
|= PREFIX_FWAIT
;
2721 prefixes
= PREFIX_FWAIT
;
2726 /* Rex is ignored when followed by another prefix. */
2737 /* Return the name of the prefix byte PREF, or NULL if PREF is not a
2741 prefix_name (int pref
, int sizeflag
)
2745 /* REX prefixes family. */
2797 return (sizeflag
& DFLAG
) ? "data16" : "data32";
2799 if (address_mode
== mode_64bit
)
2800 return (sizeflag
& AFLAG
) ? "addr32" : "addr64";
2802 return (sizeflag
& AFLAG
) ? "addr16" : "addr32";
2810 static char op1out
[100], op2out
[100], op3out
[100], op4out
[100];
2811 static int op_ad
, op_index
[4];
2812 static int two_source_ops
;
2813 static bfd_vma op_address
[4];
2814 static bfd_vma op_riprel
[4];
2815 static bfd_vma start_pc
;
2818 * On the 386's of 1988, the maximum length of an instruction is 15 bytes.
2819 * (see topic "Redundant prefixes" in the "Differences from 8086"
2820 * section of the "Virtual 8086 Mode" chapter.)
2821 * 'pc' should be the address of this instruction, it will
2822 * be used to print the target address if this is a relative jump or call
2823 * The function returns the length of this instruction in bytes.
2826 static char intel_syntax
;
2827 static char open_char
;
2828 static char close_char
;
2829 static char separator_char
;
2830 static char scale_char
;
2832 /* Here for backwards compatibility. When gdb stops using
2833 print_insn_i386_att and print_insn_i386_intel these functions can
2834 disappear, and print_insn_i386 be merged into print_insn. */
2836 print_insn_i386_att (bfd_vma pc
, disassemble_info
*info
)
2840 return print_insn (pc
, info
);
2844 print_insn_i386_intel (bfd_vma pc
, disassemble_info
*info
)
2848 return print_insn (pc
, info
);
2852 print_insn_i386 (bfd_vma pc
, disassemble_info
*info
)
2856 return print_insn (pc
, info
);
2860 print_insn (bfd_vma pc
, disassemble_info
*info
)
2862 const struct dis386
*dp
;
2864 char *first
, *second
, *third
, *fourth
;
2866 unsigned char uses_DATA_prefix
, uses_LOCK_prefix
;
2867 unsigned char uses_REPNZ_prefix
, uses_REPZ_prefix
;
2870 struct dis_private priv
;
2873 if (info
->mach
== bfd_mach_x86_64_intel_syntax
2874 || info
->mach
== bfd_mach_x86_64
)
2875 address_mode
= mode_64bit
;
2877 address_mode
= mode_32bit
;
2879 if (intel_syntax
== (char) -1)
2880 intel_syntax
= (info
->mach
== bfd_mach_i386_i386_intel_syntax
2881 || info
->mach
== bfd_mach_x86_64_intel_syntax
);
2883 if (info
->mach
== bfd_mach_i386_i386
2884 || info
->mach
== bfd_mach_x86_64
2885 || info
->mach
== bfd_mach_i386_i386_intel_syntax
2886 || info
->mach
== bfd_mach_x86_64_intel_syntax
)
2887 priv
.orig_sizeflag
= AFLAG
| DFLAG
;
2888 else if (info
->mach
== bfd_mach_i386_i8086
)
2889 priv
.orig_sizeflag
= 0;
2893 for (p
= info
->disassembler_options
; p
!= NULL
; )
2895 if (CONST_STRNEQ (p
, "x86-64"))
2897 address_mode
= mode_64bit
;
2898 priv
.orig_sizeflag
= AFLAG
| DFLAG
;
2900 else if (CONST_STRNEQ (p
, "i386"))
2902 address_mode
= mode_32bit
;
2903 priv
.orig_sizeflag
= AFLAG
| DFLAG
;
2905 else if (CONST_STRNEQ (p
, "i8086"))
2907 address_mode
= mode_16bit
;
2908 priv
.orig_sizeflag
= 0;
2910 else if (CONST_STRNEQ (p
, "intel"))
2914 else if (CONST_STRNEQ (p
, "att"))
2918 else if (CONST_STRNEQ (p
, "addr"))
2920 if (p
[4] == '1' && p
[5] == '6')
2921 priv
.orig_sizeflag
&= ~AFLAG
;
2922 else if (p
[4] == '3' && p
[5] == '2')
2923 priv
.orig_sizeflag
|= AFLAG
;
2925 else if (CONST_STRNEQ (p
, "data"))
2927 if (p
[4] == '1' && p
[5] == '6')
2928 priv
.orig_sizeflag
&= ~DFLAG
;
2929 else if (p
[4] == '3' && p
[5] == '2')
2930 priv
.orig_sizeflag
|= DFLAG
;
2932 else if (CONST_STRNEQ (p
, "suffix"))
2933 priv
.orig_sizeflag
|= SUFFIX_ALWAYS
;
2935 p
= strchr (p
, ',');
2942 names64
= intel_names64
;
2943 names32
= intel_names32
;
2944 names16
= intel_names16
;
2945 names8
= intel_names8
;
2946 names8rex
= intel_names8rex
;
2947 names_seg
= intel_names_seg
;
2948 index16
= intel_index16
;
2951 separator_char
= '+';
2956 names64
= att_names64
;
2957 names32
= att_names32
;
2958 names16
= att_names16
;
2959 names8
= att_names8
;
2960 names8rex
= att_names8rex
;
2961 names_seg
= att_names_seg
;
2962 index16
= att_index16
;
2965 separator_char
= ',';
2969 /* The output looks better if we put 7 bytes on a line, since that
2970 puts most long word instructions on a single line. */
2971 info
->bytes_per_line
= 7;
2973 info
->private_data
= &priv
;
2974 priv
.max_fetched
= priv
.the_buffer
;
2975 priv
.insn_start
= pc
;
2983 op_index
[0] = op_index
[1] = op_index
[2] = op_index
[3] = -1;
2987 start_codep
= priv
.the_buffer
;
2988 codep
= priv
.the_buffer
;
2990 if (setjmp (priv
.bailout
) != 0)
2994 /* Getting here means we tried for data but didn't get it. That
2995 means we have an incomplete instruction of some sort. Just
2996 print the first byte as a prefix or a .byte pseudo-op. */
2997 if (codep
> priv
.the_buffer
)
2999 name
= prefix_name (priv
.the_buffer
[0], priv
.orig_sizeflag
);
3001 (*info
->fprintf_func
) (info
->stream
, "%s", name
);
3004 /* Just print the first byte as a .byte instruction. */
3005 (*info
->fprintf_func
) (info
->stream
, ".byte 0x%x",
3006 (unsigned int) priv
.the_buffer
[0]);
3019 sizeflag
= priv
.orig_sizeflag
;
3021 FETCH_DATA (info
, codep
+ 1);
3022 two_source_ops
= (*codep
== 0x62) || (*codep
== 0xc8);
3024 if (((prefixes
& PREFIX_FWAIT
)
3025 && ((*codep
< 0xd8) || (*codep
> 0xdf)))
3026 || (rex
&& rex_used
))
3030 /* fwait not followed by floating point instruction, or rex followed
3031 by other prefixes. Print the first prefix. */
3032 name
= prefix_name (priv
.the_buffer
[0], priv
.orig_sizeflag
);
3034 name
= INTERNAL_DISASSEMBLER_ERROR
;
3035 (*info
->fprintf_func
) (info
->stream
, "%s", name
);
3042 unsigned char threebyte
;
3043 FETCH_DATA (info
, codep
+ 2);
3044 threebyte
= *++codep
;
3045 dp
= &dis386_twobyte
[threebyte
];
3046 need_modrm
= twobyte_has_modrm
[*codep
];
3047 uses_DATA_prefix
= twobyte_uses_DATA_prefix
[*codep
];
3048 uses_REPNZ_prefix
= twobyte_uses_REPNZ_prefix
[*codep
];
3049 uses_REPZ_prefix
= twobyte_uses_REPZ_prefix
[*codep
];
3050 uses_LOCK_prefix
= (*codep
& ~0x02) == 0x20;
3052 if (dp
->name
== NULL
&& dp
->bytemode1
== IS_3BYTE_OPCODE
)
3054 FETCH_DATA (info
, codep
+ 2);
3059 uses_DATA_prefix
= threebyte_0x38_uses_DATA_prefix
[op
];
3060 uses_REPNZ_prefix
= threebyte_0x38_uses_REPNZ_prefix
[op
];
3061 uses_REPZ_prefix
= threebyte_0x38_uses_REPZ_prefix
[op
];
3064 uses_DATA_prefix
= threebyte_0x3a_uses_DATA_prefix
[op
];
3065 uses_REPNZ_prefix
= threebyte_0x3a_uses_REPNZ_prefix
[op
];
3066 uses_REPZ_prefix
= threebyte_0x3a_uses_REPZ_prefix
[op
];
3075 dp
= &dis386
[*codep
];
3076 need_modrm
= onebyte_has_modrm
[*codep
];
3077 uses_DATA_prefix
= 0;
3078 uses_REPNZ_prefix
= 0;
3079 uses_REPZ_prefix
= 0;
3080 uses_LOCK_prefix
= 0;
3084 if (!uses_REPZ_prefix
&& (prefixes
& PREFIX_REPZ
))
3087 used_prefixes
|= PREFIX_REPZ
;
3089 if (!uses_REPNZ_prefix
&& (prefixes
& PREFIX_REPNZ
))
3092 used_prefixes
|= PREFIX_REPNZ
;
3095 if (!uses_LOCK_prefix
&& (prefixes
& PREFIX_LOCK
))
3098 used_prefixes
|= PREFIX_LOCK
;
3101 if (prefixes
& PREFIX_ADDR
)
3104 if (dp
->bytemode3
!= loop_jcxz_mode
|| intel_syntax
)
3106 if ((sizeflag
& AFLAG
) || address_mode
== mode_64bit
)
3107 oappend ("addr32 ");
3109 oappend ("addr16 ");
3110 used_prefixes
|= PREFIX_ADDR
;
3114 if (!uses_DATA_prefix
&& (prefixes
& PREFIX_DATA
))
3117 if (dp
->bytemode3
== cond_jump_mode
3118 && dp
->bytemode1
== v_mode
3121 if (sizeflag
& DFLAG
)
3122 oappend ("data32 ");
3124 oappend ("data16 ");
3125 used_prefixes
|= PREFIX_DATA
;
3129 if (dp
->name
== NULL
&& dp
->bytemode1
== IS_3BYTE_OPCODE
)
3131 dp
= &three_byte_table
[dp
->bytemode2
][op
];
3132 mod
= (*codep
>> 6) & 3;
3133 reg
= (*codep
>> 3) & 7;
3136 else if (need_modrm
)
3138 FETCH_DATA (info
, codep
+ 1);
3139 mod
= (*codep
>> 6) & 3;
3140 reg
= (*codep
>> 3) & 7;
3144 if (dp
->name
== NULL
&& dp
->bytemode1
== FLOATCODE
)
3151 if (dp
->name
== NULL
)
3153 switch (dp
->bytemode1
)
3156 dp
= &grps
[dp
->bytemode2
][reg
];
3159 case USE_PREFIX_USER_TABLE
:
3161 used_prefixes
|= (prefixes
& PREFIX_REPZ
);
3162 if (prefixes
& PREFIX_REPZ
)
3166 /* We should check PREFIX_REPNZ and PREFIX_REPZ
3167 before PREFIX_DATA. */
3168 used_prefixes
|= (prefixes
& PREFIX_REPNZ
);
3169 if (prefixes
& PREFIX_REPNZ
)
3173 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3174 if (prefixes
& PREFIX_DATA
)
3178 dp
= &prefix_user_table
[dp
->bytemode2
][index
];
3181 case X86_64_SPECIAL
:
3182 index
= address_mode
== mode_64bit
? 1 : 0;
3183 dp
= &x86_64_table
[dp
->bytemode2
][index
];
3187 oappend (INTERNAL_DISASSEMBLER_ERROR
);
3192 if (putop (dp
->name
, sizeflag
) == 0)
3197 (*dp
->op1
) (dp
->bytemode1
, sizeflag
);
3202 (*dp
->op2
) (dp
->bytemode2
, sizeflag
);
3207 (*dp
->op3
) (dp
->bytemode3
, sizeflag
);
3212 (*dp
->op4
) (dp
->bytemode4
, sizeflag
);
3216 /* See if any prefixes were not used. If so, print the first one
3217 separately. If we don't do this, we'll wind up printing an
3218 instruction stream which does not precisely correspond to the
3219 bytes we are disassembling. */
3220 if ((prefixes
& ~used_prefixes
) != 0)
3224 name
= prefix_name (priv
.the_buffer
[0], priv
.orig_sizeflag
);
3226 name
= INTERNAL_DISASSEMBLER_ERROR
;
3227 (*info
->fprintf_func
) (info
->stream
, "%s", name
);
3230 if (rex
& ~rex_used
)
3233 name
= prefix_name (rex
| 0x40, priv
.orig_sizeflag
);
3235 name
= INTERNAL_DISASSEMBLER_ERROR
;
3236 (*info
->fprintf_func
) (info
->stream
, "%s ", name
);
3239 obufp
= obuf
+ strlen (obuf
);
3240 for (i
= strlen (obuf
); i
< 6; i
++)
3243 (*info
->fprintf_func
) (info
->stream
, "%s", obuf
);
3245 /* The enter and bound instructions are printed with operands in the same
3246 order as the intel book; everything else is printed in reverse order. */
3247 if (intel_syntax
|| two_source_ops
)
3253 op_ad
= op_index
[0];
3254 op_index
[0] = op_index
[3];
3255 op_index
[3] = op_ad
;
3256 op_ad
= op_index
[1];
3257 op_index
[1] = op_index
[2];
3258 op_index
[2] = op_ad
;
3271 if (op_index
[0] != -1 && !op_riprel
[0])
3272 (*info
->print_address_func
) ((bfd_vma
) op_address
[op_index
[0]], info
);
3274 (*info
->fprintf_func
) (info
->stream
, "%s", first
);
3281 (*info
->fprintf_func
) (info
->stream
, ",");
3282 if (op_index
[1] != -1 && !op_riprel
[1])
3283 (*info
->print_address_func
) ((bfd_vma
) op_address
[op_index
[1]], info
);
3285 (*info
->fprintf_func
) (info
->stream
, "%s", second
);
3292 (*info
->fprintf_func
) (info
->stream
, ",");
3293 if (op_index
[2] != -1 && !op_riprel
[2])
3294 (*info
->print_address_func
) ((bfd_vma
) op_address
[op_index
[2]], info
);
3296 (*info
->fprintf_func
) (info
->stream
, "%s", third
);
3303 (*info
->fprintf_func
) (info
->stream
, ",");
3304 if (op_index
[3] != -1 && !op_riprel
[3])
3305 (*info
->print_address_func
) ((bfd_vma
) op_address
[op_index
[3]], info
);
3307 (*info
->fprintf_func
) (info
->stream
, "%s", fourth
);
3310 for (i
= 0; i
< 4; i
++)
3311 if (op_index
[i
] != -1 && op_riprel
[i
])
3313 (*info
->fprintf_func
) (info
->stream
, " # ");
3314 (*info
->print_address_func
) ((bfd_vma
) (start_pc
+ codep
- start_codep
3315 + op_address
[op_index
[i
]]), info
);
3317 return codep
- priv
.the_buffer
;
3320 static const char *float_mem
[] = {
3395 static const unsigned char float_mem_mode
[] = {
3471 #define STi OP_STi, 0
3473 #define FGRPd9_2 NULL, NULL, 0, NULL, 0, NULL, 0, NULL, 0
3474 #define FGRPd9_4 NULL, NULL, 1, NULL, 0, NULL, 0, NULL, 0
3475 #define FGRPd9_5 NULL, NULL, 2, NULL, 0, NULL, 0, NULL, 0
3476 #define FGRPd9_6 NULL, NULL, 3, NULL, 0, NULL, 0, NULL, 0
3477 #define FGRPd9_7 NULL, NULL, 4, NULL, 0, NULL, 0, NULL, 0
3478 #define FGRPda_5 NULL, NULL, 5, NULL, 0, NULL, 0, NULL, 0
3479 #define FGRPdb_4 NULL, NULL, 6, NULL, 0, NULL, 0, NULL, 0
3480 #define FGRPde_3 NULL, NULL, 7, NULL, 0, NULL, 0, NULL, 0
3481 #define FGRPdf_4 NULL, NULL, 8, NULL, 0, NULL, 0, NULL, 0
3483 static const struct dis386 float_reg
[][8] = {
3486 { "fadd", ST
, STi
, XX
, XX
},
3487 { "fmul", ST
, STi
, XX
, XX
},
3488 { "fcom", STi
, XX
, XX
, XX
},
3489 { "fcomp", STi
, XX
, XX
, XX
},
3490 { "fsub", ST
, STi
, XX
, XX
},
3491 { "fsubr", ST
, STi
, XX
, XX
},
3492 { "fdiv", ST
, STi
, XX
, XX
},
3493 { "fdivr", ST
, STi
, XX
, XX
},
3497 { "fld", STi
, XX
, XX
, XX
},
3498 { "fxch", STi
, XX
, XX
, XX
},
3500 { "(bad)", XX
, XX
, XX
, XX
},
3508 { "fcmovb", ST
, STi
, XX
, XX
},
3509 { "fcmove", ST
, STi
, XX
, XX
},
3510 { "fcmovbe",ST
, STi
, XX
, XX
},
3511 { "fcmovu", ST
, STi
, XX
, XX
},
3512 { "(bad)", XX
, XX
, XX
, XX
},
3514 { "(bad)", XX
, XX
, XX
, XX
},
3515 { "(bad)", XX
, XX
, XX
, XX
},
3519 { "fcmovnb",ST
, STi
, XX
, XX
},
3520 { "fcmovne",ST
, STi
, XX
, XX
},
3521 { "fcmovnbe",ST
, STi
, XX
, XX
},
3522 { "fcmovnu",ST
, STi
, XX
, XX
},
3524 { "fucomi", ST
, STi
, XX
, XX
},
3525 { "fcomi", ST
, STi
, XX
, XX
},
3526 { "(bad)", XX
, XX
, XX
, XX
},
3530 { "fadd", STi
, ST
, XX
, XX
},
3531 { "fmul", STi
, ST
, XX
, XX
},
3532 { "(bad)", XX
, XX
, XX
, XX
},
3533 { "(bad)", XX
, XX
, XX
, XX
},
3535 { "fsub", STi
, ST
, XX
, XX
},
3536 { "fsubr", STi
, ST
, XX
, XX
},
3537 { "fdiv", STi
, ST
, XX
, XX
},
3538 { "fdivr", STi
, ST
, XX
, XX
},
3540 { "fsubr", STi
, ST
, XX
, XX
},
3541 { "fsub", STi
, ST
, XX
, XX
},
3542 { "fdivr", STi
, ST
, XX
, XX
},
3543 { "fdiv", STi
, ST
, XX
, XX
},
3548 { "ffree", STi
, XX
, XX
, XX
},
3549 { "(bad)", XX
, XX
, XX
, XX
},
3550 { "fst", STi
, XX
, XX
, XX
},
3551 { "fstp", STi
, XX
, XX
, XX
},
3552 { "fucom", STi
, XX
, XX
, XX
},
3553 { "fucomp", STi
, XX
, XX
, XX
},
3554 { "(bad)", XX
, XX
, XX
, XX
},
3555 { "(bad)", XX
, XX
, XX
, XX
},
3559 { "faddp", STi
, ST
, XX
, XX
},
3560 { "fmulp", STi
, ST
, XX
, XX
},
3561 { "(bad)", XX
, XX
, XX
, XX
},
3564 { "fsubp", STi
, ST
, XX
, XX
},
3565 { "fsubrp", STi
, ST
, XX
, XX
},
3566 { "fdivp", STi
, ST
, XX
, XX
},
3567 { "fdivrp", STi
, ST
, XX
, XX
},
3569 { "fsubrp", STi
, ST
, XX
, XX
},
3570 { "fsubp", STi
, ST
, XX
, XX
},
3571 { "fdivrp", STi
, ST
, XX
, XX
},
3572 { "fdivp", STi
, ST
, XX
, XX
},
3577 { "ffreep", STi
, XX
, XX
, XX
},
3578 { "(bad)", XX
, XX
, XX
, XX
},
3579 { "(bad)", XX
, XX
, XX
, XX
},
3580 { "(bad)", XX
, XX
, XX
, XX
},
3582 { "fucomip",ST
, STi
, XX
, XX
},
3583 { "fcomip", ST
, STi
, XX
, XX
},
3584 { "(bad)", XX
, XX
, XX
, XX
},
3588 static char *fgrps
[][8] = {
3591 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
3596 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
3601 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
3606 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
3611 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
3616 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
3621 "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
3622 "fNsetpm(287 only)","(bad)","(bad)","(bad)",
3627 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
3632 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
3637 dofloat (int sizeflag
)
3639 const struct dis386
*dp
;
3640 unsigned char floatop
;
3642 floatop
= codep
[-1];
3646 int fp_indx
= (floatop
- 0xd8) * 8 + reg
;
3648 putop (float_mem
[fp_indx
], sizeflag
);
3651 OP_E (float_mem_mode
[fp_indx
], sizeflag
);
3654 /* Skip mod/rm byte. */
3658 dp
= &float_reg
[floatop
- 0xd8][reg
];
3659 if (dp
->name
== NULL
)
3661 putop (fgrps
[dp
->bytemode1
][rm
], sizeflag
);
3663 /* Instruction fnstsw is only one with strange arg. */
3664 if (floatop
== 0xdf && codep
[-1] == 0xe0)
3665 strcpy (op1out
, names16
[0]);
3669 putop (dp
->name
, sizeflag
);
3674 (*dp
->op1
) (dp
->bytemode1
, sizeflag
);
3679 (*dp
->op2
) (dp
->bytemode2
, sizeflag
);
3684 OP_ST (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
3686 oappend ("%st" + intel_syntax
);
3690 OP_STi (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
3692 sprintf (scratchbuf
, "%%st(%d)", rm
);
3693 oappend (scratchbuf
+ intel_syntax
);
3696 /* Capital letters in template are macros. */
3698 putop (const char *template, int sizeflag
)
3703 for (p
= template; *p
; p
++)
3714 if (address_mode
== mode_64bit
)
3722 /* Alternative not valid. */
3723 strcpy (obuf
, "(bad)");
3727 else if (*p
== '\0')
3748 if (mod
!= 3 || (sizeflag
& SUFFIX_ALWAYS
))
3754 if (sizeflag
& SUFFIX_ALWAYS
)
3758 if (intel_syntax
&& !alt
)
3760 if ((prefixes
& PREFIX_DATA
) || (sizeflag
& SUFFIX_ALWAYS
))
3762 if (sizeflag
& DFLAG
)
3763 *obufp
++ = intel_syntax
? 'd' : 'l';
3765 *obufp
++ = intel_syntax
? 'w' : 's';
3766 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3770 if (intel_syntax
|| !(sizeflag
& SUFFIX_ALWAYS
))
3772 USED_REX (REX_MODE64
);
3775 if (rex
& REX_MODE64
)
3777 else if (sizeflag
& DFLAG
)
3778 *obufp
++ = intel_syntax
? 'd' : 'l';
3781 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3786 case 'E': /* For jcxz/jecxz */
3787 if (address_mode
== mode_64bit
)
3789 if (sizeflag
& AFLAG
)
3795 if (sizeflag
& AFLAG
)
3797 used_prefixes
|= (prefixes
& PREFIX_ADDR
);
3802 if ((prefixes
& PREFIX_ADDR
) || (sizeflag
& SUFFIX_ALWAYS
))
3804 if (sizeflag
& AFLAG
)
3805 *obufp
++ = address_mode
== mode_64bit
? 'q' : 'l';
3807 *obufp
++ = address_mode
== mode_64bit
? 'l' : 'w';
3808 used_prefixes
|= (prefixes
& PREFIX_ADDR
);
3812 if (intel_syntax
|| (obufp
[-1] != 's' && !(sizeflag
& SUFFIX_ALWAYS
)))
3814 if ((rex
& REX_MODE64
) || (sizeflag
& DFLAG
))
3818 if (!(rex
& REX_MODE64
))
3819 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3824 if ((prefixes
& (PREFIX_CS
| PREFIX_DS
)) == PREFIX_CS
3825 || (prefixes
& (PREFIX_CS
| PREFIX_DS
)) == PREFIX_DS
)
3827 used_prefixes
|= prefixes
& (PREFIX_CS
| PREFIX_DS
);
3830 if (prefixes
& PREFIX_DS
)
3844 if (address_mode
== mode_64bit
&& (sizeflag
& SUFFIX_ALWAYS
))
3853 if (sizeflag
& SUFFIX_ALWAYS
)
3857 if ((prefixes
& PREFIX_FWAIT
) == 0)
3860 used_prefixes
|= PREFIX_FWAIT
;
3863 USED_REX (REX_MODE64
);
3864 if (rex
& REX_MODE64
)
3866 else if (intel_syntax
&& (sizeflag
& DFLAG
))
3870 if (!(rex
& REX_MODE64
))
3871 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3876 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
3885 if ((prefixes
& PREFIX_DATA
)
3886 || (rex
& REX_MODE64
)
3887 || (sizeflag
& SUFFIX_ALWAYS
))
3889 USED_REX (REX_MODE64
);
3890 if (rex
& REX_MODE64
)
3894 if (sizeflag
& DFLAG
)
3899 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3905 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
3907 if (mod
!= 3 || (sizeflag
& SUFFIX_ALWAYS
))
3913 if (intel_syntax
&& !alt
)
3915 USED_REX (REX_MODE64
);
3916 if (mod
!= 3 || (sizeflag
& SUFFIX_ALWAYS
))
3918 if (rex
& REX_MODE64
)
3922 if (sizeflag
& DFLAG
)
3923 *obufp
++ = intel_syntax
? 'd' : 'l';
3927 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3931 USED_REX (REX_MODE64
);
3932 if (rex
& REX_MODE64
)
3934 else if (sizeflag
& DFLAG
)
3943 if (intel_syntax
&& !p
[1]
3944 && ((rex
& REX_MODE64
) || (sizeflag
& DFLAG
)))
3946 if (!(rex
& REX_MODE64
))
3947 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3952 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
3954 if (sizeflag
& SUFFIX_ALWAYS
)
3962 if (sizeflag
& SUFFIX_ALWAYS
)
3964 if (rex
& REX_MODE64
)
3968 if (sizeflag
& DFLAG
)
3972 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3977 if (prefixes
& PREFIX_DATA
)
3981 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3986 if (rex
& REX_MODE64
)
3988 USED_REX (REX_MODE64
);
3992 /* implicit operand size 'l' for i386 or 'q' for x86-64 */
3994 /* operand size flag for cwtl, cbtw */
3995 USED_REX (REX_MODE64
);
3996 if (rex
& REX_MODE64
)
4003 else if (sizeflag
& DFLAG
)
4007 if (!(rex
& REX_MODE64
))
4008 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4018 oappend (const char *s
)
4021 obufp
+= strlen (s
);
4027 if (prefixes
& PREFIX_CS
)
4029 used_prefixes
|= PREFIX_CS
;
4030 oappend ("%cs:" + intel_syntax
);
4032 if (prefixes
& PREFIX_DS
)
4034 used_prefixes
|= PREFIX_DS
;
4035 oappend ("%ds:" + intel_syntax
);
4037 if (prefixes
& PREFIX_SS
)
4039 used_prefixes
|= PREFIX_SS
;
4040 oappend ("%ss:" + intel_syntax
);
4042 if (prefixes
& PREFIX_ES
)
4044 used_prefixes
|= PREFIX_ES
;
4045 oappend ("%es:" + intel_syntax
);
4047 if (prefixes
& PREFIX_FS
)
4049 used_prefixes
|= PREFIX_FS
;
4050 oappend ("%fs:" + intel_syntax
);
4052 if (prefixes
& PREFIX_GS
)
4054 used_prefixes
|= PREFIX_GS
;
4055 oappend ("%gs:" + intel_syntax
);
4060 OP_indirE (int bytemode
, int sizeflag
)
4064 OP_E (bytemode
, sizeflag
);
4068 print_operand_value (char *buf
, int hex
, bfd_vma disp
)
4070 if (address_mode
== mode_64bit
)
4078 sprintf_vma (tmp
, disp
);
4079 for (i
= 0; tmp
[i
] == '0' && tmp
[i
+ 1]; i
++);
4080 strcpy (buf
+ 2, tmp
+ i
);
4084 bfd_signed_vma v
= disp
;
4091 /* Check for possible overflow on 0x8000000000000000. */
4094 strcpy (buf
, "9223372036854775808");
4108 tmp
[28 - i
] = (v
% 10) + '0';
4112 strcpy (buf
, tmp
+ 29 - i
);
4118 sprintf (buf
, "0x%x", (unsigned int) disp
);
4120 sprintf (buf
, "%d", (int) disp
);
4125 intel_operand_size (int bytemode
, int sizeflag
)
4130 oappend ("BYTE PTR ");
4134 oappend ("WORD PTR ");
4137 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
4139 oappend ("QWORD PTR ");
4140 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4146 USED_REX (REX_MODE64
);
4147 if (rex
& REX_MODE64
)
4148 oappend ("QWORD PTR ");
4149 else if ((sizeflag
& DFLAG
) || bytemode
== dq_mode
)
4150 oappend ("DWORD PTR ");
4152 oappend ("WORD PTR ");
4153 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4156 if ((rex
& REX_MODE64
) || (sizeflag
& DFLAG
))
4158 oappend ("WORD PTR ");
4159 if (!(rex
& REX_MODE64
))
4160 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4163 oappend ("DWORD PTR ");
4166 oappend ("QWORD PTR ");
4169 if (address_mode
== mode_64bit
)
4170 oappend ("QWORD PTR ");
4172 oappend ("DWORD PTR ");
4175 if (sizeflag
& DFLAG
)
4176 oappend ("FWORD PTR ");
4178 oappend ("DWORD PTR ");
4179 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4182 oappend ("TBYTE PTR ");
4185 oappend ("XMMWORD PTR ");
4188 oappend ("OWORD PTR ");
4196 OP_E (int bytemode
, int sizeflag
)
4201 USED_REX (REX_EXTZ
);
4205 /* Skip mod/rm byte. */
4216 oappend (names8rex
[rm
+ add
]);
4218 oappend (names8
[rm
+ add
]);
4221 oappend (names16
[rm
+ add
]);
4224 oappend (names32
[rm
+ add
]);
4227 oappend (names64
[rm
+ add
]);
4230 if (address_mode
== mode_64bit
)
4231 oappend (names64
[rm
+ add
]);
4233 oappend (names32
[rm
+ add
]);
4236 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
4238 oappend (names64
[rm
+ add
]);
4239 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4247 USED_REX (REX_MODE64
);
4248 if (rex
& REX_MODE64
)
4249 oappend (names64
[rm
+ add
]);
4250 else if ((sizeflag
& DFLAG
) || bytemode
!= v_mode
)
4251 oappend (names32
[rm
+ add
]);
4253 oappend (names16
[rm
+ add
]);
4254 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4259 oappend (INTERNAL_DISASSEMBLER_ERROR
);
4267 intel_operand_size (bytemode
, sizeflag
);
4270 if ((sizeflag
& AFLAG
) || address_mode
== mode_64bit
) /* 32 bit address mode */
4285 FETCH_DATA (the_info
, codep
+ 1);
4286 index
= (*codep
>> 3) & 7;
4287 if (address_mode
== mode_64bit
|| index
!= 0x4)
4288 /* When INDEX == 0x4 in 32 bit mode, SCALE is ignored. */
4289 scale
= (*codep
>> 6) & 3;
4291 USED_REX (REX_EXTY
);
4301 if ((base
& 7) == 5)
4304 if (address_mode
== mode_64bit
&& !havesib
)
4310 FETCH_DATA (the_info
, codep
+ 1);
4312 if ((disp
& 0x80) != 0)
4321 if (mod
!= 0 || (base
& 7) == 5)
4323 print_operand_value (scratchbuf
, !riprel
, disp
);
4324 oappend (scratchbuf
);
4332 if (havebase
|| (havesib
&& (index
!= 4 || scale
!= 0)))
4334 *obufp
++ = open_char
;
4335 if (intel_syntax
&& riprel
)
4339 oappend (address_mode
== mode_64bit
&& (sizeflag
& AFLAG
)
4340 ? names64
[base
] : names32
[base
]);
4345 if (!intel_syntax
|| havebase
)
4347 *obufp
++ = separator_char
;
4350 oappend (address_mode
== mode_64bit
&& (sizeflag
& AFLAG
)
4351 ? names64
[index
] : names32
[index
]);
4353 if (scale
!= 0 || (!intel_syntax
&& index
!= 4))
4355 *obufp
++ = scale_char
;
4357 sprintf (scratchbuf
, "%d", 1 << scale
);
4358 oappend (scratchbuf
);
4361 if (intel_syntax
&& disp
)
4363 if ((bfd_signed_vma
) disp
> 0)
4372 disp
= - (bfd_signed_vma
) disp
;
4375 print_operand_value (scratchbuf
, mod
!= 1, disp
);
4376 oappend (scratchbuf
);
4379 *obufp
++ = close_char
;
4382 else if (intel_syntax
)
4384 if (mod
!= 0 || (base
& 7) == 5)
4386 if (prefixes
& (PREFIX_CS
| PREFIX_SS
| PREFIX_DS
4387 | PREFIX_ES
| PREFIX_FS
| PREFIX_GS
))
4391 oappend (names_seg
[ds_reg
- es_reg
]);
4394 print_operand_value (scratchbuf
, 1, disp
);
4395 oappend (scratchbuf
);
4400 { /* 16 bit address mode */
4407 if ((disp
& 0x8000) != 0)
4412 FETCH_DATA (the_info
, codep
+ 1);
4414 if ((disp
& 0x80) != 0)
4419 if ((disp
& 0x8000) != 0)
4425 if (mod
!= 0 || rm
== 6)
4427 print_operand_value (scratchbuf
, 0, disp
);
4428 oappend (scratchbuf
);
4431 if (mod
!= 0 || rm
!= 6)
4433 *obufp
++ = open_char
;
4435 oappend (index16
[rm
]);
4436 if (intel_syntax
&& disp
)
4438 if ((bfd_signed_vma
) disp
> 0)
4447 disp
= - (bfd_signed_vma
) disp
;
4450 print_operand_value (scratchbuf
, mod
!= 1, disp
);
4451 oappend (scratchbuf
);
4454 *obufp
++ = close_char
;
4457 else if (intel_syntax
)
4459 if (prefixes
& (PREFIX_CS
| PREFIX_SS
| PREFIX_DS
4460 | PREFIX_ES
| PREFIX_FS
| PREFIX_GS
))
4464 oappend (names_seg
[ds_reg
- es_reg
]);
4467 print_operand_value (scratchbuf
, 1, disp
& 0xffff);
4468 oappend (scratchbuf
);
4474 OP_G (int bytemode
, int sizeflag
)
4477 USED_REX (REX_EXTX
);
4485 oappend (names8rex
[reg
+ add
]);
4487 oappend (names8
[reg
+ add
]);
4490 oappend (names16
[reg
+ add
]);
4493 oappend (names32
[reg
+ add
]);
4496 oappend (names64
[reg
+ add
]);
4501 USED_REX (REX_MODE64
);
4502 if (rex
& REX_MODE64
)
4503 oappend (names64
[reg
+ add
]);
4504 else if ((sizeflag
& DFLAG
) || bytemode
!= v_mode
)
4505 oappend (names32
[reg
+ add
]);
4507 oappend (names16
[reg
+ add
]);
4508 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4511 if (address_mode
== mode_64bit
)
4512 oappend (names64
[reg
+ add
]);
4514 oappend (names32
[reg
+ add
]);
4517 oappend (INTERNAL_DISASSEMBLER_ERROR
);
4530 FETCH_DATA (the_info
, codep
+ 8);
4531 a
= *codep
++ & 0xff;
4532 a
|= (*codep
++ & 0xff) << 8;
4533 a
|= (*codep
++ & 0xff) << 16;
4534 a
|= (*codep
++ & 0xff) << 24;
4535 b
= *codep
++ & 0xff;
4536 b
|= (*codep
++ & 0xff) << 8;
4537 b
|= (*codep
++ & 0xff) << 16;
4538 b
|= (*codep
++ & 0xff) << 24;
4539 x
= a
+ ((bfd_vma
) b
<< 32);
4547 static bfd_signed_vma
4550 bfd_signed_vma x
= 0;
4552 FETCH_DATA (the_info
, codep
+ 4);
4553 x
= *codep
++ & (bfd_signed_vma
) 0xff;
4554 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 8;
4555 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 16;
4556 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 24;
4560 static bfd_signed_vma
4563 bfd_signed_vma x
= 0;
4565 FETCH_DATA (the_info
, codep
+ 4);
4566 x
= *codep
++ & (bfd_signed_vma
) 0xff;
4567 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 8;
4568 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 16;
4569 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 24;
4571 x
= (x
^ ((bfd_signed_vma
) 1 << 31)) - ((bfd_signed_vma
) 1 << 31);
4581 FETCH_DATA (the_info
, codep
+ 2);
4582 x
= *codep
++ & 0xff;
4583 x
|= (*codep
++ & 0xff) << 8;
4588 set_op (bfd_vma op
, int riprel
)
4590 op_index
[op_ad
] = op_ad
;
4591 if (address_mode
== mode_64bit
)
4593 op_address
[op_ad
] = op
;
4594 op_riprel
[op_ad
] = riprel
;
4598 /* Mask to get a 32-bit address. */
4599 op_address
[op_ad
] = op
& 0xffffffff;
4600 op_riprel
[op_ad
] = riprel
& 0xffffffff;
4605 OP_REG (int code
, int sizeflag
)
4609 USED_REX (REX_EXTZ
);
4615 case ax_reg
: case cx_reg
: case dx_reg
: case bx_reg
:
4616 case sp_reg
: case bp_reg
: case si_reg
: case di_reg
:
4617 s
= names16
[code
- ax_reg
+ add
];
4619 case es_reg
: case ss_reg
: case cs_reg
:
4620 case ds_reg
: case fs_reg
: case gs_reg
:
4621 s
= names_seg
[code
- es_reg
+ add
];
4623 case al_reg
: case ah_reg
: case cl_reg
: case ch_reg
:
4624 case dl_reg
: case dh_reg
: case bl_reg
: case bh_reg
:
4627 s
= names8rex
[code
- al_reg
+ add
];
4629 s
= names8
[code
- al_reg
];
4631 case rAX_reg
: case rCX_reg
: case rDX_reg
: case rBX_reg
:
4632 case rSP_reg
: case rBP_reg
: case rSI_reg
: case rDI_reg
:
4633 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
4635 s
= names64
[code
- rAX_reg
+ add
];
4638 code
+= eAX_reg
- rAX_reg
;
4640 case eAX_reg
: case eCX_reg
: case eDX_reg
: case eBX_reg
:
4641 case eSP_reg
: case eBP_reg
: case eSI_reg
: case eDI_reg
:
4642 USED_REX (REX_MODE64
);
4643 if (rex
& REX_MODE64
)
4644 s
= names64
[code
- eAX_reg
+ add
];
4645 else if (sizeflag
& DFLAG
)
4646 s
= names32
[code
- eAX_reg
+ add
];
4648 s
= names16
[code
- eAX_reg
+ add
];
4649 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4652 s
= INTERNAL_DISASSEMBLER_ERROR
;
4659 OP_IMREG (int code
, int sizeflag
)
4671 case ax_reg
: case cx_reg
: case dx_reg
: case bx_reg
:
4672 case sp_reg
: case bp_reg
: case si_reg
: case di_reg
:
4673 s
= names16
[code
- ax_reg
];
4675 case es_reg
: case ss_reg
: case cs_reg
:
4676 case ds_reg
: case fs_reg
: case gs_reg
:
4677 s
= names_seg
[code
- es_reg
];
4679 case al_reg
: case ah_reg
: case cl_reg
: case ch_reg
:
4680 case dl_reg
: case dh_reg
: case bl_reg
: case bh_reg
:
4683 s
= names8rex
[code
- al_reg
];
4685 s
= names8
[code
- al_reg
];
4687 case eAX_reg
: case eCX_reg
: case eDX_reg
: case eBX_reg
:
4688 case eSP_reg
: case eBP_reg
: case eSI_reg
: case eDI_reg
:
4689 USED_REX (REX_MODE64
);
4690 if (rex
& REX_MODE64
)
4691 s
= names64
[code
- eAX_reg
];
4692 else if (sizeflag
& DFLAG
)
4693 s
= names32
[code
- eAX_reg
];
4695 s
= names16
[code
- eAX_reg
];
4696 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4699 if ((rex
& REX_MODE64
) || (sizeflag
& DFLAG
))
4703 if (!(rex
& REX_MODE64
))
4704 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4707 s
= INTERNAL_DISASSEMBLER_ERROR
;
4714 OP_I (int bytemode
, int sizeflag
)
4717 bfd_signed_vma mask
= -1;
4722 FETCH_DATA (the_info
, codep
+ 1);
4727 if (address_mode
== mode_64bit
)
4734 USED_REX (REX_MODE64
);
4735 if (rex
& REX_MODE64
)
4737 else if (sizeflag
& DFLAG
)
4747 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4758 oappend (INTERNAL_DISASSEMBLER_ERROR
);
4763 scratchbuf
[0] = '$';
4764 print_operand_value (scratchbuf
+ 1, 1, op
);
4765 oappend (scratchbuf
+ intel_syntax
);
4766 scratchbuf
[0] = '\0';
4770 OP_I64 (int bytemode
, int sizeflag
)
4773 bfd_signed_vma mask
= -1;
4775 if (address_mode
!= mode_64bit
)
4777 OP_I (bytemode
, sizeflag
);
4784 FETCH_DATA (the_info
, codep
+ 1);
4789 USED_REX (REX_MODE64
);
4790 if (rex
& REX_MODE64
)
4792 else if (sizeflag
& DFLAG
)
4802 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4809 oappend (INTERNAL_DISASSEMBLER_ERROR
);
4814 scratchbuf
[0] = '$';
4815 print_operand_value (scratchbuf
+ 1, 1, op
);
4816 oappend (scratchbuf
+ intel_syntax
);
4817 scratchbuf
[0] = '\0';
4821 OP_sI (int bytemode
, int sizeflag
)
4824 bfd_signed_vma mask
= -1;
4829 FETCH_DATA (the_info
, codep
+ 1);
4831 if ((op
& 0x80) != 0)
4836 USED_REX (REX_MODE64
);
4837 if (rex
& REX_MODE64
)
4839 else if (sizeflag
& DFLAG
)
4848 if ((op
& 0x8000) != 0)
4851 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4856 if ((op
& 0x8000) != 0)
4860 oappend (INTERNAL_DISASSEMBLER_ERROR
);
4864 scratchbuf
[0] = '$';
4865 print_operand_value (scratchbuf
+ 1, 1, op
);
4866 oappend (scratchbuf
+ intel_syntax
);
4870 OP_J (int bytemode
, int sizeflag
)
4878 FETCH_DATA (the_info
, codep
+ 1);
4880 if ((disp
& 0x80) != 0)
4884 if ((sizeflag
& DFLAG
) || (rex
& REX_MODE64
))
4889 /* For some reason, a data16 prefix on a jump instruction
4890 means that the pc is masked to 16 bits after the
4891 displacement is added! */
4894 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4897 oappend (INTERNAL_DISASSEMBLER_ERROR
);
4900 disp
= (start_pc
+ codep
- start_codep
+ disp
) & mask
;
4902 print_operand_value (scratchbuf
, 1, disp
);
4903 oappend (scratchbuf
);
4907 OP_SEG (int bytemode
, int sizeflag
)
4909 if (bytemode
== w_mode
)
4910 oappend (names_seg
[reg
]);
4912 OP_E (mod
== 3 ? bytemode
: w_mode
, sizeflag
);
4916 OP_DIR (int dummy ATTRIBUTE_UNUSED
, int sizeflag
)
4920 if (sizeflag
& DFLAG
)
4930 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4932 sprintf (scratchbuf
, "0x%x:0x%x", seg
, offset
);
4934 sprintf (scratchbuf
, "$0x%x,$0x%x", seg
, offset
);
4935 oappend (scratchbuf
);
4939 OP_OFF (int bytemode
, int sizeflag
)
4943 if (intel_syntax
&& (sizeflag
& SUFFIX_ALWAYS
))
4944 intel_operand_size (bytemode
, sizeflag
);
4947 if ((sizeflag
& AFLAG
) || address_mode
== mode_64bit
)
4954 if (!(prefixes
& (PREFIX_CS
| PREFIX_SS
| PREFIX_DS
4955 | PREFIX_ES
| PREFIX_FS
| PREFIX_GS
)))
4957 oappend (names_seg
[ds_reg
- es_reg
]);
4961 print_operand_value (scratchbuf
, 1, off
);
4962 oappend (scratchbuf
);
4966 OP_OFF64 (int bytemode
, int sizeflag
)
4970 if (address_mode
!= mode_64bit
4971 || (prefixes
& PREFIX_ADDR
))
4973 OP_OFF (bytemode
, sizeflag
);
4977 if (intel_syntax
&& (sizeflag
& SUFFIX_ALWAYS
))
4978 intel_operand_size (bytemode
, sizeflag
);
4985 if (!(prefixes
& (PREFIX_CS
| PREFIX_SS
| PREFIX_DS
4986 | PREFIX_ES
| PREFIX_FS
| PREFIX_GS
)))
4988 oappend (names_seg
[ds_reg
- es_reg
]);
4992 print_operand_value (scratchbuf
, 1, off
);
4993 oappend (scratchbuf
);
4997 ptr_reg (int code
, int sizeflag
)
5001 *obufp
++ = open_char
;
5002 used_prefixes
|= (prefixes
& PREFIX_ADDR
);
5003 if (address_mode
== mode_64bit
)
5005 if (!(sizeflag
& AFLAG
))
5006 s
= names32
[code
- eAX_reg
];
5008 s
= names64
[code
- eAX_reg
];
5010 else if (sizeflag
& AFLAG
)
5011 s
= names32
[code
- eAX_reg
];
5013 s
= names16
[code
- eAX_reg
];
5015 *obufp
++ = close_char
;
5020 OP_ESreg (int code
, int sizeflag
)
5026 case 0x6d: /* insw/insl */
5027 intel_operand_size (z_mode
, sizeflag
);
5029 case 0xa5: /* movsw/movsl/movsq */
5030 case 0xa7: /* cmpsw/cmpsl/cmpsq */
5031 case 0xab: /* stosw/stosl */
5032 case 0xaf: /* scasw/scasl */
5033 intel_operand_size (v_mode
, sizeflag
);
5036 intel_operand_size (b_mode
, sizeflag
);
5039 oappend ("%es:" + intel_syntax
);
5040 ptr_reg (code
, sizeflag
);
5044 OP_DSreg (int code
, int sizeflag
)
5050 case 0x6f: /* outsw/outsl */
5051 intel_operand_size (z_mode
, sizeflag
);
5053 case 0xa5: /* movsw/movsl/movsq */
5054 case 0xa7: /* cmpsw/cmpsl/cmpsq */
5055 case 0xad: /* lodsw/lodsl/lodsq */
5056 intel_operand_size (v_mode
, sizeflag
);
5059 intel_operand_size (b_mode
, sizeflag
);
5069 prefixes
|= PREFIX_DS
;
5071 ptr_reg (code
, sizeflag
);
5075 OP_C (int dummy ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
5080 USED_REX (REX_EXTX
);
5083 else if (address_mode
!= mode_64bit
&& (prefixes
& PREFIX_LOCK
))
5085 used_prefixes
|= PREFIX_LOCK
;
5088 sprintf (scratchbuf
, "%%cr%d", reg
+ add
);
5089 oappend (scratchbuf
+ intel_syntax
);
5093 OP_D (int dummy ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
5096 USED_REX (REX_EXTX
);
5100 sprintf (scratchbuf
, "db%d", reg
+ add
);
5102 sprintf (scratchbuf
, "%%db%d", reg
+ add
);
5103 oappend (scratchbuf
);
5107 OP_T (int dummy ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
5109 sprintf (scratchbuf
, "%%tr%d", reg
);
5110 oappend (scratchbuf
+ intel_syntax
);
5114 OP_Rd (int bytemode
, int sizeflag
)
5117 OP_E (bytemode
, sizeflag
);
5123 OP_MMX (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
5125 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5126 if (prefixes
& PREFIX_DATA
)
5129 USED_REX (REX_EXTX
);
5132 sprintf (scratchbuf
, "%%xmm%d", reg
+ add
);
5135 sprintf (scratchbuf
, "%%mm%d", reg
);
5136 oappend (scratchbuf
+ intel_syntax
);
5140 OP_XMM (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
5143 USED_REX (REX_EXTX
);
5146 sprintf (scratchbuf
, "%%xmm%d", reg
+ add
);
5147 oappend (scratchbuf
+ intel_syntax
);
5151 OP_EM (int bytemode
, int sizeflag
)
5155 if (intel_syntax
&& bytemode
== v_mode
)
5157 bytemode
= (prefixes
& PREFIX_DATA
) ? x_mode
: q_mode
;
5158 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5160 OP_E (bytemode
, sizeflag
);
5164 /* Skip mod/rm byte. */
5167 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5168 if (prefixes
& PREFIX_DATA
)
5172 USED_REX (REX_EXTZ
);
5175 sprintf (scratchbuf
, "%%xmm%d", rm
+ add
);
5178 sprintf (scratchbuf
, "%%mm%d", rm
);
5179 oappend (scratchbuf
+ intel_syntax
);
5182 /* cvt* are the only instructions in sse2 which have
5183 both SSE and MMX operands and also have 0x66 prefix
5184 in their opcode. 0x66 was originally used to differentiate
5185 between SSE and MMX instruction(operands). So we have to handle the
5186 cvt* separately using OP_EMC and OP_MXC */
5188 OP_EMC (int bytemode
, int sizeflag
)
5192 if (intel_syntax
&& bytemode
== v_mode
)
5194 bytemode
= (prefixes
& PREFIX_DATA
) ? x_mode
: q_mode
;
5195 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5197 OP_E (bytemode
, sizeflag
);
5201 /* Skip mod/rm byte. */
5204 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5205 sprintf (scratchbuf
, "%%mm%d", rm
);
5206 oappend (scratchbuf
+ intel_syntax
);
5210 OP_MXC (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
5212 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5213 sprintf (scratchbuf
, "%%mm%d", reg
);
5214 oappend (scratchbuf
+ intel_syntax
);
5218 OP_EX (int bytemode
, int sizeflag
)
5223 if (intel_syntax
&& bytemode
== v_mode
)
5225 switch (prefixes
& (PREFIX_DATA
|PREFIX_REPZ
|PREFIX_REPNZ
))
5227 case 0: bytemode
= x_mode
; break;
5228 case PREFIX_REPZ
: bytemode
= d_mode
; used_prefixes
|= PREFIX_REPZ
; break;
5229 case PREFIX_DATA
: bytemode
= x_mode
; used_prefixes
|= PREFIX_DATA
; break;
5230 case PREFIX_REPNZ
: bytemode
= q_mode
; used_prefixes
|= PREFIX_REPNZ
; break;
5231 default: bytemode
= 0; break;
5234 OP_E (bytemode
, sizeflag
);
5237 USED_REX (REX_EXTZ
);
5241 /* Skip mod/rm byte. */
5244 sprintf (scratchbuf
, "%%xmm%d", rm
+ add
);
5245 oappend (scratchbuf
+ intel_syntax
);
5249 OP_MS (int bytemode
, int sizeflag
)
5252 OP_EM (bytemode
, sizeflag
);
5258 OP_XS (int bytemode
, int sizeflag
)
5261 OP_EX (bytemode
, sizeflag
);
5267 OP_M (int bytemode
, int sizeflag
)
5270 /* bad bound,lea,lds,les,lfs,lgs,lss,cmpxchg8b,vmptrst modrm */
5273 OP_E (bytemode
, sizeflag
);
5277 OP_0f07 (int bytemode
, int sizeflag
)
5279 if (mod
!= 3 || rm
!= 0)
5282 OP_E (bytemode
, sizeflag
);
5286 OP_0fae (int bytemode
, int sizeflag
)
5291 strcpy (obuf
+ strlen (obuf
) - sizeof ("clflush") + 1, "sfence");
5293 if (reg
< 5 || rm
!= 0)
5295 BadOp (); /* bad sfence, mfence, or lfence */
5301 BadOp (); /* bad clflush */
5305 OP_E (bytemode
, sizeflag
);
5308 /* NOP is an alias of "xchg %ax,%ax" in 16bit mode, "xchg %eax,%eax" in
5309 32bit mode and "xchg %rax,%rax" in 64bit mode. NOP with REPZ prefix
5310 is called PAUSE. We display "xchg %ax,%ax" instead of "data16 nop".
5314 NOP_Fixup1 (int bytemode
, int sizeflag
)
5316 if (prefixes
== PREFIX_REPZ
)
5317 strcpy (obuf
, "pause");
5318 else if (prefixes
== PREFIX_DATA
5319 || ((rex
& REX_MODE64
) && rex
!= 0x48))
5320 OP_REG (bytemode
, sizeflag
);
5322 strcpy (obuf
, "nop");
5326 NOP_Fixup2 (int bytemode
, int sizeflag
)
5328 if (prefixes
== PREFIX_DATA
5329 || ((rex
& REX_MODE64
) && rex
!= 0x48))
5330 OP_IMREG (bytemode
, sizeflag
);
5333 static const char *const Suffix3DNow
[] = {
5334 /* 00 */ NULL
, NULL
, NULL
, NULL
,
5335 /* 04 */ NULL
, NULL
, NULL
, NULL
,
5336 /* 08 */ NULL
, NULL
, NULL
, NULL
,
5337 /* 0C */ "pi2fw", "pi2fd", NULL
, NULL
,
5338 /* 10 */ NULL
, NULL
, NULL
, NULL
,
5339 /* 14 */ NULL
, NULL
, NULL
, NULL
,
5340 /* 18 */ NULL
, NULL
, NULL
, NULL
,
5341 /* 1C */ "pf2iw", "pf2id", NULL
, NULL
,
5342 /* 20 */ NULL
, NULL
, NULL
, NULL
,
5343 /* 24 */ NULL
, NULL
, NULL
, NULL
,
5344 /* 28 */ NULL
, NULL
, NULL
, NULL
,
5345 /* 2C */ NULL
, NULL
, NULL
, NULL
,
5346 /* 30 */ NULL
, NULL
, NULL
, NULL
,
5347 /* 34 */ NULL
, NULL
, NULL
, NULL
,
5348 /* 38 */ NULL
, NULL
, NULL
, NULL
,
5349 /* 3C */ NULL
, NULL
, NULL
, NULL
,
5350 /* 40 */ NULL
, NULL
, NULL
, NULL
,
5351 /* 44 */ NULL
, NULL
, NULL
, NULL
,
5352 /* 48 */ NULL
, NULL
, NULL
, NULL
,
5353 /* 4C */ NULL
, NULL
, NULL
, NULL
,
5354 /* 50 */ NULL
, NULL
, NULL
, NULL
,
5355 /* 54 */ NULL
, NULL
, NULL
, NULL
,
5356 /* 58 */ NULL
, NULL
, NULL
, NULL
,
5357 /* 5C */ NULL
, NULL
, NULL
, NULL
,
5358 /* 60 */ NULL
, NULL
, NULL
, NULL
,
5359 /* 64 */ NULL
, NULL
, NULL
, NULL
,
5360 /* 68 */ NULL
, NULL
, NULL
, NULL
,
5361 /* 6C */ NULL
, NULL
, NULL
, NULL
,
5362 /* 70 */ NULL
, NULL
, NULL
, NULL
,
5363 /* 74 */ NULL
, NULL
, NULL
, NULL
,
5364 /* 78 */ NULL
, NULL
, NULL
, NULL
,
5365 /* 7C */ NULL
, NULL
, NULL
, NULL
,
5366 /* 80 */ NULL
, NULL
, NULL
, NULL
,
5367 /* 84 */ NULL
, NULL
, NULL
, NULL
,
5368 /* 88 */ NULL
, NULL
, "pfnacc", NULL
,
5369 /* 8C */ NULL
, NULL
, "pfpnacc", NULL
,
5370 /* 90 */ "pfcmpge", NULL
, NULL
, NULL
,
5371 /* 94 */ "pfmin", NULL
, "pfrcp", "pfrsqrt",
5372 /* 98 */ NULL
, NULL
, "pfsub", NULL
,
5373 /* 9C */ NULL
, NULL
, "pfadd", NULL
,
5374 /* A0 */ "pfcmpgt", NULL
, NULL
, NULL
,
5375 /* A4 */ "pfmax", NULL
, "pfrcpit1", "pfrsqit1",
5376 /* A8 */ NULL
, NULL
, "pfsubr", NULL
,
5377 /* AC */ NULL
, NULL
, "pfacc", NULL
,
5378 /* B0 */ "pfcmpeq", NULL
, NULL
, NULL
,
5379 /* B4 */ "pfmul", NULL
, "pfrcpit2", "pfmulhrw",
5380 /* B8 */ NULL
, NULL
, NULL
, "pswapd",
5381 /* BC */ NULL
, NULL
, NULL
, "pavgusb",
5382 /* C0 */ NULL
, NULL
, NULL
, NULL
,
5383 /* C4 */ NULL
, NULL
, NULL
, NULL
,
5384 /* C8 */ NULL
, NULL
, NULL
, NULL
,
5385 /* CC */ NULL
, NULL
, NULL
, NULL
,
5386 /* D0 */ NULL
, NULL
, NULL
, NULL
,
5387 /* D4 */ NULL
, NULL
, NULL
, NULL
,
5388 /* D8 */ NULL
, NULL
, NULL
, NULL
,
5389 /* DC */ NULL
, NULL
, NULL
, NULL
,
5390 /* E0 */ NULL
, NULL
, NULL
, NULL
,
5391 /* E4 */ NULL
, NULL
, NULL
, NULL
,
5392 /* E8 */ NULL
, NULL
, NULL
, NULL
,
5393 /* EC */ NULL
, NULL
, NULL
, NULL
,
5394 /* F0 */ NULL
, NULL
, NULL
, NULL
,
5395 /* F4 */ NULL
, NULL
, NULL
, NULL
,
5396 /* F8 */ NULL
, NULL
, NULL
, NULL
,
5397 /* FC */ NULL
, NULL
, NULL
, NULL
,
5401 OP_3DNowSuffix (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
5403 const char *mnemonic
;
5405 FETCH_DATA (the_info
, codep
+ 1);
5406 /* AMD 3DNow! instructions are specified by an opcode suffix in the
5407 place where an 8-bit immediate would normally go. ie. the last
5408 byte of the instruction. */
5409 obufp
= obuf
+ strlen (obuf
);
5410 mnemonic
= Suffix3DNow
[*codep
++ & 0xff];
5415 /* Since a variable sized modrm/sib chunk is between the start
5416 of the opcode (0x0f0f) and the opcode suffix, we need to do
5417 all the modrm processing first, and don't know until now that
5418 we have a bad opcode. This necessitates some cleaning up. */
5425 static const char *simd_cmp_op
[] = {
5437 OP_SIMD_Suffix (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
5439 unsigned int cmp_type
;
5441 FETCH_DATA (the_info
, codep
+ 1);
5442 obufp
= obuf
+ strlen (obuf
);
5443 cmp_type
= *codep
++ & 0xff;
5446 char suffix1
= 'p', suffix2
= 's';
5447 used_prefixes
|= (prefixes
& PREFIX_REPZ
);
5448 if (prefixes
& PREFIX_REPZ
)
5452 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5453 if (prefixes
& PREFIX_DATA
)
5457 used_prefixes
|= (prefixes
& PREFIX_REPNZ
);
5458 if (prefixes
& PREFIX_REPNZ
)
5459 suffix1
= 's', suffix2
= 'd';
5462 sprintf (scratchbuf
, "cmp%s%c%c",
5463 simd_cmp_op
[cmp_type
], suffix1
, suffix2
);
5464 used_prefixes
|= (prefixes
& PREFIX_REPZ
);
5465 oappend (scratchbuf
);
5469 /* We have a bad extension byte. Clean up. */
5477 SIMD_Fixup (int extrachar
, int sizeflag ATTRIBUTE_UNUSED
)
5479 /* Change movlps/movhps to movhlps/movlhps for 2 register operand
5480 forms of these instructions. */
5483 char *p
= obuf
+ strlen (obuf
);
5486 *(p
- 1) = *(p
- 2);
5487 *(p
- 2) = *(p
- 3);
5488 *(p
- 3) = extrachar
;
5493 PNI_Fixup (int extrachar ATTRIBUTE_UNUSED
, int sizeflag
)
5495 if (mod
== 3 && reg
== 1 && rm
<= 1)
5497 /* Override "sidt". */
5498 size_t olen
= strlen (obuf
);
5499 char *p
= obuf
+ olen
- 4;
5500 const char **names
= (address_mode
== mode_64bit
5501 ? names64
: names32
);
5503 /* We might have a suffix when disassembling with -Msuffix. */
5507 /* Remove "addr16/addr32" if we aren't in Intel mode. */
5509 && (prefixes
& PREFIX_ADDR
)
5512 && CONST_STRNEQ (p
- 7, "addr")
5513 && (CONST_STRNEQ (p
- 3, "16")
5514 || CONST_STRNEQ (p
- 3, "32")))
5519 /* mwait %eax,%ecx */
5520 strcpy (p
, "mwait");
5522 strcpy (op1out
, names
[0]);
5526 /* monitor %eax,%ecx,%edx" */
5527 strcpy (p
, "monitor");
5530 const char **op1_names
;
5531 if (!(prefixes
& PREFIX_ADDR
))
5532 op1_names
= (address_mode
== mode_16bit
5536 op1_names
= (address_mode
!= mode_32bit
5537 ? names32
: names16
);
5538 used_prefixes
|= PREFIX_ADDR
;
5540 strcpy (op1out
, op1_names
[0]);
5541 strcpy (op3out
, names
[2]);
5546 strcpy (op2out
, names
[1]);
5557 SVME_Fixup (int bytemode
, int sizeflag
)
5589 OP_M (bytemode
, sizeflag
);
5592 /* Override "lidt". */
5593 p
= obuf
+ strlen (obuf
) - 4;
5594 /* We might have a suffix. */
5598 if (!(prefixes
& PREFIX_ADDR
))
5603 used_prefixes
|= PREFIX_ADDR
;
5607 strcpy (op2out
, names32
[1]);
5613 *obufp
++ = open_char
;
5614 if (address_mode
== mode_64bit
|| (sizeflag
& AFLAG
))
5618 strcpy (obufp
, alt
);
5619 obufp
+= strlen (alt
);
5620 *obufp
++ = close_char
;
5627 INVLPG_Fixup (int bytemode
, int sizeflag
)
5640 OP_M (bytemode
, sizeflag
);
5643 /* Override "invlpg". */
5644 strcpy (obuf
+ strlen (obuf
) - 6, alt
);
5651 /* Throw away prefixes and 1st. opcode byte. */
5652 codep
= insn_codep
+ 1;
5657 VMX_Fixup (int extrachar ATTRIBUTE_UNUSED
, int sizeflag
)
5659 if (mod
== 3 && reg
== 0 && rm
>=1 && rm
<= 4)
5661 /* Override "sgdt". */
5662 char *p
= obuf
+ strlen (obuf
) - 4;
5664 /* We might have a suffix when disassembling with -Msuffix. */
5671 strcpy (p
, "vmcall");
5674 strcpy (p
, "vmlaunch");
5677 strcpy (p
, "vmresume");
5680 strcpy (p
, "vmxoff");
5691 OP_VMX (int bytemode
, int sizeflag
)
5693 used_prefixes
|= (prefixes
& (PREFIX_DATA
| PREFIX_REPZ
));
5694 if (prefixes
& PREFIX_DATA
)
5695 strcpy (obuf
, "vmclear");
5696 else if (prefixes
& PREFIX_REPZ
)
5697 strcpy (obuf
, "vmxon");
5699 strcpy (obuf
, "vmptrld");
5700 OP_E (bytemode
, sizeflag
);
5704 REP_Fixup (int bytemode
, int sizeflag
)
5706 /* The 0xf3 prefix should be displayed as "rep" for ins, outs, movs,
5710 if (prefixes
& PREFIX_REPZ
)
5711 switch (*insn_codep
)
5713 case 0x6e: /* outsb */
5714 case 0x6f: /* outsw/outsl */
5715 case 0xa4: /* movsb */
5716 case 0xa5: /* movsw/movsl/movsq */
5722 case 0xaa: /* stosb */
5723 case 0xab: /* stosw/stosl/stosq */
5724 case 0xac: /* lodsb */
5725 case 0xad: /* lodsw/lodsl/lodsq */
5726 if (!intel_syntax
&& (sizeflag
& SUFFIX_ALWAYS
))
5731 case 0x6c: /* insb */
5732 case 0x6d: /* insl/insw */
5748 olen
= strlen (obuf
);
5749 p
= obuf
+ olen
- ilen
- 1 - 4;
5750 /* Handle "repz [addr16|addr32]". */
5751 if ((prefixes
& PREFIX_ADDR
))
5754 memmove (p
+ 3, p
+ 4, olen
- (p
+ 3 - obuf
));
5762 OP_IMREG (bytemode
, sizeflag
);
5765 OP_ESreg (bytemode
, sizeflag
);
5768 OP_DSreg (bytemode
, sizeflag
);
5777 CMPXCHG8B_Fixup (int bytemode
, int sizeflag
)
5779 USED_REX (REX_MODE64
);
5780 if (rex
& REX_MODE64
)
5782 /* Change cmpxchg8b to cmpxchg16b. */
5783 char *p
= obuf
+ strlen (obuf
) - 2;
5787 OP_M (bytemode
, sizeflag
);