1 /* Instruction opcode table for ip2k.
3 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
7 This file is part of the GNU Binutils and/or GDB, the GNU debugger.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2, or (at your option)
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License along
20 with this program; if not, write to the Free Software Foundation, Inc.,
21 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
29 #include "ip2k-desc.h"
31 #include "libiberty.h"
35 /* A better hash function for instruction mnemonics. */
43 for (hash
= 0; *m
&& !isspace(*m
); m
++)
44 hash
= (hash
* 23) ^ (0x1F & tolower(*m
));
46 /* printf ("%s %d\n", insn, (hash % CGEN_ASM_HASH_SIZE)); */
48 return hash
% CGEN_ASM_HASH_SIZE
;
55 /* The hash functions are recorded here to help keep assembler code out of
56 the disassembler and vice versa. */
58 static int asm_hash_insn_p
PARAMS ((const CGEN_INSN
*));
59 static unsigned int asm_hash_insn
PARAMS ((const char *));
60 static int dis_hash_insn_p
PARAMS ((const CGEN_INSN
*));
61 static unsigned int dis_hash_insn
PARAMS ((const char *, CGEN_INSN_INT
));
63 /* Instruction formats. */
65 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
66 #define F(f) & ip2k_cgen_ifld_table[IP2K_##f]
68 #define F(f) & ip2k_cgen_ifld_table[IP2K_/**/f]
70 static const CGEN_IFMT ifmt_empty
= {
74 static const CGEN_IFMT ifmt_jmp
= {
75 16, 16, 0xe000, { { F (F_OP3
) }, { F (F_ADDR16CJP
) }, { 0 } }
78 static const CGEN_IFMT ifmt_sb
= {
79 16, 16, 0xf000, { { F (F_OP4
) }, { F (F_BITNO
) }, { F (F_REG
) }, { 0 } }
82 static const CGEN_IFMT ifmt_xorw_l
= {
83 16, 16, 0xff00, { { F (F_OP4
) }, { F (F_OP4MID
) }, { F (F_IMM8
) }, { 0 } }
86 static const CGEN_IFMT ifmt_loadl_a
= {
87 16, 16, 0xff00, { { F (F_OP4
) }, { F (F_OP4MID
) }, { F (F_IMM8
) }, { 0 } }
90 static const CGEN_IFMT ifmt_loadh_a
= {
91 16, 16, 0xff00, { { F (F_OP4
) }, { F (F_OP4MID
) }, { F (F_IMM8
) }, { 0 } }
94 static const CGEN_IFMT ifmt_addcfr_w
= {
95 16, 16, 0xfe00, { { F (F_OP6
) }, { F (F_DIR
) }, { F (F_REG
) }, { 0 } }
98 static const CGEN_IFMT ifmt_speed
= {
99 16, 16, 0xff00, { { F (F_OP8
) }, { F (F_IMM8
) }, { 0 } }
102 static const CGEN_IFMT ifmt_ireadi
= {
103 16, 16, 0xffff, { { F (F_OP6
) }, { F (F_OP6_10LOW
) }, { 0 } }
106 static const CGEN_IFMT ifmt_page
= {
107 16, 16, 0xfff8, { { F (F_OP6
) }, { F (F_OP6_7LOW
) }, { F (F_PAGE3
) }, { 0 } }
110 static const CGEN_IFMT ifmt_reti
= {
111 16, 16, 0xfff8, { { F (F_OP6
) }, { F (F_OP6_7LOW
) }, { F (F_RETI3
) }, { 0 } }
116 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
117 #define A(a) (1 << CGEN_INSN_##a)
119 #define A(a) (1 << CGEN_INSN_/**/a)
121 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
122 #define OPERAND(op) IP2K_OPERAND_##op
124 #define OPERAND(op) IP2K_OPERAND_/**/op
126 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
127 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
129 /* The instruction table. */
131 static const CGEN_OPCODE ip2k_cgen_insn_opcode_table
[MAX_INSNS
] =
133 /* Special null first entry.
134 A `num' value of zero is thus invalid.
135 Also, the special `invalid' insn resides here. */
136 { { 0, 0, 0, 0 }, {{0}}, 0, {0}},
140 { { MNEM
, ' ', OP (ADDR16CJP
), 0 } },
141 & ifmt_jmp
, { 0xe000 }
143 /* call $addr16cjp */
146 { { MNEM
, ' ', OP (ADDR16CJP
), 0 } },
147 & ifmt_jmp
, { 0xc000 }
152 { { MNEM
, ' ', OP (FR
), ',', OP (BITNO
), 0 } },
153 & ifmt_sb
, { 0xb000 }
158 { { MNEM
, ' ', OP (FR
), ',', OP (BITNO
), 0 } },
159 & ifmt_sb
, { 0xa000 }
161 /* setb $fr,$bitno */
164 { { MNEM
, ' ', OP (FR
), ',', OP (BITNO
), 0 } },
165 & ifmt_sb
, { 0x9000 }
167 /* clrb $fr,$bitno */
170 { { MNEM
, ' ', OP (FR
), ',', OP (BITNO
), 0 } },
171 & ifmt_sb
, { 0x8000 }
176 { { MNEM
, ' ', 'W', ',', '#', OP (LIT8
), 0 } },
177 & ifmt_xorw_l
, { 0x7f00 }
182 { { MNEM
, ' ', 'W', ',', '#', OP (LIT8
), 0 } },
183 & ifmt_xorw_l
, { 0x7e00 }
188 { { MNEM
, ' ', 'W', ',', '#', OP (LIT8
), 0 } },
189 & ifmt_xorw_l
, { 0x7d00 }
194 { { MNEM
, ' ', 'W', ',', '#', OP (LIT8
), 0 } },
195 & ifmt_xorw_l
, { 0x7b00 }
200 { { MNEM
, ' ', 'W', ',', '#', OP (LIT8
), 0 } },
201 & ifmt_xorw_l
, { 0x7a00 }
206 { { MNEM
, ' ', 'W', ',', '#', OP (LIT8
), 0 } },
207 & ifmt_xorw_l
, { 0x7900 }
212 { { MNEM
, ' ', '#', OP (LIT8
), 0 } },
213 & ifmt_xorw_l
, { 0x7800 }
218 { { MNEM
, ' ', 'W', ',', '#', OP (LIT8
), 0 } },
219 & ifmt_xorw_l
, { 0x7700 }
224 { { MNEM
, ' ', 'W', ',', '#', OP (LIT8
), 0 } },
225 & ifmt_xorw_l
, { 0x7600 }
230 { { MNEM
, ' ', '#', OP (LIT8
), 0 } },
231 & ifmt_xorw_l
, { 0x7400 }
236 { { MNEM
, ' ', 'W', ',', '#', OP (LIT8
), 0 } },
237 & ifmt_xorw_l
, { 0x7300 }
242 { { MNEM
, ' ', 'W', ',', '#', OP (LIT8
), 0 } },
243 & ifmt_xorw_l
, { 0x7200 }
248 { { MNEM
, ' ', '#', OP (LIT8
), 0 } },
249 & ifmt_xorw_l
, { 0x7100 }
254 { { MNEM
, ' ', '#', OP (LIT8
), 0 } },
255 & ifmt_xorw_l
, { 0x7000 }
260 { { MNEM
, ' ', OP (ADDR16L
), 0 } },
261 & ifmt_loadl_a
, { 0x7100 }
266 { { MNEM
, ' ', OP (ADDR16H
), 0 } },
267 & ifmt_loadh_a
, { 0x7000 }
272 { { MNEM
, ' ', OP (FR
), ',', 'W', 0 } },
273 & ifmt_addcfr_w
, { 0x5e00 }
278 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
279 & ifmt_addcfr_w
, { 0x5c00 }
284 { { MNEM
, ' ', OP (FR
), 0 } },
285 & ifmt_addcfr_w
, { 0x5a00 }
290 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
291 & ifmt_addcfr_w
, { 0x5800 }
296 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
297 & ifmt_addcfr_w
, { 0x5400 }
302 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
303 & ifmt_addcfr_w
, { 0x5000 }
308 { { MNEM
, ' ', OP (FR
), 0 } },
309 & ifmt_addcfr_w
, { 0x4e00 }
314 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
315 & ifmt_addcfr_w
, { 0x4c00 }
320 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
321 & ifmt_addcfr_w
, { 0x4800 }
326 { { MNEM
, ' ', OP (FR
), ',', 'W', 0 } },
327 & ifmt_addcfr_w
, { 0x4a00 }
332 { { MNEM
, ' ', OP (FR
), 0 } },
333 & ifmt_addcfr_w
, { 0x4600 }
338 { { MNEM
, ' ', OP (FR
), 0 } },
339 & ifmt_addcfr_w
, { 0x4400 }
344 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
345 & ifmt_addcfr_w
, { 0x4200 }
350 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
351 & ifmt_addcfr_w
, { 0x4000 }
356 { { MNEM
, ' ', OP (FR
), 0 } },
357 & ifmt_addcfr_w
, { 0x3e00 }
362 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
363 & ifmt_addcfr_w
, { 0x3c00 }
368 { { MNEM
, ' ', OP (FR
), 0 } },
369 & ifmt_addcfr_w
, { 0x3a00 }
374 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
375 & ifmt_addcfr_w
, { 0x3800 }
380 { { MNEM
, ' ', OP (FR
), 0 } },
381 & ifmt_addcfr_w
, { 0x3600 }
386 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
387 & ifmt_addcfr_w
, { 0x3400 }
392 { { MNEM
, ' ', OP (FR
), 0 } },
393 & ifmt_addcfr_w
, { 0x3200 }
398 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
399 & ifmt_addcfr_w
, { 0x3000 }
404 { { MNEM
, ' ', OP (FR
), 0 } },
405 & ifmt_addcfr_w
, { 0x2e00 }
410 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
411 & ifmt_addcfr_w
, { 0x2c00 }
416 { { MNEM
, ' ', OP (FR
), 0 } },
417 & ifmt_addcfr_w
, { 0x2a00 }
422 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
423 & ifmt_addcfr_w
, { 0x2800 }
428 { { MNEM
, ' ', OP (FR
), 0 } },
429 & ifmt_addcfr_w
, { 0x2600 }
434 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
435 & ifmt_addcfr_w
, { 0x2400 }
440 { { MNEM
, ' ', OP (FR
), 0 } },
441 & ifmt_addcfr_w
, { 0x2200 }
446 { { MNEM
, ' ', 'W', ',', '#', OP (LIT8
), 0 } },
447 & ifmt_xorw_l
, { 0x7c00 }
452 { { MNEM
, ' ', OP (FR
), ',', 'W', 0 } },
453 & ifmt_addcfr_w
, { 0x200 }
458 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
459 & ifmt_addcfr_w
, { 0x2000 }
464 { { MNEM
, ' ', OP (FR
), ',', 'W', 0 } },
465 & ifmt_addcfr_w
, { 0x1e00 }
470 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
471 & ifmt_addcfr_w
, { 0x1c00 }
476 { { MNEM
, ' ', OP (FR
), ',', 'W', 0 } },
477 & ifmt_addcfr_w
, { 0x1a00 }
482 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
483 & ifmt_addcfr_w
, { 0x1800 }
488 { { MNEM
, ' ', OP (FR
), ',', 'W', 0 } },
489 & ifmt_addcfr_w
, { 0x1600 }
494 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
495 & ifmt_addcfr_w
, { 0x1400 }
500 { { MNEM
, ' ', OP (FR
), ',', 'W', 0 } },
501 & ifmt_addcfr_w
, { 0x1200 }
506 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
507 & ifmt_addcfr_w
, { 0x1000 }
512 { { MNEM
, ' ', OP (FR
), 0 } },
513 & ifmt_addcfr_w
, { 0xe00 }
518 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
519 & ifmt_addcfr_w
, { 0xc00 }
524 { { MNEM
, ' ', OP (FR
), ',', 'W', 0 } },
525 & ifmt_addcfr_w
, { 0xa00 }
530 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
531 & ifmt_addcfr_w
, { 0x800 }
536 { { MNEM
, ' ', OP (FR
), 0 } },
537 & ifmt_addcfr_w
, { 0x600 }
542 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
543 & ifmt_addcfr_w
, { 0x400 }
548 { { MNEM
, ' ', '#', OP (LIT8
), 0 } },
549 & ifmt_speed
, { 0x100 }
555 & ifmt_ireadi
, { 0x1d }
561 & ifmt_ireadi
, { 0x1c }
567 & ifmt_ireadi
, { 0x1b }
573 & ifmt_ireadi
, { 0x1a }
579 & ifmt_ireadi
, { 0x19 }
585 & ifmt_ireadi
, { 0x18 }
590 { { MNEM
, ' ', OP (ADDR16P
), 0 } },
591 & ifmt_page
, { 0x10 }
597 & ifmt_ireadi
, { 0xff }
602 { { MNEM
, ' ', '#', OP (RETI3
), 0 } },
609 & ifmt_ireadi
, { 0x7 }
615 & ifmt_ireadi
, { 0x6 }
621 & ifmt_ireadi
, { 0x5 }
627 & ifmt_ireadi
, { 0x4 }
633 & ifmt_ireadi
, { 0x3 }
639 & ifmt_ireadi
, { 0x2 }
645 & ifmt_ireadi
, { 0x1 }
651 & ifmt_ireadi
, { 0x0 }
660 /* Formats for ALIAS macro-insns. */
662 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
663 #define F(f) & ip2k_cgen_ifld_table[IP2K_##f]
665 #define F(f) & ip2k_cgen_ifld_table[IP2K_/**/f]
667 static const CGEN_IFMT ifmt_sc
= {
668 16, 16, 0xffff, { { F (F_OP4
) }, { F (F_BITNO
) }, { F (F_REG
) }, { 0 } }
671 static const CGEN_IFMT ifmt_snc
= {
672 16, 16, 0xffff, { { F (F_OP4
) }, { F (F_BITNO
) }, { F (F_REG
) }, { 0 } }
675 static const CGEN_IFMT ifmt_sz
= {
676 16, 16, 0xffff, { { F (F_OP4
) }, { F (F_BITNO
) }, { F (F_REG
) }, { 0 } }
679 static const CGEN_IFMT ifmt_snz
= {
680 16, 16, 0xffff, { { F (F_OP4
) }, { F (F_BITNO
) }, { F (F_REG
) }, { 0 } }
683 static const CGEN_IFMT ifmt_skip
= {
684 16, 16, 0xffff, { { F (F_OP4
) }, { F (F_BITNO
) }, { F (F_REG
) }, { 0 } }
687 static const CGEN_IFMT ifmt_skipb
= {
688 16, 16, 0xffff, { { F (F_OP4
) }, { F (F_BITNO
) }, { F (F_REG
) }, { 0 } }
693 /* Each non-simple macro entry points to an array of expansion possibilities. */
695 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
696 #define A(a) (1 << CGEN_INSN_##a)
698 #define A(a) (1 << CGEN_INSN_/**/a)
700 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
701 #define OPERAND(op) IP2K_OPERAND_##op
703 #define OPERAND(op) IP2K_OPERAND_/**/op
705 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
706 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
708 /* The macro instruction table. */
710 static const CGEN_IBASE ip2k_cgen_macro_insn_table
[] =
715 { 0|A(ALIAS
), { (1<<MACH_BASE
) } }
719 -1, "snc", "snc", 16,
720 { 0|A(ALIAS
), { (1<<MACH_BASE
) } }
725 { 0|A(ALIAS
), { (1<<MACH_BASE
) } }
729 -1, "snz", "snz", 16,
730 { 0|A(ALIAS
), { (1<<MACH_BASE
) } }
734 -1, "skip", "skip", 16,
735 { 0|A(SKIPA
)|A(ALIAS
), { (1<<MACH_BASE
) } }
739 -1, "skipb", "skip", 16,
740 { 0|A(SKIPA
)|A(ALIAS
), { (1<<MACH_BASE
) } }
744 /* The macro instruction opcode table. */
746 static const CGEN_OPCODE ip2k_cgen_macro_insn_opcode_table
[] =
752 & ifmt_sc
, { 0xb00b }
758 & ifmt_snc
, { 0xa00b }
764 & ifmt_sz
, { 0xb40b }
770 & ifmt_snz
, { 0xa40b }
776 & ifmt_skip
, { 0xa009 }
782 & ifmt_skipb
, { 0xb009 }
791 #ifndef CGEN_ASM_HASH_P
792 #define CGEN_ASM_HASH_P(insn) 1
795 #ifndef CGEN_DIS_HASH_P
796 #define CGEN_DIS_HASH_P(insn) 1
799 /* Return non-zero if INSN is to be added to the hash table.
800 Targets are free to override CGEN_{ASM,DIS}_HASH_P in the .opc file. */
803 asm_hash_insn_p (insn
)
804 const CGEN_INSN
*insn ATTRIBUTE_UNUSED
;
806 return CGEN_ASM_HASH_P (insn
);
810 dis_hash_insn_p (insn
)
811 const CGEN_INSN
*insn
;
813 /* If building the hash table and the NO-DIS attribute is present,
815 if (CGEN_INSN_ATTR_VALUE (insn
, CGEN_INSN_NO_DIS
))
817 return CGEN_DIS_HASH_P (insn
);
820 #ifndef CGEN_ASM_HASH
821 #define CGEN_ASM_HASH_SIZE 127
822 #ifdef CGEN_MNEMONIC_OPERANDS
823 #define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE)
825 #define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE) /*FIXME*/
829 /* It doesn't make much sense to provide a default here,
830 but while this is under development we do.
831 BUFFER is a pointer to the bytes of the insn, target order.
832 VALUE is the first base_insn_bitsize bits as an int in host order. */
834 #ifndef CGEN_DIS_HASH
835 #define CGEN_DIS_HASH_SIZE 256
836 #define CGEN_DIS_HASH(buf, value) (*(unsigned char *) (buf))
839 /* The result is the hash value of the insn.
840 Targets are free to override CGEN_{ASM,DIS}_HASH in the .opc file. */
846 return CGEN_ASM_HASH (mnem
);
849 /* BUF is a pointer to the bytes of the insn, target order.
850 VALUE is the first base_insn_bitsize bits as an int in host order. */
853 dis_hash_insn (buf
, value
)
854 const char * buf ATTRIBUTE_UNUSED
;
855 CGEN_INSN_INT value ATTRIBUTE_UNUSED
;
857 return CGEN_DIS_HASH (buf
, value
);
860 static void set_fields_bitsize
PARAMS ((CGEN_FIELDS
*, int));
862 /* Set the recorded length of the insn in the CGEN_FIELDS struct. */
865 set_fields_bitsize (fields
, size
)
869 CGEN_FIELDS_BITSIZE (fields
) = size
;
872 /* Function to call before using the operand instance table.
873 This plugs the opcode entries and macro instructions into the cpu table. */
876 ip2k_cgen_init_opcode_table (cd
)
880 int num_macros
= (sizeof (ip2k_cgen_macro_insn_table
) /
881 sizeof (ip2k_cgen_macro_insn_table
[0]));
882 const CGEN_IBASE
*ib
= & ip2k_cgen_macro_insn_table
[0];
883 const CGEN_OPCODE
*oc
= & ip2k_cgen_macro_insn_opcode_table
[0];
884 CGEN_INSN
*insns
= (CGEN_INSN
*) xmalloc (num_macros
* sizeof (CGEN_INSN
));
885 memset (insns
, 0, num_macros
* sizeof (CGEN_INSN
));
886 for (i
= 0; i
< num_macros
; ++i
)
888 insns
[i
].base
= &ib
[i
];
889 insns
[i
].opcode
= &oc
[i
];
890 ip2k_cgen_build_insn_regex (& insns
[i
]);
892 cd
->macro_insn_table
.init_entries
= insns
;
893 cd
->macro_insn_table
.entry_size
= sizeof (CGEN_IBASE
);
894 cd
->macro_insn_table
.num_init_entries
= num_macros
;
896 oc
= & ip2k_cgen_insn_opcode_table
[0];
897 insns
= (CGEN_INSN
*) cd
->insn_table
.init_entries
;
898 for (i
= 0; i
< MAX_INSNS
; ++i
)
900 insns
[i
].opcode
= &oc
[i
];
901 ip2k_cgen_build_insn_regex (& insns
[i
]);
904 cd
->sizeof_fields
= sizeof (CGEN_FIELDS
);
905 cd
->set_fields_bitsize
= set_fields_bitsize
;
907 cd
->asm_hash_p
= asm_hash_insn_p
;
908 cd
->asm_hash
= asm_hash_insn
;
909 cd
->asm_hash_size
= CGEN_ASM_HASH_SIZE
;
911 cd
->dis_hash_p
= dis_hash_insn_p
;
912 cd
->dis_hash
= dis_hash_insn
;
913 cd
->dis_hash_size
= CGEN_DIS_HASH_SIZE
;