1 /* Print Motorola 68k instructions.
2 Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
4 Free Software Foundation, Inc.
6 This file is part of the GNU opcodes library.
8 This library is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
13 It is distributed in the hope that it will be useful, but WITHOUT
14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
16 License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
21 MA 02110-1301, USA. */
25 #include "floatformat.h"
26 #include "libiberty.h"
29 #include "opcode/m68k.h"
31 /* Local function prototypes. */
33 const char * const fpcr_names
[] =
35 "", "%fpiar", "%fpsr", "%fpiar/%fpsr", "%fpcr",
36 "%fpiar/%fpcr", "%fpsr/%fpcr", "%fpiar/%fpsr/%fpcr"
39 static char *const reg_names
[] =
41 "%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7",
42 "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%fp", "%sp",
46 /* Name of register halves for MAC/EMAC.
47 Seperate from reg_names since 'spu', 'fpl' look weird. */
48 static char *const reg_half_names
[] =
50 "%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7",
51 "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%a6", "%a7",
55 /* Sign-extend an (unsigned char). */
57 #define COERCE_SIGNED_CHAR(ch) ((signed char) (ch))
59 #define COERCE_SIGNED_CHAR(ch) ((int) (((ch) ^ 0x80) & 0xFF) - 128)
62 /* Get a 1 byte signed integer. */
63 #define NEXTBYTE(p, val) \
67 if (!FETCH_DATA (info, p)) \
69 val = COERCE_SIGNED_CHAR (p[-1]); \
73 /* Get a 2 byte signed integer. */
74 #define COERCE16(x) ((int) (((x) ^ 0x8000) - 0x8000))
76 #define NEXTWORD(p, val, ret_val) \
80 if (!FETCH_DATA (info, p)) \
82 val = COERCE16 ((p[-2] << 8) + p[-1]); \
86 /* Get a 4 byte signed integer. */
87 #define COERCE32(x) ((bfd_signed_vma) ((x) ^ 0x80000000) - 0x80000000)
89 #define NEXTLONG(p, val, ret_val) \
93 if (!FETCH_DATA (info, p)) \
95 val = COERCE32 ((((((p[-4] << 8) + p[-3]) << 8) + p[-2]) << 8) + p[-1]); \
99 /* Get a 4 byte unsigned integer. */
100 #define NEXTULONG(p, val) \
104 if (!FETCH_DATA (info, p)) \
106 val = (unsigned int) ((((((p[-4] << 8) + p[-3]) << 8) + p[-2]) << 8) + p[-1]); \
110 /* Get a single precision float. */
111 #define NEXTSINGLE(val, p) \
115 if (!FETCH_DATA (info, p)) \
117 floatformat_to_double (& floatformat_ieee_single_big, \
118 (char *) p - 4, & val); \
122 /* Get a double precision float. */
123 #define NEXTDOUBLE(val, p) \
127 if (!FETCH_DATA (info, p)) \
129 floatformat_to_double (& floatformat_ieee_double_big, \
130 (char *) p - 8, & val); \
134 /* Get an extended precision float. */
135 #define NEXTEXTEND(val, p) \
139 if (!FETCH_DATA (info, p)) \
141 floatformat_to_double (& floatformat_m68881_ext, \
142 (char *) p - 12, & val); \
146 /* Need a function to convert from packed to double
147 precision. Actually, it's easier to print a
148 packed number than a double anyway, so maybe
149 there should be a special case to handle this... */
150 #define NEXTPACKED(p, val) \
154 if (!FETCH_DATA (info, p)) \
161 /* Maximum length of an instruction. */
168 /* Points to first byte not fetched. */
169 bfd_byte
*max_fetched
;
170 bfd_byte the_buffer
[MAXLEN
];
174 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
175 to ADDR (exclusive) are valid. Returns 1 for success, 0 on error. */
176 #define FETCH_DATA(info, addr) \
177 ((addr) <= ((struct private *) (info->private_data))->max_fetched \
178 ? 1 : fetch_data ((info), (addr)))
181 fetch_data (struct disassemble_info
*info
, bfd_byte
*addr
)
184 struct private *priv
= (struct private *)info
->private_data
;
185 bfd_vma start
= priv
->insn_start
+ (priv
->max_fetched
- priv
->the_buffer
);
187 status
= (*info
->read_memory_func
) (start
,
189 addr
- priv
->max_fetched
,
193 (*info
->memory_error_func
) (status
, start
, info
);
197 priv
->max_fetched
= addr
;
201 /* This function is used to print to the bit-bucket. */
203 dummy_printer (FILE *file ATTRIBUTE_UNUSED
,
204 const char *format ATTRIBUTE_UNUSED
,
211 dummy_print_address (bfd_vma vma ATTRIBUTE_UNUSED
,
212 struct disassemble_info
*info ATTRIBUTE_UNUSED
)
216 /* Fetch BITS bits from a position in the instruction specified by CODE.
217 CODE is a "place to put an argument", or 'x' for a destination
218 that is a general address (mode and register).
219 BUFFER contains the instruction.
220 Returns -1 on failure. */
223 fetch_arg (unsigned char *buffer
,
226 disassemble_info
*info
)
232 case '/': /* MAC/EMAC mask bit. */
233 val
= buffer
[3] >> 5;
236 case 'G': /* EMAC ACC load. */
237 val
= ((buffer
[3] >> 3) & 0x2) | ((~buffer
[1] >> 7) & 0x1);
240 case 'H': /* EMAC ACC !load. */
241 val
= ((buffer
[3] >> 3) & 0x2) | ((buffer
[1] >> 7) & 0x1);
244 case ']': /* EMAC ACCEXT bit. */
245 val
= buffer
[0] >> 2;
248 case 'I': /* MAC/EMAC scale factor. */
249 val
= buffer
[2] >> 1;
252 case 'F': /* EMAC ACCx. */
253 val
= buffer
[0] >> 1;
264 case 'd': /* Destination, for register or quick. */
265 val
= (buffer
[0] << 8) + buffer
[1];
269 case 'x': /* Destination, for general arg. */
270 val
= (buffer
[0] << 8) + buffer
[1];
275 if (! FETCH_DATA (info
, buffer
+ 3))
277 val
= (buffer
[3] >> 4);
281 if (! FETCH_DATA (info
, buffer
+ 3))
287 if (! FETCH_DATA (info
, buffer
+ 3))
289 val
= (buffer
[2] << 8) + buffer
[3];
294 if (! FETCH_DATA (info
, buffer
+ 3))
296 val
= (buffer
[2] << 8) + buffer
[3];
302 if (! FETCH_DATA (info
, buffer
+ 3))
304 val
= (buffer
[2] << 8) + buffer
[3];
308 if (! FETCH_DATA (info
, buffer
+ 5))
310 val
= (buffer
[4] << 8) + buffer
[5];
315 if (! FETCH_DATA (info
, buffer
+ 5))
317 val
= (buffer
[4] << 8) + buffer
[5];
322 if (! FETCH_DATA (info
, buffer
+ 5))
324 val
= (buffer
[4] << 8) + buffer
[5];
328 if (! FETCH_DATA (info
, buffer
+ 3))
330 val
= (buffer
[2] << 8) + buffer
[3];
335 if (! FETCH_DATA (info
, buffer
+ 3))
337 val
= (buffer
[2] << 8) + buffer
[3];
342 if (! FETCH_DATA (info
, buffer
+ 3))
344 val
= (buffer
[2] << 8) + buffer
[3];
349 val
= (buffer
[1] >> 6);
353 if (! FETCH_DATA (info
, buffer
+ 3))
355 val
= (buffer
[2] >> 1);
359 val
= (buffer
[1] & 0x40 ? 0x8 : 0)
360 | ((buffer
[0] >> 1) & 0x7)
361 | (buffer
[3] & 0x80 ? 0x10 : 0);
365 val
= (buffer
[1] & 0x40 ? 0x8 : 0) | ((buffer
[0] >> 1) & 0x7);
369 val
= (buffer
[2] >> 4) | (buffer
[3] & 0x80 ? 0x10 : 0);
373 val
= (buffer
[1] & 0xf) | (buffer
[3] & 0x40 ? 0x10 : 0);
377 val
= (buffer
[3] & 0xf) | (buffer
[3] & 0x40 ? 0x10 : 0);
381 val
= buffer
[2] >> 2;
388 /* bits is never too big. */
389 return val
& ((1 << bits
) - 1);
392 /* Check if an EA is valid for a particular code. This is required
393 for the EMAC instructions since the type of source address determines
394 if it is a EMAC-load instruciton if the EA is mode 2-5, otherwise it
395 is a non-load EMAC instruction and the bits mean register Ry.
396 A similar case exists for the movem instructions where the register
397 mask is interpreted differently for different EAs. */
400 m68k_valid_ea (char code
, int val
)
403 #define M(n0,n1,n2,n3,n4,n5,n6,n70,n71,n72,n73,n74) \
404 (n0 | n1 << 1 | n2 << 2 | n3 << 3 | n4 << 4 | n5 << 5 | n6 << 6 \
405 | n70 << 7 | n71 << 8 | n72 << 9 | n73 << 10 | n74 << 11)
410 mask
= M (1,1,1,1,1,1,1,1,1,1,1,1);
413 mask
= M (0,0,1,1,1,1,1,1,1,0,0,0);
416 mask
= M (1,1,1,1,1,1,1,1,1,0,0,0);
419 mask
= M (1,0,1,1,1,1,1,1,1,1,1,1);
422 mask
= M (1,0,1,1,1,1,1,1,1,1,1,0);
425 mask
= M (0,0,1,0,0,1,1,1,1,1,1,0);
428 mask
= M (0,0,1,0,0,1,1,1,1,0,0,0);
431 mask
= M (1,0,1,1,1,1,1,1,1,0,0,0);
434 mask
= M (1,0,1,0,0,1,1,1,1,0,0,0);
437 mask
= M (1,0,1,0,0,1,1,1,1,1,1,0);
440 mask
= M (0,0,1,0,0,1,1,1,1,1,1,0);
443 mask
= M (0,0,1,0,1,1,1,1,1,0,0,0);
446 mask
= M (0,0,1,1,0,1,1,1,1,1,1,0);
449 mask
= M (1,1,1,1,1,0,0,0,0,0,0,0);
452 mask
= M (0,0,0,0,0,1,0,0,0,1,0,0);
455 mask
= M (0,0,0,0,0,0,1,1,1,0,1,1);
458 mask
= M (1,1,1,1,1,1,0,0,0,0,0,0);
461 mask
= M (1,0,1,1,1,1,0,0,0,0,0,0);
464 mask
= M (1,0,1,1,1,1,0,1,1,0,0,0);
467 mask
= M (1,0,1,1,1,1,0,0,0,1,0,0);
470 mask
= M (0,0,1,1,1,1,0,0,0,1,0,0);
473 mask
= M (0,0,1,0,0,1,0,0,0,0,0,0);
476 mask
= M (0,0,1,0,0,1,0,0,0,1,0,0);
479 mask
= M (0,0,1,1,1,1,0,0,0,0,0,0);
486 mode
= (val
>> 3) & 7;
489 return (mask
& (1 << mode
)) != 0;
492 /* Print a base register REGNO and displacement DISP, on INFO->STREAM.
493 REGNO = -1 for pc, -2 for none (suppressed). */
496 print_base (int regno
, bfd_vma disp
, disassemble_info
*info
)
500 (*info
->fprintf_func
) (info
->stream
, "%%pc@(");
501 (*info
->print_address_func
) (disp
, info
);
508 (*info
->fprintf_func
) (info
->stream
, "@(");
509 else if (regno
== -3)
510 (*info
->fprintf_func
) (info
->stream
, "%%zpc@(");
512 (*info
->fprintf_func
) (info
->stream
, "%s@(", reg_names
[regno
]);
514 sprintf_vma (buf
, disp
);
515 (*info
->fprintf_func
) (info
->stream
, "%s", buf
);
519 /* Print an indexed argument. The base register is BASEREG (-1 for pc).
520 P points to extension word, in buffer.
521 ADDR is the nominal core address of that extension word.
522 Returns NULL upon error. */
524 static unsigned char *
525 print_indexed (int basereg
,
528 disassemble_info
*info
)
531 static char *const scales
[] = { "", ":2", ":4", ":8" };
537 NEXTWORD (p
, word
, NULL
);
539 /* Generate the text for the index register.
540 Where this will be output is not yet determined. */
541 sprintf (buf
, "%s:%c%s",
542 reg_names
[(word
>> 12) & 0xf],
543 (word
& 0x800) ? 'l' : 'w',
544 scales
[(word
>> 9) & 3]);
546 /* Handle the 68000 style of indexing. */
548 if ((word
& 0x100) == 0)
550 base_disp
= word
& 0xff;
551 if ((base_disp
& 0x80) != 0)
555 print_base (basereg
, base_disp
, info
);
556 (*info
->fprintf_func
) (info
->stream
, ",%s)", buf
);
560 /* Handle the generalized kind. */
561 /* First, compute the displacement to add to the base register. */
572 switch ((word
>> 4) & 3)
575 NEXTWORD (p
, base_disp
, NULL
);
578 NEXTLONG (p
, base_disp
, NULL
);
583 /* Handle single-level case (not indirect). */
586 print_base (basereg
, base_disp
, info
);
588 (*info
->fprintf_func
) (info
->stream
, ",%s", buf
);
589 (*info
->fprintf_func
) (info
->stream
, ")");
593 /* Two level. Compute displacement to add after indirection. */
598 NEXTWORD (p
, outer_disp
, NULL
);
601 NEXTLONG (p
, outer_disp
, NULL
);
604 print_base (basereg
, base_disp
, info
);
605 if ((word
& 4) == 0 && buf
[0] != '\0')
607 (*info
->fprintf_func
) (info
->stream
, ",%s", buf
);
610 sprintf_vma (vmabuf
, outer_disp
);
611 (*info
->fprintf_func
) (info
->stream
, ")@(%s", vmabuf
);
613 (*info
->fprintf_func
) (info
->stream
, ",%s", buf
);
614 (*info
->fprintf_func
) (info
->stream
, ")");
619 #define FETCH_ARG(size, val) \
622 val = fetch_arg (buffer, place, size, info); \
628 /* Returns number of bytes "eaten" by the operand, or
629 return -1 if an invalid operand was found, or -2 if
630 an opcode tabe error was found or -3 to simply abort.
631 ADDR is the pc for this arg to be relative to. */
634 print_insn_arg (const char *d
,
635 unsigned char *buffer
,
638 disassemble_info
*info
)
642 unsigned char *p
= p0
;
653 case 'c': /* Cache identifier. */
655 static char *const cacheFieldName
[] = { "nc", "dc", "ic", "bc" };
657 (*info
->fprintf_func
) (info
->stream
, cacheFieldName
[val
]);
661 case 'a': /* Address register indirect only. Cf. case '+'. */
664 (*info
->fprintf_func
) (info
->stream
, "%s@", reg_names
[val
+ 8]);
668 case '_': /* 32-bit absolute address for move16. */
671 (*info
->print_address_func
) (uval
, info
);
676 (*info
->fprintf_func
) (info
->stream
, "%%ccr");
680 (*info
->fprintf_func
) (info
->stream
, "%%sr");
684 (*info
->fprintf_func
) (info
->stream
, "%%usp");
688 (*info
->fprintf_func
) (info
->stream
, "%%acc");
692 (*info
->fprintf_func
) (info
->stream
, "%%macsr");
696 (*info
->fprintf_func
) (info
->stream
, "%%mask");
701 /* FIXME: There's a problem here, different m68k processors call the
702 same address different names. The tables below try to get it right
703 using info->mach, but only for v4e. */
704 struct regname
{ char * name
; int value
; };
705 static const struct regname names
[] =
707 {"%sfc", 0x000}, {"%dfc", 0x001}, {"%cacr", 0x002},
708 {"%tc", 0x003}, {"%itt0",0x004}, {"%itt1", 0x005},
709 {"%dtt0",0x006}, {"%dtt1",0x007}, {"%buscr",0x008},
710 {"%usp", 0x800}, {"%vbr", 0x801}, {"%caar", 0x802},
711 {"%msp", 0x803}, {"%isp", 0x804},
713 /* Reg c04 is sometimes called flashbar or rambar.
714 Rec c05 is also sometimes called rambar. */
715 {"%rambar0", 0xc04}, {"%rambar1", 0xc05},
719 /* Should we be calling this psr like we do in case 'Y'? */
722 {"%urp", 0x806}, {"%srp", 0x807}, {"%pcr", 0x808},
724 /* Fido added these. */
725 {"%cac", 0xffe}, {"%mbo", 0xfff}
727 /* Alternate names for v4e (MCF5407/5445x/MCF547x/MCF548x), at least. */
728 static const struct regname names_v4e
[] =
730 {"%asid",0x003}, {"%acr0",0x004}, {"%acr1",0x005},
731 {"%acr2",0x006}, {"%acr3",0x007}, {"%mmubar",0x008},
733 unsigned int arch_mask
;
735 arch_mask
= bfd_m68k_mach_to_features (info
->mach
);
737 if (arch_mask
& (mcfisa_b
| mcfisa_c
))
739 for (regno
= ARRAY_SIZE (names_v4e
); --regno
>= 0;)
740 if (names_v4e
[regno
].value
== val
)
742 (*info
->fprintf_func
) (info
->stream
, "%s", names_v4e
[regno
].name
);
748 for (regno
= ARRAY_SIZE (names
) - 1; regno
>= 0; regno
--)
749 if (names
[regno
].value
== val
)
751 (*info
->fprintf_func
) (info
->stream
, "%s", names
[regno
].name
);
755 (*info
->fprintf_func
) (info
->stream
, "0x%x", val
);
761 /* 0 means 8, except for the bkpt instruction... */
762 if (val
== 0 && d
[1] != 's')
764 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
772 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
777 (*info
->fprintf_func
) (info
->stream
, "#%d", val
+1);
782 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
788 static char *const scalefactor_name
[] = { "<<", ">>" };
791 (*info
->fprintf_func
) (info
->stream
, scalefactor_name
[val
]);
798 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
804 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
809 (*info
->fprintf_func
) (info
->stream
, "%s", reg_names
[val
]);
814 (*info
->fprintf_func
) (info
->stream
, "%s", reg_names
[val
+ 010]);
819 (*info
->fprintf_func
) (info
->stream
, "%s", reg_names
[val
]);
823 FETCH_ARG (4, regno
);
825 (*info
->fprintf_func
) (info
->stream
, "%s@", reg_names
[regno
]);
827 (*info
->fprintf_func
) (info
->stream
, "@(%s)", reg_names
[regno
]);
832 (*info
->fprintf_func
) (info
->stream
, "%%fp%d", val
);
838 (*info
->fprintf_func
) (info
->stream
, "%s", reg_names
[val
& 7]);
840 (*info
->fprintf_func
) (info
->stream
, "%d", val
);
845 (*info
->fprintf_func
) (info
->stream
, "%s@+", reg_names
[val
+ 8]);
850 (*info
->fprintf_func
) (info
->stream
, "%s@-", reg_names
[val
+ 8]);
857 (*info
->fprintf_func
) (info
->stream
, "{%s}", reg_names
[val
]);
859 else if (place
== 'C')
862 if (val
> 63) /* This is a signed constant. */
864 (*info
->fprintf_func
) (info
->stream
, "{#%d}", val
);
872 p1
= buffer
+ (*d
== '#' ? 2 : 4);
875 else if (place
== 'C')
877 else if (place
== '8')
879 else if (place
== '3')
881 else if (place
== 'b')
883 else if (place
== 'w' || place
== 'W')
884 NEXTWORD (p1
, val
, -3);
885 else if (place
== 'l')
886 NEXTLONG (p1
, val
, -3);
890 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
896 else if (place
== 'B')
897 disp
= COERCE_SIGNED_CHAR (buffer
[1]);
898 else if (place
== 'w' || place
== 'W')
899 NEXTWORD (p
, disp
, -3);
900 else if (place
== 'l' || place
== 'L' || place
== 'C')
901 NEXTLONG (p
, disp
, -3);
902 else if (place
== 'g')
904 NEXTBYTE (buffer
, disp
);
906 NEXTWORD (p
, disp
, -3);
908 NEXTLONG (p
, disp
, -3);
910 else if (place
== 'c')
912 if (buffer
[1] & 0x40) /* If bit six is one, long offset. */
913 NEXTLONG (p
, disp
, -3);
915 NEXTWORD (p
, disp
, -3);
920 (*info
->print_address_func
) (addr
+ disp
, info
);
927 NEXTWORD (p
, val
, -3);
929 (*info
->fprintf_func
) (info
->stream
, "%s@(%d)", reg_names
[val1
+ 8], val
);
935 (*info
->fprintf_func
) (info
->stream
, "%s", fpcr_names
[val
]);
940 (*info
->fprintf_func
) (info
->stream
, "%%acc%d", val
);
945 (*info
->fprintf_func
) (info
->stream
, "%%accext%s", val
== 0 ? "01" : "23");
951 (*info
->fprintf_func
) (info
->stream
, "<<");
953 (*info
->fprintf_func
) (info
->stream
, ">>");
959 /* Get coprocessor ID... */
960 val
= fetch_arg (buffer
, 'd', 3, info
);
963 if (val
!= 1) /* Unusual coprocessor ID? */
964 (*info
->fprintf_func
) (info
->stream
, "(cpid=%d) ", val
);
993 val
= fetch_arg (buffer
, 'x', 6, info
);
996 val
= ((val
& 7) << 3) + ((val
>> 3) & 7);
1000 val
= fetch_arg (buffer
, 's', 6, info
);
1005 /* If the <ea> is invalid for *d, then reject this match. */
1006 if (!m68k_valid_ea (*d
, val
))
1009 /* Get register number assuming address register. */
1010 regno
= (val
& 7) + 8;
1011 regname
= reg_names
[regno
];
1015 (*info
->fprintf_func
) (info
->stream
, "%s", reg_names
[val
]);
1019 (*info
->fprintf_func
) (info
->stream
, "%s", regname
);
1023 (*info
->fprintf_func
) (info
->stream
, "%s@", regname
);
1027 (*info
->fprintf_func
) (info
->stream
, "%s@+", regname
);
1031 (*info
->fprintf_func
) (info
->stream
, "%s@-", regname
);
1035 NEXTWORD (p
, val
, -3);
1036 (*info
->fprintf_func
) (info
->stream
, "%s@(%d)", regname
, val
);
1040 p
= print_indexed (regno
, p
, addr
, info
);
1049 NEXTWORD (p
, val
, -3);
1050 (*info
->print_address_func
) (val
, info
);
1054 NEXTULONG (p
, uval
);
1055 (*info
->print_address_func
) (uval
, info
);
1059 NEXTWORD (p
, val
, -3);
1060 (*info
->fprintf_func
) (info
->stream
, "%%pc@(");
1061 (*info
->print_address_func
) (addr
+ val
, info
);
1062 (*info
->fprintf_func
) (info
->stream
, ")");
1066 p
= print_indexed (-1, p
, addr
, info
);
1072 flt_p
= 1; /* Assume it's a float... */
1081 NEXTWORD (p
, val
, -3);
1086 NEXTLONG (p
, val
, -3);
1091 NEXTSINGLE (flval
, p
);
1095 NEXTDOUBLE (flval
, p
);
1099 NEXTEXTEND (flval
, p
);
1103 NEXTPACKED (p
, flval
);
1109 if (flt_p
) /* Print a float? */
1110 (*info
->fprintf_func
) (info
->stream
, "#%g", flval
);
1112 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
1120 /* If place is '/', then this is the case of the mask bit for
1121 mac/emac loads. Now that the arg has been printed, grab the
1122 mask bit and if set, add a '&' to the arg. */
1127 info
->fprintf_func (info
->stream
, "&");
1137 NEXTWORD (p1
, val
, -3);
1138 /* Move the pointer ahead if this point is farther ahead
1140 p
= p1
> p
? p1
: p
;
1143 (*info
->fprintf_func
) (info
->stream
, "#0");
1150 for (regno
= 0; regno
< 16; ++regno
)
1151 if (val
& (0x8000 >> regno
))
1152 newval
|= 1 << regno
;
1157 for (regno
= 0; regno
< 16; ++regno
)
1158 if (val
& (1 << regno
))
1163 (*info
->fprintf_func
) (info
->stream
, "/");
1165 (*info
->fprintf_func
) (info
->stream
, "%s", reg_names
[regno
]);
1166 first_regno
= regno
;
1167 while (val
& (1 << (regno
+ 1)))
1169 if (regno
> first_regno
)
1170 (*info
->fprintf_func
) (info
->stream
, "-%s",
1174 else if (place
== '3')
1176 /* `fmovem' insn. */
1182 (*info
->fprintf_func
) (info
->stream
, "#0");
1189 for (regno
= 0; regno
< 8; ++regno
)
1190 if (val
& (0x80 >> regno
))
1191 newval
|= 1 << regno
;
1196 for (regno
= 0; regno
< 8; ++regno
)
1197 if (val
& (1 << regno
))
1201 (*info
->fprintf_func
) (info
->stream
, "/");
1203 (*info
->fprintf_func
) (info
->stream
, "%%fp%d", regno
);
1204 first_regno
= regno
;
1205 while (val
& (1 << (regno
+ 1)))
1207 if (regno
> first_regno
)
1208 (*info
->fprintf_func
) (info
->stream
, "-%%fp%d", regno
);
1211 else if (place
== '8')
1214 /* fmoveml for FP status registers. */
1215 (*info
->fprintf_func
) (info
->stream
, "%s", fpcr_names
[val
]);
1237 case 2: name
= "%tt0"; break;
1238 case 3: name
= "%tt1"; break;
1239 case 0x10: name
= "%tc"; break;
1240 case 0x11: name
= "%drp"; break;
1241 case 0x12: name
= "%srp"; break;
1242 case 0x13: name
= "%crp"; break;
1243 case 0x14: name
= "%cal"; break;
1244 case 0x15: name
= "%val"; break;
1245 case 0x16: name
= "%scc"; break;
1246 case 0x17: name
= "%ac"; break;
1247 case 0x18: name
= "%psr"; break;
1248 case 0x19: name
= "%pcsr"; break;
1252 int break_reg
= ((buffer
[3] >> 2) & 7);
1254 (*info
->fprintf_func
)
1255 (info
->stream
, val
== 0x1c ? "%%bad%d" : "%%bac%d",
1260 (*info
->fprintf_func
) (info
->stream
, "<mmu register %d>", val
);
1263 (*info
->fprintf_func
) (info
->stream
, "%s", name
);
1273 (*info
->fprintf_func
) (info
->stream
, "%%dfc");
1275 (*info
->fprintf_func
) (info
->stream
, "%%sfc");
1277 /* xgettext:c-format */
1278 (*info
->fprintf_func
) (info
->stream
, _("<function code %d>"), fc
);
1283 (*info
->fprintf_func
) (info
->stream
, "%%val");
1290 FETCH_ARG (3, level
);
1291 (*info
->fprintf_func
) (info
->stream
, "%d", level
);
1306 (*info
->fprintf_func
) (info
->stream
, "%s%s",
1307 reg_half_names
[reg
],
1308 is_upper
? "u" : "l");
1319 /* Try to match the current instruction to best and if so, return the
1320 number of bytes consumed from the instruction stream, else zero. */
1323 match_insn_m68k (bfd_vma memaddr
,
1324 disassemble_info
* info
,
1325 const struct m68k_opcode
* best
)
1327 unsigned char *save_p
;
1330 const char *args
= best
->args
;
1332 struct private *priv
= (struct private *) info
->private_data
;
1333 bfd_byte
*buffer
= priv
->the_buffer
;
1334 fprintf_ftype save_printer
= info
->fprintf_func
;
1335 void (* save_print_address
) (bfd_vma
, struct disassemble_info
*)
1336 = info
->print_address_func
;
1341 /* Point at first word of argument data,
1342 and at descriptor for first argument. */
1345 /* Figure out how long the fixed-size portion of the instruction is.
1346 The only place this is stored in the opcode table is
1347 in the arguments--look for arguments which specify fields in the 2nd
1348 or 3rd words of the instruction. */
1349 for (d
= args
; *d
; d
+= 2)
1351 /* I don't think it is necessary to be checking d[0] here;
1352 I suspect all this could be moved to the case statement below. */
1355 if (d
[1] == 'l' && p
- buffer
< 6)
1357 else if (p
- buffer
< 4 && d
[1] != 'C' && d
[1] != '8')
1361 if ((d
[0] == 'L' || d
[0] == 'l') && d
[1] == 'w' && p
- buffer
< 4)
1387 /* pflusha is an exceptions. It takes no arguments but is two words
1388 long. Recognize it by looking at the lower 16 bits of the mask. */
1389 if (p
- buffer
< 4 && (best
->match
& 0xFFFF) != 0)
1392 /* lpstop is another exception. It takes a one word argument but is
1393 three words long. */
1395 && (best
->match
& 0xffff) == 0xffff
1399 /* Copy the one word argument into the usual location for a one
1400 word argument, to simplify printing it. We can get away with
1401 this because we know exactly what the second word is, and we
1402 aren't going to print anything based on it. */
1404 FETCH_DATA (info
, p
);
1405 buffer
[2] = buffer
[4];
1406 buffer
[3] = buffer
[5];
1409 FETCH_DATA (info
, p
);
1412 info
->print_address_func
= dummy_print_address
;
1413 info
->fprintf_func
= (fprintf_ftype
) dummy_printer
;
1415 /* We scan the operands twice. The first time we don't print anything,
1416 but look for errors. */
1417 for (d
= args
; *d
; d
+= 2)
1419 int eaten
= print_insn_arg (d
, buffer
, p
, memaddr
+ (p
- buffer
), info
);
1423 else if (eaten
== -1 || eaten
== -3)
1425 info
->fprintf_func
= save_printer
;
1426 info
->print_address_func
= save_print_address
;
1431 /* We must restore the print functions before trying to print the
1433 info
->fprintf_func
= save_printer
;
1434 info
->print_address_func
= save_print_address
;
1435 info
->fprintf_func (info
->stream
,
1436 /* xgettext:c-format */
1437 _("<internal error in opcode table: %s %s>\n"),
1438 best
->name
, best
->args
);
1444 info
->fprintf_func
= save_printer
;
1445 info
->print_address_func
= save_print_address
;
1449 info
->fprintf_func (info
->stream
, "%s", best
->name
);
1452 info
->fprintf_func (info
->stream
, " ");
1456 p
+= print_insn_arg (d
, buffer
, p
, memaddr
+ (p
- buffer
), info
);
1459 if (*d
&& *(d
- 2) != 'I' && *d
!= 'k')
1460 info
->fprintf_func (info
->stream
, ",");
1466 /* Try to interpret the instruction at address MEMADDR as one that
1467 can execute on a processor with the features given by ARCH_MASK.
1468 If successful, print the instruction to INFO->STREAM and return
1469 its length in bytes. Return 0 otherwise. */
1472 m68k_scan_mask (bfd_vma memaddr
, disassemble_info
*info
,
1473 unsigned int arch_mask
)
1477 static const struct m68k_opcode
**opcodes
[16];
1478 static int numopcodes
[16];
1482 struct private *priv
= (struct private *) info
->private_data
;
1483 bfd_byte
*buffer
= priv
->the_buffer
;
1487 /* Speed up the matching by sorting the opcode
1488 table on the upper four bits of the opcode. */
1489 const struct m68k_opcode
**opc_pointer
[16];
1491 /* First count how many opcodes are in each of the sixteen buckets. */
1492 for (i
= 0; i
< m68k_numopcodes
; i
++)
1493 numopcodes
[(m68k_opcodes
[i
].opcode
>> 28) & 15]++;
1495 /* Then create a sorted table of pointers
1496 that point into the unsorted table. */
1497 opc_pointer
[0] = xmalloc (sizeof (struct m68k_opcode
*)
1499 opcodes
[0] = opc_pointer
[0];
1501 for (i
= 1; i
< 16; i
++)
1503 opc_pointer
[i
] = opc_pointer
[i
- 1] + numopcodes
[i
- 1];
1504 opcodes
[i
] = opc_pointer
[i
];
1507 for (i
= 0; i
< m68k_numopcodes
; i
++)
1508 *opc_pointer
[(m68k_opcodes
[i
].opcode
>> 28) & 15]++ = &m68k_opcodes
[i
];
1511 FETCH_DATA (info
, buffer
+ 2);
1512 major_opcode
= (buffer
[0] >> 4) & 15;
1514 for (i
= 0; i
< numopcodes
[major_opcode
]; i
++)
1516 const struct m68k_opcode
*opc
= opcodes
[major_opcode
][i
];
1517 unsigned long opcode
= opc
->opcode
;
1518 unsigned long match
= opc
->match
;
1519 const char *args
= opc
->args
;
1524 if (((0xff & buffer
[0] & (match
>> 24)) == (0xff & (opcode
>> 24)))
1525 && ((0xff & buffer
[1] & (match
>> 16)) == (0xff & (opcode
>> 16)))
1526 /* Only fetch the next two bytes if we need to. */
1527 && (((0xffff & match
) == 0)
1529 (FETCH_DATA (info
, buffer
+ 4)
1530 && ((0xff & buffer
[2] & (match
>> 8)) == (0xff & (opcode
>> 8)))
1531 && ((0xff & buffer
[3] & match
) == (0xff & opcode
)))
1533 && (opc
->arch
& arch_mask
) != 0)
1535 /* Don't use for printout the variants of divul and divsl
1536 that have the same register number in two places.
1537 The more general variants will match instead. */
1538 for (d
= args
; *d
; d
+= 2)
1542 /* Don't use for printout the variants of most floating
1543 point coprocessor instructions which use the same
1544 register number in two places, as above. */
1546 for (d
= args
; *d
; d
+= 2)
1550 /* Don't match fmovel with more than one register;
1551 wait for fmoveml. */
1554 for (d
= args
; *d
; d
+= 2)
1556 if (d
[0] == 's' && d
[1] == '8')
1558 val
= fetch_arg (buffer
, d
[1], 3, info
);
1561 if ((val
& (val
- 1)) != 0)
1567 /* Don't match FPU insns with non-default coprocessor ID. */
1570 for (d
= args
; *d
; d
+= 2)
1574 val
= fetch_arg (buffer
, 'd', 3, info
);
1582 if ((val
= match_insn_m68k (memaddr
, info
, opc
)))
1589 /* Print the m68k instruction at address MEMADDR in debugged memory,
1590 on INFO->STREAM. Returns length of the instruction, in bytes. */
1593 print_insn_m68k (bfd_vma memaddr
, disassemble_info
*info
)
1595 unsigned int arch_mask
;
1596 struct private priv
;
1599 bfd_byte
*buffer
= priv
.the_buffer
;
1601 info
->private_data
= & priv
;
1602 /* Tell objdump to use two bytes per chunk
1603 and six bytes per line for displaying raw data. */
1604 info
->bytes_per_chunk
= 2;
1605 info
->bytes_per_line
= 6;
1606 info
->display_endian
= BFD_ENDIAN_BIG
;
1607 priv
.max_fetched
= priv
.the_buffer
;
1608 priv
.insn_start
= memaddr
;
1610 arch_mask
= bfd_m68k_mach_to_features (info
->mach
);
1613 /* First try printing an m680x0 instruction. Try printing a Coldfire
1614 one if that fails. */
1615 val
= m68k_scan_mask (memaddr
, info
, m68k_mask
);
1617 val
= m68k_scan_mask (memaddr
, info
, mcf_mask
);
1621 val
= m68k_scan_mask (memaddr
, info
, arch_mask
);
1625 /* Handle undefined instructions. */
1626 info
->fprintf_func (info
->stream
, "0%o", (buffer
[0] << 8) + buffer
[1]);
1628 return val
? val
: 2;