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merge from gcc
[binutils.git] / opcodes / m32c-asm.c
blobe2d8c490646fc72278e4e58b5a5160e4520f50ba
1 /* Assembler interface for targets using CGEN. -*- C -*-
2 CGEN: Cpu tools GENerator
3
4 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 - the resultant file is machine generated, cgen-asm.in isn't
6
7 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005
8 Free Software Foundation, Inc.
9
10 This file is part of the GNU Binutils and GDB, the GNU debugger.
11
12 This program is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2, or (at your option)
15 any later version.
16
17 This program is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
21
22 You should have received a copy of the GNU General Public License
23 along with this program; if not, write to the Free Software Foundation, Inc.,
24 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
25
26 /* ??? Eventually more and more of this stuff can go to cpu-independent files.
27 Keep that in mind. */
28
29 #include "sysdep.h"
30 #include <stdio.h>
31 #include "ansidecl.h"
32 #include "bfd.h"
33 #include "symcat.h"
34 #include "m32c-desc.h"
35 #include "m32c-opc.h"
36 #include "opintl.h"
37 #include "xregex.h"
38 #include "libiberty.h"
39 #include "safe-ctype.h"
40
41 #undef min
42 #define min(a,b) ((a) < (b) ? (a) : (b))
43 #undef max
44 #define max(a,b) ((a) > (b) ? (a) : (b))
45
46 static const char * parse_insn_normal
47 (CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *);
48 \f
49 /* -- assembler routines inserted here. */
50
51 /* -- asm.c */
52 #include "safe-ctype.h"
53
54 #define MACH_M32C 5 /* Must match md_begin. */
55
56 static int
57 m32c_cgen_isa_register (const char **strp)
58 {
59 int u;
60 const char *s = *strp;
61 static char * m32c_register_names [] =
62 {
63 "r0", "r1", "r2", "r3", "r0l", "r0h", "r1l", "r1h",
64 "a0", "a1", "r2r0", "r3r1", "sp", "fb", "dct0", "dct1", "flg", "svf",
65 "drc0", "drc1", "dmd0", "dmd1", "intb", "svp", "vct", "isp", "dma0",
66 "dma1", "dra0", "dra1", "dsa0", "dsa1", 0
67 };
68
69 for (u = 0; m32c_register_names[u]; u++)
70 {
71 int len = strlen (m32c_register_names[u]);
72
73 if (memcmp (m32c_register_names[u], s, len) == 0
74 && (s[len] == 0 || ! ISALNUM (s[len])))
75 return 1;
76 }
77 return 0;
78 }
79
80 #define PARSE_UNSIGNED \
81 do \
82 { \
83 /* Don't successfully parse literals beginning with '['. */ \
84 if (**strp == '[') \
85 return "Invalid literal"; /* Anything -- will not be seen. */ \
86 \
87 errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);\
88 if (errmsg) \
89 return errmsg; \
90 } \
91 while (0)
92
93 #define PARSE_SIGNED \
94 do \
95 { \
96 /* Don't successfully parse literals beginning with '['. */ \
97 if (**strp == '[') \
98 return "Invalid literal"; /* Anything -- will not be seen. */ \
99 \
100 errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value); \
101 if (errmsg) \
102 return errmsg; \
103 } \
104 while (0)
105
106 static const char *
107 parse_unsigned6 (CGEN_CPU_DESC cd, const char **strp,
108 int opindex, unsigned long *valuep)
109 {
110 const char *errmsg = 0;
111 unsigned long value;
112
113 PARSE_UNSIGNED;
114
115 if (value > 0x3f)
116 return _("imm:6 immediate is out of range");
117
118 *valuep = value;
119 return 0;
120 }
121
122 static const char *
123 parse_unsigned8 (CGEN_CPU_DESC cd, const char **strp,
124 int opindex, unsigned long *valuep)
125 {
126 const char *errmsg = 0;
127 unsigned long value;
128 long have_zero = 0;
129
130 if (strncasecmp (*strp, "%dsp8(", 6) == 0)
131 {
132 enum cgen_parse_operand_result result_type;
133 bfd_vma value;
134 const char *errmsg;
135
136 *strp += 6;
137 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_8,
138 & result_type, & value);
139 if (**strp != ')')
140 return _("missing `)'");
141 (*strp) ++;
142
143 if (errmsg == NULL
144 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
145 {
146 return _("%dsp8() takes a symbolic address, not a number");
147 }
148 *valuep = value;
149 return errmsg;
150 }
151
152 if (strncmp (*strp, "0x0", 3) == 0
153 || (**strp == '0' && *(*strp + 1) != 'x'))
154 have_zero = 1;
155
156 PARSE_UNSIGNED;
157
158 if (value > 0xff)
159 return _("dsp:8 immediate is out of range");
160
161 /* If this field may require a relocation then use larger dsp16. */
162 if (! have_zero && value == 0)
163 return _("dsp:8 immediate is out of range");
164
165 *valuep = value;
166 return 0;
167 }
168
169 static const char *
170 parse_signed4 (CGEN_CPU_DESC cd, const char **strp,
171 int opindex, signed long *valuep)
172 {
173 const char *errmsg = 0;
174 signed long value;
175 long have_zero = 0;
176
177 if (strncmp (*strp, "0x0", 3) == 0
178 || (**strp == '0' && *(*strp + 1) != 'x'))
179 have_zero = 1;
180
181 PARSE_SIGNED;
182
183 if (value < -8 || value > 7)
184 return _("Immediate is out of range -8 to 7");
185
186 /* If this field may require a relocation then use larger dsp16. */
187 if (! have_zero && value == 0)
188 return _("Immediate is out of range -8 to 7");
189
190 *valuep = value;
191 return 0;
192 }
193
194 static const char *
195 parse_signed4n (CGEN_CPU_DESC cd, const char **strp,
196 int opindex, signed long *valuep)
197 {
198 const char *errmsg = 0;
199 signed long value;
200 long have_zero = 0;
201
202 if (strncmp (*strp, "0x0", 3) == 0
203 || (**strp == '0' && *(*strp + 1) != 'x'))
204 have_zero = 1;
205
206 PARSE_SIGNED;
207
208 if (value < -7 || value > 8)
209 return _("Immediate is out of range -7 to 8");
210
211 /* If this field may require a relocation then use larger dsp16. */
212 if (! have_zero && value == 0)
213 return _("Immediate is out of range -7 to 8");
214
215 *valuep = -value;
216 return 0;
217 }
218
219 static const char *
220 parse_signed8 (CGEN_CPU_DESC cd, const char **strp,
221 int opindex, signed long *valuep)
222 {
223 const char *errmsg = 0;
224 signed long value;
225
226 if (strncasecmp (*strp, "%hi8(", 5) == 0)
227 {
228 enum cgen_parse_operand_result result_type;
229 bfd_vma value;
230 const char *errmsg;
231
232 *strp += 5;
233 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32C_HI8,
234 & result_type, & value);
235 if (**strp != ')')
236 return _("missing `)'");
237 (*strp) ++;
238
239 if (errmsg == NULL
240 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
241 {
242 value >>= 16;
243 }
244 *valuep = value;
245 return errmsg;
246 }
247
248 PARSE_SIGNED;
249
250 if (value <= 255 && value > 127)
251 value -= 0x100;
252
253 if (value < -128 || value > 127)
254 return _("dsp:8 immediate is out of range");
255
256 *valuep = value;
257 return 0;
258 }
259
260 static const char *
261 parse_unsigned16 (CGEN_CPU_DESC cd, const char **strp,
262 int opindex, unsigned long *valuep)
263 {
264 const char *errmsg = 0;
265 unsigned long value;
266 long have_zero = 0;
267
268 if (strncasecmp (*strp, "%dsp16(", 7) == 0)
269 {
270 enum cgen_parse_operand_result result_type;
271 bfd_vma value;
272 const char *errmsg;
273
274 *strp += 7;
275 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_16,
276 & result_type, & value);
277 if (**strp != ')')
278 return _("missing `)'");
279 (*strp) ++;
280
281 if (errmsg == NULL
282 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
283 {
284 return _("%dsp16() takes a symbolic address, not a number");
285 }
286 *valuep = value;
287 return errmsg;
288 }
289
290 /* Don't successfully parse literals beginning with '['. */
291 if (**strp == '[')
292 return "Invalid literal"; /* Anything -- will not be seen. */
293
294 /* Don't successfully parse register names. */
295 if (m32c_cgen_isa_register (strp))
296 return "Invalid literal"; /* Anything -- will not be seen. */
297
298 if (strncmp (*strp, "0x0", 3) == 0
299 || (**strp == '0' && *(*strp + 1) != 'x'))
300 have_zero = 1;
301
302 errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);
303 if (errmsg)
304 return errmsg;
305
306 if (value > 0xffff)
307 return _("dsp:16 immediate is out of range");
308
309 /* If this field may require a relocation then use larger dsp24. */
310 if (cd->machs == MACH_M32C && ! have_zero && value == 0
311 && (strncmp (*strp, "[a", 2) == 0
312 || **strp == ','
313 || **strp == 0))
314 return _("dsp:16 immediate is out of range");
315
316 *valuep = value;
317 return 0;
318 }
319
320 static const char *
321 parse_signed16 (CGEN_CPU_DESC cd, const char **strp,
322 int opindex, signed long *valuep)
323 {
324 const char *errmsg = 0;
325 signed long value;
326
327 if (strncasecmp (*strp, "%lo16(", 6) == 0)
328 {
329 enum cgen_parse_operand_result result_type;
330 bfd_vma value;
331 const char *errmsg;
332
333 *strp += 6;
334 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_LO16,
335 & result_type, & value);
336 if (**strp != ')')
337 return _("missing `)'");
338 (*strp) ++;
339
340 if (errmsg == NULL
341 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
342 {
343 value &= 0xffff;
344 }
345 *valuep = value;
346 return errmsg;
347 }
348
349 if (strncasecmp (*strp, "%hi16(", 6) == 0)
350 {
351 enum cgen_parse_operand_result result_type;
352 bfd_vma value;
353 const char *errmsg;
354
355 *strp += 6;
356 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_HI16,
357 & result_type, & value);
358 if (**strp != ')')
359 return _("missing `)'");
360 (*strp) ++;
361
362 if (errmsg == NULL
363 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
364 {
365 value >>= 16;
366 }
367 *valuep = value;
368 return errmsg;
369 }
370
371 PARSE_SIGNED;
372
373 if (value <= 65535 && value > 32767)
374 value -= 0x10000;
375
376 if (value < -32768 || value > 32767)
377 return _("dsp:16 immediate is out of range");
378
379 *valuep = value;
380 return 0;
381 }
382
383 static const char *
384 parse_unsigned20 (CGEN_CPU_DESC cd, const char **strp,
385 int opindex, unsigned long *valuep)
386 {
387 const char *errmsg = 0;
388 unsigned long value;
389
390 /* Don't successfully parse literals beginning with '['. */
391 if (**strp == '[')
392 return "Invalid literal"; /* Anything -- will not be seen. */
393
394 /* Don't successfully parse register names. */
395 if (m32c_cgen_isa_register (strp))
396 return "Invalid literal"; /* Anything -- will not be seen. */
397
398 errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);
399 if (errmsg)
400 return errmsg;
401
402 if (value > 0xfffff)
403 return _("dsp:20 immediate is out of range");
404
405 *valuep = value;
406 return 0;
407 }
408
409 static const char *
410 parse_unsigned24 (CGEN_CPU_DESC cd, const char **strp,
411 int opindex, unsigned long *valuep)
412 {
413 const char *errmsg = 0;
414 unsigned long value;
415
416 /* Don't successfully parse literals beginning with '['. */
417 if (**strp == '[')
418 return "Invalid literal"; /* Anything -- will not be seen. */
419
420 /* Don't successfully parse register names. */
421 if (m32c_cgen_isa_register (strp))
422 return "Invalid literal"; /* Anything -- will not be seen. */
423
424 errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);
425 if (errmsg)
426 return errmsg;
427
428 if (value > 0xffffff)
429 return _("dsp:24 immediate is out of range");
430
431 *valuep = value;
432 return 0;
433 }
434
435 /* This should only be used for #imm->reg. */
436 static const char *
437 parse_signed24 (CGEN_CPU_DESC cd, const char **strp,
438 int opindex, signed long *valuep)
439 {
440 const char *errmsg = 0;
441 signed long value;
442
443 PARSE_SIGNED;
444
445 if (value <= 0xffffff && value > 0x7fffff)
446 value -= 0x1000000;
447
448 if (value > 0xffffff)
449 return _("dsp:24 immediate is out of range");
450
451 *valuep = value;
452 return 0;
453 }
454
455 static const char *
456 parse_signed32 (CGEN_CPU_DESC cd, const char **strp,
457 int opindex, signed long *valuep)
458 {
459 const char *errmsg = 0;
460 signed long value;
461
462 errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value);
463 if (errmsg)
464 return errmsg;
465
466 *valuep = value;
467 return 0;
468 }
469
470 static const char *
471 parse_imm1_S (CGEN_CPU_DESC cd, const char **strp,
472 int opindex, signed long *valuep)
473 {
474 const char *errmsg = 0;
475 signed long value;
476
477 errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value);
478 if (errmsg)
479 return errmsg;
480
481 if (value < 1 || value > 2)
482 return _("immediate is out of range 1-2");
483
484 *valuep = value;
485 return 0;
486 }
487
488 static const char *
489 parse_imm3_S (CGEN_CPU_DESC cd, const char **strp,
490 int opindex, signed long *valuep)
491 {
492 const char *errmsg = 0;
493 signed long value;
494
495 errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value);
496 if (errmsg)
497 return errmsg;
498
499 if (value < 1 || value > 8)
500 return _("immediate is out of range 1-8");
501
502 *valuep = value;
503 return 0;
504 }
505
506 static const char *
507 parse_lab_5_3 (CGEN_CPU_DESC cd,
508 const char **strp,
509 int opindex ATTRIBUTE_UNUSED,
510 int opinfo,
511 enum cgen_parse_operand_result *type_addr,
512 bfd_vma *valuep)
513 {
514 const char *errmsg = 0;
515 bfd_vma value;
516 enum cgen_parse_operand_result op_res;
517
518 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_5_3,
519 opinfo, & op_res, & value);
520
521 if (type_addr)
522 *type_addr = op_res;
523
524 if (op_res == CGEN_PARSE_OPERAND_ADDRESS)
525 {
526 /* This is a hack; the field cannot handle near-zero signed
527 offsets that CGEN wants to put in to indicate an "empty"
528 operand at first. */
529 *valuep = 2;
530 return 0;
531 }
532 if (errmsg)
533 return errmsg;
534
535 if (value < 2 || value > 9)
536 return _("immediate is out of range 2-9");
537
538 *valuep = value;
539 return 0;
540 }
541
542 static const char *
543 parse_Bitno16R (CGEN_CPU_DESC cd, const char **strp,
544 int opindex, unsigned long *valuep)
545 {
546 const char *errmsg = 0;
547 unsigned long value;
548
549 errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);
550 if (errmsg)
551 return errmsg;
552
553 if (value > 15)
554 return _("Bit number for indexing general register is out of range 0-15");
555
556 *valuep = value;
557 return 0;
558 }
559
560 static const char *
561 parse_unsigned_bitbase (CGEN_CPU_DESC cd, const char **strp,
562 int opindex, unsigned long *valuep,
563 unsigned bits)
564 {
565 const char *errmsg = 0;
566 unsigned long bit;
567 unsigned long base;
568 const char *newp = *strp;
569 unsigned long long bitbase;
570
571 errmsg = cgen_parse_unsigned_integer (cd, & newp, opindex, & bit);
572 if (errmsg)
573 return errmsg;
574
575 if (*newp != ',')
576 return "Missing base for bit,base:8";
577
578 ++newp;
579 errmsg = cgen_parse_unsigned_integer (cd, & newp, opindex, & base);
580 if (errmsg)
581 return errmsg;
582
583 bitbase = (unsigned long long) bit + ((unsigned long long) base * 8);
584
585 if (bitbase >= (1ull << bits))
586 return _("bit,base is out of range");
587
588 *valuep = bitbase;
589 *strp = newp;
590 return 0;
591 }
592
593 static const char *
594 parse_signed_bitbase (CGEN_CPU_DESC cd, const char **strp,
595 int opindex, signed long *valuep,
596 unsigned bits)
597 {
598 const char *errmsg = 0;
599 unsigned long bit;
600 signed long base;
601 const char *newp = *strp;
602 long long bitbase;
603 long long limit;
604
605 errmsg = cgen_parse_unsigned_integer (cd, & newp, opindex, & bit);
606 if (errmsg)
607 return errmsg;
608
609 if (*newp != ',')
610 return "Missing base for bit,base:8";
611
612 ++newp;
613 errmsg = cgen_parse_signed_integer (cd, & newp, opindex, & base);
614 if (errmsg)
615 return errmsg;
616
617 bitbase = (long long)bit + ((long long)base * 8);
618
619 limit = 1ll << (bits - 1);
620 if (bitbase < -limit || bitbase >= limit)
621 return _("bit,base is out of range");
622
623 *valuep = bitbase;
624 *strp = newp;
625 return 0;
626 }
627
628 static const char *
629 parse_unsigned_bitbase8 (CGEN_CPU_DESC cd, const char **strp,
630 int opindex, unsigned long *valuep)
631 {
632 return parse_unsigned_bitbase (cd, strp, opindex, valuep, 8);
633 }
634
635 static const char *
636 parse_unsigned_bitbase11 (CGEN_CPU_DESC cd, const char **strp,
637 int opindex, unsigned long *valuep)
638 {
639 return parse_unsigned_bitbase (cd, strp, opindex, valuep, 11);
640 }
641
642 static const char *
643 parse_unsigned_bitbase16 (CGEN_CPU_DESC cd, const char **strp,
644 int opindex, unsigned long *valuep)
645 {
646 return parse_unsigned_bitbase (cd, strp, opindex, valuep, 16);
647 }
648
649 static const char *
650 parse_unsigned_bitbase19 (CGEN_CPU_DESC cd, const char **strp,
651 int opindex, unsigned long *valuep)
652 {
653 return parse_unsigned_bitbase (cd, strp, opindex, valuep, 19);
654 }
655
656 static const char *
657 parse_unsigned_bitbase27 (CGEN_CPU_DESC cd, const char **strp,
658 int opindex, unsigned long *valuep)
659 {
660 return parse_unsigned_bitbase (cd, strp, opindex, valuep, 27);
661 }
662
663 static const char *
664 parse_signed_bitbase8 (CGEN_CPU_DESC cd, const char **strp,
665 int opindex, signed long *valuep)
666 {
667 return parse_signed_bitbase (cd, strp, opindex, valuep, 8);
668 }
669
670 static const char *
671 parse_signed_bitbase11 (CGEN_CPU_DESC cd, const char **strp,
672 int opindex, signed long *valuep)
673 {
674 return parse_signed_bitbase (cd, strp, opindex, valuep, 11);
675 }
676
677 static const char *
678 parse_signed_bitbase19 (CGEN_CPU_DESC cd, const char **strp,
679 int opindex, signed long *valuep)
680 {
681 return parse_signed_bitbase (cd, strp, opindex, valuep, 19);
682 }
683
684 /* Parse the suffix as :<char> or as nothing followed by a whitespace. */
685
686 static const char *
687 parse_suffix (const char **strp, char suffix)
688 {
689 const char *newp = *strp;
690
691 if (**strp == ':' && TOLOWER (*(*strp + 1)) == suffix)
692 newp = *strp + 2;
693
694 if (ISSPACE (*newp))
695 {
696 *strp = newp;
697 return 0;
698 }
699
700 return "Invalid suffix"; /* Anything -- will not be seen. */
701 }
702
703 static const char *
704 parse_S (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
705 int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
706 {
707 return parse_suffix (strp, 's');
708 }
709
710 static const char *
711 parse_G (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
712 int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
713 {
714 return parse_suffix (strp, 'g');
715 }
716
717 static const char *
718 parse_Q (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
719 int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
720 {
721 return parse_suffix (strp, 'q');
722 }
723
724 static const char *
725 parse_Z (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
726 int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
727 {
728 return parse_suffix (strp, 'z');
729 }
730
731 /* Parse an empty suffix. Fail if the next char is ':'. */
732
733 static const char *
734 parse_X (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
735 int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
736 {
737 if (**strp == ':')
738 return "Unexpected suffix";
739 return 0;
740 }
741
742 static const char *
743 parse_r0l_r0h (CGEN_CPU_DESC cd, const char **strp,
744 int opindex ATTRIBUTE_UNUSED, signed long *valuep)
745 {
746 const char *errmsg;
747 signed long value;
748 signed long junk;
749 const char *newp = *strp;
750
751 /* Parse r0[hl]. */
752 errmsg = cgen_parse_keyword (cd, & newp, & m32c_cgen_opval_h_r0l_r0h, & value);
753 if (errmsg)
754 return errmsg;
755
756 if (*newp != ',')
757 return _("not a valid r0l/r0h pair");
758 ++newp;
759
760 /* Parse the second register in the pair. */
761 if (value == 0) /* r0l */
762 errmsg = cgen_parse_keyword (cd, & newp, & m32c_cgen_opval_h_r0h, & junk);
763 else
764 errmsg = cgen_parse_keyword (cd, & newp, & m32c_cgen_opval_h_r0l, & junk);
765 if (errmsg)
766 return errmsg;
767
768 *strp = newp;
769 *valuep = ! value;
770 return 0;
771 }
772
773 /* Accept .b or .w in any case. */
774
775 static const char *
776 parse_size (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
777 int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
778 {
779 if (**strp == '.'
780 && (*(*strp + 1) == 'b' || *(*strp + 1) == 'B'
781 || *(*strp + 1) == 'w' || *(*strp + 1) == 'W'))
782 {
783 *strp += 2;
784 return NULL;
785 }
786
787 return _("Invalid size specifier");
788 }
789
790 /* Special check to ensure that instruction exists for given machine. */
791
792 int
793 m32c_cgen_insn_supported (CGEN_CPU_DESC cd,
794 const CGEN_INSN *insn)
795 {
796 int machs = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH);
797 CGEN_BITSET isas = CGEN_INSN_BITSET_ATTR_VALUE (insn, CGEN_INSN_ISA);
798
799 /* If attributes are absent, assume no restriction. */
800 if (machs == 0)
801 machs = ~0;
802
803 return ((machs & cd->machs)
804 && cgen_bitset_intersect_p (& isas, cd->isas));
805 }
806
807 /* Parse a set of registers, R0,R1,A0,A1,SB,FB. */
808
809 static const char *
810 parse_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
811 const char **strp,
812 int opindex ATTRIBUTE_UNUSED,
813 unsigned long *valuep,
814 int push)
815 {
816 const char *errmsg = 0;
817 int regno = 0;
818
819 *valuep = 0;
820 while (**strp && **strp != ')')
821 {
822 if (**strp == 'r' || **strp == 'R')
823 {
824 ++*strp;
825 regno = **strp - '0';
826 if (regno > 4)
827 errmsg = _("Register number is not valid");
828 }
829 else if (**strp == 'a' || **strp == 'A')
830 {
831 ++*strp;
832 regno = **strp - '0';
833 if (regno > 2)
834 errmsg = _("Register number is not valid");
835 regno = **strp - '0' + 4;
836 }
837
838 else if (strncasecmp (*strp, "sb", 2) == 0 || strncasecmp (*strp, "SB", 2) == 0)
839 {
840 regno = 6;
841 ++*strp;
842 }
843
844 else if (strncasecmp (*strp, "fb", 2) == 0 || strncasecmp (*strp, "FB", 2) == 0)
845 {
846 regno = 7;
847 ++*strp;
848 }
849
850 if (push) /* Mask is reversed for push. */
851 *valuep |= 0x80 >> regno;
852 else
853 *valuep |= 1 << regno;
854
855 ++*strp;
856 if (**strp == ',')
857 {
858 if (*(*strp + 1) == ')')
859 break;
860 ++*strp;
861 }
862 }
863
864 if (!*strp)
865 errmsg = _("Register list is not valid");
866
867 return errmsg;
868 }
869
870 #define POP 0
871 #define PUSH 1
872
873 static const char *
874 parse_pop_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
875 const char **strp,
876 int opindex ATTRIBUTE_UNUSED,
877 unsigned long *valuep)
878 {
879 return parse_regset (cd, strp, opindex, valuep, POP);
880 }
881
882 static const char *
883 parse_push_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
884 const char **strp,
885 int opindex ATTRIBUTE_UNUSED,
886 unsigned long *valuep)
887 {
888 return parse_regset (cd, strp, opindex, valuep, PUSH);
889 }
890
891 /* -- dis.c */
892
893 const char * m32c_cgen_parse_operand
894 (CGEN_CPU_DESC, int, const char **, CGEN_FIELDS *);
895
896 /* Main entry point for operand parsing.
897
898 This function is basically just a big switch statement. Earlier versions
899 used tables to look up the function to use, but
900 - if the table contains both assembler and disassembler functions then
901 the disassembler contains much of the assembler and vice-versa,
902 - there's a lot of inlining possibilities as things grow,
903 - using a switch statement avoids the function call overhead.
904
905 This function could be moved into `parse_insn_normal', but keeping it
906 separate makes clear the interface between `parse_insn_normal' and each of
907 the handlers. */
908
909 const char *
910 m32c_cgen_parse_operand (CGEN_CPU_DESC cd,
911 int opindex,
912 const char ** strp,
913 CGEN_FIELDS * fields)
914 {
915 const char * errmsg = NULL;
916 /* Used by scalar operands that still need to be parsed. */
917 long junk ATTRIBUTE_UNUSED;
918
919 switch (opindex)
920 {
921 case M32C_OPERAND_A0 :
922 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_a0, & junk);
923 break;
924 case M32C_OPERAND_A1 :
925 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_a1, & junk);
926 break;
927 case M32C_OPERAND_AN16_PUSH_S :
928 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_4_1);
929 break;
930 case M32C_OPERAND_BIT16AN :
931 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst16_an);
932 break;
933 case M32C_OPERAND_BIT16RN :
934 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_dst16_rn);
935 break;
936 case M32C_OPERAND_BIT32ANPREFIXED :
937 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_prefixed);
938 break;
939 case M32C_OPERAND_BIT32ANUNPREFIXED :
940 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_unprefixed);
941 break;
942 case M32C_OPERAND_BIT32RNPREFIXED :
943 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst32_rn_prefixed_QI);
944 break;
945 case M32C_OPERAND_BIT32RNUNPREFIXED :
946 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst32_rn_unprefixed_QI);
947 break;
948 case M32C_OPERAND_BITBASE16_16_S8 :
949 errmsg = parse_signed_bitbase8 (cd, strp, M32C_OPERAND_BITBASE16_16_S8, (long *) (& fields->f_dsp_16_s8));
950 break;
951 case M32C_OPERAND_BITBASE16_16_U16 :
952 errmsg = parse_unsigned_bitbase16 (cd, strp, M32C_OPERAND_BITBASE16_16_U16, (unsigned long *) (& fields->f_dsp_16_u16));
953 break;
954 case M32C_OPERAND_BITBASE16_16_U8 :
955 errmsg = parse_unsigned_bitbase8 (cd, strp, M32C_OPERAND_BITBASE16_16_U8, (unsigned long *) (& fields->f_dsp_16_u8));
956 break;
957 case M32C_OPERAND_BITBASE16_8_U11_S :
958 errmsg = parse_unsigned_bitbase11 (cd, strp, M32C_OPERAND_BITBASE16_8_U11_S, (unsigned long *) (& fields->f_bitbase16_u11_S));
959 break;
960 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
961 errmsg = parse_signed_bitbase11 (cd, strp, M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED, (long *) (& fields->f_bitbase32_16_s11_unprefixed));
962 break;
963 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
964 errmsg = parse_signed_bitbase19 (cd, strp, M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED, (long *) (& fields->f_bitbase32_16_s19_unprefixed));
965 break;
966 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
967 errmsg = parse_unsigned_bitbase11 (cd, strp, M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED, (unsigned long *) (& fields->f_bitbase32_16_u11_unprefixed));
968 break;
969 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
970 errmsg = parse_unsigned_bitbase19 (cd, strp, M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED, (unsigned long *) (& fields->f_bitbase32_16_u19_unprefixed));
971 break;
972 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
973 errmsg = parse_unsigned_bitbase27 (cd, strp, M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED, (unsigned long *) (& fields->f_bitbase32_16_u27_unprefixed));
974 break;
975 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
976 errmsg = parse_signed_bitbase11 (cd, strp, M32C_OPERAND_BITBASE32_24_S11_PREFIXED, (long *) (& fields->f_bitbase32_24_s11_prefixed));
977 break;
978 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
979 errmsg = parse_signed_bitbase19 (cd, strp, M32C_OPERAND_BITBASE32_24_S19_PREFIXED, (long *) (& fields->f_bitbase32_24_s19_prefixed));
980 break;
981 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
982 errmsg = parse_unsigned_bitbase11 (cd, strp, M32C_OPERAND_BITBASE32_24_U11_PREFIXED, (unsigned long *) (& fields->f_bitbase32_24_u11_prefixed));
983 break;
984 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
985 errmsg = parse_unsigned_bitbase19 (cd, strp, M32C_OPERAND_BITBASE32_24_U19_PREFIXED, (unsigned long *) (& fields->f_bitbase32_24_u19_prefixed));
986 break;
987 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
988 errmsg = parse_unsigned_bitbase27 (cd, strp, M32C_OPERAND_BITBASE32_24_U27_PREFIXED, (unsigned long *) (& fields->f_bitbase32_24_u27_prefixed));
989 break;
990 case M32C_OPERAND_BITNO16R :
991 errmsg = parse_Bitno16R (cd, strp, M32C_OPERAND_BITNO16R, (unsigned long *) (& fields->f_dsp_16_u8));
992 break;
993 case M32C_OPERAND_BITNO32PREFIXED :
994 errmsg = cgen_parse_unsigned_integer (cd, strp, M32C_OPERAND_BITNO32PREFIXED, (unsigned long *) (& fields->f_bitno32_prefixed));
995 break;
996 case M32C_OPERAND_BITNO32UNPREFIXED :
997 errmsg = cgen_parse_unsigned_integer (cd, strp, M32C_OPERAND_BITNO32UNPREFIXED, (unsigned long *) (& fields->f_bitno32_unprefixed));
998 break;
999 case M32C_OPERAND_DSP_10_U6 :
1000 errmsg = parse_unsigned6 (cd, strp, M32C_OPERAND_DSP_10_U6, (unsigned long *) (& fields->f_dsp_10_u6));
1001 break;
1002 case M32C_OPERAND_DSP_16_S16 :
1003 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_16_S16, (long *) (& fields->f_dsp_16_s16));
1004 break;
1005 case M32C_OPERAND_DSP_16_S8 :
1006 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_16_S8, (long *) (& fields->f_dsp_16_s8));
1007 break;
1008 case M32C_OPERAND_DSP_16_U16 :
1009 errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_16_U16, (unsigned long *) (& fields->f_dsp_16_u16));
1010 break;
1011 case M32C_OPERAND_DSP_16_U20 :
1012 errmsg = parse_unsigned20 (cd, strp, M32C_OPERAND_DSP_16_U20, (unsigned long *) (& fields->f_dsp_16_u24));
1013 break;
1014 case M32C_OPERAND_DSP_16_U24 :
1015 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_16_U24, (unsigned long *) (& fields->f_dsp_16_u24));
1016 break;
1017 case M32C_OPERAND_DSP_16_U8 :
1018 errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_16_U8, (unsigned long *) (& fields->f_dsp_16_u8));
1019 break;
1020 case M32C_OPERAND_DSP_24_S16 :
1021 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_24_S16, (long *) (& fields->f_dsp_24_s16));
1022 break;
1023 case M32C_OPERAND_DSP_24_S8 :
1024 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_24_S8, (long *) (& fields->f_dsp_24_s8));
1025 break;
1026 case M32C_OPERAND_DSP_24_U16 :
1027 errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_24_U16, (unsigned long *) (& fields->f_dsp_24_u16));
1028 break;
1029 case M32C_OPERAND_DSP_24_U20 :
1030 errmsg = parse_unsigned20 (cd, strp, M32C_OPERAND_DSP_24_U20, (unsigned long *) (& fields->f_dsp_24_u24));
1031 break;
1032 case M32C_OPERAND_DSP_24_U24 :
1033 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_24_U24, (unsigned long *) (& fields->f_dsp_24_u24));
1034 break;
1035 case M32C_OPERAND_DSP_24_U8 :
1036 errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_24_U8, (unsigned long *) (& fields->f_dsp_24_u8));
1037 break;
1038 case M32C_OPERAND_DSP_32_S16 :
1039 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_32_S16, (long *) (& fields->f_dsp_32_s16));
1040 break;
1041 case M32C_OPERAND_DSP_32_S8 :
1042 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_32_S8, (long *) (& fields->f_dsp_32_s8));
1043 break;
1044 case M32C_OPERAND_DSP_32_U16 :
1045 errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_32_U16, (unsigned long *) (& fields->f_dsp_32_u16));
1046 break;
1047 case M32C_OPERAND_DSP_32_U20 :
1048 errmsg = parse_unsigned20 (cd, strp, M32C_OPERAND_DSP_32_U20, (unsigned long *) (& fields->f_dsp_32_u24));
1049 break;
1050 case M32C_OPERAND_DSP_32_U24 :
1051 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_32_U24, (unsigned long *) (& fields->f_dsp_32_u24));
1052 break;
1053 case M32C_OPERAND_DSP_32_U8 :
1054 errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_32_U8, (unsigned long *) (& fields->f_dsp_32_u8));
1055 break;
1056 case M32C_OPERAND_DSP_40_S16 :
1057 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_40_S16, (long *) (& fields->f_dsp_40_s16));
1058 break;
1059 case M32C_OPERAND_DSP_40_S8 :
1060 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_40_S8, (long *) (& fields->f_dsp_40_s8));
1061 break;
1062 case M32C_OPERAND_DSP_40_U16 :
1063 errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_40_U16, (unsigned long *) (& fields->f_dsp_40_u16));
1064 break;
1065 case M32C_OPERAND_DSP_40_U24 :
1066 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_40_U24, (unsigned long *) (& fields->f_dsp_40_u24));
1067 break;
1068 case M32C_OPERAND_DSP_40_U8 :
1069 errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_40_U8, (unsigned long *) (& fields->f_dsp_40_u8));
1070 break;
1071 case M32C_OPERAND_DSP_48_S16 :
1072 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_48_S16, (long *) (& fields->f_dsp_48_s16));
1073 break;
1074 case M32C_OPERAND_DSP_48_S8 :
1075 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_48_S8, (long *) (& fields->f_dsp_48_s8));
1076 break;
1077 case M32C_OPERAND_DSP_48_U16 :
1078 errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_48_U16, (unsigned long *) (& fields->f_dsp_48_u16));
1079 break;
1080 case M32C_OPERAND_DSP_48_U24 :
1081 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_48_U24, (unsigned long *) (& fields->f_dsp_48_u24));
1082 break;
1083 case M32C_OPERAND_DSP_48_U8 :
1084 errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_48_U8, (unsigned long *) (& fields->f_dsp_48_u8));
1085 break;
1086 case M32C_OPERAND_DSP_8_S24 :
1087 errmsg = parse_signed24 (cd, strp, M32C_OPERAND_DSP_8_S24, (long *) (& fields->f_dsp_8_s24));
1088 break;
1089 case M32C_OPERAND_DSP_8_S8 :
1090 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_8_S8, (long *) (& fields->f_dsp_8_s8));
1091 break;
1092 case M32C_OPERAND_DSP_8_U16 :
1093 errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_8_U16, (unsigned long *) (& fields->f_dsp_8_u16));
1094 break;
1095 case M32C_OPERAND_DSP_8_U24 :
1096 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_8_U24, (unsigned long *) (& fields->f_dsp_8_u24));
1097 break;
1098 case M32C_OPERAND_DSP_8_U6 :
1099 errmsg = parse_unsigned6 (cd, strp, M32C_OPERAND_DSP_8_U6, (unsigned long *) (& fields->f_dsp_8_u6));
1100 break;
1101 case M32C_OPERAND_DSP_8_U8 :
1102 errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_8_U8, (unsigned long *) (& fields->f_dsp_8_u8));
1103 break;
1104 case M32C_OPERAND_DST16AN :
1105 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst16_an);
1106 break;
1107 case M32C_OPERAND_DST16AN_S :
1108 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_dst16_an_s);
1109 break;
1110 case M32C_OPERAND_DST16ANHI :
1111 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_dst16_an);
1112 break;
1113 case M32C_OPERAND_DST16ANQI :
1114 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_dst16_an);
1115 break;
1116 case M32C_OPERAND_DST16ANQI_S :
1117 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_dst16_rn_QI_s);
1118 break;
1119 case M32C_OPERAND_DST16ANSI :
1120 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_SI, & fields->f_dst16_an);
1121 break;
1122 case M32C_OPERAND_DST16RNEXTQI :
1123 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_ext_QI, & fields->f_dst16_rn_ext);
1124 break;
1125 case M32C_OPERAND_DST16RNHI :
1126 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_dst16_rn);
1127 break;
1128 case M32C_OPERAND_DST16RNQI :
1129 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst16_rn);
1130 break;
1131 case M32C_OPERAND_DST16RNQI_S :
1132 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0l_r0h, & fields->f_dst16_rn_QI_s);
1133 break;
1134 case M32C_OPERAND_DST16RNSI :
1135 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_dst16_rn);
1136 break;
1137 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
1138 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_unprefixed);
1139 break;
1140 case M32C_OPERAND_DST32ANPREFIXED :
1141 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_prefixed);
1142 break;
1143 case M32C_OPERAND_DST32ANPREFIXEDHI :
1144 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_dst32_an_prefixed);
1145 break;
1146 case M32C_OPERAND_DST32ANPREFIXEDQI :
1147 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_dst32_an_prefixed);
1148 break;
1149 case M32C_OPERAND_DST32ANPREFIXEDSI :
1150 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_prefixed);
1151 break;
1152 case M32C_OPERAND_DST32ANUNPREFIXED :
1153 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_unprefixed);
1154 break;
1155 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
1156 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_dst32_an_unprefixed);
1157 break;
1158 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
1159 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_dst32_an_unprefixed);
1160 break;
1161 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
1162 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_unprefixed);
1163 break;
1164 case M32C_OPERAND_DST32R0HI_S :
1165 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0, & junk);
1166 break;
1167 case M32C_OPERAND_DST32R0QI_S :
1168 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0l, & junk);
1169 break;
1170 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
1171 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_ext_HI, & fields->f_dst32_rn_ext_unprefixed);
1172 break;
1173 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
1174 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_ext_QI, & fields->f_dst32_rn_ext_unprefixed);
1175 break;
1176 case M32C_OPERAND_DST32RNPREFIXEDHI :
1177 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_dst32_rn_prefixed_HI);
1178 break;
1179 case M32C_OPERAND_DST32RNPREFIXEDQI :
1180 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst32_rn_prefixed_QI);
1181 break;
1182 case M32C_OPERAND_DST32RNPREFIXEDSI :
1183 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_dst32_rn_prefixed_SI);
1184 break;
1185 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
1186 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_dst32_rn_unprefixed_HI);
1187 break;
1188 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
1189 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst32_rn_unprefixed_QI);
1190 break;
1191 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
1192 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_dst32_rn_unprefixed_SI);
1193 break;
1194 case M32C_OPERAND_G :
1195 errmsg = parse_G (cd, strp, M32C_OPERAND_G, (long *) (& junk));
1196 break;
1197 case M32C_OPERAND_IMM_12_S4 :
1198 errmsg = parse_signed4 (cd, strp, M32C_OPERAND_IMM_12_S4, (long *) (& fields->f_imm_12_s4));
1199 break;
1200 case M32C_OPERAND_IMM_12_S4N :
1201 errmsg = parse_signed4n (cd, strp, M32C_OPERAND_IMM_12_S4N, (long *) (& fields->f_imm_12_s4));
1202 break;
1203 case M32C_OPERAND_IMM_13_U3 :
1204 errmsg = parse_signed4 (cd, strp, M32C_OPERAND_IMM_13_U3, (long *) (& fields->f_imm_13_u3));
1205 break;
1206 case M32C_OPERAND_IMM_16_HI :
1207 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_16_HI, (long *) (& fields->f_dsp_16_s16));
1208 break;
1209 case M32C_OPERAND_IMM_16_QI :
1210 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_16_QI, (long *) (& fields->f_dsp_16_s8));
1211 break;
1212 case M32C_OPERAND_IMM_16_SI :
1213 errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_16_SI, (long *) (& fields->f_dsp_16_s32));
1214 break;
1215 case M32C_OPERAND_IMM_20_S4 :
1216 errmsg = parse_signed4 (cd, strp, M32C_OPERAND_IMM_20_S4, (long *) (& fields->f_imm_20_s4));
1217 break;
1218 case M32C_OPERAND_IMM_24_HI :
1219 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_24_HI, (long *) (& fields->f_dsp_24_s16));
1220 break;
1221 case M32C_OPERAND_IMM_24_QI :
1222 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_24_QI, (long *) (& fields->f_dsp_24_s8));
1223 break;
1224 case M32C_OPERAND_IMM_24_SI :
1225 errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_24_SI, (long *) (& fields->f_dsp_24_s32));
1226 break;
1227 case M32C_OPERAND_IMM_32_HI :
1228 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_32_HI, (long *) (& fields->f_dsp_32_s16));
1229 break;
1230 case M32C_OPERAND_IMM_32_QI :
1231 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_32_QI, (long *) (& fields->f_dsp_32_s8));
1232 break;
1233 case M32C_OPERAND_IMM_32_SI :
1234 errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_32_SI, (long *) (& fields->f_dsp_32_s32));
1235 break;
1236 case M32C_OPERAND_IMM_40_HI :
1237 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_40_HI, (long *) (& fields->f_dsp_40_s16));
1238 break;
1239 case M32C_OPERAND_IMM_40_QI :
1240 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_40_QI, (long *) (& fields->f_dsp_40_s8));
1241 break;
1242 case M32C_OPERAND_IMM_40_SI :
1243 errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_40_SI, (long *) (& fields->f_dsp_40_s32));
1244 break;
1245 case M32C_OPERAND_IMM_48_HI :
1246 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_48_HI, (long *) (& fields->f_dsp_48_s16));
1247 break;
1248 case M32C_OPERAND_IMM_48_QI :
1249 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_48_QI, (long *) (& fields->f_dsp_48_s8));
1250 break;
1251 case M32C_OPERAND_IMM_48_SI :
1252 errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_48_SI, (long *) (& fields->f_dsp_48_s32));
1253 break;
1254 case M32C_OPERAND_IMM_56_HI :
1255 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_56_HI, (long *) (& fields->f_dsp_56_s16));
1256 break;
1257 case M32C_OPERAND_IMM_56_QI :
1258 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_56_QI, (long *) (& fields->f_dsp_56_s8));
1259 break;
1260 case M32C_OPERAND_IMM_64_HI :
1261 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_64_HI, (long *) (& fields->f_dsp_64_s16));
1262 break;
1263 case M32C_OPERAND_IMM_8_HI :
1264 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_8_HI, (long *) (& fields->f_dsp_8_s16));
1265 break;
1266 case M32C_OPERAND_IMM_8_QI :
1267 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_8_QI, (long *) (& fields->f_dsp_8_s8));
1268 break;
1269 case M32C_OPERAND_IMM_8_S4 :
1270 errmsg = parse_signed4 (cd, strp, M32C_OPERAND_IMM_8_S4, (long *) (& fields->f_imm_8_s4));
1271 break;
1272 case M32C_OPERAND_IMM_8_S4N :
1273 errmsg = parse_signed4n (cd, strp, M32C_OPERAND_IMM_8_S4N, (long *) (& fields->f_imm_8_s4));
1274 break;
1275 case M32C_OPERAND_IMM_SH_12_S4 :
1276 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_shimm, & fields->f_imm_12_s4);
1277 break;
1278 case M32C_OPERAND_IMM_SH_20_S4 :
1279 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_shimm, & fields->f_imm_20_s4);
1280 break;
1281 case M32C_OPERAND_IMM_SH_8_S4 :
1282 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_shimm, & fields->f_imm_8_s4);
1283 break;
1284 case M32C_OPERAND_IMM1_S :
1285 errmsg = parse_imm1_S (cd, strp, M32C_OPERAND_IMM1_S, (long *) (& fields->f_imm1_S));
1286 break;
1287 case M32C_OPERAND_IMM3_S :
1288 errmsg = parse_imm3_S (cd, strp, M32C_OPERAND_IMM3_S, (long *) (& fields->f_imm3_S));
1289 break;
1290 case M32C_OPERAND_LAB_16_8 :
1291 {
1292 bfd_vma value = 0;
1293 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_16_8, 0, NULL, & value);
1294 fields->f_lab_16_8 = value;
1295 }
1296 break;
1297 case M32C_OPERAND_LAB_24_8 :
1298 {
1299 bfd_vma value = 0;
1300 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_24_8, 0, NULL, & value);
1301 fields->f_lab_24_8 = value;
1302 }
1303 break;
1304 case M32C_OPERAND_LAB_32_8 :
1305 {
1306 bfd_vma value = 0;
1307 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_32_8, 0, NULL, & value);
1308 fields->f_lab_32_8 = value;
1309 }
1310 break;
1311 case M32C_OPERAND_LAB_40_8 :
1312 {
1313 bfd_vma value = 0;
1314 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_40_8, 0, NULL, & value);
1315 fields->f_lab_40_8 = value;
1316 }
1317 break;
1318 case M32C_OPERAND_LAB_5_3 :
1319 {
1320 bfd_vma value = 0;
1321 errmsg = parse_lab_5_3 (cd, strp, M32C_OPERAND_LAB_5_3, 0, NULL, & value);
1322 fields->f_lab_5_3 = value;
1323 }
1324 break;
1325 case M32C_OPERAND_LAB_8_16 :
1326 {
1327 bfd_vma value = 0;
1328 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_8_16, 0, NULL, & value);
1329 fields->f_lab_8_16 = value;
1330 }
1331 break;
1332 case M32C_OPERAND_LAB_8_24 :
1333 {
1334 bfd_vma value = 0;
1335 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_8_24, 0, NULL, & value);
1336 fields->f_lab_8_24 = value;
1337 }
1338 break;
1339 case M32C_OPERAND_LAB_8_8 :
1340 {
1341 bfd_vma value = 0;
1342 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_8_8, 0, NULL, & value);
1343 fields->f_lab_8_8 = value;
1344 }
1345 break;
1346 case M32C_OPERAND_LAB32_JMP_S :
1347 {
1348 bfd_vma value = 0;
1349 errmsg = parse_lab_5_3 (cd, strp, M32C_OPERAND_LAB32_JMP_S, 0, NULL, & value);
1350 fields->f_lab32_jmp_s = value;
1351 }
1352 break;
1353 case M32C_OPERAND_Q :
1354 errmsg = parse_Q (cd, strp, M32C_OPERAND_Q, (long *) (& junk));
1355 break;
1356 case M32C_OPERAND_R0 :
1357 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0, & junk);
1358 break;
1359 case M32C_OPERAND_R0H :
1360 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0h, & junk);
1361 break;
1362 case M32C_OPERAND_R0L :
1363 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0l, & junk);
1364 break;
1365 case M32C_OPERAND_R1 :
1366 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r1, & junk);
1367 break;
1368 case M32C_OPERAND_R1R2R0 :
1369 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r1r2r0, & junk);
1370 break;
1371 case M32C_OPERAND_R2 :
1372 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r2, & junk);
1373 break;
1374 case M32C_OPERAND_R2R0 :
1375 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r2r0, & junk);
1376 break;
1377 case M32C_OPERAND_R3 :
1378 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r3, & junk);
1379 break;
1380 case M32C_OPERAND_R3R1 :
1381 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r3r1, & junk);
1382 break;
1383 case M32C_OPERAND_REGSETPOP :
1384 errmsg = parse_pop_regset (cd, strp, M32C_OPERAND_REGSETPOP, (unsigned long *) (& fields->f_8_8));
1385 break;
1386 case M32C_OPERAND_REGSETPUSH :
1387 errmsg = parse_push_regset (cd, strp, M32C_OPERAND_REGSETPUSH, (unsigned long *) (& fields->f_8_8));
1388 break;
1389 case M32C_OPERAND_RN16_PUSH_S :
1390 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_4_1);
1391 break;
1392 case M32C_OPERAND_S :
1393 errmsg = parse_S (cd, strp, M32C_OPERAND_S, (long *) (& junk));
1394 break;
1395 case M32C_OPERAND_SRC16AN :
1396 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src16_an);
1397 break;
1398 case M32C_OPERAND_SRC16ANHI :
1399 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_src16_an);
1400 break;
1401 case M32C_OPERAND_SRC16ANQI :
1402 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_src16_an);
1403 break;
1404 case M32C_OPERAND_SRC16RNHI :
1405 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_src16_rn);
1406 break;
1407 case M32C_OPERAND_SRC16RNQI :
1408 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_src16_rn);
1409 break;
1410 case M32C_OPERAND_SRC32ANPREFIXED :
1411 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src32_an_prefixed);
1412 break;
1413 case M32C_OPERAND_SRC32ANPREFIXEDHI :
1414 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_src32_an_prefixed);
1415 break;
1416 case M32C_OPERAND_SRC32ANPREFIXEDQI :
1417 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_src32_an_prefixed);
1418 break;
1419 case M32C_OPERAND_SRC32ANPREFIXEDSI :
1420 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src32_an_prefixed);
1421 break;
1422 case M32C_OPERAND_SRC32ANUNPREFIXED :
1423 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src32_an_unprefixed);
1424 break;
1425 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
1426 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_src32_an_unprefixed);
1427 break;
1428 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
1429 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_src32_an_unprefixed);
1430 break;
1431 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
1432 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src32_an_unprefixed);
1433 break;
1434 case M32C_OPERAND_SRC32RNPREFIXEDHI :
1435 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_src32_rn_prefixed_HI);
1436 break;
1437 case M32C_OPERAND_SRC32RNPREFIXEDQI :
1438 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_src32_rn_prefixed_QI);
1439 break;
1440 case M32C_OPERAND_SRC32RNPREFIXEDSI :
1441 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_src32_rn_prefixed_SI);
1442 break;
1443 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
1444 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_src32_rn_unprefixed_HI);
1445 break;
1446 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
1447 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_src32_rn_unprefixed_QI);
1448 break;
1449 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
1450 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_src32_rn_unprefixed_SI);
1451 break;
1452 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
1453 errmsg = parse_r0l_r0h (cd, strp, M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL, (long *) (& fields->f_5_1));
1454 break;
1455 case M32C_OPERAND_X :
1456 errmsg = parse_X (cd, strp, M32C_OPERAND_X, (long *) (& junk));
1457 break;
1458 case M32C_OPERAND_Z :
1459 errmsg = parse_Z (cd, strp, M32C_OPERAND_Z, (long *) (& junk));
1460 break;
1461 case M32C_OPERAND_COND16_16 :
1462 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16, & fields->f_dsp_16_u8);
1463 break;
1464 case M32C_OPERAND_COND16_24 :
1465 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16, & fields->f_dsp_24_u8);
1466 break;
1467 case M32C_OPERAND_COND16_32 :
1468 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16, & fields->f_dsp_32_u8);
1469 break;
1470 case M32C_OPERAND_COND16C :
1471 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16c, & fields->f_cond16);
1472 break;
1473 case M32C_OPERAND_COND16J :
1474 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16j, & fields->f_cond16);
1475 break;
1476 case M32C_OPERAND_COND16J5 :
1477 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16j_5, & fields->f_cond16j_5);
1478 break;
1479 case M32C_OPERAND_COND32 :
1480 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_cond32);
1481 break;
1482 case M32C_OPERAND_COND32_16 :
1483 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_dsp_16_u8);
1484 break;
1485 case M32C_OPERAND_COND32_24 :
1486 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_dsp_24_u8);
1487 break;
1488 case M32C_OPERAND_COND32_32 :
1489 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_dsp_32_u8);
1490 break;
1491 case M32C_OPERAND_COND32_40 :
1492 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_dsp_40_u8);
1493 break;
1494 case M32C_OPERAND_COND32J :
1495 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_cond32j);
1496 break;
1497 case M32C_OPERAND_CR1_PREFIXED_32 :
1498 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr1_32, & fields->f_21_3);
1499 break;
1500 case M32C_OPERAND_CR1_UNPREFIXED_32 :
1501 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr1_32, & fields->f_13_3);
1502 break;
1503 case M32C_OPERAND_CR16 :
1504 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr_16, & fields->f_9_3);
1505 break;
1506 case M32C_OPERAND_CR2_32 :
1507 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr2_32, & fields->f_13_3);
1508 break;
1509 case M32C_OPERAND_CR3_PREFIXED_32 :
1510 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr3_32, & fields->f_21_3);
1511 break;
1512 case M32C_OPERAND_CR3_UNPREFIXED_32 :
1513 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr3_32, & fields->f_13_3);
1514 break;
1515 case M32C_OPERAND_FLAGS16 :
1516 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_flags, & fields->f_9_3);
1517 break;
1518 case M32C_OPERAND_FLAGS32 :
1519 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_flags, & fields->f_13_3);
1520 break;
1521 case M32C_OPERAND_SCCOND32 :
1522 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_cond16);
1523 break;
1524 case M32C_OPERAND_SIZE :
1525 errmsg = parse_size (cd, strp, M32C_OPERAND_SIZE, (long *) (& junk));
1526 break;
1527
1528 default :
1529 /* xgettext:c-format */
1530 fprintf (stderr, _("Unrecognized field %d while parsing.\n"), opindex);
1531 abort ();
1532 }
1533
1534 return errmsg;
1535 }
1536
1537 cgen_parse_fn * const m32c_cgen_parse_handlers[] =
1538 {
1539 parse_insn_normal,
1540 };
1541
1542 void
1543 m32c_cgen_init_asm (CGEN_CPU_DESC cd)
1544 {
1545 m32c_cgen_init_opcode_table (cd);
1546 m32c_cgen_init_ibld_table (cd);
1547 cd->parse_handlers = & m32c_cgen_parse_handlers[0];
1548 cd->parse_operand = m32c_cgen_parse_operand;
1549 }
1550
1551 \f
1552
1553 /* Regex construction routine.
1554
1555 This translates an opcode syntax string into a regex string,
1556 by replacing any non-character syntax element (such as an
1557 opcode) with the pattern '.*'
1558
1559 It then compiles the regex and stores it in the opcode, for
1560 later use by m32c_cgen_assemble_insn
1561
1562 Returns NULL for success, an error message for failure. */
1563
1564 char *
1565 m32c_cgen_build_insn_regex (CGEN_INSN *insn)
1566 {
1567 CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn);
1568 const char *mnem = CGEN_INSN_MNEMONIC (insn);
1569 char rxbuf[CGEN_MAX_RX_ELEMENTS];
1570 char *rx = rxbuf;
1571 const CGEN_SYNTAX_CHAR_TYPE *syn;
1572 int reg_err;
1573
1574 syn = CGEN_SYNTAX_STRING (CGEN_OPCODE_SYNTAX (opc));
1575
1576 /* Mnemonics come first in the syntax string. */
1577 if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
1578 return _("missing mnemonic in syntax string");
1579 ++syn;
1580
1581 /* Generate a case sensitive regular expression that emulates case
1582 insensitive matching in the "C" locale. We cannot generate a case
1583 insensitive regular expression because in Turkish locales, 'i' and 'I'
1584 are not equal modulo case conversion. */
1585
1586 /* Copy the literal mnemonic out of the insn. */
1587 for (; *mnem; mnem++)
1588 {
1589 char c = *mnem;
1590
1591 if (ISALPHA (c))
1592 {
1593 *rx++ = '[';
1594 *rx++ = TOLOWER (c);
1595 *rx++ = TOUPPER (c);
1596 *rx++ = ']';
1597 }
1598 else
1599 *rx++ = c;
1600 }
1601
1602 /* Copy any remaining literals from the syntax string into the rx. */
1603 for(; * syn != 0 && rx <= rxbuf + (CGEN_MAX_RX_ELEMENTS - 7 - 4); ++syn)
1604 {
1605 if (CGEN_SYNTAX_CHAR_P (* syn))
1606 {
1607 char c = CGEN_SYNTAX_CHAR (* syn);
1608
1609 switch (c)
1610 {
1611 /* Escape any regex metacharacters in the syntax. */
1612 case '.': case '[': case '\\':
1613 case '*': case '^': case '$':
1614
1615 #ifdef CGEN_ESCAPE_EXTENDED_REGEX
1616 case '?': case '{': case '}':
1617 case '(': case ')': case '*':
1618 case '|': case '+': case ']':
1619 #endif
1620 *rx++ = '\\';
1621 *rx++ = c;
1622 break;
1623
1624 default:
1625 if (ISALPHA (c))
1626 {
1627 *rx++ = '[';
1628 *rx++ = TOLOWER (c);
1629 *rx++ = TOUPPER (c);
1630 *rx++ = ']';
1631 }
1632 else
1633 *rx++ = c;
1634 break;
1635 }
1636 }
1637 else
1638 {
1639 /* Replace non-syntax fields with globs. */
1640 *rx++ = '.';
1641 *rx++ = '*';
1642 }
1643 }
1644
1645 /* Trailing whitespace ok. */
1646 * rx++ = '[';
1647 * rx++ = ' ';
1648 * rx++ = '\t';
1649 * rx++ = ']';
1650 * rx++ = '*';
1651
1652 /* But anchor it after that. */
1653 * rx++ = '$';
1654 * rx = '\0';
1655
1656 CGEN_INSN_RX (insn) = xmalloc (sizeof (regex_t));
1657 reg_err = regcomp ((regex_t *) CGEN_INSN_RX (insn), rxbuf, REG_NOSUB);
1658
1659 if (reg_err == 0)
1660 return NULL;
1661 else
1662 {
1663 static char msg[80];
1664
1665 regerror (reg_err, (regex_t *) CGEN_INSN_RX (insn), msg, 80);
1666 regfree ((regex_t *) CGEN_INSN_RX (insn));
1667 free (CGEN_INSN_RX (insn));
1668 (CGEN_INSN_RX (insn)) = NULL;
1669 return msg;
1670 }
1671 }
1672
1673 \f
1674 /* Default insn parser.
1675
1676 The syntax string is scanned and operands are parsed and stored in FIELDS.
1677 Relocs are queued as we go via other callbacks.
1678
1679 ??? Note that this is currently an all-or-nothing parser. If we fail to
1680 parse the instruction, we return 0 and the caller will start over from
1681 the beginning. Backtracking will be necessary in parsing subexpressions,
1682 but that can be handled there. Not handling backtracking here may get
1683 expensive in the case of the m68k. Deal with later.
1684
1685 Returns NULL for success, an error message for failure. */
1686
1687 static const char *
1688 parse_insn_normal (CGEN_CPU_DESC cd,
1689 const CGEN_INSN *insn,
1690 const char **strp,
1691 CGEN_FIELDS *fields)
1692 {
1693 /* ??? Runtime added insns not handled yet. */
1694 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
1695 const char *str = *strp;
1696 const char *errmsg;
1697 const char *p;
1698 const CGEN_SYNTAX_CHAR_TYPE * syn;
1699 #ifdef CGEN_MNEMONIC_OPERANDS
1700 /* FIXME: wip */
1701 int past_opcode_p;
1702 #endif
1703
1704 /* For now we assume the mnemonic is first (there are no leading operands).
1705 We can parse it without needing to set up operand parsing.
1706 GAS's input scrubber will ensure mnemonics are lowercase, but we may
1707 not be called from GAS. */
1708 p = CGEN_INSN_MNEMONIC (insn);
1709 while (*p && TOLOWER (*p) == TOLOWER (*str))
1710 ++p, ++str;
1711
1712 if (* p)
1713 return _("unrecognized instruction");
1714
1715 #ifndef CGEN_MNEMONIC_OPERANDS
1716 if (* str && ! ISSPACE (* str))
1717 return _("unrecognized instruction");
1718 #endif
1719
1720 CGEN_INIT_PARSE (cd);
1721 cgen_init_parse_operand (cd);
1722 #ifdef CGEN_MNEMONIC_OPERANDS
1723 past_opcode_p = 0;
1724 #endif
1725
1726 /* We don't check for (*str != '\0') here because we want to parse
1727 any trailing fake arguments in the syntax string. */
1728 syn = CGEN_SYNTAX_STRING (syntax);
1729
1730 /* Mnemonics come first for now, ensure valid string. */
1731 if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
1732 abort ();
1733
1734 ++syn;
1735
1736 while (* syn != 0)
1737 {
1738 /* Non operand chars must match exactly. */
1739 if (CGEN_SYNTAX_CHAR_P (* syn))
1740 {
1741 /* FIXME: While we allow for non-GAS callers above, we assume the
1742 first char after the mnemonic part is a space. */
1743 /* FIXME: We also take inappropriate advantage of the fact that
1744 GAS's input scrubber will remove extraneous blanks. */
1745 if (TOLOWER (*str) == TOLOWER (CGEN_SYNTAX_CHAR (* syn)))
1746 {
1747 #ifdef CGEN_MNEMONIC_OPERANDS
1748 if (CGEN_SYNTAX_CHAR(* syn) == ' ')
1749 past_opcode_p = 1;
1750 #endif
1751 ++ syn;
1752 ++ str;
1753 }
1754 else if (*str)
1755 {
1756 /* Syntax char didn't match. Can't be this insn. */
1757 static char msg [80];
1758
1759 /* xgettext:c-format */
1760 sprintf (msg, _("syntax error (expected char `%c', found `%c')"),
1761 CGEN_SYNTAX_CHAR(*syn), *str);
1762 return msg;
1763 }
1764 else
1765 {
1766 /* Ran out of input. */
1767 static char msg [80];
1768
1769 /* xgettext:c-format */
1770 sprintf (msg, _("syntax error (expected char `%c', found end of instruction)"),
1771 CGEN_SYNTAX_CHAR(*syn));
1772 return msg;
1773 }
1774 continue;
1775 }
1776
1777 /* We have an operand of some sort. */
1778 errmsg = cd->parse_operand (cd, CGEN_SYNTAX_FIELD (*syn),
1779 &str, fields);
1780 if (errmsg)
1781 return errmsg;
1782
1783 /* Done with this operand, continue with next one. */
1784 ++ syn;
1785 }
1786
1787 /* If we're at the end of the syntax string, we're done. */
1788 if (* syn == 0)
1789 {
1790 /* FIXME: For the moment we assume a valid `str' can only contain
1791 blanks now. IE: We needn't try again with a longer version of
1792 the insn and it is assumed that longer versions of insns appear
1793 before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3). */
1794 while (ISSPACE (* str))
1795 ++ str;
1796
1797 if (* str != '\0')
1798 return _("junk at end of line"); /* FIXME: would like to include `str' */
1799
1800 return NULL;
1801 }
1802
1803 /* We couldn't parse it. */
1804 return _("unrecognized instruction");
1805 }
1806 \f
1807 /* Main entry point.
1808 This routine is called for each instruction to be assembled.
1809 STR points to the insn to be assembled.
1810 We assume all necessary tables have been initialized.
1811 The assembled instruction, less any fixups, is stored in BUF.
1812 Remember that if CGEN_INT_INSN_P then BUF is an int and thus the value
1813 still needs to be converted to target byte order, otherwise BUF is an array
1814 of bytes in target byte order.
1815 The result is a pointer to the insn's entry in the opcode table,
1816 or NULL if an error occured (an error message will have already been
1817 printed).
1818
1819 Note that when processing (non-alias) macro-insns,
1820 this function recurses.
1821
1822 ??? It's possible to make this cpu-independent.
1823 One would have to deal with a few minor things.
1824 At this point in time doing so would be more of a curiosity than useful
1825 [for example this file isn't _that_ big], but keeping the possibility in
1826 mind helps keep the design clean. */
1827
1828 const CGEN_INSN *
1829 m32c_cgen_assemble_insn (CGEN_CPU_DESC cd,
1830 const char *str,
1831 CGEN_FIELDS *fields,
1832 CGEN_INSN_BYTES_PTR buf,
1833 char **errmsg)
1834 {
1835 const char *start;
1836 CGEN_INSN_LIST *ilist;
1837 const char *parse_errmsg = NULL;
1838 const char *insert_errmsg = NULL;
1839 int recognized_mnemonic = 0;
1840
1841 /* Skip leading white space. */
1842 while (ISSPACE (* str))
1843 ++ str;
1844
1845 /* The instructions are stored in hashed lists.
1846 Get the first in the list. */
1847 ilist = CGEN_ASM_LOOKUP_INSN (cd, str);
1848
1849 /* Keep looking until we find a match. */
1850 start = str;
1851 for ( ; ilist != NULL ; ilist = CGEN_ASM_NEXT_INSN (ilist))
1852 {
1853 const CGEN_INSN *insn = ilist->insn;
1854 recognized_mnemonic = 1;
1855
1856 #ifdef CGEN_VALIDATE_INSN_SUPPORTED
1857 /* Not usually needed as unsupported opcodes
1858 shouldn't be in the hash lists. */
1859 /* Is this insn supported by the selected cpu? */
1860 if (! m32c_cgen_insn_supported (cd, insn))
1861 continue;
1862 #endif
1863 /* If the RELAXED attribute is set, this is an insn that shouldn't be
1864 chosen immediately. Instead, it is used during assembler/linker
1865 relaxation if possible. */
1866 if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED) != 0)
1867 continue;
1868
1869 str = start;
1870
1871 /* Skip this insn if str doesn't look right lexically. */
1872 if (CGEN_INSN_RX (insn) != NULL &&
1873 regexec ((regex_t *) CGEN_INSN_RX (insn), str, 0, NULL, 0) == REG_NOMATCH)
1874 continue;
1875
1876 /* Allow parse/insert handlers to obtain length of insn. */
1877 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
1878
1879 parse_errmsg = CGEN_PARSE_FN (cd, insn) (cd, insn, & str, fields);
1880 if (parse_errmsg != NULL)
1881 continue;
1882
1883 /* ??? 0 is passed for `pc'. */
1884 insert_errmsg = CGEN_INSERT_FN (cd, insn) (cd, insn, fields, buf,
1885 (bfd_vma) 0);
1886 if (insert_errmsg != NULL)
1887 continue;
1888
1889 /* It is up to the caller to actually output the insn and any
1890 queued relocs. */
1891 return insn;
1892 }
1893
1894 {
1895 static char errbuf[150];
1896 #ifdef CGEN_VERBOSE_ASSEMBLER_ERRORS
1897 const char *tmp_errmsg;
1898
1899 /* If requesting verbose error messages, use insert_errmsg.
1900 Failing that, use parse_errmsg. */
1901 tmp_errmsg = (insert_errmsg ? insert_errmsg :
1902 parse_errmsg ? parse_errmsg :
1903 recognized_mnemonic ?
1904 _("unrecognized form of instruction") :
1905 _("unrecognized instruction"));
1906
1907 if (strlen (start) > 50)
1908 /* xgettext:c-format */
1909 sprintf (errbuf, "%s `%.50s...'", tmp_errmsg, start);
1910 else
1911 /* xgettext:c-format */
1912 sprintf (errbuf, "%s `%.50s'", tmp_errmsg, start);
1913 #else
1914 if (strlen (start) > 50)
1915 /* xgettext:c-format */
1916 sprintf (errbuf, _("bad instruction `%.50s...'"), start);
1917 else
1918 /* xgettext:c-format */
1919 sprintf (errbuf, _("bad instruction `%.50s'"), start);
1920 #endif
1921
1922 *errmsg = errbuf;
1923 return NULL;
1924 }
1925 }
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