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merge from gcc
[binutils.git] / opcodes / m32c-ibld.c
blob16f0048e3b08718edeb6b5246d096491fd06e49c
1 /* Instruction building/extraction support for m32c. -*- C -*-
2
3 THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
4 - the resultant file is machine generated, cgen-ibld.in isn't
5
6 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005
7 Free Software Foundation, Inc.
8
9 This file is part of the GNU Binutils and GDB, the GNU debugger.
10
11 This program is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 2, or (at your option)
14 any later version.
15
16 This program is distributed in the hope that it will be useful,
17 but WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 GNU General Public License for more details.
20
21 You should have received a copy of the GNU General Public License
22 along with this program; if not, write to the Free Software Foundation, Inc.,
23 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
24
25 /* ??? Eventually more and more of this stuff can go to cpu-independent files.
26 Keep that in mind. */
27
28 #include "sysdep.h"
29 #include <stdio.h>
30 #include "ansidecl.h"
31 #include "dis-asm.h"
32 #include "bfd.h"
33 #include "symcat.h"
34 #include "m32c-desc.h"
35 #include "m32c-opc.h"
36 #include "opintl.h"
37 #include "safe-ctype.h"
38
39 #undef min
40 #define min(a,b) ((a) < (b) ? (a) : (b))
41 #undef max
42 #define max(a,b) ((a) > (b) ? (a) : (b))
43
44 /* Used by the ifield rtx function. */
45 #define FLD(f) (fields->f)
46
47 static const char * insert_normal
48 (CGEN_CPU_DESC, long, unsigned int, unsigned int, unsigned int,
49 unsigned int, unsigned int, unsigned int, CGEN_INSN_BYTES_PTR);
50 static const char * insert_insn_normal
51 (CGEN_CPU_DESC, const CGEN_INSN *,
52 CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
53 static int extract_normal
54 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, CGEN_INSN_INT,
55 unsigned int, unsigned int, unsigned int, unsigned int,
56 unsigned int, unsigned int, bfd_vma, long *);
57 static int extract_insn_normal
58 (CGEN_CPU_DESC, const CGEN_INSN *, CGEN_EXTRACT_INFO *,
59 CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
60 #if CGEN_INT_INSN_P
61 static void put_insn_int_value
62 (CGEN_CPU_DESC, CGEN_INSN_BYTES_PTR, int, int, CGEN_INSN_INT);
63 #endif
64 #if ! CGEN_INT_INSN_P
65 static CGEN_INLINE void insert_1
66 (CGEN_CPU_DESC, unsigned long, int, int, int, unsigned char *);
67 static CGEN_INLINE int fill_cache
68 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, bfd_vma);
69 static CGEN_INLINE long extract_1
70 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, int, unsigned char *, bfd_vma);
71 #endif
72 \f
73 /* Operand insertion. */
74
75 #if ! CGEN_INT_INSN_P
76
77 /* Subroutine of insert_normal. */
78
79 static CGEN_INLINE void
80 insert_1 (CGEN_CPU_DESC cd,
81 unsigned long value,
82 int start,
83 int length,
84 int word_length,
85 unsigned char *bufp)
86 {
87 unsigned long x,mask;
88 int shift;
89
90 x = cgen_get_insn_value (cd, bufp, word_length);
91
92 /* Written this way to avoid undefined behaviour. */
93 mask = (((1L << (length - 1)) - 1) << 1) | 1;
94 if (CGEN_INSN_LSB0_P)
95 shift = (start + 1) - length;
96 else
97 shift = (word_length - (start + length));
98 x = (x & ~(mask << shift)) | ((value & mask) << shift);
99
100 cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x);
101 }
102
103 #endif /* ! CGEN_INT_INSN_P */
104
105 /* Default insertion routine.
106
107 ATTRS is a mask of the boolean attributes.
108 WORD_OFFSET is the offset in bits from the start of the insn of the value.
109 WORD_LENGTH is the length of the word in bits in which the value resides.
110 START is the starting bit number in the word, architecture origin.
111 LENGTH is the length of VALUE in bits.
112 TOTAL_LENGTH is the total length of the insn in bits.
113
114 The result is an error message or NULL if success. */
115
116 /* ??? This duplicates functionality with bfd's howto table and
117 bfd_install_relocation. */
118 /* ??? This doesn't handle bfd_vma's. Create another function when
119 necessary. */
120
121 static const char *
122 insert_normal (CGEN_CPU_DESC cd,
123 long value,
124 unsigned int attrs,
125 unsigned int word_offset,
126 unsigned int start,
127 unsigned int length,
128 unsigned int word_length,
129 unsigned int total_length,
130 CGEN_INSN_BYTES_PTR buffer)
131 {
132 static char errbuf[100];
133 /* Written this way to avoid undefined behaviour. */
134 unsigned long mask = (((1L << (length - 1)) - 1) << 1) | 1;
135
136 /* If LENGTH is zero, this operand doesn't contribute to the value. */
137 if (length == 0)
138 return NULL;
139
140 if (word_length > 32)
141 abort ();
142
143 /* For architectures with insns smaller than the base-insn-bitsize,
144 word_length may be too big. */
145 if (cd->min_insn_bitsize < cd->base_insn_bitsize)
146 {
147 if (word_offset == 0
148 && word_length > total_length)
149 word_length = total_length;
150 }
151
152 /* Ensure VALUE will fit. */
153 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT))
154 {
155 long minval = - (1L << (length - 1));
156 unsigned long maxval = mask;
157
158 if ((value > 0 && (unsigned long) value > maxval)
159 || value < minval)
160 {
161 /* xgettext:c-format */
162 sprintf (errbuf,
163 _("operand out of range (%ld not between %ld and %lu)"),
164 value, minval, maxval);
165 return errbuf;
166 }
167 }
168 else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED))
169 {
170 unsigned long maxval = mask;
171
172 if ((unsigned long) value > maxval)
173 {
174 /* xgettext:c-format */
175 sprintf (errbuf,
176 _("operand out of range (%lu not between 0 and %lu)"),
177 value, maxval);
178 return errbuf;
179 }
180 }
181 else
182 {
183 if (! cgen_signed_overflow_ok_p (cd))
184 {
185 long minval = - (1L << (length - 1));
186 long maxval = (1L << (length - 1)) - 1;
187
188 if (value < minval || value > maxval)
189 {
190 sprintf
191 /* xgettext:c-format */
192 (errbuf, _("operand out of range (%ld not between %ld and %ld)"),
193 value, minval, maxval);
194 return errbuf;
195 }
196 }
197 }
198
199 #if CGEN_INT_INSN_P
200
201 {
202 int shift;
203
204 if (CGEN_INSN_LSB0_P)
205 shift = (word_offset + start + 1) - length;
206 else
207 shift = total_length - (word_offset + start + length);
208 *buffer = (*buffer & ~(mask << shift)) | ((value & mask) << shift);
209 }
210
211 #else /* ! CGEN_INT_INSN_P */
212
213 {
214 unsigned char *bufp = (unsigned char *) buffer + word_offset / 8;
215
216 insert_1 (cd, value, start, length, word_length, bufp);
217 }
218
219 #endif /* ! CGEN_INT_INSN_P */
220
221 return NULL;
222 }
223
224 /* Default insn builder (insert handler).
225 The instruction is recorded in CGEN_INT_INSN_P byte order (meaning
226 that if CGEN_INSN_BYTES_PTR is an int * and thus, the value is
227 recorded in host byte order, otherwise BUFFER is an array of bytes
228 and the value is recorded in target byte order).
229 The result is an error message or NULL if success. */
230
231 static const char *
232 insert_insn_normal (CGEN_CPU_DESC cd,
233 const CGEN_INSN * insn,
234 CGEN_FIELDS * fields,
235 CGEN_INSN_BYTES_PTR buffer,
236 bfd_vma pc)
237 {
238 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
239 unsigned long value;
240 const CGEN_SYNTAX_CHAR_TYPE * syn;
241
242 CGEN_INIT_INSERT (cd);
243 value = CGEN_INSN_BASE_VALUE (insn);
244
245 /* If we're recording insns as numbers (rather than a string of bytes),
246 target byte order handling is deferred until later. */
247
248 #if CGEN_INT_INSN_P
249
250 put_insn_int_value (cd, buffer, cd->base_insn_bitsize,
251 CGEN_FIELDS_BITSIZE (fields), value);
252
253 #else
254
255 cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize,
256 (unsigned) CGEN_FIELDS_BITSIZE (fields)),
257 value);
258
259 #endif /* ! CGEN_INT_INSN_P */
260
261 /* ??? It would be better to scan the format's fields.
262 Still need to be able to insert a value based on the operand though;
263 e.g. storing a branch displacement that got resolved later.
264 Needs more thought first. */
265
266 for (syn = CGEN_SYNTAX_STRING (syntax); * syn; ++ syn)
267 {
268 const char *errmsg;
269
270 if (CGEN_SYNTAX_CHAR_P (* syn))
271 continue;
272
273 errmsg = (* cd->insert_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
274 fields, buffer, pc);
275 if (errmsg)
276 return errmsg;
277 }
278
279 return NULL;
280 }
281
282 #if CGEN_INT_INSN_P
283 /* Cover function to store an insn value into an integral insn. Must go here
284 because it needs <prefix>-desc.h for CGEN_INT_INSN_P. */
285
286 static void
287 put_insn_int_value (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
288 CGEN_INSN_BYTES_PTR buf,
289 int length,
290 int insn_length,
291 CGEN_INSN_INT value)
292 {
293 /* For architectures with insns smaller than the base-insn-bitsize,
294 length may be too big. */
295 if (length > insn_length)
296 *buf = value;
297 else
298 {
299 int shift = insn_length - length;
300 /* Written this way to avoid undefined behaviour. */
301 CGEN_INSN_INT mask = (((1L << (length - 1)) - 1) << 1) | 1;
302
303 *buf = (*buf & ~(mask << shift)) | ((value & mask) << shift);
304 }
305 }
306 #endif
307 \f
308 /* Operand extraction. */
309
310 #if ! CGEN_INT_INSN_P
311
312 /* Subroutine of extract_normal.
313 Ensure sufficient bytes are cached in EX_INFO.
314 OFFSET is the offset in bytes from the start of the insn of the value.
315 BYTES is the length of the needed value.
316 Returns 1 for success, 0 for failure. */
317
318 static CGEN_INLINE int
319 fill_cache (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
320 CGEN_EXTRACT_INFO *ex_info,
321 int offset,
322 int bytes,
323 bfd_vma pc)
324 {
325 /* It's doubtful that the middle part has already been fetched so
326 we don't optimize that case. kiss. */
327 unsigned int mask;
328 disassemble_info *info = (disassemble_info *) ex_info->dis_info;
329
330 /* First do a quick check. */
331 mask = (1 << bytes) - 1;
332 if (((ex_info->valid >> offset) & mask) == mask)
333 return 1;
334
335 /* Search for the first byte we need to read. */
336 for (mask = 1 << offset; bytes > 0; --bytes, ++offset, mask <<= 1)
337 if (! (mask & ex_info->valid))
338 break;
339
340 if (bytes)
341 {
342 int status;
343
344 pc += offset;
345 status = (*info->read_memory_func)
346 (pc, ex_info->insn_bytes + offset, bytes, info);
347
348 if (status != 0)
349 {
350 (*info->memory_error_func) (status, pc, info);
351 return 0;
352 }
353
354 ex_info->valid |= ((1 << bytes) - 1) << offset;
355 }
356
357 return 1;
358 }
359
360 /* Subroutine of extract_normal. */
361
362 static CGEN_INLINE long
363 extract_1 (CGEN_CPU_DESC cd,
364 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
365 int start,
366 int length,
367 int word_length,
368 unsigned char *bufp,
369 bfd_vma pc ATTRIBUTE_UNUSED)
370 {
371 unsigned long x;
372 int shift;
373
374 x = cgen_get_insn_value (cd, bufp, word_length);
375
376 if (CGEN_INSN_LSB0_P)
377 shift = (start + 1) - length;
378 else
379 shift = (word_length - (start + length));
380 return x >> shift;
381 }
382
383 #endif /* ! CGEN_INT_INSN_P */
384
385 /* Default extraction routine.
386
387 INSN_VALUE is the first base_insn_bitsize bits of the insn in host order,
388 or sometimes less for cases like the m32r where the base insn size is 32
389 but some insns are 16 bits.
390 ATTRS is a mask of the boolean attributes. We only need `SIGNED',
391 but for generality we take a bitmask of all of them.
392 WORD_OFFSET is the offset in bits from the start of the insn of the value.
393 WORD_LENGTH is the length of the word in bits in which the value resides.
394 START is the starting bit number in the word, architecture origin.
395 LENGTH is the length of VALUE in bits.
396 TOTAL_LENGTH is the total length of the insn in bits.
397
398 Returns 1 for success, 0 for failure. */
399
400 /* ??? The return code isn't properly used. wip. */
401
402 /* ??? This doesn't handle bfd_vma's. Create another function when
403 necessary. */
404
405 static int
406 extract_normal (CGEN_CPU_DESC cd,
407 #if ! CGEN_INT_INSN_P
408 CGEN_EXTRACT_INFO *ex_info,
409 #else
410 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
411 #endif
412 CGEN_INSN_INT insn_value,
413 unsigned int attrs,
414 unsigned int word_offset,
415 unsigned int start,
416 unsigned int length,
417 unsigned int word_length,
418 unsigned int total_length,
419 #if ! CGEN_INT_INSN_P
420 bfd_vma pc,
421 #else
422 bfd_vma pc ATTRIBUTE_UNUSED,
423 #endif
424 long *valuep)
425 {
426 long value, mask;
427
428 /* If LENGTH is zero, this operand doesn't contribute to the value
429 so give it a standard value of zero. */
430 if (length == 0)
431 {
432 *valuep = 0;
433 return 1;
434 }
435
436 if (word_length > 32)
437 abort ();
438
439 /* For architectures with insns smaller than the insn-base-bitsize,
440 word_length may be too big. */
441 if (cd->min_insn_bitsize < cd->base_insn_bitsize)
442 {
443 if (word_offset == 0
444 && word_length > total_length)
445 word_length = total_length;
446 }
447
448 /* Does the value reside in INSN_VALUE, and at the right alignment? */
449
450 if (CGEN_INT_INSN_P || (word_offset == 0 && word_length == total_length))
451 {
452 if (CGEN_INSN_LSB0_P)
453 value = insn_value >> ((word_offset + start + 1) - length);
454 else
455 value = insn_value >> (total_length - ( word_offset + start + length));
456 }
457
458 #if ! CGEN_INT_INSN_P
459
460 else
461 {
462 unsigned char *bufp = ex_info->insn_bytes + word_offset / 8;
463
464 if (word_length > 32)
465 abort ();
466
467 if (fill_cache (cd, ex_info, word_offset / 8, word_length / 8, pc) == 0)
468 return 0;
469
470 value = extract_1 (cd, ex_info, start, length, word_length, bufp, pc);
471 }
472
473 #endif /* ! CGEN_INT_INSN_P */
474
475 /* Written this way to avoid undefined behaviour. */
476 mask = (((1L << (length - 1)) - 1) << 1) | 1;
477
478 value &= mask;
479 /* sign extend? */
480 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED)
481 && (value & (1L << (length - 1))))
482 value |= ~mask;
483
484 *valuep = value;
485
486 return 1;
487 }
488
489 /* Default insn extractor.
490
491 INSN_VALUE is the first base_insn_bitsize bits, translated to host order.
492 The extracted fields are stored in FIELDS.
493 EX_INFO is used to handle reading variable length insns.
494 Return the length of the insn in bits, or 0 if no match,
495 or -1 if an error occurs fetching data (memory_error_func will have
496 been called). */
497
498 static int
499 extract_insn_normal (CGEN_CPU_DESC cd,
500 const CGEN_INSN *insn,
501 CGEN_EXTRACT_INFO *ex_info,
502 CGEN_INSN_INT insn_value,
503 CGEN_FIELDS *fields,
504 bfd_vma pc)
505 {
506 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
507 const CGEN_SYNTAX_CHAR_TYPE *syn;
508
509 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
510
511 CGEN_INIT_EXTRACT (cd);
512
513 for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
514 {
515 int length;
516
517 if (CGEN_SYNTAX_CHAR_P (*syn))
518 continue;
519
520 length = (* cd->extract_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
521 ex_info, insn_value, fields, pc);
522 if (length <= 0)
523 return length;
524 }
525
526 /* We recognized and successfully extracted this insn. */
527 return CGEN_INSN_BITSIZE (insn);
528 }
529 \f
530 /* Machine generated code added here. */
531
532 const char * m32c_cgen_insert_operand
533 (CGEN_CPU_DESC, int, CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
534
535 /* Main entry point for operand insertion.
536
537 This function is basically just a big switch statement. Earlier versions
538 used tables to look up the function to use, but
539 - if the table contains both assembler and disassembler functions then
540 the disassembler contains much of the assembler and vice-versa,
541 - there's a lot of inlining possibilities as things grow,
542 - using a switch statement avoids the function call overhead.
543
544 This function could be moved into `parse_insn_normal', but keeping it
545 separate makes clear the interface between `parse_insn_normal' and each of
546 the handlers. It's also needed by GAS to insert operands that couldn't be
547 resolved during parsing. */
548
549 const char *
550 m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
551 int opindex,
552 CGEN_FIELDS * fields,
553 CGEN_INSN_BYTES_PTR buffer,
554 bfd_vma pc ATTRIBUTE_UNUSED)
555 {
556 const char * errmsg = NULL;
557 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
558
559 switch (opindex)
560 {
561 case M32C_OPERAND_A0 :
562 break;
563 case M32C_OPERAND_A1 :
564 break;
565 case M32C_OPERAND_AN16_PUSH_S :
566 errmsg = insert_normal (cd, fields->f_4_1, 0, 0, 4, 1, 32, total_length, buffer);
567 break;
568 case M32C_OPERAND_BIT16AN :
569 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
570 break;
571 case M32C_OPERAND_BIT16RN :
572 errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer);
573 break;
574 case M32C_OPERAND_BIT32ANPREFIXED :
575 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
576 break;
577 case M32C_OPERAND_BIT32ANUNPREFIXED :
578 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
579 break;
580 case M32C_OPERAND_BIT32RNPREFIXED :
581 {
582 long value = fields->f_dst32_rn_prefixed_QI;
583 value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1))));
584 errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer);
585 }
586 break;
587 case M32C_OPERAND_BIT32RNUNPREFIXED :
588 {
589 long value = fields->f_dst32_rn_unprefixed_QI;
590 value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1))));
591 errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer);
592 }
593 break;
594 case M32C_OPERAND_BITBASE16_16_S8 :
595 errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer);
596 break;
597 case M32C_OPERAND_BITBASE16_16_U16 :
598 {
599 long value = fields->f_dsp_16_u16;
600 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
601 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
602 }
603 break;
604 case M32C_OPERAND_BITBASE16_16_U8 :
605 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
606 break;
607 case M32C_OPERAND_BITBASE16_8_U11_S :
608 {
609 {
610 FLD (f_bitno16_S) = ((FLD (f_bitbase16_u11_S)) & (7));
611 FLD (f_dsp_8_u8) = ((((unsigned int) (FLD (f_bitbase16_u11_S)) >> (3))) & (255));
612 }
613 errmsg = insert_normal (cd, fields->f_bitno16_S, 0, 0, 5, 3, 32, total_length, buffer);
614 if (errmsg)
615 break;
616 errmsg = insert_normal (cd, fields->f_dsp_8_u8, 0, 0, 8, 8, 32, total_length, buffer);
617 if (errmsg)
618 break;
619 }
620 break;
621 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
622 {
623 {
624 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_s11_unprefixed)) & (7));
625 FLD (f_dsp_16_s8) = ((int) (FLD (f_bitbase32_16_s11_unprefixed)) >> (3));
626 }
627 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
628 if (errmsg)
629 break;
630 errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer);
631 if (errmsg)
632 break;
633 }
634 break;
635 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
636 {
637 {
638 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_s19_unprefixed)) & (7));
639 FLD (f_dsp_16_s16) = ((int) (FLD (f_bitbase32_16_s19_unprefixed)) >> (3));
640 }
641 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
642 if (errmsg)
643 break;
644 {
645 long value = fields->f_dsp_16_s16;
646 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
647 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, buffer);
648 }
649 if (errmsg)
650 break;
651 }
652 break;
653 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
654 {
655 {
656 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_u11_unprefixed)) & (7));
657 FLD (f_dsp_16_u8) = ((((unsigned int) (FLD (f_bitbase32_16_u11_unprefixed)) >> (3))) & (255));
658 }
659 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
660 if (errmsg)
661 break;
662 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
663 if (errmsg)
664 break;
665 }
666 break;
667 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
668 {
669 {
670 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_u19_unprefixed)) & (7));
671 FLD (f_dsp_16_u16) = ((((unsigned int) (FLD (f_bitbase32_16_u19_unprefixed)) >> (3))) & (65535));
672 }
673 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
674 if (errmsg)
675 break;
676 {
677 long value = fields->f_dsp_16_u16;
678 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
679 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
680 }
681 if (errmsg)
682 break;
683 }
684 break;
685 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
686 {
687 {
688 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_u27_unprefixed)) & (7));
689 FLD (f_dsp_16_u16) = ((((unsigned int) (FLD (f_bitbase32_16_u27_unprefixed)) >> (3))) & (65535));
690 FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_bitbase32_16_u27_unprefixed)) >> (19))) & (255));
691 }
692 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
693 if (errmsg)
694 break;
695 {
696 long value = fields->f_dsp_16_u16;
697 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
698 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
699 }
700 if (errmsg)
701 break;
702 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
703 if (errmsg)
704 break;
705 }
706 break;
707 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
708 {
709 {
710 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_s11_prefixed)) & (7));
711 FLD (f_dsp_24_s8) = ((int) (FLD (f_bitbase32_24_s11_prefixed)) >> (3));
712 }
713 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
714 if (errmsg)
715 break;
716 errmsg = insert_normal (cd, fields->f_dsp_24_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, buffer);
717 if (errmsg)
718 break;
719 }
720 break;
721 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
722 {
723 {
724 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_s19_prefixed)) & (7));
725 FLD (f_dsp_24_u8) = ((((unsigned int) (FLD (f_bitbase32_24_s19_prefixed)) >> (3))) & (255));
726 FLD (f_dsp_32_s8) = ((int) (FLD (f_bitbase32_24_s19_prefixed)) >> (11));
727 }
728 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
729 if (errmsg)
730 break;
731 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
732 if (errmsg)
733 break;
734 errmsg = insert_normal (cd, fields->f_dsp_32_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, buffer);
735 if (errmsg)
736 break;
737 }
738 break;
739 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
740 {
741 {
742 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_u11_prefixed)) & (7));
743 FLD (f_dsp_24_u8) = ((((unsigned int) (FLD (f_bitbase32_24_u11_prefixed)) >> (3))) & (255));
744 }
745 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
746 if (errmsg)
747 break;
748 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
749 if (errmsg)
750 break;
751 }
752 break;
753 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
754 {
755 {
756 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_u19_prefixed)) & (7));
757 FLD (f_dsp_24_u8) = ((((unsigned int) (FLD (f_bitbase32_24_u19_prefixed)) >> (3))) & (255));
758 FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_bitbase32_24_u19_prefixed)) >> (11))) & (255));
759 }
760 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
761 if (errmsg)
762 break;
763 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
764 if (errmsg)
765 break;
766 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
767 if (errmsg)
768 break;
769 }
770 break;
771 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
772 {
773 {
774 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_u27_prefixed)) & (7));
775 FLD (f_dsp_24_u8) = ((((unsigned int) (FLD (f_bitbase32_24_u27_prefixed)) >> (3))) & (255));
776 FLD (f_dsp_32_u16) = ((((unsigned int) (FLD (f_bitbase32_24_u27_prefixed)) >> (11))) & (65535));
777 }
778 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
779 if (errmsg)
780 break;
781 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
782 if (errmsg)
783 break;
784 {
785 long value = fields->f_dsp_32_u16;
786 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
787 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
788 }
789 if (errmsg)
790 break;
791 }
792 break;
793 case M32C_OPERAND_BITNO16R :
794 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
795 break;
796 case M32C_OPERAND_BITNO32PREFIXED :
797 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
798 break;
799 case M32C_OPERAND_BITNO32UNPREFIXED :
800 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
801 break;
802 case M32C_OPERAND_DSP_10_U6 :
803 errmsg = insert_normal (cd, fields->f_dsp_10_u6, 0, 0, 10, 6, 32, total_length, buffer);
804 break;
805 case M32C_OPERAND_DSP_16_S16 :
806 {
807 long value = fields->f_dsp_16_s16;
808 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
809 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, buffer);
810 }
811 break;
812 case M32C_OPERAND_DSP_16_S8 :
813 errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer);
814 break;
815 case M32C_OPERAND_DSP_16_U16 :
816 {
817 long value = fields->f_dsp_16_u16;
818 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
819 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
820 }
821 break;
822 case M32C_OPERAND_DSP_16_U20 :
823 {
824 {
825 FLD (f_dsp_16_u16) = ((FLD (f_dsp_16_u24)) & (65535));
826 FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_dsp_16_u24)) >> (16))) & (255));
827 }
828 {
829 long value = fields->f_dsp_16_u16;
830 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
831 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
832 }
833 if (errmsg)
834 break;
835 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
836 if (errmsg)
837 break;
838 }
839 break;
840 case M32C_OPERAND_DSP_16_U24 :
841 {
842 {
843 FLD (f_dsp_16_u16) = ((FLD (f_dsp_16_u24)) & (65535));
844 FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_dsp_16_u24)) >> (16))) & (255));
845 }
846 {
847 long value = fields->f_dsp_16_u16;
848 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
849 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
850 }
851 if (errmsg)
852 break;
853 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
854 if (errmsg)
855 break;
856 }
857 break;
858 case M32C_OPERAND_DSP_16_U8 :
859 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
860 break;
861 case M32C_OPERAND_DSP_24_S16 :
862 {
863 {
864 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_s16)) & (255));
865 FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_dsp_24_s16)) >> (8))) & (255));
866 }
867 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
868 if (errmsg)
869 break;
870 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
871 if (errmsg)
872 break;
873 }
874 break;
875 case M32C_OPERAND_DSP_24_S8 :
876 errmsg = insert_normal (cd, fields->f_dsp_24_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, buffer);
877 break;
878 case M32C_OPERAND_DSP_24_U16 :
879 {
880 {
881 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_u16)) & (255));
882 FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_dsp_24_u16)) >> (8))) & (255));
883 }
884 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
885 if (errmsg)
886 break;
887 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
888 if (errmsg)
889 break;
890 }
891 break;
892 case M32C_OPERAND_DSP_24_U20 :
893 {
894 {
895 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_u24)) & (255));
896 FLD (f_dsp_32_u16) = ((((unsigned int) (FLD (f_dsp_24_u24)) >> (8))) & (65535));
897 }
898 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
899 if (errmsg)
900 break;
901 {
902 long value = fields->f_dsp_32_u16;
903 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
904 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
905 }
906 if (errmsg)
907 break;
908 }
909 break;
910 case M32C_OPERAND_DSP_24_U24 :
911 {
912 {
913 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_u24)) & (255));
914 FLD (f_dsp_32_u16) = ((((unsigned int) (FLD (f_dsp_24_u24)) >> (8))) & (65535));
915 }
916 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
917 if (errmsg)
918 break;
919 {
920 long value = fields->f_dsp_32_u16;
921 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
922 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
923 }
924 if (errmsg)
925 break;
926 }
927 break;
928 case M32C_OPERAND_DSP_24_U8 :
929 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
930 break;
931 case M32C_OPERAND_DSP_32_S16 :
932 {
933 long value = fields->f_dsp_32_s16;
934 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
935 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, buffer);
936 }
937 break;
938 case M32C_OPERAND_DSP_32_S8 :
939 errmsg = insert_normal (cd, fields->f_dsp_32_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, buffer);
940 break;
941 case M32C_OPERAND_DSP_32_U16 :
942 {
943 long value = fields->f_dsp_32_u16;
944 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
945 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
946 }
947 break;
948 case M32C_OPERAND_DSP_32_U20 :
949 {
950 long value = fields->f_dsp_32_u24;
951 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
952 errmsg = insert_normal (cd, value, 0, 32, 0, 24, 32, total_length, buffer);
953 }
954 break;
955 case M32C_OPERAND_DSP_32_U24 :
956 {
957 long value = fields->f_dsp_32_u24;
958 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
959 errmsg = insert_normal (cd, value, 0, 32, 0, 24, 32, total_length, buffer);
960 }
961 break;
962 case M32C_OPERAND_DSP_32_U8 :
963 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
964 break;
965 case M32C_OPERAND_DSP_40_S16 :
966 {
967 long value = fields->f_dsp_40_s16;
968 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
969 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, buffer);
970 }
971 break;
972 case M32C_OPERAND_DSP_40_S8 :
973 errmsg = insert_normal (cd, fields->f_dsp_40_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, buffer);
974 break;
975 case M32C_OPERAND_DSP_40_U16 :
976 {
977 long value = fields->f_dsp_40_u16;
978 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
979 errmsg = insert_normal (cd, value, 0, 32, 8, 16, 32, total_length, buffer);
980 }
981 break;
982 case M32C_OPERAND_DSP_40_U24 :
983 {
984 long value = fields->f_dsp_40_u24;
985 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
986 errmsg = insert_normal (cd, value, 0, 32, 8, 24, 32, total_length, buffer);
987 }
988 break;
989 case M32C_OPERAND_DSP_40_U8 :
990 errmsg = insert_normal (cd, fields->f_dsp_40_u8, 0, 32, 8, 8, 32, total_length, buffer);
991 break;
992 case M32C_OPERAND_DSP_48_S16 :
993 {
994 long value = fields->f_dsp_48_s16;
995 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
996 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, buffer);
997 }
998 break;
999 case M32C_OPERAND_DSP_48_S8 :
1000 errmsg = insert_normal (cd, fields->f_dsp_48_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, buffer);
1001 break;
1002 case M32C_OPERAND_DSP_48_U16 :
1003 {
1004 long value = fields->f_dsp_48_u16;
1005 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1006 errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer);
1007 }
1008 break;
1009 case M32C_OPERAND_DSP_48_U24 :
1010 {
1011 {
1012 FLD (f_dsp_64_u8) = ((((unsigned int) (FLD (f_dsp_48_u24)) >> (16))) & (255));
1013 FLD (f_dsp_48_u16) = ((FLD (f_dsp_48_u24)) & (65535));
1014 }
1015 {
1016 long value = fields->f_dsp_48_u16;
1017 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1018 errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer);
1019 }
1020 if (errmsg)
1021 break;
1022 errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer);
1023 if (errmsg)
1024 break;
1025 }
1026 break;
1027 case M32C_OPERAND_DSP_48_U8 :
1028 errmsg = insert_normal (cd, fields->f_dsp_48_u8, 0, 32, 16, 8, 32, total_length, buffer);
1029 break;
1030 case M32C_OPERAND_DSP_8_S24 :
1031 {
1032 long value = fields->f_dsp_8_s24;
1033 value = ((((((unsigned int) (value) >> (16))) | (((value) & (65280))))) | (((EXTQISI (TRUNCSIQI (((value) & (255))))) << (16))));
1034 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 24, 32, total_length, buffer);
1035 }
1036 break;
1037 case M32C_OPERAND_DSP_8_S8 :
1038 errmsg = insert_normal (cd, fields->f_dsp_8_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, buffer);
1039 break;
1040 case M32C_OPERAND_DSP_8_U16 :
1041 {
1042 long value = fields->f_dsp_8_u16;
1043 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1044 errmsg = insert_normal (cd, value, 0, 0, 8, 16, 32, total_length, buffer);
1045 }
1046 break;
1047 case M32C_OPERAND_DSP_8_U24 :
1048 {
1049 long value = fields->f_dsp_8_u24;
1050 value = ((((((unsigned int) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
1051 errmsg = insert_normal (cd, value, 0, 0, 8, 24, 32, total_length, buffer);
1052 }
1053 break;
1054 case M32C_OPERAND_DSP_8_U6 :
1055 errmsg = insert_normal (cd, fields->f_dsp_8_u6, 0, 0, 8, 6, 32, total_length, buffer);
1056 break;
1057 case M32C_OPERAND_DSP_8_U8 :
1058 errmsg = insert_normal (cd, fields->f_dsp_8_u8, 0, 0, 8, 8, 32, total_length, buffer);
1059 break;
1060 case M32C_OPERAND_DST16AN :
1061 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
1062 break;
1063 case M32C_OPERAND_DST16AN_S :
1064 errmsg = insert_normal (cd, fields->f_dst16_an_s, 0, 0, 4, 1, 32, total_length, buffer);
1065 break;
1066 case M32C_OPERAND_DST16ANHI :
1067 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
1068 break;
1069 case M32C_OPERAND_DST16ANQI :
1070 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
1071 break;
1072 case M32C_OPERAND_DST16ANQI_S :
1073 errmsg = insert_normal (cd, fields->f_dst16_rn_QI_s, 0, 0, 5, 1, 32, total_length, buffer);
1074 break;
1075 case M32C_OPERAND_DST16ANSI :
1076 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
1077 break;
1078 case M32C_OPERAND_DST16RNEXTQI :
1079 errmsg = insert_normal (cd, fields->f_dst16_rn_ext, 0, 0, 14, 1, 32, total_length, buffer);
1080 break;
1081 case M32C_OPERAND_DST16RNHI :
1082 errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer);
1083 break;
1084 case M32C_OPERAND_DST16RNQI :
1085 errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer);
1086 break;
1087 case M32C_OPERAND_DST16RNQI_S :
1088 errmsg = insert_normal (cd, fields->f_dst16_rn_QI_s, 0, 0, 5, 1, 32, total_length, buffer);
1089 break;
1090 case M32C_OPERAND_DST16RNSI :
1091 errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer);
1092 break;
1093 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
1094 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1095 break;
1096 case M32C_OPERAND_DST32ANPREFIXED :
1097 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
1098 break;
1099 case M32C_OPERAND_DST32ANPREFIXEDHI :
1100 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
1101 break;
1102 case M32C_OPERAND_DST32ANPREFIXEDQI :
1103 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
1104 break;
1105 case M32C_OPERAND_DST32ANPREFIXEDSI :
1106 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
1107 break;
1108 case M32C_OPERAND_DST32ANUNPREFIXED :
1109 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1110 break;
1111 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
1112 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1113 break;
1114 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
1115 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1116 break;
1117 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
1118 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1119 break;
1120 case M32C_OPERAND_DST32R0HI_S :
1121 break;
1122 case M32C_OPERAND_DST32R0QI_S :
1123 break;
1124 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
1125 errmsg = insert_normal (cd, fields->f_dst32_rn_ext_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1126 break;
1127 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
1128 errmsg = insert_normal (cd, fields->f_dst32_rn_ext_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1129 break;
1130 case M32C_OPERAND_DST32RNPREFIXEDHI :
1131 {
1132 long value = fields->f_dst32_rn_prefixed_HI;
1133 value = ((((value) + (2))) % (4));
1134 errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer);
1135 }
1136 break;
1137 case M32C_OPERAND_DST32RNPREFIXEDQI :
1138 {
1139 long value = fields->f_dst32_rn_prefixed_QI;
1140 value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1))));
1141 errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer);
1142 }
1143 break;
1144 case M32C_OPERAND_DST32RNPREFIXEDSI :
1145 {
1146 long value = fields->f_dst32_rn_prefixed_SI;
1147 value = ((value) + (2));
1148 errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer);
1149 }
1150 break;
1151 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
1152 {
1153 long value = fields->f_dst32_rn_unprefixed_HI;
1154 value = ((((value) + (2))) % (4));
1155 errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer);
1156 }
1157 break;
1158 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
1159 {
1160 long value = fields->f_dst32_rn_unprefixed_QI;
1161 value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1))));
1162 errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer);
1163 }
1164 break;
1165 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
1166 {
1167 long value = fields->f_dst32_rn_unprefixed_SI;
1168 value = ((value) + (2));
1169 errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer);
1170 }
1171 break;
1172 case M32C_OPERAND_G :
1173 break;
1174 case M32C_OPERAND_IMM_12_S4 :
1175 errmsg = insert_normal (cd, fields->f_imm_12_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, buffer);
1176 break;
1177 case M32C_OPERAND_IMM_12_S4N :
1178 errmsg = insert_normal (cd, fields->f_imm_12_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, buffer);
1179 break;
1180 case M32C_OPERAND_IMM_13_U3 :
1181 errmsg = insert_normal (cd, fields->f_imm_13_u3, 0, 0, 13, 3, 32, total_length, buffer);
1182 break;
1183 case M32C_OPERAND_IMM_16_HI :
1184 {
1185 long value = fields->f_dsp_16_s16;
1186 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1187 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, buffer);
1188 }
1189 break;
1190 case M32C_OPERAND_IMM_16_QI :
1191 errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer);
1192 break;
1193 case M32C_OPERAND_IMM_16_SI :
1194 {
1195 {
1196 FLD (f_dsp_32_u16) = ((((unsigned int) (FLD (f_dsp_16_s32)) >> (16))) & (65535));
1197 FLD (f_dsp_16_u16) = ((FLD (f_dsp_16_s32)) & (65535));
1198 }
1199 {
1200 long value = fields->f_dsp_16_u16;
1201 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1202 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
1203 }
1204 if (errmsg)
1205 break;
1206 {
1207 long value = fields->f_dsp_32_u16;
1208 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1209 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
1210 }
1211 if (errmsg)
1212 break;
1213 }
1214 break;
1215 case M32C_OPERAND_IMM_20_S4 :
1216 errmsg = insert_normal (cd, fields->f_imm_20_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, buffer);
1217 break;
1218 case M32C_OPERAND_IMM_24_HI :
1219 {
1220 {
1221 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_s16)) & (255));
1222 FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_dsp_24_s16)) >> (8))) & (255));
1223 }
1224 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
1225 if (errmsg)
1226 break;
1227 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
1228 if (errmsg)
1229 break;
1230 }
1231 break;
1232 case M32C_OPERAND_IMM_24_QI :
1233 errmsg = insert_normal (cd, fields->f_dsp_24_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, buffer);
1234 break;
1235 case M32C_OPERAND_IMM_24_SI :
1236 {
1237 {
1238 FLD (f_dsp_32_u24) = ((((unsigned int) (FLD (f_dsp_24_s32)) >> (8))) & (16777215));
1239 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_s32)) & (255));
1240 }
1241 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
1242 if (errmsg)
1243 break;
1244 {
1245 long value = fields->f_dsp_32_u24;
1246 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
1247 errmsg = insert_normal (cd, value, 0, 32, 0, 24, 32, total_length, buffer);
1248 }
1249 if (errmsg)
1250 break;
1251 }
1252 break;
1253 case M32C_OPERAND_IMM_32_HI :
1254 {
1255 long value = fields->f_dsp_32_s16;
1256 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1257 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, buffer);
1258 }
1259 break;
1260 case M32C_OPERAND_IMM_32_QI :
1261 errmsg = insert_normal (cd, fields->f_dsp_32_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, buffer);
1262 break;
1263 case M32C_OPERAND_IMM_32_SI :
1264 {
1265 long value = fields->f_dsp_32_s32;
1266 value = EXTSISI (((((((((unsigned int) (value) >> (24))) & (255))) | (((((unsigned int) (value) >> (8))) & (65280))))) | (((((((value) << (8))) & (16711680))) | (((((value) << (24))) & (0xff000000)))))));
1267 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 32, 32, total_length, buffer);
1268 }
1269 break;
1270 case M32C_OPERAND_IMM_40_HI :
1271 {
1272 long value = fields->f_dsp_40_s16;
1273 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1274 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, buffer);
1275 }
1276 break;
1277 case M32C_OPERAND_IMM_40_QI :
1278 errmsg = insert_normal (cd, fields->f_dsp_40_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, buffer);
1279 break;
1280 case M32C_OPERAND_IMM_40_SI :
1281 {
1282 {
1283 FLD (f_dsp_64_u8) = ((((unsigned int) (FLD (f_dsp_40_s32)) >> (24))) & (255));
1284 FLD (f_dsp_40_u24) = ((FLD (f_dsp_40_s32)) & (16777215));
1285 }
1286 {
1287 long value = fields->f_dsp_40_u24;
1288 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
1289 errmsg = insert_normal (cd, value, 0, 32, 8, 24, 32, total_length, buffer);
1290 }
1291 if (errmsg)
1292 break;
1293 errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer);
1294 if (errmsg)
1295 break;
1296 }
1297 break;
1298 case M32C_OPERAND_IMM_48_HI :
1299 {
1300 long value = fields->f_dsp_48_s16;
1301 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1302 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, buffer);
1303 }
1304 break;
1305 case M32C_OPERAND_IMM_48_QI :
1306 errmsg = insert_normal (cd, fields->f_dsp_48_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, buffer);
1307 break;
1308 case M32C_OPERAND_IMM_48_SI :
1309 {
1310 {
1311 FLD (f_dsp_64_u16) = ((((unsigned int) (FLD (f_dsp_48_s32)) >> (16))) & (65535));
1312 FLD (f_dsp_48_u16) = ((FLD (f_dsp_48_s32)) & (65535));
1313 }
1314 {
1315 long value = fields->f_dsp_48_u16;
1316 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1317 errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer);
1318 }
1319 if (errmsg)
1320 break;
1321 {
1322 long value = fields->f_dsp_64_u16;
1323 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1324 errmsg = insert_normal (cd, value, 0, 64, 0, 16, 32, total_length, buffer);
1325 }
1326 if (errmsg)
1327 break;
1328 }
1329 break;
1330 case M32C_OPERAND_IMM_56_HI :
1331 {
1332 {
1333 FLD (f_dsp_56_u8) = ((FLD (f_dsp_56_s16)) & (255));
1334 FLD (f_dsp_64_u8) = ((((unsigned int) (FLD (f_dsp_56_s16)) >> (8))) & (255));
1335 }
1336 errmsg = insert_normal (cd, fields->f_dsp_56_u8, 0, 32, 24, 8, 32, total_length, buffer);
1337 if (errmsg)
1338 break;
1339 errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer);
1340 if (errmsg)
1341 break;
1342 }
1343 break;
1344 case M32C_OPERAND_IMM_56_QI :
1345 errmsg = insert_normal (cd, fields->f_dsp_56_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 24, 8, 32, total_length, buffer);
1346 break;
1347 case M32C_OPERAND_IMM_64_HI :
1348 {
1349 long value = fields->f_dsp_64_s16;
1350 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1351 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 64, 0, 16, 32, total_length, buffer);
1352 }
1353 break;
1354 case M32C_OPERAND_IMM_8_HI :
1355 {
1356 long value = fields->f_dsp_8_s16;
1357 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1358 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 16, 32, total_length, buffer);
1359 }
1360 break;
1361 case M32C_OPERAND_IMM_8_QI :
1362 errmsg = insert_normal (cd, fields->f_dsp_8_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, buffer);
1363 break;
1364 case M32C_OPERAND_IMM_8_S4 :
1365 errmsg = insert_normal (cd, fields->f_imm_8_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, buffer);
1366 break;
1367 case M32C_OPERAND_IMM_8_S4N :
1368 errmsg = insert_normal (cd, fields->f_imm_8_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, buffer);
1369 break;
1370 case M32C_OPERAND_IMM_SH_12_S4 :
1371 errmsg = insert_normal (cd, fields->f_imm_12_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, buffer);
1372 break;
1373 case M32C_OPERAND_IMM_SH_20_S4 :
1374 errmsg = insert_normal (cd, fields->f_imm_20_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, buffer);
1375 break;
1376 case M32C_OPERAND_IMM_SH_8_S4 :
1377 errmsg = insert_normal (cd, fields->f_imm_8_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, buffer);
1378 break;
1379 case M32C_OPERAND_IMM1_S :
1380 {
1381 long value = fields->f_imm1_S;
1382 value = ((value) - (1));
1383 errmsg = insert_normal (cd, value, 0, 0, 2, 1, 32, total_length, buffer);
1384 }
1385 break;
1386 case M32C_OPERAND_IMM3_S :
1387 {
1388 {
1389 FLD (f_7_1) = ((((FLD (f_imm3_S)) - (1))) & (1));
1390 FLD (f_2_2) = ((((unsigned int) (((FLD (f_imm3_S)) - (1))) >> (1))) & (3));
1391 }
1392 errmsg = insert_normal (cd, fields->f_2_2, 0, 0, 2, 2, 32, total_length, buffer);
1393 if (errmsg)
1394 break;
1395 errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer);
1396 if (errmsg)
1397 break;
1398 }
1399 break;
1400 case M32C_OPERAND_LAB_16_8 :
1401 {
1402 long value = fields->f_lab_16_8;
1403 value = ((value) - (((pc) + (2))));
1404 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 16, 8, 32, total_length, buffer);
1405 }
1406 break;
1407 case M32C_OPERAND_LAB_24_8 :
1408 {
1409 long value = fields->f_lab_24_8;
1410 value = ((value) - (((pc) + (2))));
1411 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 24, 8, 32, total_length, buffer);
1412 }
1413 break;
1414 case M32C_OPERAND_LAB_32_8 :
1415 {
1416 long value = fields->f_lab_32_8;
1417 value = ((value) - (((pc) + (2))));
1418 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 0, 8, 32, total_length, buffer);
1419 }
1420 break;
1421 case M32C_OPERAND_LAB_40_8 :
1422 {
1423 long value = fields->f_lab_40_8;
1424 value = ((value) - (((pc) + (2))));
1425 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 8, 8, 32, total_length, buffer);
1426 }
1427 break;
1428 case M32C_OPERAND_LAB_5_3 :
1429 {
1430 long value = fields->f_lab_5_3;
1431 value = ((value) - (((pc) + (2))));
1432 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_PCREL_ADDR), 0, 5, 3, 32, total_length, buffer);
1433 }
1434 break;
1435 case M32C_OPERAND_LAB_8_16 :
1436 {
1437 long value = fields->f_lab_8_16;
1438 value = ((((((((value) - (((pc) + (1))))) & (255))) << (8))) | (((unsigned int) (((((value) - (((pc) + (1))))) & (65535))) >> (8))));
1439 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGN_OPT)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 16, 32, total_length, buffer);
1440 }
1441 break;
1442 case M32C_OPERAND_LAB_8_24 :
1443 {
1444 long value = fields->f_lab_8_24;
1445 value = ((((((unsigned int) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
1446 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 8, 24, 32, total_length, buffer);
1447 }
1448 break;
1449 case M32C_OPERAND_LAB_8_8 :
1450 {
1451 long value = fields->f_lab_8_8;
1452 value = ((value) - (((pc) + (1))));
1453 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 32, total_length, buffer);
1454 }
1455 break;
1456 case M32C_OPERAND_LAB32_JMP_S :
1457 {
1458 {
1459 SI tmp_val;
1460 tmp_val = ((((FLD (f_lab32_jmp_s)) - (pc))) - (2));
1461 FLD (f_7_1) = ((tmp_val) & (1));
1462 FLD (f_2_2) = ((unsigned int) (tmp_val) >> (1));
1463 }
1464 errmsg = insert_normal (cd, fields->f_2_2, 0, 0, 2, 2, 32, total_length, buffer);
1465 if (errmsg)
1466 break;
1467 errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer);
1468 if (errmsg)
1469 break;
1470 }
1471 break;
1472 case M32C_OPERAND_Q :
1473 break;
1474 case M32C_OPERAND_R0 :
1475 break;
1476 case M32C_OPERAND_R0H :
1477 break;
1478 case M32C_OPERAND_R0L :
1479 break;
1480 case M32C_OPERAND_R1 :
1481 break;
1482 case M32C_OPERAND_R1R2R0 :
1483 break;
1484 case M32C_OPERAND_R2 :
1485 break;
1486 case M32C_OPERAND_R2R0 :
1487 break;
1488 case M32C_OPERAND_R3 :
1489 break;
1490 case M32C_OPERAND_R3R1 :
1491 break;
1492 case M32C_OPERAND_REGSETPOP :
1493 errmsg = insert_normal (cd, fields->f_8_8, 0, 0, 8, 8, 32, total_length, buffer);
1494 break;
1495 case M32C_OPERAND_REGSETPUSH :
1496 errmsg = insert_normal (cd, fields->f_8_8, 0, 0, 8, 8, 32, total_length, buffer);
1497 break;
1498 case M32C_OPERAND_RN16_PUSH_S :
1499 errmsg = insert_normal (cd, fields->f_4_1, 0, 0, 4, 1, 32, total_length, buffer);
1500 break;
1501 case M32C_OPERAND_S :
1502 break;
1503 case M32C_OPERAND_SRC16AN :
1504 errmsg = insert_normal (cd, fields->f_src16_an, 0, 0, 11, 1, 32, total_length, buffer);
1505 break;
1506 case M32C_OPERAND_SRC16ANHI :
1507 errmsg = insert_normal (cd, fields->f_src16_an, 0, 0, 11, 1, 32, total_length, buffer);
1508 break;
1509 case M32C_OPERAND_SRC16ANQI :
1510 errmsg = insert_normal (cd, fields->f_src16_an, 0, 0, 11, 1, 32, total_length, buffer);
1511 break;
1512 case M32C_OPERAND_SRC16RNHI :
1513 errmsg = insert_normal (cd, fields->f_src16_rn, 0, 0, 10, 2, 32, total_length, buffer);
1514 break;
1515 case M32C_OPERAND_SRC16RNQI :
1516 errmsg = insert_normal (cd, fields->f_src16_rn, 0, 0, 10, 2, 32, total_length, buffer);
1517 break;
1518 case M32C_OPERAND_SRC32ANPREFIXED :
1519 errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer);
1520 break;
1521 case M32C_OPERAND_SRC32ANPREFIXEDHI :
1522 errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer);
1523 break;
1524 case M32C_OPERAND_SRC32ANPREFIXEDQI :
1525 errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer);
1526 break;
1527 case M32C_OPERAND_SRC32ANPREFIXEDSI :
1528 errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer);
1529 break;
1530 case M32C_OPERAND_SRC32ANUNPREFIXED :
1531 errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer);
1532 break;
1533 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
1534 errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer);
1535 break;
1536 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
1537 errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer);
1538 break;
1539 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
1540 errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer);
1541 break;
1542 case M32C_OPERAND_SRC32RNPREFIXEDHI :
1543 {
1544 long value = fields->f_src32_rn_prefixed_HI;
1545 value = ((((value) + (2))) % (4));
1546 errmsg = insert_normal (cd, value, 0, 0, 18, 2, 32, total_length, buffer);
1547 }
1548 break;
1549 case M32C_OPERAND_SRC32RNPREFIXEDQI :
1550 {
1551 long value = fields->f_src32_rn_prefixed_QI;
1552 value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1))));
1553 errmsg = insert_normal (cd, value, 0, 0, 18, 2, 32, total_length, buffer);
1554 }
1555 break;
1556 case M32C_OPERAND_SRC32RNPREFIXEDSI :
1557 {
1558 long value = fields->f_src32_rn_prefixed_SI;
1559 value = ((value) + (2));
1560 errmsg = insert_normal (cd, value, 0, 0, 18, 2, 32, total_length, buffer);
1561 }
1562 break;
1563 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
1564 {
1565 long value = fields->f_src32_rn_unprefixed_HI;
1566 value = ((((value) + (2))) % (4));
1567 errmsg = insert_normal (cd, value, 0, 0, 10, 2, 32, total_length, buffer);
1568 }
1569 break;
1570 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
1571 {
1572 long value = fields->f_src32_rn_unprefixed_QI;
1573 value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1))));
1574 errmsg = insert_normal (cd, value, 0, 0, 10, 2, 32, total_length, buffer);
1575 }
1576 break;
1577 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
1578 {
1579 long value = fields->f_src32_rn_unprefixed_SI;
1580 value = ((value) + (2));
1581 errmsg = insert_normal (cd, value, 0, 0, 10, 2, 32, total_length, buffer);
1582 }
1583 break;
1584 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
1585 errmsg = insert_normal (cd, fields->f_5_1, 0, 0, 5, 1, 32, total_length, buffer);
1586 break;
1587 case M32C_OPERAND_X :
1588 break;
1589 case M32C_OPERAND_Z :
1590 break;
1591 case M32C_OPERAND_COND16_16 :
1592 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
1593 break;
1594 case M32C_OPERAND_COND16_24 :
1595 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
1596 break;
1597 case M32C_OPERAND_COND16_32 :
1598 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
1599 break;
1600 case M32C_OPERAND_COND16C :
1601 errmsg = insert_normal (cd, fields->f_cond16, 0, 0, 12, 4, 32, total_length, buffer);
1602 break;
1603 case M32C_OPERAND_COND16J :
1604 errmsg = insert_normal (cd, fields->f_cond16, 0, 0, 12, 4, 32, total_length, buffer);
1605 break;
1606 case M32C_OPERAND_COND16J5 :
1607 errmsg = insert_normal (cd, fields->f_cond16j_5, 0, 0, 5, 3, 32, total_length, buffer);
1608 break;
1609 case M32C_OPERAND_COND32 :
1610 {
1611 {
1612 FLD (f_9_1) = ((((unsigned int) (FLD (f_cond32)) >> (3))) & (1));
1613 FLD (f_13_3) = ((FLD (f_cond32)) & (7));
1614 }
1615 errmsg = insert_normal (cd, fields->f_9_1, 0, 0, 9, 1, 32, total_length, buffer);
1616 if (errmsg)
1617 break;
1618 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1619 if (errmsg)
1620 break;
1621 }
1622 break;
1623 case M32C_OPERAND_COND32_16 :
1624 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
1625 break;
1626 case M32C_OPERAND_COND32_24 :
1627 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
1628 break;
1629 case M32C_OPERAND_COND32_32 :
1630 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
1631 break;
1632 case M32C_OPERAND_COND32_40 :
1633 errmsg = insert_normal (cd, fields->f_dsp_40_u8, 0, 32, 8, 8, 32, total_length, buffer);
1634 break;
1635 case M32C_OPERAND_COND32J :
1636 {
1637 {
1638 FLD (f_1_3) = ((((unsigned int) (FLD (f_cond32j)) >> (1))) & (7));
1639 FLD (f_7_1) = ((FLD (f_cond32j)) & (1));
1640 }
1641 errmsg = insert_normal (cd, fields->f_1_3, 0, 0, 1, 3, 32, total_length, buffer);
1642 if (errmsg)
1643 break;
1644 errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer);
1645 if (errmsg)
1646 break;
1647 }
1648 break;
1649 case M32C_OPERAND_CR1_PREFIXED_32 :
1650 errmsg = insert_normal (cd, fields->f_21_3, 0, 0, 21, 3, 32, total_length, buffer);
1651 break;
1652 case M32C_OPERAND_CR1_UNPREFIXED_32 :
1653 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1654 break;
1655 case M32C_OPERAND_CR16 :
1656 errmsg = insert_normal (cd, fields->f_9_3, 0, 0, 9, 3, 32, total_length, buffer);
1657 break;
1658 case M32C_OPERAND_CR2_32 :
1659 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1660 break;
1661 case M32C_OPERAND_CR3_PREFIXED_32 :
1662 errmsg = insert_normal (cd, fields->f_21_3, 0, 0, 21, 3, 32, total_length, buffer);
1663 break;
1664 case M32C_OPERAND_CR3_UNPREFIXED_32 :
1665 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1666 break;
1667 case M32C_OPERAND_FLAGS16 :
1668 errmsg = insert_normal (cd, fields->f_9_3, 0, 0, 9, 3, 32, total_length, buffer);
1669 break;
1670 case M32C_OPERAND_FLAGS32 :
1671 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1672 break;
1673 case M32C_OPERAND_SCCOND32 :
1674 errmsg = insert_normal (cd, fields->f_cond16, 0, 0, 12, 4, 32, total_length, buffer);
1675 break;
1676 case M32C_OPERAND_SIZE :
1677 break;
1678
1679 default :
1680 /* xgettext:c-format */
1681 fprintf (stderr, _("Unrecognized field %d while building insn.\n"),
1682 opindex);
1683 abort ();
1684 }
1685
1686 return errmsg;
1687 }
1688
1689 int m32c_cgen_extract_operand
1690 (CGEN_CPU_DESC, int, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
1691
1692 /* Main entry point for operand extraction.
1693 The result is <= 0 for error, >0 for success.
1694 ??? Actual values aren't well defined right now.
1695
1696 This function is basically just a big switch statement. Earlier versions
1697 used tables to look up the function to use, but
1698 - if the table contains both assembler and disassembler functions then
1699 the disassembler contains much of the assembler and vice-versa,
1700 - there's a lot of inlining possibilities as things grow,
1701 - using a switch statement avoids the function call overhead.
1702
1703 This function could be moved into `print_insn_normal', but keeping it
1704 separate makes clear the interface between `print_insn_normal' and each of
1705 the handlers. */
1706
1707 int
1708 m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
1709 int opindex,
1710 CGEN_EXTRACT_INFO *ex_info,
1711 CGEN_INSN_INT insn_value,
1712 CGEN_FIELDS * fields,
1713 bfd_vma pc)
1714 {
1715 /* Assume success (for those operands that are nops). */
1716 int length = 1;
1717 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
1718
1719 switch (opindex)
1720 {
1721 case M32C_OPERAND_A0 :
1722 break;
1723 case M32C_OPERAND_A1 :
1724 break;
1725 case M32C_OPERAND_AN16_PUSH_S :
1726 length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 1, 32, total_length, pc, & fields->f_4_1);
1727 break;
1728 case M32C_OPERAND_BIT16AN :
1729 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
1730 break;
1731 case M32C_OPERAND_BIT16RN :
1732 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn);
1733 break;
1734 case M32C_OPERAND_BIT32ANPREFIXED :
1735 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
1736 break;
1737 case M32C_OPERAND_BIT32ANUNPREFIXED :
1738 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
1739 break;
1740 case M32C_OPERAND_BIT32RNPREFIXED :
1741 {
1742 long value;
1743 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value);
1744 value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
1745 fields->f_dst32_rn_prefixed_QI = value;
1746 }
1747 break;
1748 case M32C_OPERAND_BIT32RNUNPREFIXED :
1749 {
1750 long value;
1751 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value);
1752 value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
1753 fields->f_dst32_rn_unprefixed_QI = value;
1754 }
1755 break;
1756 case M32C_OPERAND_BITBASE16_16_S8 :
1757 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8);
1758 break;
1759 case M32C_OPERAND_BITBASE16_16_U16 :
1760 {
1761 long value;
1762 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
1763 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1764 fields->f_dsp_16_u16 = value;
1765 }
1766 break;
1767 case M32C_OPERAND_BITBASE16_16_U8 :
1768 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
1769 break;
1770 case M32C_OPERAND_BITBASE16_8_U11_S :
1771 {
1772 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 3, 32, total_length, pc, & fields->f_bitno16_S);
1773 if (length <= 0) break;
1774 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_u8);
1775 if (length <= 0) break;
1776 {
1777 FLD (f_bitbase16_u11_S) = ((((FLD (f_dsp_8_u8)) << (3))) | (FLD (f_bitno16_S)));
1778 }
1779 }
1780 break;
1781 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
1782 {
1783 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1784 if (length <= 0) break;
1785 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8);
1786 if (length <= 0) break;
1787 {
1788 FLD (f_bitbase32_16_s11_unprefixed) = ((((FLD (f_dsp_16_s8)) << (3))) | (FLD (f_bitno32_unprefixed)));
1789 }
1790 }
1791 break;
1792 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
1793 {
1794 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1795 if (length <= 0) break;
1796 {
1797 long value;
1798 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value);
1799 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1800 fields->f_dsp_16_s16 = value;
1801 }
1802 if (length <= 0) break;
1803 {
1804 FLD (f_bitbase32_16_s19_unprefixed) = ((((FLD (f_dsp_16_s16)) << (3))) | (FLD (f_bitno32_unprefixed)));
1805 }
1806 }
1807 break;
1808 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
1809 {
1810 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1811 if (length <= 0) break;
1812 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
1813 if (length <= 0) break;
1814 {
1815 FLD (f_bitbase32_16_u11_unprefixed) = ((((FLD (f_dsp_16_u8)) << (3))) | (FLD (f_bitno32_unprefixed)));
1816 }
1817 }
1818 break;
1819 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
1820 {
1821 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1822 if (length <= 0) break;
1823 {
1824 long value;
1825 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
1826 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1827 fields->f_dsp_16_u16 = value;
1828 }
1829 if (length <= 0) break;
1830 {
1831 FLD (f_bitbase32_16_u19_unprefixed) = ((((FLD (f_dsp_16_u16)) << (3))) | (FLD (f_bitno32_unprefixed)));
1832 }
1833 }
1834 break;
1835 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
1836 {
1837 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1838 if (length <= 0) break;
1839 {
1840 long value;
1841 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
1842 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1843 fields->f_dsp_16_u16 = value;
1844 }
1845 if (length <= 0) break;
1846 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
1847 if (length <= 0) break;
1848 {
1849 FLD (f_bitbase32_16_u27_unprefixed) = ((((FLD (f_dsp_16_u16)) << (3))) | (((((FLD (f_dsp_32_u8)) << (19))) | (FLD (f_bitno32_unprefixed)))));
1850 }
1851 }
1852 break;
1853 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
1854 {
1855 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1856 if (length <= 0) break;
1857 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_s8);
1858 if (length <= 0) break;
1859 {
1860 FLD (f_bitbase32_24_s11_prefixed) = ((((FLD (f_dsp_24_s8)) << (3))) | (FLD (f_bitno32_prefixed)));
1861 }
1862 }
1863 break;
1864 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
1865 {
1866 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1867 if (length <= 0) break;
1868 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
1869 if (length <= 0) break;
1870 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_s8);
1871 if (length <= 0) break;
1872 {
1873 FLD (f_bitbase32_24_s19_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (((((FLD (f_dsp_32_s8)) << (11))) | (FLD (f_bitno32_prefixed)))));
1874 }
1875 }
1876 break;
1877 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
1878 {
1879 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1880 if (length <= 0) break;
1881 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
1882 if (length <= 0) break;
1883 {
1884 FLD (f_bitbase32_24_u11_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (FLD (f_bitno32_prefixed)));
1885 }
1886 }
1887 break;
1888 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
1889 {
1890 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1891 if (length <= 0) break;
1892 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
1893 if (length <= 0) break;
1894 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
1895 if (length <= 0) break;
1896 {
1897 FLD (f_bitbase32_24_u19_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (((((FLD (f_dsp_32_u8)) << (11))) | (FLD (f_bitno32_prefixed)))));
1898 }
1899 }
1900 break;
1901 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
1902 {
1903 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1904 if (length <= 0) break;
1905 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
1906 if (length <= 0) break;
1907 {
1908 long value;
1909 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
1910 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1911 fields->f_dsp_32_u16 = value;
1912 }
1913 if (length <= 0) break;
1914 {
1915 FLD (f_bitbase32_24_u27_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (((((FLD (f_dsp_32_u16)) << (11))) | (FLD (f_bitno32_prefixed)))));
1916 }
1917 }
1918 break;
1919 case M32C_OPERAND_BITNO16R :
1920 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
1921 break;
1922 case M32C_OPERAND_BITNO32PREFIXED :
1923 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1924 break;
1925 case M32C_OPERAND_BITNO32UNPREFIXED :
1926 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1927 break;
1928 case M32C_OPERAND_DSP_10_U6 :
1929 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 6, 32, total_length, pc, & fields->f_dsp_10_u6);
1930 break;
1931 case M32C_OPERAND_DSP_16_S16 :
1932 {
1933 long value;
1934 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value);
1935 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1936 fields->f_dsp_16_s16 = value;
1937 }
1938 break;
1939 case M32C_OPERAND_DSP_16_S8 :
1940 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8);
1941 break;
1942 case M32C_OPERAND_DSP_16_U16 :
1943 {
1944 long value;
1945 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
1946 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1947 fields->f_dsp_16_u16 = value;
1948 }
1949 break;
1950 case M32C_OPERAND_DSP_16_U20 :
1951 {
1952 {
1953 long value;
1954 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
1955 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1956 fields->f_dsp_16_u16 = value;
1957 }
1958 if (length <= 0) break;
1959 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
1960 if (length <= 0) break;
1961 {
1962 FLD (f_dsp_16_u24) = ((((FLD (f_dsp_32_u8)) << (16))) | (FLD (f_dsp_16_u16)));
1963 }
1964 }
1965 break;
1966 case M32C_OPERAND_DSP_16_U24 :
1967 {
1968 {
1969 long value;
1970 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
1971 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1972 fields->f_dsp_16_u16 = value;
1973 }
1974 if (length <= 0) break;
1975 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
1976 if (length <= 0) break;
1977 {
1978 FLD (f_dsp_16_u24) = ((((FLD (f_dsp_32_u8)) << (16))) | (FLD (f_dsp_16_u16)));
1979 }
1980 }
1981 break;
1982 case M32C_OPERAND_DSP_16_U8 :
1983 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
1984 break;
1985 case M32C_OPERAND_DSP_24_S16 :
1986 {
1987 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
1988 if (length <= 0) break;
1989 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
1990 if (length <= 0) break;
1991 {
1992 FLD (f_dsp_24_s16) = EXTHISI (((HI) (UINT) (((((FLD (f_dsp_32_u8)) << (8))) | (FLD (f_dsp_24_u8))))));
1993 }
1994 }
1995 break;
1996 case M32C_OPERAND_DSP_24_S8 :
1997 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_s8);
1998 break;
1999 case M32C_OPERAND_DSP_24_U16 :
2000 {
2001 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2002 if (length <= 0) break;
2003 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2004 if (length <= 0) break;
2005 {
2006 FLD (f_dsp_24_u16) = ((((FLD (f_dsp_32_u8)) << (8))) | (FLD (f_dsp_24_u8)));
2007 }
2008 }
2009 break;
2010 case M32C_OPERAND_DSP_24_U20 :
2011 {
2012 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2013 if (length <= 0) break;
2014 {
2015 long value;
2016 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
2017 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2018 fields->f_dsp_32_u16 = value;
2019 }
2020 if (length <= 0) break;
2021 {
2022 FLD (f_dsp_24_u24) = ((((FLD (f_dsp_32_u16)) << (8))) | (FLD (f_dsp_24_u8)));
2023 }
2024 }
2025 break;
2026 case M32C_OPERAND_DSP_24_U24 :
2027 {
2028 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2029 if (length <= 0) break;
2030 {
2031 long value;
2032 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
2033 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2034 fields->f_dsp_32_u16 = value;
2035 }
2036 if (length <= 0) break;
2037 {
2038 FLD (f_dsp_24_u24) = ((((FLD (f_dsp_32_u16)) << (8))) | (FLD (f_dsp_24_u8)));
2039 }
2040 }
2041 break;
2042 case M32C_OPERAND_DSP_24_U8 :
2043 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2044 break;
2045 case M32C_OPERAND_DSP_32_S16 :
2046 {
2047 long value;
2048 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, pc, & value);
2049 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2050 fields->f_dsp_32_s16 = value;
2051 }
2052 break;
2053 case M32C_OPERAND_DSP_32_S8 :
2054 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_s8);
2055 break;
2056 case M32C_OPERAND_DSP_32_U16 :
2057 {
2058 long value;
2059 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
2060 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2061 fields->f_dsp_32_u16 = value;
2062 }
2063 break;
2064 case M32C_OPERAND_DSP_32_U20 :
2065 {
2066 long value;
2067 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value);
2068 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2069 fields->f_dsp_32_u24 = value;
2070 }
2071 break;
2072 case M32C_OPERAND_DSP_32_U24 :
2073 {
2074 long value;
2075 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value);
2076 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2077 fields->f_dsp_32_u24 = value;
2078 }
2079 break;
2080 case M32C_OPERAND_DSP_32_U8 :
2081 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2082 break;
2083 case M32C_OPERAND_DSP_40_S16 :
2084 {
2085 long value;
2086 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, pc, & value);
2087 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2088 fields->f_dsp_40_s16 = value;
2089 }
2090 break;
2091 case M32C_OPERAND_DSP_40_S8 :
2092 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_s8);
2093 break;
2094 case M32C_OPERAND_DSP_40_U16 :
2095 {
2096 long value;
2097 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 16, 32, total_length, pc, & value);
2098 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2099 fields->f_dsp_40_u16 = value;
2100 }
2101 break;
2102 case M32C_OPERAND_DSP_40_U24 :
2103 {
2104 long value;
2105 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 24, 32, total_length, pc, & value);
2106 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2107 fields->f_dsp_40_u24 = value;
2108 }
2109 break;
2110 case M32C_OPERAND_DSP_40_U8 :
2111 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_u8);
2112 break;
2113 case M32C_OPERAND_DSP_48_S16 :
2114 {
2115 long value;
2116 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, pc, & value);
2117 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2118 fields->f_dsp_48_s16 = value;
2119 }
2120 break;
2121 case M32C_OPERAND_DSP_48_S8 :
2122 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, pc, & fields->f_dsp_48_s8);
2123 break;
2124 case M32C_OPERAND_DSP_48_U16 :
2125 {
2126 long value;
2127 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value);
2128 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2129 fields->f_dsp_48_u16 = value;
2130 }
2131 break;
2132 case M32C_OPERAND_DSP_48_U24 :
2133 {
2134 {
2135 long value;
2136 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value);
2137 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2138 fields->f_dsp_48_u16 = value;
2139 }
2140 if (length <= 0) break;
2141 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8);
2142 if (length <= 0) break;
2143 {
2144 FLD (f_dsp_48_u24) = ((((FLD (f_dsp_48_u16)) & (65535))) | (((((FLD (f_dsp_64_u8)) << (16))) & (16711680))));
2145 }
2146 }
2147 break;
2148 case M32C_OPERAND_DSP_48_U8 :
2149 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 8, 32, total_length, pc, & fields->f_dsp_48_u8);
2150 break;
2151 case M32C_OPERAND_DSP_8_S24 :
2152 {
2153 long value;
2154 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 24, 32, total_length, pc, & value);
2155 value = ((((((unsigned int) (value) >> (16))) | (((value) & (65280))))) | (((EXTQISI (TRUNCSIQI (((value) & (255))))) << (16))));
2156 fields->f_dsp_8_s24 = value;
2157 }
2158 break;
2159 case M32C_OPERAND_DSP_8_S8 :
2160 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_s8);
2161 break;
2162 case M32C_OPERAND_DSP_8_U16 :
2163 {
2164 long value;
2165 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 16, 32, total_length, pc, & value);
2166 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2167 fields->f_dsp_8_u16 = value;
2168 }
2169 break;
2170 case M32C_OPERAND_DSP_8_U24 :
2171 {
2172 long value;
2173 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 24, 32, total_length, pc, & value);
2174 value = ((((((unsigned int) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
2175 fields->f_dsp_8_u24 = value;
2176 }
2177 break;
2178 case M32C_OPERAND_DSP_8_U6 :
2179 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 6, 32, total_length, pc, & fields->f_dsp_8_u6);
2180 break;
2181 case M32C_OPERAND_DSP_8_U8 :
2182 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_u8);
2183 break;
2184 case M32C_OPERAND_DST16AN :
2185 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
2186 break;
2187 case M32C_OPERAND_DST16AN_S :
2188 length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 1, 32, total_length, pc, & fields->f_dst16_an_s);
2189 break;
2190 case M32C_OPERAND_DST16ANHI :
2191 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
2192 break;
2193 case M32C_OPERAND_DST16ANQI :
2194 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
2195 break;
2196 case M32C_OPERAND_DST16ANQI_S :
2197 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 1, 32, total_length, pc, & fields->f_dst16_rn_QI_s);
2198 break;
2199 case M32C_OPERAND_DST16ANSI :
2200 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
2201 break;
2202 case M32C_OPERAND_DST16RNEXTQI :
2203 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 1, 32, total_length, pc, & fields->f_dst16_rn_ext);
2204 break;
2205 case M32C_OPERAND_DST16RNHI :
2206 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn);
2207 break;
2208 case M32C_OPERAND_DST16RNQI :
2209 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn);
2210 break;
2211 case M32C_OPERAND_DST16RNQI_S :
2212 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 1, 32, total_length, pc, & fields->f_dst16_rn_QI_s);
2213 break;
2214 case M32C_OPERAND_DST16RNSI :
2215 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn);
2216 break;
2217 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
2218 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2219 break;
2220 case M32C_OPERAND_DST32ANPREFIXED :
2221 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
2222 break;
2223 case M32C_OPERAND_DST32ANPREFIXEDHI :
2224 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
2225 break;
2226 case M32C_OPERAND_DST32ANPREFIXEDQI :
2227 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
2228 break;
2229 case M32C_OPERAND_DST32ANPREFIXEDSI :
2230 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
2231 break;
2232 case M32C_OPERAND_DST32ANUNPREFIXED :
2233 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2234 break;
2235 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
2236 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2237 break;
2238 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
2239 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2240 break;
2241 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
2242 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2243 break;
2244 case M32C_OPERAND_DST32R0HI_S :
2245 break;
2246 case M32C_OPERAND_DST32R0QI_S :
2247 break;
2248 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
2249 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_rn_ext_unprefixed);
2250 break;
2251 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
2252 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_rn_ext_unprefixed);
2253 break;
2254 case M32C_OPERAND_DST32RNPREFIXEDHI :
2255 {
2256 long value;
2257 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value);
2258 value = ((((value) + (2))) % (4));
2259 fields->f_dst32_rn_prefixed_HI = value;
2260 }
2261 break;
2262 case M32C_OPERAND_DST32RNPREFIXEDQI :
2263 {
2264 long value;
2265 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value);
2266 value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
2267 fields->f_dst32_rn_prefixed_QI = value;
2268 }
2269 break;
2270 case M32C_OPERAND_DST32RNPREFIXEDSI :
2271 {
2272 long value;
2273 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value);
2274 value = ((value) - (2));
2275 fields->f_dst32_rn_prefixed_SI = value;
2276 }
2277 break;
2278 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
2279 {
2280 long value;
2281 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value);
2282 value = ((((value) + (2))) % (4));
2283 fields->f_dst32_rn_unprefixed_HI = value;
2284 }
2285 break;
2286 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
2287 {
2288 long value;
2289 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value);
2290 value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
2291 fields->f_dst32_rn_unprefixed_QI = value;
2292 }
2293 break;
2294 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
2295 {
2296 long value;
2297 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value);
2298 value = ((value) - (2));
2299 fields->f_dst32_rn_unprefixed_SI = value;
2300 }
2301 break;
2302 case M32C_OPERAND_G :
2303 break;
2304 case M32C_OPERAND_IMM_12_S4 :
2305 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, pc, & fields->f_imm_12_s4);
2306 break;
2307 case M32C_OPERAND_IMM_12_S4N :
2308 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, pc, & fields->f_imm_12_s4);
2309 break;
2310 case M32C_OPERAND_IMM_13_U3 :
2311 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_imm_13_u3);
2312 break;
2313 case M32C_OPERAND_IMM_16_HI :
2314 {
2315 long value;
2316 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value);
2317 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2318 fields->f_dsp_16_s16 = value;
2319 }
2320 break;
2321 case M32C_OPERAND_IMM_16_QI :
2322 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8);
2323 break;
2324 case M32C_OPERAND_IMM_16_SI :
2325 {
2326 {
2327 long value;
2328 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
2329 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2330 fields->f_dsp_16_u16 = value;
2331 }
2332 if (length <= 0) break;
2333 {
2334 long value;
2335 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
2336 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2337 fields->f_dsp_32_u16 = value;
2338 }
2339 if (length <= 0) break;
2340 {
2341 FLD (f_dsp_16_s32) = ((((FLD (f_dsp_16_u16)) & (65535))) | (((((FLD (f_dsp_32_u16)) << (16))) & (0xffff0000))));
2342 }
2343 }
2344 break;
2345 case M32C_OPERAND_IMM_20_S4 :
2346 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, pc, & fields->f_imm_20_s4);
2347 break;
2348 case M32C_OPERAND_IMM_24_HI :
2349 {
2350 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2351 if (length <= 0) break;
2352 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2353 if (length <= 0) break;
2354 {
2355 FLD (f_dsp_24_s16) = EXTHISI (((HI) (UINT) (((((FLD (f_dsp_32_u8)) << (8))) | (FLD (f_dsp_24_u8))))));
2356 }
2357 }
2358 break;
2359 case M32C_OPERAND_IMM_24_QI :
2360 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_s8);
2361 break;
2362 case M32C_OPERAND_IMM_24_SI :
2363 {
2364 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2365 if (length <= 0) break;
2366 {
2367 long value;
2368 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value);
2369 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2370 fields->f_dsp_32_u24 = value;
2371 }
2372 if (length <= 0) break;
2373 {
2374 FLD (f_dsp_24_s32) = ((((FLD (f_dsp_24_u8)) & (255))) | (((((FLD (f_dsp_32_u24)) << (8))) & (0xffffff00))));
2375 }
2376 }
2377 break;
2378 case M32C_OPERAND_IMM_32_HI :
2379 {
2380 long value;
2381 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, pc, & value);
2382 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2383 fields->f_dsp_32_s16 = value;
2384 }
2385 break;
2386 case M32C_OPERAND_IMM_32_QI :
2387 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_s8);
2388 break;
2389 case M32C_OPERAND_IMM_32_SI :
2390 {
2391 long value;
2392 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 32, 32, total_length, pc, & value);
2393 value = EXTSISI (((((((((unsigned int) (value) >> (24))) & (255))) | (((((unsigned int) (value) >> (8))) & (65280))))) | (((((((value) << (8))) & (16711680))) | (((((value) << (24))) & (0xff000000)))))));
2394 fields->f_dsp_32_s32 = value;
2395 }
2396 break;
2397 case M32C_OPERAND_IMM_40_HI :
2398 {
2399 long value;
2400 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, pc, & value);
2401 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2402 fields->f_dsp_40_s16 = value;
2403 }
2404 break;
2405 case M32C_OPERAND_IMM_40_QI :
2406 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_s8);
2407 break;
2408 case M32C_OPERAND_IMM_40_SI :
2409 {
2410 {
2411 long value;
2412 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 24, 32, total_length, pc, & value);
2413 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2414 fields->f_dsp_40_u24 = value;
2415 }
2416 if (length <= 0) break;
2417 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8);
2418 if (length <= 0) break;
2419 {
2420 FLD (f_dsp_40_s32) = ((((FLD (f_dsp_40_u24)) & (16777215))) | (((((FLD (f_dsp_64_u8)) << (24))) & (0xff000000))));
2421 }
2422 }
2423 break;
2424 case M32C_OPERAND_IMM_48_HI :
2425 {
2426 long value;
2427 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, pc, & value);
2428 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2429 fields->f_dsp_48_s16 = value;
2430 }
2431 break;
2432 case M32C_OPERAND_IMM_48_QI :
2433 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, pc, & fields->f_dsp_48_s8);
2434 break;
2435 case M32C_OPERAND_IMM_48_SI :
2436 {
2437 {
2438 long value;
2439 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value);
2440 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2441 fields->f_dsp_48_u16 = value;
2442 }
2443 if (length <= 0) break;
2444 {
2445 long value;
2446 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 16, 32, total_length, pc, & value);
2447 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2448 fields->f_dsp_64_u16 = value;
2449 }
2450 if (length <= 0) break;
2451 {
2452 FLD (f_dsp_48_s32) = ((((FLD (f_dsp_48_u16)) & (65535))) | (((((FLD (f_dsp_64_u16)) << (16))) & (0xffff0000))));
2453 }
2454 }
2455 break;
2456 case M32C_OPERAND_IMM_56_HI :
2457 {
2458 length = extract_normal (cd, ex_info, insn_value, 0, 32, 24, 8, 32, total_length, pc, & fields->f_dsp_56_u8);
2459 if (length <= 0) break;
2460 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8);
2461 if (length <= 0) break;
2462 {
2463 FLD (f_dsp_56_s16) = EXTHISI (((HI) (UINT) (((((FLD (f_dsp_64_u8)) << (8))) | (FLD (f_dsp_56_u8))))));
2464 }
2465 }
2466 break;
2467 case M32C_OPERAND_IMM_56_QI :
2468 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 24, 8, 32, total_length, pc, & fields->f_dsp_56_s8);
2469 break;
2470 case M32C_OPERAND_IMM_64_HI :
2471 {
2472 long value;
2473 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 64, 0, 16, 32, total_length, pc, & value);
2474 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2475 fields->f_dsp_64_s16 = value;
2476 }
2477 break;
2478 case M32C_OPERAND_IMM_8_HI :
2479 {
2480 long value;
2481 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 16, 32, total_length, pc, & value);
2482 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2483 fields->f_dsp_8_s16 = value;
2484 }
2485 break;
2486 case M32C_OPERAND_IMM_8_QI :
2487 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_s8);
2488 break;
2489 case M32C_OPERAND_IMM_8_S4 :
2490 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, pc, & fields->f_imm_8_s4);
2491 break;
2492 case M32C_OPERAND_IMM_8_S4N :
2493 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, pc, & fields->f_imm_8_s4);
2494 break;
2495 case M32C_OPERAND_IMM_SH_12_S4 :
2496 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, pc, & fields->f_imm_12_s4);
2497 break;
2498 case M32C_OPERAND_IMM_SH_20_S4 :
2499 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, pc, & fields->f_imm_20_s4);
2500 break;
2501 case M32C_OPERAND_IMM_SH_8_S4 :
2502 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, pc, & fields->f_imm_8_s4);
2503 break;
2504 case M32C_OPERAND_IMM1_S :
2505 {
2506 long value;
2507 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 1, 32, total_length, pc, & value);
2508 value = ((value) + (1));
2509 fields->f_imm1_S = value;
2510 }
2511 break;
2512 case M32C_OPERAND_IMM3_S :
2513 {
2514 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 2, 32, total_length, pc, & fields->f_2_2);
2515 if (length <= 0) break;
2516 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1);
2517 if (length <= 0) break;
2518 {
2519 FLD (f_imm3_S) = ((((((FLD (f_2_2)) << (1))) | (FLD (f_7_1)))) + (1));
2520 }
2521 }
2522 break;
2523 case M32C_OPERAND_LAB_16_8 :
2524 {
2525 long value;
2526 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 16, 8, 32, total_length, pc, & value);
2527 value = ((value) + (((pc) + (2))));
2528 fields->f_lab_16_8 = value;
2529 }
2530 break;
2531 case M32C_OPERAND_LAB_24_8 :
2532 {
2533 long value;
2534 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 24, 8, 32, total_length, pc, & value);
2535 value = ((value) + (((pc) + (2))));
2536 fields->f_lab_24_8 = value;
2537 }
2538 break;
2539 case M32C_OPERAND_LAB_32_8 :
2540 {
2541 long value;
2542 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 0, 8, 32, total_length, pc, & value);
2543 value = ((value) + (((pc) + (2))));
2544 fields->f_lab_32_8 = value;
2545 }
2546 break;
2547 case M32C_OPERAND_LAB_40_8 :
2548 {
2549 long value;
2550 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 8, 8, 32, total_length, pc, & value);
2551 value = ((value) + (((pc) + (2))));
2552 fields->f_lab_40_8 = value;
2553 }
2554 break;
2555 case M32C_OPERAND_LAB_5_3 :
2556 {
2557 long value;
2558 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_PCREL_ADDR), 0, 5, 3, 32, total_length, pc, & value);
2559 value = ((value) + (((pc) + (2))));
2560 fields->f_lab_5_3 = value;
2561 }
2562 break;
2563 case M32C_OPERAND_LAB_8_16 :
2564 {
2565 long value;
2566 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGN_OPT)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 16, 32, total_length, pc, & value);
2567 value = ((((((unsigned int) (((value) & (65535))) >> (8))) | (((int) (((((value) & (255))) << (24))) >> (16))))) + (((pc) + (1))));
2568 fields->f_lab_8_16 = value;
2569 }
2570 break;
2571 case M32C_OPERAND_LAB_8_24 :
2572 {
2573 long value;
2574 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 8, 24, 32, total_length, pc, & value);
2575 value = ((((((unsigned int) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
2576 fields->f_lab_8_24 = value;
2577 }
2578 break;
2579 case M32C_OPERAND_LAB_8_8 :
2580 {
2581 long value;
2582 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 32, total_length, pc, & value);
2583 value = ((value) + (((pc) + (1))));
2584 fields->f_lab_8_8 = value;
2585 }
2586 break;
2587 case M32C_OPERAND_LAB32_JMP_S :
2588 {
2589 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 2, 32, total_length, pc, & fields->f_2_2);
2590 if (length <= 0) break;
2591 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1);
2592 if (length <= 0) break;
2593 {
2594 FLD (f_lab32_jmp_s) = ((pc) + (((((((FLD (f_2_2)) << (1))) | (FLD (f_7_1)))) + (2))));
2595 }
2596 }
2597 break;
2598 case M32C_OPERAND_Q :
2599 break;
2600 case M32C_OPERAND_R0 :
2601 break;
2602 case M32C_OPERAND_R0H :
2603 break;
2604 case M32C_OPERAND_R0L :
2605 break;
2606 case M32C_OPERAND_R1 :
2607 break;
2608 case M32C_OPERAND_R1R2R0 :
2609 break;
2610 case M32C_OPERAND_R2 :
2611 break;
2612 case M32C_OPERAND_R2R0 :
2613 break;
2614 case M32C_OPERAND_R3 :
2615 break;
2616 case M32C_OPERAND_R3R1 :
2617 break;
2618 case M32C_OPERAND_REGSETPOP :
2619 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_8_8);
2620 break;
2621 case M32C_OPERAND_REGSETPUSH :
2622 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_8_8);
2623 break;
2624 case M32C_OPERAND_RN16_PUSH_S :
2625 length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 1, 32, total_length, pc, & fields->f_4_1);
2626 break;
2627 case M32C_OPERAND_S :
2628 break;
2629 case M32C_OPERAND_SRC16AN :
2630 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src16_an);
2631 break;
2632 case M32C_OPERAND_SRC16ANHI :
2633 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src16_an);
2634 break;
2635 case M32C_OPERAND_SRC16ANQI :
2636 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src16_an);
2637 break;
2638 case M32C_OPERAND_SRC16RNHI :
2639 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & fields->f_src16_rn);
2640 break;
2641 case M32C_OPERAND_SRC16RNQI :
2642 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & fields->f_src16_rn);
2643 break;
2644 case M32C_OPERAND_SRC32ANPREFIXED :
2645 length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed);
2646 break;
2647 case M32C_OPERAND_SRC32ANPREFIXEDHI :
2648 length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed);
2649 break;
2650 case M32C_OPERAND_SRC32ANPREFIXEDQI :
2651 length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed);
2652 break;
2653 case M32C_OPERAND_SRC32ANPREFIXEDSI :
2654 length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed);
2655 break;
2656 case M32C_OPERAND_SRC32ANUNPREFIXED :
2657 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed);
2658 break;
2659 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
2660 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed);
2661 break;
2662 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
2663 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed);
2664 break;
2665 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
2666 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed);
2667 break;
2668 case M32C_OPERAND_SRC32RNPREFIXEDHI :
2669 {
2670 long value;
2671 length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value);
2672 value = ((((value) + (2))) % (4));
2673 fields->f_src32_rn_prefixed_HI = value;
2674 }
2675 break;
2676 case M32C_OPERAND_SRC32RNPREFIXEDQI :
2677 {
2678 long value;
2679 length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value);
2680 value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
2681 fields->f_src32_rn_prefixed_QI = value;
2682 }
2683 break;
2684 case M32C_OPERAND_SRC32RNPREFIXEDSI :
2685 {
2686 long value;
2687 length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value);
2688 value = ((value) - (2));
2689 fields->f_src32_rn_prefixed_SI = value;
2690 }
2691 break;
2692 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
2693 {
2694 long value;
2695 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value);
2696 value = ((((value) + (2))) % (4));
2697 fields->f_src32_rn_unprefixed_HI = value;
2698 }
2699 break;
2700 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
2701 {
2702 long value;
2703 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value);
2704 value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
2705 fields->f_src32_rn_unprefixed_QI = value;
2706 }
2707 break;
2708 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
2709 {
2710 long value;
2711 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value);
2712 value = ((value) - (2));
2713 fields->f_src32_rn_unprefixed_SI = value;
2714 }
2715 break;
2716 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
2717 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 1, 32, total_length, pc, & fields->f_5_1);
2718 break;
2719 case M32C_OPERAND_X :
2720 break;
2721 case M32C_OPERAND_Z :
2722 break;
2723 case M32C_OPERAND_COND16_16 :
2724 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
2725 break;
2726 case M32C_OPERAND_COND16_24 :
2727 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2728 break;
2729 case M32C_OPERAND_COND16_32 :
2730 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2731 break;
2732 case M32C_OPERAND_COND16C :
2733 length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 32, total_length, pc, & fields->f_cond16);
2734 break;
2735 case M32C_OPERAND_COND16J :
2736 length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 32, total_length, pc, & fields->f_cond16);
2737 break;
2738 case M32C_OPERAND_COND16J5 :
2739 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 3, 32, total_length, pc, & fields->f_cond16j_5);
2740 break;
2741 case M32C_OPERAND_COND32 :
2742 {
2743 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_9_1);
2744 if (length <= 0) break;
2745 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2746 if (length <= 0) break;
2747 {
2748 FLD (f_cond32) = ((((FLD (f_9_1)) << (3))) | (FLD (f_13_3)));
2749 }
2750 }
2751 break;
2752 case M32C_OPERAND_COND32_16 :
2753 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
2754 break;
2755 case M32C_OPERAND_COND32_24 :
2756 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2757 break;
2758 case M32C_OPERAND_COND32_32 :
2759 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2760 break;
2761 case M32C_OPERAND_COND32_40 :
2762 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_u8);
2763 break;
2764 case M32C_OPERAND_COND32J :
2765 {
2766 length = extract_normal (cd, ex_info, insn_value, 0, 0, 1, 3, 32, total_length, pc, & fields->f_1_3);
2767 if (length <= 0) break;
2768 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1);
2769 if (length <= 0) break;
2770 {
2771 FLD (f_cond32j) = ((((FLD (f_1_3)) << (1))) | (FLD (f_7_1)));
2772 }
2773 }
2774 break;
2775 case M32C_OPERAND_CR1_PREFIXED_32 :
2776 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_21_3);
2777 break;
2778 case M32C_OPERAND_CR1_UNPREFIXED_32 :
2779 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2780 break;
2781 case M32C_OPERAND_CR16 :
2782 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 3, 32, total_length, pc, & fields->f_9_3);
2783 break;
2784 case M32C_OPERAND_CR2_32 :
2785 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2786 break;
2787 case M32C_OPERAND_CR3_PREFIXED_32 :
2788 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_21_3);
2789 break;
2790 case M32C_OPERAND_CR3_UNPREFIXED_32 :
2791 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2792 break;
2793 case M32C_OPERAND_FLAGS16 :
2794 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 3, 32, total_length, pc, & fields->f_9_3);
2795 break;
2796 case M32C_OPERAND_FLAGS32 :
2797 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2798 break;
2799 case M32C_OPERAND_SCCOND32 :
2800 length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 32, total_length, pc, & fields->f_cond16);
2801 break;
2802 case M32C_OPERAND_SIZE :
2803 break;
2804
2805 default :
2806 /* xgettext:c-format */
2807 fprintf (stderr, _("Unrecognized field %d while decoding insn.\n"),
2808 opindex);
2809 abort ();
2810 }
2811
2812 return length;
2813 }
2814
2815 cgen_insert_fn * const m32c_cgen_insert_handlers[] =
2816 {
2817 insert_insn_normal,
2818 };
2819
2820 cgen_extract_fn * const m32c_cgen_extract_handlers[] =
2821 {
2822 extract_insn_normal,
2823 };
2824
2825 int m32c_cgen_get_int_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
2826 bfd_vma m32c_cgen_get_vma_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
2827
2828 /* Getting values from cgen_fields is handled by a collection of functions.
2829 They are distinguished by the type of the VALUE argument they return.
2830 TODO: floating point, inlining support, remove cases where result type
2831 not appropriate. */
2832
2833 int
2834 m32c_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
2835 int opindex,
2836 const CGEN_FIELDS * fields)
2837 {
2838 int value;
2839
2840 switch (opindex)
2841 {
2842 case M32C_OPERAND_A0 :
2843 value = 0;
2844 break;
2845 case M32C_OPERAND_A1 :
2846 value = 0;
2847 break;
2848 case M32C_OPERAND_AN16_PUSH_S :
2849 value = fields->f_4_1;
2850 break;
2851 case M32C_OPERAND_BIT16AN :
2852 value = fields->f_dst16_an;
2853 break;
2854 case M32C_OPERAND_BIT16RN :
2855 value = fields->f_dst16_rn;
2856 break;
2857 case M32C_OPERAND_BIT32ANPREFIXED :
2858 value = fields->f_dst32_an_prefixed;
2859 break;
2860 case M32C_OPERAND_BIT32ANUNPREFIXED :
2861 value = fields->f_dst32_an_unprefixed;
2862 break;
2863 case M32C_OPERAND_BIT32RNPREFIXED :
2864 value = fields->f_dst32_rn_prefixed_QI;
2865 break;
2866 case M32C_OPERAND_BIT32RNUNPREFIXED :
2867 value = fields->f_dst32_rn_unprefixed_QI;
2868 break;
2869 case M32C_OPERAND_BITBASE16_16_S8 :
2870 value = fields->f_dsp_16_s8;
2871 break;
2872 case M32C_OPERAND_BITBASE16_16_U16 :
2873 value = fields->f_dsp_16_u16;
2874 break;
2875 case M32C_OPERAND_BITBASE16_16_U8 :
2876 value = fields->f_dsp_16_u8;
2877 break;
2878 case M32C_OPERAND_BITBASE16_8_U11_S :
2879 value = fields->f_bitbase16_u11_S;
2880 break;
2881 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
2882 value = fields->f_bitbase32_16_s11_unprefixed;
2883 break;
2884 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
2885 value = fields->f_bitbase32_16_s19_unprefixed;
2886 break;
2887 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
2888 value = fields->f_bitbase32_16_u11_unprefixed;
2889 break;
2890 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
2891 value = fields->f_bitbase32_16_u19_unprefixed;
2892 break;
2893 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
2894 value = fields->f_bitbase32_16_u27_unprefixed;
2895 break;
2896 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
2897 value = fields->f_bitbase32_24_s11_prefixed;
2898 break;
2899 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
2900 value = fields->f_bitbase32_24_s19_prefixed;
2901 break;
2902 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
2903 value = fields->f_bitbase32_24_u11_prefixed;
2904 break;
2905 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
2906 value = fields->f_bitbase32_24_u19_prefixed;
2907 break;
2908 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
2909 value = fields->f_bitbase32_24_u27_prefixed;
2910 break;
2911 case M32C_OPERAND_BITNO16R :
2912 value = fields->f_dsp_16_u8;
2913 break;
2914 case M32C_OPERAND_BITNO32PREFIXED :
2915 value = fields->f_bitno32_prefixed;
2916 break;
2917 case M32C_OPERAND_BITNO32UNPREFIXED :
2918 value = fields->f_bitno32_unprefixed;
2919 break;
2920 case M32C_OPERAND_DSP_10_U6 :
2921 value = fields->f_dsp_10_u6;
2922 break;
2923 case M32C_OPERAND_DSP_16_S16 :
2924 value = fields->f_dsp_16_s16;
2925 break;
2926 case M32C_OPERAND_DSP_16_S8 :
2927 value = fields->f_dsp_16_s8;
2928 break;
2929 case M32C_OPERAND_DSP_16_U16 :
2930 value = fields->f_dsp_16_u16;
2931 break;
2932 case M32C_OPERAND_DSP_16_U20 :
2933 value = fields->f_dsp_16_u24;
2934 break;
2935 case M32C_OPERAND_DSP_16_U24 :
2936 value = fields->f_dsp_16_u24;
2937 break;
2938 case M32C_OPERAND_DSP_16_U8 :
2939 value = fields->f_dsp_16_u8;
2940 break;
2941 case M32C_OPERAND_DSP_24_S16 :
2942 value = fields->f_dsp_24_s16;
2943 break;
2944 case M32C_OPERAND_DSP_24_S8 :
2945 value = fields->f_dsp_24_s8;
2946 break;
2947 case M32C_OPERAND_DSP_24_U16 :
2948 value = fields->f_dsp_24_u16;
2949 break;
2950 case M32C_OPERAND_DSP_24_U20 :
2951 value = fields->f_dsp_24_u24;
2952 break;
2953 case M32C_OPERAND_DSP_24_U24 :
2954 value = fields->f_dsp_24_u24;
2955 break;
2956 case M32C_OPERAND_DSP_24_U8 :
2957 value = fields->f_dsp_24_u8;
2958 break;
2959 case M32C_OPERAND_DSP_32_S16 :
2960 value = fields->f_dsp_32_s16;
2961 break;
2962 case M32C_OPERAND_DSP_32_S8 :
2963 value = fields->f_dsp_32_s8;
2964 break;
2965 case M32C_OPERAND_DSP_32_U16 :
2966 value = fields->f_dsp_32_u16;
2967 break;
2968 case M32C_OPERAND_DSP_32_U20 :
2969 value = fields->f_dsp_32_u24;
2970 break;
2971 case M32C_OPERAND_DSP_32_U24 :
2972 value = fields->f_dsp_32_u24;
2973 break;
2974 case M32C_OPERAND_DSP_32_U8 :
2975 value = fields->f_dsp_32_u8;
2976 break;
2977 case M32C_OPERAND_DSP_40_S16 :
2978 value = fields->f_dsp_40_s16;
2979 break;
2980 case M32C_OPERAND_DSP_40_S8 :
2981 value = fields->f_dsp_40_s8;
2982 break;
2983 case M32C_OPERAND_DSP_40_U16 :
2984 value = fields->f_dsp_40_u16;
2985 break;
2986 case M32C_OPERAND_DSP_40_U24 :
2987 value = fields->f_dsp_40_u24;
2988 break;
2989 case M32C_OPERAND_DSP_40_U8 :
2990 value = fields->f_dsp_40_u8;
2991 break;
2992 case M32C_OPERAND_DSP_48_S16 :
2993 value = fields->f_dsp_48_s16;
2994 break;
2995 case M32C_OPERAND_DSP_48_S8 :
2996 value = fields->f_dsp_48_s8;
2997 break;
2998 case M32C_OPERAND_DSP_48_U16 :
2999 value = fields->f_dsp_48_u16;
3000 break;
3001 case M32C_OPERAND_DSP_48_U24 :
3002 value = fields->f_dsp_48_u24;
3003 break;
3004 case M32C_OPERAND_DSP_48_U8 :
3005 value = fields->f_dsp_48_u8;
3006 break;
3007 case M32C_OPERAND_DSP_8_S24 :
3008 value = fields->f_dsp_8_s24;
3009 break;
3010 case M32C_OPERAND_DSP_8_S8 :
3011 value = fields->f_dsp_8_s8;
3012 break;
3013 case M32C_OPERAND_DSP_8_U16 :
3014 value = fields->f_dsp_8_u16;
3015 break;
3016 case M32C_OPERAND_DSP_8_U24 :
3017 value = fields->f_dsp_8_u24;
3018 break;
3019 case M32C_OPERAND_DSP_8_U6 :
3020 value = fields->f_dsp_8_u6;
3021 break;
3022 case M32C_OPERAND_DSP_8_U8 :
3023 value = fields->f_dsp_8_u8;
3024 break;
3025 case M32C_OPERAND_DST16AN :
3026 value = fields->f_dst16_an;
3027 break;
3028 case M32C_OPERAND_DST16AN_S :
3029 value = fields->f_dst16_an_s;
3030 break;
3031 case M32C_OPERAND_DST16ANHI :
3032 value = fields->f_dst16_an;
3033 break;
3034 case M32C_OPERAND_DST16ANQI :
3035 value = fields->f_dst16_an;
3036 break;
3037 case M32C_OPERAND_DST16ANQI_S :
3038 value = fields->f_dst16_rn_QI_s;
3039 break;
3040 case M32C_OPERAND_DST16ANSI :
3041 value = fields->f_dst16_an;
3042 break;
3043 case M32C_OPERAND_DST16RNEXTQI :
3044 value = fields->f_dst16_rn_ext;
3045 break;
3046 case M32C_OPERAND_DST16RNHI :
3047 value = fields->f_dst16_rn;
3048 break;
3049 case M32C_OPERAND_DST16RNQI :
3050 value = fields->f_dst16_rn;
3051 break;
3052 case M32C_OPERAND_DST16RNQI_S :
3053 value = fields->f_dst16_rn_QI_s;
3054 break;
3055 case M32C_OPERAND_DST16RNSI :
3056 value = fields->f_dst16_rn;
3057 break;
3058 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
3059 value = fields->f_dst32_an_unprefixed;
3060 break;
3061 case M32C_OPERAND_DST32ANPREFIXED :
3062 value = fields->f_dst32_an_prefixed;
3063 break;
3064 case M32C_OPERAND_DST32ANPREFIXEDHI :
3065 value = fields->f_dst32_an_prefixed;
3066 break;
3067 case M32C_OPERAND_DST32ANPREFIXEDQI :
3068 value = fields->f_dst32_an_prefixed;
3069 break;
3070 case M32C_OPERAND_DST32ANPREFIXEDSI :
3071 value = fields->f_dst32_an_prefixed;
3072 break;
3073 case M32C_OPERAND_DST32ANUNPREFIXED :
3074 value = fields->f_dst32_an_unprefixed;
3075 break;
3076 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
3077 value = fields->f_dst32_an_unprefixed;
3078 break;
3079 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
3080 value = fields->f_dst32_an_unprefixed;
3081 break;
3082 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
3083 value = fields->f_dst32_an_unprefixed;
3084 break;
3085 case M32C_OPERAND_DST32R0HI_S :
3086 value = 0;
3087 break;
3088 case M32C_OPERAND_DST32R0QI_S :
3089 value = 0;
3090 break;
3091 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
3092 value = fields->f_dst32_rn_ext_unprefixed;
3093 break;
3094 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
3095 value = fields->f_dst32_rn_ext_unprefixed;
3096 break;
3097 case M32C_OPERAND_DST32RNPREFIXEDHI :
3098 value = fields->f_dst32_rn_prefixed_HI;
3099 break;
3100 case M32C_OPERAND_DST32RNPREFIXEDQI :
3101 value = fields->f_dst32_rn_prefixed_QI;
3102 break;
3103 case M32C_OPERAND_DST32RNPREFIXEDSI :
3104 value = fields->f_dst32_rn_prefixed_SI;
3105 break;
3106 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
3107 value = fields->f_dst32_rn_unprefixed_HI;
3108 break;
3109 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
3110 value = fields->f_dst32_rn_unprefixed_QI;
3111 break;
3112 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
3113 value = fields->f_dst32_rn_unprefixed_SI;
3114 break;
3115 case M32C_OPERAND_G :
3116 value = 0;
3117 break;
3118 case M32C_OPERAND_IMM_12_S4 :
3119 value = fields->f_imm_12_s4;
3120 break;
3121 case M32C_OPERAND_IMM_12_S4N :
3122 value = fields->f_imm_12_s4;
3123 break;
3124 case M32C_OPERAND_IMM_13_U3 :
3125 value = fields->f_imm_13_u3;
3126 break;
3127 case M32C_OPERAND_IMM_16_HI :
3128 value = fields->f_dsp_16_s16;
3129 break;
3130 case M32C_OPERAND_IMM_16_QI :
3131 value = fields->f_dsp_16_s8;
3132 break;
3133 case M32C_OPERAND_IMM_16_SI :
3134 value = fields->f_dsp_16_s32;
3135 break;
3136 case M32C_OPERAND_IMM_20_S4 :
3137 value = fields->f_imm_20_s4;
3138 break;
3139 case M32C_OPERAND_IMM_24_HI :
3140 value = fields->f_dsp_24_s16;
3141 break;
3142 case M32C_OPERAND_IMM_24_QI :
3143 value = fields->f_dsp_24_s8;
3144 break;
3145 case M32C_OPERAND_IMM_24_SI :
3146 value = fields->f_dsp_24_s32;
3147 break;
3148 case M32C_OPERAND_IMM_32_HI :
3149 value = fields->f_dsp_32_s16;
3150 break;
3151 case M32C_OPERAND_IMM_32_QI :
3152 value = fields->f_dsp_32_s8;
3153 break;
3154 case M32C_OPERAND_IMM_32_SI :
3155 value = fields->f_dsp_32_s32;
3156 break;
3157 case M32C_OPERAND_IMM_40_HI :
3158 value = fields->f_dsp_40_s16;
3159 break;
3160 case M32C_OPERAND_IMM_40_QI :
3161 value = fields->f_dsp_40_s8;
3162 break;
3163 case M32C_OPERAND_IMM_40_SI :
3164 value = fields->f_dsp_40_s32;
3165 break;
3166 case M32C_OPERAND_IMM_48_HI :
3167 value = fields->f_dsp_48_s16;
3168 break;
3169 case M32C_OPERAND_IMM_48_QI :
3170 value = fields->f_dsp_48_s8;
3171 break;
3172 case M32C_OPERAND_IMM_48_SI :
3173 value = fields->f_dsp_48_s32;
3174 break;
3175 case M32C_OPERAND_IMM_56_HI :
3176 value = fields->f_dsp_56_s16;
3177 break;
3178 case M32C_OPERAND_IMM_56_QI :
3179 value = fields->f_dsp_56_s8;
3180 break;
3181 case M32C_OPERAND_IMM_64_HI :
3182 value = fields->f_dsp_64_s16;
3183 break;
3184 case M32C_OPERAND_IMM_8_HI :
3185 value = fields->f_dsp_8_s16;
3186 break;
3187 case M32C_OPERAND_IMM_8_QI :
3188 value = fields->f_dsp_8_s8;
3189 break;
3190 case M32C_OPERAND_IMM_8_S4 :
3191 value = fields->f_imm_8_s4;
3192 break;
3193 case M32C_OPERAND_IMM_8_S4N :
3194 value = fields->f_imm_8_s4;
3195 break;
3196 case M32C_OPERAND_IMM_SH_12_S4 :
3197 value = fields->f_imm_12_s4;
3198 break;
3199 case M32C_OPERAND_IMM_SH_20_S4 :
3200 value = fields->f_imm_20_s4;
3201 break;
3202 case M32C_OPERAND_IMM_SH_8_S4 :
3203 value = fields->f_imm_8_s4;
3204 break;
3205 case M32C_OPERAND_IMM1_S :
3206 value = fields->f_imm1_S;
3207 break;
3208 case M32C_OPERAND_IMM3_S :
3209 value = fields->f_imm3_S;
3210 break;
3211 case M32C_OPERAND_LAB_16_8 :
3212 value = fields->f_lab_16_8;
3213 break;
3214 case M32C_OPERAND_LAB_24_8 :
3215 value = fields->f_lab_24_8;
3216 break;
3217 case M32C_OPERAND_LAB_32_8 :
3218 value = fields->f_lab_32_8;
3219 break;
3220 case M32C_OPERAND_LAB_40_8 :
3221 value = fields->f_lab_40_8;
3222 break;
3223 case M32C_OPERAND_LAB_5_3 :
3224 value = fields->f_lab_5_3;
3225 break;
3226 case M32C_OPERAND_LAB_8_16 :
3227 value = fields->f_lab_8_16;
3228 break;
3229 case M32C_OPERAND_LAB_8_24 :
3230 value = fields->f_lab_8_24;
3231 break;
3232 case M32C_OPERAND_LAB_8_8 :
3233 value = fields->f_lab_8_8;
3234 break;
3235 case M32C_OPERAND_LAB32_JMP_S :
3236 value = fields->f_lab32_jmp_s;
3237 break;
3238 case M32C_OPERAND_Q :
3239 value = 0;
3240 break;
3241 case M32C_OPERAND_R0 :
3242 value = 0;
3243 break;
3244 case M32C_OPERAND_R0H :
3245 value = 0;
3246 break;
3247 case M32C_OPERAND_R0L :
3248 value = 0;
3249 break;
3250 case M32C_OPERAND_R1 :
3251 value = 0;
3252 break;
3253 case M32C_OPERAND_R1R2R0 :
3254 value = 0;
3255 break;
3256 case M32C_OPERAND_R2 :
3257 value = 0;
3258 break;
3259 case M32C_OPERAND_R2R0 :
3260 value = 0;
3261 break;
3262 case M32C_OPERAND_R3 :
3263 value = 0;
3264 break;
3265 case M32C_OPERAND_R3R1 :
3266 value = 0;
3267 break;
3268 case M32C_OPERAND_REGSETPOP :
3269 value = fields->f_8_8;
3270 break;
3271 case M32C_OPERAND_REGSETPUSH :
3272 value = fields->f_8_8;
3273 break;
3274 case M32C_OPERAND_RN16_PUSH_S :
3275 value = fields->f_4_1;
3276 break;
3277 case M32C_OPERAND_S :
3278 value = 0;
3279 break;
3280 case M32C_OPERAND_SRC16AN :
3281 value = fields->f_src16_an;
3282 break;
3283 case M32C_OPERAND_SRC16ANHI :
3284 value = fields->f_src16_an;
3285 break;
3286 case M32C_OPERAND_SRC16ANQI :
3287 value = fields->f_src16_an;
3288 break;
3289 case M32C_OPERAND_SRC16RNHI :
3290 value = fields->f_src16_rn;
3291 break;
3292 case M32C_OPERAND_SRC16RNQI :
3293 value = fields->f_src16_rn;
3294 break;
3295 case M32C_OPERAND_SRC32ANPREFIXED :
3296 value = fields->f_src32_an_prefixed;
3297 break;
3298 case M32C_OPERAND_SRC32ANPREFIXEDHI :
3299 value = fields->f_src32_an_prefixed;
3300 break;
3301 case M32C_OPERAND_SRC32ANPREFIXEDQI :
3302 value = fields->f_src32_an_prefixed;
3303 break;
3304 case M32C_OPERAND_SRC32ANPREFIXEDSI :
3305 value = fields->f_src32_an_prefixed;
3306 break;
3307 case M32C_OPERAND_SRC32ANUNPREFIXED :
3308 value = fields->f_src32_an_unprefixed;
3309 break;
3310 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
3311 value = fields->f_src32_an_unprefixed;
3312 break;
3313 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
3314 value = fields->f_src32_an_unprefixed;
3315 break;
3316 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
3317 value = fields->f_src32_an_unprefixed;
3318 break;
3319 case M32C_OPERAND_SRC32RNPREFIXEDHI :
3320 value = fields->f_src32_rn_prefixed_HI;
3321 break;
3322 case M32C_OPERAND_SRC32RNPREFIXEDQI :
3323 value = fields->f_src32_rn_prefixed_QI;
3324 break;
3325 case M32C_OPERAND_SRC32RNPREFIXEDSI :
3326 value = fields->f_src32_rn_prefixed_SI;
3327 break;
3328 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
3329 value = fields->f_src32_rn_unprefixed_HI;
3330 break;
3331 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
3332 value = fields->f_src32_rn_unprefixed_QI;
3333 break;
3334 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
3335 value = fields->f_src32_rn_unprefixed_SI;
3336 break;
3337 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
3338 value = fields->f_5_1;
3339 break;
3340 case M32C_OPERAND_X :
3341 value = 0;
3342 break;
3343 case M32C_OPERAND_Z :
3344 value = 0;
3345 break;
3346 case M32C_OPERAND_COND16_16 :
3347 value = fields->f_dsp_16_u8;
3348 break;
3349 case M32C_OPERAND_COND16_24 :
3350 value = fields->f_dsp_24_u8;
3351 break;
3352 case M32C_OPERAND_COND16_32 :
3353 value = fields->f_dsp_32_u8;
3354 break;
3355 case M32C_OPERAND_COND16C :
3356 value = fields->f_cond16;
3357 break;
3358 case M32C_OPERAND_COND16J :
3359 value = fields->f_cond16;
3360 break;
3361 case M32C_OPERAND_COND16J5 :
3362 value = fields->f_cond16j_5;
3363 break;
3364 case M32C_OPERAND_COND32 :
3365 value = fields->f_cond32;
3366 break;
3367 case M32C_OPERAND_COND32_16 :
3368 value = fields->f_dsp_16_u8;
3369 break;
3370 case M32C_OPERAND_COND32_24 :
3371 value = fields->f_dsp_24_u8;
3372 break;
3373 case M32C_OPERAND_COND32_32 :
3374 value = fields->f_dsp_32_u8;
3375 break;
3376 case M32C_OPERAND_COND32_40 :
3377 value = fields->f_dsp_40_u8;
3378 break;
3379 case M32C_OPERAND_COND32J :
3380 value = fields->f_cond32j;
3381 break;
3382 case M32C_OPERAND_CR1_PREFIXED_32 :
3383 value = fields->f_21_3;
3384 break;
3385 case M32C_OPERAND_CR1_UNPREFIXED_32 :
3386 value = fields->f_13_3;
3387 break;
3388 case M32C_OPERAND_CR16 :
3389 value = fields->f_9_3;
3390 break;
3391 case M32C_OPERAND_CR2_32 :
3392 value = fields->f_13_3;
3393 break;
3394 case M32C_OPERAND_CR3_PREFIXED_32 :
3395 value = fields->f_21_3;
3396 break;
3397 case M32C_OPERAND_CR3_UNPREFIXED_32 :
3398 value = fields->f_13_3;
3399 break;
3400 case M32C_OPERAND_FLAGS16 :
3401 value = fields->f_9_3;
3402 break;
3403 case M32C_OPERAND_FLAGS32 :
3404 value = fields->f_13_3;
3405 break;
3406 case M32C_OPERAND_SCCOND32 :
3407 value = fields->f_cond16;
3408 break;
3409 case M32C_OPERAND_SIZE :
3410 value = 0;
3411 break;
3412
3413 default :
3414 /* xgettext:c-format */
3415 fprintf (stderr, _("Unrecognized field %d while getting int operand.\n"),
3416 opindex);
3417 abort ();
3418 }
3419
3420 return value;
3421 }
3422
3423 bfd_vma
3424 m32c_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
3425 int opindex,
3426 const CGEN_FIELDS * fields)
3427 {
3428 bfd_vma value;
3429
3430 switch (opindex)
3431 {
3432 case M32C_OPERAND_A0 :
3433 value = 0;
3434 break;
3435 case M32C_OPERAND_A1 :
3436 value = 0;
3437 break;
3438 case M32C_OPERAND_AN16_PUSH_S :
3439 value = fields->f_4_1;
3440 break;
3441 case M32C_OPERAND_BIT16AN :
3442 value = fields->f_dst16_an;
3443 break;
3444 case M32C_OPERAND_BIT16RN :
3445 value = fields->f_dst16_rn;
3446 break;
3447 case M32C_OPERAND_BIT32ANPREFIXED :
3448 value = fields->f_dst32_an_prefixed;
3449 break;
3450 case M32C_OPERAND_BIT32ANUNPREFIXED :
3451 value = fields->f_dst32_an_unprefixed;
3452 break;
3453 case M32C_OPERAND_BIT32RNPREFIXED :
3454 value = fields->f_dst32_rn_prefixed_QI;
3455 break;
3456 case M32C_OPERAND_BIT32RNUNPREFIXED :
3457 value = fields->f_dst32_rn_unprefixed_QI;
3458 break;
3459 case M32C_OPERAND_BITBASE16_16_S8 :
3460 value = fields->f_dsp_16_s8;
3461 break;
3462 case M32C_OPERAND_BITBASE16_16_U16 :
3463 value = fields->f_dsp_16_u16;
3464 break;
3465 case M32C_OPERAND_BITBASE16_16_U8 :
3466 value = fields->f_dsp_16_u8;
3467 break;
3468 case M32C_OPERAND_BITBASE16_8_U11_S :
3469 value = fields->f_bitbase16_u11_S;
3470 break;
3471 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
3472 value = fields->f_bitbase32_16_s11_unprefixed;
3473 break;
3474 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
3475 value = fields->f_bitbase32_16_s19_unprefixed;
3476 break;
3477 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
3478 value = fields->f_bitbase32_16_u11_unprefixed;
3479 break;
3480 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
3481 value = fields->f_bitbase32_16_u19_unprefixed;
3482 break;
3483 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
3484 value = fields->f_bitbase32_16_u27_unprefixed;
3485 break;
3486 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
3487 value = fields->f_bitbase32_24_s11_prefixed;
3488 break;
3489 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
3490 value = fields->f_bitbase32_24_s19_prefixed;
3491 break;
3492 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
3493 value = fields->f_bitbase32_24_u11_prefixed;
3494 break;
3495 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
3496 value = fields->f_bitbase32_24_u19_prefixed;
3497 break;
3498 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
3499 value = fields->f_bitbase32_24_u27_prefixed;
3500 break;
3501 case M32C_OPERAND_BITNO16R :
3502 value = fields->f_dsp_16_u8;
3503 break;
3504 case M32C_OPERAND_BITNO32PREFIXED :
3505 value = fields->f_bitno32_prefixed;
3506 break;
3507 case M32C_OPERAND_BITNO32UNPREFIXED :
3508 value = fields->f_bitno32_unprefixed;
3509 break;
3510 case M32C_OPERAND_DSP_10_U6 :
3511 value = fields->f_dsp_10_u6;
3512 break;
3513 case M32C_OPERAND_DSP_16_S16 :
3514 value = fields->f_dsp_16_s16;
3515 break;
3516 case M32C_OPERAND_DSP_16_S8 :
3517 value = fields->f_dsp_16_s8;
3518 break;
3519 case M32C_OPERAND_DSP_16_U16 :
3520 value = fields->f_dsp_16_u16;
3521 break;
3522 case M32C_OPERAND_DSP_16_U20 :
3523 value = fields->f_dsp_16_u24;
3524 break;
3525 case M32C_OPERAND_DSP_16_U24 :
3526 value = fields->f_dsp_16_u24;
3527 break;
3528 case M32C_OPERAND_DSP_16_U8 :
3529 value = fields->f_dsp_16_u8;
3530 break;
3531 case M32C_OPERAND_DSP_24_S16 :
3532 value = fields->f_dsp_24_s16;
3533 break;
3534 case M32C_OPERAND_DSP_24_S8 :
3535 value = fields->f_dsp_24_s8;
3536 break;
3537 case M32C_OPERAND_DSP_24_U16 :
3538 value = fields->f_dsp_24_u16;
3539 break;
3540 case M32C_OPERAND_DSP_24_U20 :
3541 value = fields->f_dsp_24_u24;
3542 break;
3543 case M32C_OPERAND_DSP_24_U24 :
3544 value = fields->f_dsp_24_u24;
3545 break;
3546 case M32C_OPERAND_DSP_24_U8 :
3547 value = fields->f_dsp_24_u8;
3548 break;
3549 case M32C_OPERAND_DSP_32_S16 :
3550 value = fields->f_dsp_32_s16;
3551 break;
3552 case M32C_OPERAND_DSP_32_S8 :
3553 value = fields->f_dsp_32_s8;
3554 break;
3555 case M32C_OPERAND_DSP_32_U16 :
3556 value = fields->f_dsp_32_u16;
3557 break;
3558 case M32C_OPERAND_DSP_32_U20 :
3559 value = fields->f_dsp_32_u24;
3560 break;
3561 case M32C_OPERAND_DSP_32_U24 :
3562 value = fields->f_dsp_32_u24;
3563 break;
3564 case M32C_OPERAND_DSP_32_U8 :
3565 value = fields->f_dsp_32_u8;
3566 break;
3567 case M32C_OPERAND_DSP_40_S16 :
3568 value = fields->f_dsp_40_s16;
3569 break;
3570 case M32C_OPERAND_DSP_40_S8 :
3571 value = fields->f_dsp_40_s8;
3572 break;
3573 case M32C_OPERAND_DSP_40_U16 :
3574 value = fields->f_dsp_40_u16;
3575 break;
3576 case M32C_OPERAND_DSP_40_U24 :
3577 value = fields->f_dsp_40_u24;
3578 break;
3579 case M32C_OPERAND_DSP_40_U8 :
3580 value = fields->f_dsp_40_u8;
3581 break;
3582 case M32C_OPERAND_DSP_48_S16 :
3583 value = fields->f_dsp_48_s16;
3584 break;
3585 case M32C_OPERAND_DSP_48_S8 :
3586 value = fields->f_dsp_48_s8;
3587 break;
3588 case M32C_OPERAND_DSP_48_U16 :
3589 value = fields->f_dsp_48_u16;
3590 break;
3591 case M32C_OPERAND_DSP_48_U24 :
3592 value = fields->f_dsp_48_u24;
3593 break;
3594 case M32C_OPERAND_DSP_48_U8 :
3595 value = fields->f_dsp_48_u8;
3596 break;
3597 case M32C_OPERAND_DSP_8_S24 :
3598 value = fields->f_dsp_8_s24;
3599 break;
3600 case M32C_OPERAND_DSP_8_S8 :
3601 value = fields->f_dsp_8_s8;
3602 break;
3603 case M32C_OPERAND_DSP_8_U16 :
3604 value = fields->f_dsp_8_u16;
3605 break;
3606 case M32C_OPERAND_DSP_8_U24 :
3607 value = fields->f_dsp_8_u24;
3608 break;
3609 case M32C_OPERAND_DSP_8_U6 :
3610 value = fields->f_dsp_8_u6;
3611 break;
3612 case M32C_OPERAND_DSP_8_U8 :
3613 value = fields->f_dsp_8_u8;
3614 break;
3615 case M32C_OPERAND_DST16AN :
3616 value = fields->f_dst16_an;
3617 break;
3618 case M32C_OPERAND_DST16AN_S :
3619 value = fields->f_dst16_an_s;
3620 break;
3621 case M32C_OPERAND_DST16ANHI :
3622 value = fields->f_dst16_an;
3623 break;
3624 case M32C_OPERAND_DST16ANQI :
3625 value = fields->f_dst16_an;
3626 break;
3627 case M32C_OPERAND_DST16ANQI_S :
3628 value = fields->f_dst16_rn_QI_s;
3629 break;
3630 case M32C_OPERAND_DST16ANSI :
3631 value = fields->f_dst16_an;
3632 break;
3633 case M32C_OPERAND_DST16RNEXTQI :
3634 value = fields->f_dst16_rn_ext;
3635 break;
3636 case M32C_OPERAND_DST16RNHI :
3637 value = fields->f_dst16_rn;
3638 break;
3639 case M32C_OPERAND_DST16RNQI :
3640 value = fields->f_dst16_rn;
3641 break;
3642 case M32C_OPERAND_DST16RNQI_S :
3643 value = fields->f_dst16_rn_QI_s;
3644 break;
3645 case M32C_OPERAND_DST16RNSI :
3646 value = fields->f_dst16_rn;
3647 break;
3648 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
3649 value = fields->f_dst32_an_unprefixed;
3650 break;
3651 case M32C_OPERAND_DST32ANPREFIXED :
3652 value = fields->f_dst32_an_prefixed;
3653 break;
3654 case M32C_OPERAND_DST32ANPREFIXEDHI :
3655 value = fields->f_dst32_an_prefixed;
3656 break;
3657 case M32C_OPERAND_DST32ANPREFIXEDQI :
3658 value = fields->f_dst32_an_prefixed;
3659 break;
3660 case M32C_OPERAND_DST32ANPREFIXEDSI :
3661 value = fields->f_dst32_an_prefixed;
3662 break;
3663 case M32C_OPERAND_DST32ANUNPREFIXED :
3664 value = fields->f_dst32_an_unprefixed;
3665 break;
3666 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
3667 value = fields->f_dst32_an_unprefixed;
3668 break;
3669 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
3670 value = fields->f_dst32_an_unprefixed;
3671 break;
3672 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
3673 value = fields->f_dst32_an_unprefixed;
3674 break;
3675 case M32C_OPERAND_DST32R0HI_S :
3676 value = 0;
3677 break;
3678 case M32C_OPERAND_DST32R0QI_S :
3679 value = 0;
3680 break;
3681 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
3682 value = fields->f_dst32_rn_ext_unprefixed;
3683 break;
3684 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
3685 value = fields->f_dst32_rn_ext_unprefixed;
3686 break;
3687 case M32C_OPERAND_DST32RNPREFIXEDHI :
3688 value = fields->f_dst32_rn_prefixed_HI;
3689 break;
3690 case M32C_OPERAND_DST32RNPREFIXEDQI :
3691 value = fields->f_dst32_rn_prefixed_QI;
3692 break;
3693 case M32C_OPERAND_DST32RNPREFIXEDSI :
3694 value = fields->f_dst32_rn_prefixed_SI;
3695 break;
3696 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
3697 value = fields->f_dst32_rn_unprefixed_HI;
3698 break;
3699 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
3700 value = fields->f_dst32_rn_unprefixed_QI;
3701 break;
3702 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
3703 value = fields->f_dst32_rn_unprefixed_SI;
3704 break;
3705 case M32C_OPERAND_G :
3706 value = 0;
3707 break;
3708 case M32C_OPERAND_IMM_12_S4 :
3709 value = fields->f_imm_12_s4;
3710 break;
3711 case M32C_OPERAND_IMM_12_S4N :
3712 value = fields->f_imm_12_s4;
3713 break;
3714 case M32C_OPERAND_IMM_13_U3 :
3715 value = fields->f_imm_13_u3;
3716 break;
3717 case M32C_OPERAND_IMM_16_HI :
3718 value = fields->f_dsp_16_s16;
3719 break;
3720 case M32C_OPERAND_IMM_16_QI :
3721 value = fields->f_dsp_16_s8;
3722 break;
3723 case M32C_OPERAND_IMM_16_SI :
3724 value = fields->f_dsp_16_s32;
3725 break;
3726 case M32C_OPERAND_IMM_20_S4 :
3727 value = fields->f_imm_20_s4;
3728 break;
3729 case M32C_OPERAND_IMM_24_HI :
3730 value = fields->f_dsp_24_s16;
3731 break;
3732 case M32C_OPERAND_IMM_24_QI :
3733 value = fields->f_dsp_24_s8;
3734 break;
3735 case M32C_OPERAND_IMM_24_SI :
3736 value = fields->f_dsp_24_s32;
3737 break;
3738 case M32C_OPERAND_IMM_32_HI :
3739 value = fields->f_dsp_32_s16;
3740 break;
3741 case M32C_OPERAND_IMM_32_QI :
3742 value = fields->f_dsp_32_s8;
3743 break;
3744 case M32C_OPERAND_IMM_32_SI :
3745 value = fields->f_dsp_32_s32;
3746 break;
3747 case M32C_OPERAND_IMM_40_HI :
3748 value = fields->f_dsp_40_s16;
3749 break;
3750 case M32C_OPERAND_IMM_40_QI :
3751 value = fields->f_dsp_40_s8;
3752 break;
3753 case M32C_OPERAND_IMM_40_SI :
3754 value = fields->f_dsp_40_s32;
3755 break;
3756 case M32C_OPERAND_IMM_48_HI :
3757 value = fields->f_dsp_48_s16;
3758 break;
3759 case M32C_OPERAND_IMM_48_QI :
3760 value = fields->f_dsp_48_s8;
3761 break;
3762 case M32C_OPERAND_IMM_48_SI :
3763 value = fields->f_dsp_48_s32;
3764 break;
3765 case M32C_OPERAND_IMM_56_HI :
3766 value = fields->f_dsp_56_s16;
3767 break;
3768 case M32C_OPERAND_IMM_56_QI :
3769 value = fields->f_dsp_56_s8;
3770 break;
3771 case M32C_OPERAND_IMM_64_HI :
3772 value = fields->f_dsp_64_s16;
3773 break;
3774 case M32C_OPERAND_IMM_8_HI :
3775 value = fields->f_dsp_8_s16;
3776 break;
3777 case M32C_OPERAND_IMM_8_QI :
3778 value = fields->f_dsp_8_s8;
3779 break;
3780 case M32C_OPERAND_IMM_8_S4 :
3781 value = fields->f_imm_8_s4;
3782 break;
3783 case M32C_OPERAND_IMM_8_S4N :
3784 value = fields->f_imm_8_s4;
3785 break;
3786 case M32C_OPERAND_IMM_SH_12_S4 :
3787 value = fields->f_imm_12_s4;
3788 break;
3789 case M32C_OPERAND_IMM_SH_20_S4 :
3790 value = fields->f_imm_20_s4;
3791 break;
3792 case M32C_OPERAND_IMM_SH_8_S4 :
3793 value = fields->f_imm_8_s4;
3794 break;
3795 case M32C_OPERAND_IMM1_S :
3796 value = fields->f_imm1_S;
3797 break;
3798 case M32C_OPERAND_IMM3_S :
3799 value = fields->f_imm3_S;
3800 break;
3801 case M32C_OPERAND_LAB_16_8 :
3802 value = fields->f_lab_16_8;
3803 break;
3804 case M32C_OPERAND_LAB_24_8 :
3805 value = fields->f_lab_24_8;
3806 break;
3807 case M32C_OPERAND_LAB_32_8 :
3808 value = fields->f_lab_32_8;
3809 break;
3810 case M32C_OPERAND_LAB_40_8 :
3811 value = fields->f_lab_40_8;
3812 break;
3813 case M32C_OPERAND_LAB_5_3 :
3814 value = fields->f_lab_5_3;
3815 break;
3816 case M32C_OPERAND_LAB_8_16 :
3817 value = fields->f_lab_8_16;
3818 break;
3819 case M32C_OPERAND_LAB_8_24 :
3820 value = fields->f_lab_8_24;
3821 break;
3822 case M32C_OPERAND_LAB_8_8 :
3823 value = fields->f_lab_8_8;
3824 break;
3825 case M32C_OPERAND_LAB32_JMP_S :
3826 value = fields->f_lab32_jmp_s;
3827 break;
3828 case M32C_OPERAND_Q :
3829 value = 0;
3830 break;
3831 case M32C_OPERAND_R0 :
3832 value = 0;
3833 break;
3834 case M32C_OPERAND_R0H :
3835 value = 0;
3836 break;
3837 case M32C_OPERAND_R0L :
3838 value = 0;
3839 break;
3840 case M32C_OPERAND_R1 :
3841 value = 0;
3842 break;
3843 case M32C_OPERAND_R1R2R0 :
3844 value = 0;
3845 break;
3846 case M32C_OPERAND_R2 :
3847 value = 0;
3848 break;
3849 case M32C_OPERAND_R2R0 :
3850 value = 0;
3851 break;
3852 case M32C_OPERAND_R3 :
3853 value = 0;
3854 break;
3855 case M32C_OPERAND_R3R1 :
3856 value = 0;
3857 break;
3858 case M32C_OPERAND_REGSETPOP :
3859 value = fields->f_8_8;
3860 break;
3861 case M32C_OPERAND_REGSETPUSH :
3862 value = fields->f_8_8;
3863 break;
3864 case M32C_OPERAND_RN16_PUSH_S :
3865 value = fields->f_4_1;
3866 break;
3867 case M32C_OPERAND_S :
3868 value = 0;
3869 break;
3870 case M32C_OPERAND_SRC16AN :
3871 value = fields->f_src16_an;
3872 break;
3873 case M32C_OPERAND_SRC16ANHI :
3874 value = fields->f_src16_an;
3875 break;
3876 case M32C_OPERAND_SRC16ANQI :
3877 value = fields->f_src16_an;
3878 break;
3879 case M32C_OPERAND_SRC16RNHI :
3880 value = fields->f_src16_rn;
3881 break;
3882 case M32C_OPERAND_SRC16RNQI :
3883 value = fields->f_src16_rn;
3884 break;
3885 case M32C_OPERAND_SRC32ANPREFIXED :
3886 value = fields->f_src32_an_prefixed;
3887 break;
3888 case M32C_OPERAND_SRC32ANPREFIXEDHI :
3889 value = fields->f_src32_an_prefixed;
3890 break;
3891 case M32C_OPERAND_SRC32ANPREFIXEDQI :
3892 value = fields->f_src32_an_prefixed;
3893 break;
3894 case M32C_OPERAND_SRC32ANPREFIXEDSI :
3895 value = fields->f_src32_an_prefixed;
3896 break;
3897 case M32C_OPERAND_SRC32ANUNPREFIXED :
3898 value = fields->f_src32_an_unprefixed;
3899 break;
3900 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
3901 value = fields->f_src32_an_unprefixed;
3902 break;
3903 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
3904 value = fields->f_src32_an_unprefixed;
3905 break;
3906 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
3907 value = fields->f_src32_an_unprefixed;
3908 break;
3909 case M32C_OPERAND_SRC32RNPREFIXEDHI :
3910 value = fields->f_src32_rn_prefixed_HI;
3911 break;
3912 case M32C_OPERAND_SRC32RNPREFIXEDQI :
3913 value = fields->f_src32_rn_prefixed_QI;
3914 break;
3915 case M32C_OPERAND_SRC32RNPREFIXEDSI :
3916 value = fields->f_src32_rn_prefixed_SI;
3917 break;
3918 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
3919 value = fields->f_src32_rn_unprefixed_HI;
3920 break;
3921 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
3922 value = fields->f_src32_rn_unprefixed_QI;
3923 break;
3924 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
3925 value = fields->f_src32_rn_unprefixed_SI;
3926 break;
3927 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
3928 value = fields->f_5_1;
3929 break;
3930 case M32C_OPERAND_X :
3931 value = 0;
3932 break;
3933 case M32C_OPERAND_Z :
3934 value = 0;
3935 break;
3936 case M32C_OPERAND_COND16_16 :
3937 value = fields->f_dsp_16_u8;
3938 break;
3939 case M32C_OPERAND_COND16_24 :
3940 value = fields->f_dsp_24_u8;
3941 break;
3942 case M32C_OPERAND_COND16_32 :
3943 value = fields->f_dsp_32_u8;
3944 break;
3945 case M32C_OPERAND_COND16C :
3946 value = fields->f_cond16;
3947 break;
3948 case M32C_OPERAND_COND16J :
3949 value = fields->f_cond16;
3950 break;
3951 case M32C_OPERAND_COND16J5 :
3952 value = fields->f_cond16j_5;
3953 break;
3954 case M32C_OPERAND_COND32 :
3955 value = fields->f_cond32;
3956 break;
3957 case M32C_OPERAND_COND32_16 :
3958 value = fields->f_dsp_16_u8;
3959 break;
3960 case M32C_OPERAND_COND32_24 :
3961 value = fields->f_dsp_24_u8;
3962 break;
3963 case M32C_OPERAND_COND32_32 :
3964 value = fields->f_dsp_32_u8;
3965 break;
3966 case M32C_OPERAND_COND32_40 :
3967 value = fields->f_dsp_40_u8;
3968 break;
3969 case M32C_OPERAND_COND32J :
3970 value = fields->f_cond32j;
3971 break;
3972 case M32C_OPERAND_CR1_PREFIXED_32 :
3973 value = fields->f_21_3;
3974 break;
3975 case M32C_OPERAND_CR1_UNPREFIXED_32 :
3976 value = fields->f_13_3;
3977 break;
3978 case M32C_OPERAND_CR16 :
3979 value = fields->f_9_3;
3980 break;
3981 case M32C_OPERAND_CR2_32 :
3982 value = fields->f_13_3;
3983 break;
3984 case M32C_OPERAND_CR3_PREFIXED_32 :
3985 value = fields->f_21_3;
3986 break;
3987 case M32C_OPERAND_CR3_UNPREFIXED_32 :
3988 value = fields->f_13_3;
3989 break;
3990 case M32C_OPERAND_FLAGS16 :
3991 value = fields->f_9_3;
3992 break;
3993 case M32C_OPERAND_FLAGS32 :
3994 value = fields->f_13_3;
3995 break;
3996 case M32C_OPERAND_SCCOND32 :
3997 value = fields->f_cond16;
3998 break;
3999 case M32C_OPERAND_SIZE :
4000 value = 0;
4001 break;
4002
4003 default :
4004 /* xgettext:c-format */
4005 fprintf (stderr, _("Unrecognized field %d while getting vma operand.\n"),
4006 opindex);
4007 abort ();
4008 }
4009
4010 return value;
4011 }
4012
4013 void m32c_cgen_set_int_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, int);
4014 void m32c_cgen_set_vma_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, bfd_vma);
4015
4016 /* Stuffing values in cgen_fields is handled by a collection of functions.
4017 They are distinguished by the type of the VALUE argument they accept.
4018 TODO: floating point, inlining support, remove cases where argument type
4019 not appropriate. */
4020
4021 void
4022 m32c_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
4023 int opindex,
4024 CGEN_FIELDS * fields,
4025 int value)
4026 {
4027 switch (opindex)
4028 {
4029 case M32C_OPERAND_A0 :
4030 break;
4031 case M32C_OPERAND_A1 :
4032 break;
4033 case M32C_OPERAND_AN16_PUSH_S :
4034 fields->f_4_1 = value;
4035 break;
4036 case M32C_OPERAND_BIT16AN :
4037 fields->f_dst16_an = value;
4038 break;
4039 case M32C_OPERAND_BIT16RN :
4040 fields->f_dst16_rn = value;
4041 break;
4042 case M32C_OPERAND_BIT32ANPREFIXED :
4043 fields->f_dst32_an_prefixed = value;
4044 break;
4045 case M32C_OPERAND_BIT32ANUNPREFIXED :
4046 fields->f_dst32_an_unprefixed = value;
4047 break;
4048 case M32C_OPERAND_BIT32RNPREFIXED :
4049 fields->f_dst32_rn_prefixed_QI = value;
4050 break;
4051 case M32C_OPERAND_BIT32RNUNPREFIXED :
4052 fields->f_dst32_rn_unprefixed_QI = value;
4053 break;
4054 case M32C_OPERAND_BITBASE16_16_S8 :
4055 fields->f_dsp_16_s8 = value;
4056 break;
4057 case M32C_OPERAND_BITBASE16_16_U16 :
4058 fields->f_dsp_16_u16 = value;
4059 break;
4060 case M32C_OPERAND_BITBASE16_16_U8 :
4061 fields->f_dsp_16_u8 = value;
4062 break;
4063 case M32C_OPERAND_BITBASE16_8_U11_S :
4064 fields->f_bitbase16_u11_S = value;
4065 break;
4066 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
4067 fields->f_bitbase32_16_s11_unprefixed = value;
4068 break;
4069 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
4070 fields->f_bitbase32_16_s19_unprefixed = value;
4071 break;
4072 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
4073 fields->f_bitbase32_16_u11_unprefixed = value;
4074 break;
4075 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
4076 fields->f_bitbase32_16_u19_unprefixed = value;
4077 break;
4078 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
4079 fields->f_bitbase32_16_u27_unprefixed = value;
4080 break;
4081 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
4082 fields->f_bitbase32_24_s11_prefixed = value;
4083 break;
4084 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
4085 fields->f_bitbase32_24_s19_prefixed = value;
4086 break;
4087 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
4088 fields->f_bitbase32_24_u11_prefixed = value;
4089 break;
4090 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
4091 fields->f_bitbase32_24_u19_prefixed = value;
4092 break;
4093 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
4094 fields->f_bitbase32_24_u27_prefixed = value;
4095 break;
4096 case M32C_OPERAND_BITNO16R :
4097 fields->f_dsp_16_u8 = value;
4098 break;
4099 case M32C_OPERAND_BITNO32PREFIXED :
4100 fields->f_bitno32_prefixed = value;
4101 break;
4102 case M32C_OPERAND_BITNO32UNPREFIXED :
4103 fields->f_bitno32_unprefixed = value;
4104 break;
4105 case M32C_OPERAND_DSP_10_U6 :
4106 fields->f_dsp_10_u6 = value;
4107 break;
4108 case M32C_OPERAND_DSP_16_S16 :
4109 fields->f_dsp_16_s16 = value;
4110 break;
4111 case M32C_OPERAND_DSP_16_S8 :
4112 fields->f_dsp_16_s8 = value;
4113 break;
4114 case M32C_OPERAND_DSP_16_U16 :
4115 fields->f_dsp_16_u16 = value;
4116 break;
4117 case M32C_OPERAND_DSP_16_U20 :
4118 fields->f_dsp_16_u24 = value;
4119 break;
4120 case M32C_OPERAND_DSP_16_U24 :
4121 fields->f_dsp_16_u24 = value;
4122 break;
4123 case M32C_OPERAND_DSP_16_U8 :
4124 fields->f_dsp_16_u8 = value;
4125 break;
4126 case M32C_OPERAND_DSP_24_S16 :
4127 fields->f_dsp_24_s16 = value;
4128 break;
4129 case M32C_OPERAND_DSP_24_S8 :
4130 fields->f_dsp_24_s8 = value;
4131 break;
4132 case M32C_OPERAND_DSP_24_U16 :
4133 fields->f_dsp_24_u16 = value;
4134 break;
4135 case M32C_OPERAND_DSP_24_U20 :
4136 fields->f_dsp_24_u24 = value;
4137 break;
4138 case M32C_OPERAND_DSP_24_U24 :
4139 fields->f_dsp_24_u24 = value;
4140 break;
4141 case M32C_OPERAND_DSP_24_U8 :
4142 fields->f_dsp_24_u8 = value;
4143 break;
4144 case M32C_OPERAND_DSP_32_S16 :
4145 fields->f_dsp_32_s16 = value;
4146 break;
4147 case M32C_OPERAND_DSP_32_S8 :
4148 fields->f_dsp_32_s8 = value;
4149 break;
4150 case M32C_OPERAND_DSP_32_U16 :
4151 fields->f_dsp_32_u16 = value;
4152 break;
4153 case M32C_OPERAND_DSP_32_U20 :
4154 fields->f_dsp_32_u24 = value;
4155 break;
4156 case M32C_OPERAND_DSP_32_U24 :
4157 fields->f_dsp_32_u24 = value;
4158 break;
4159 case M32C_OPERAND_DSP_32_U8 :
4160 fields->f_dsp_32_u8 = value;
4161 break;
4162 case M32C_OPERAND_DSP_40_S16 :
4163 fields->f_dsp_40_s16 = value;
4164 break;
4165 case M32C_OPERAND_DSP_40_S8 :
4166 fields->f_dsp_40_s8 = value;
4167 break;
4168 case M32C_OPERAND_DSP_40_U16 :
4169 fields->f_dsp_40_u16 = value;
4170 break;
4171 case M32C_OPERAND_DSP_40_U24 :
4172 fields->f_dsp_40_u24 = value;
4173 break;
4174 case M32C_OPERAND_DSP_40_U8 :
4175 fields->f_dsp_40_u8 = value;
4176 break;
4177 case M32C_OPERAND_DSP_48_S16 :
4178 fields->f_dsp_48_s16 = value;
4179 break;
4180 case M32C_OPERAND_DSP_48_S8 :
4181 fields->f_dsp_48_s8 = value;
4182 break;
4183 case M32C_OPERAND_DSP_48_U16 :
4184 fields->f_dsp_48_u16 = value;
4185 break;
4186 case M32C_OPERAND_DSP_48_U24 :
4187 fields->f_dsp_48_u24 = value;
4188 break;
4189 case M32C_OPERAND_DSP_48_U8 :
4190 fields->f_dsp_48_u8 = value;
4191 break;
4192 case M32C_OPERAND_DSP_8_S24 :
4193 fields->f_dsp_8_s24 = value;
4194 break;
4195 case M32C_OPERAND_DSP_8_S8 :
4196 fields->f_dsp_8_s8 = value;
4197 break;
4198 case M32C_OPERAND_DSP_8_U16 :
4199 fields->f_dsp_8_u16 = value;
4200 break;
4201 case M32C_OPERAND_DSP_8_U24 :
4202 fields->f_dsp_8_u24 = value;
4203 break;
4204 case M32C_OPERAND_DSP_8_U6 :
4205 fields->f_dsp_8_u6 = value;
4206 break;
4207 case M32C_OPERAND_DSP_8_U8 :
4208 fields->f_dsp_8_u8 = value;
4209 break;
4210 case M32C_OPERAND_DST16AN :
4211 fields->f_dst16_an = value;
4212 break;
4213 case M32C_OPERAND_DST16AN_S :
4214 fields->f_dst16_an_s = value;
4215 break;
4216 case M32C_OPERAND_DST16ANHI :
4217 fields->f_dst16_an = value;
4218 break;
4219 case M32C_OPERAND_DST16ANQI :
4220 fields->f_dst16_an = value;
4221 break;
4222 case M32C_OPERAND_DST16ANQI_S :
4223 fields->f_dst16_rn_QI_s = value;
4224 break;
4225 case M32C_OPERAND_DST16ANSI :
4226 fields->f_dst16_an = value;
4227 break;
4228 case M32C_OPERAND_DST16RNEXTQI :
4229 fields->f_dst16_rn_ext = value;
4230 break;
4231 case M32C_OPERAND_DST16RNHI :
4232 fields->f_dst16_rn = value;
4233 break;
4234 case M32C_OPERAND_DST16RNQI :
4235 fields->f_dst16_rn = value;
4236 break;
4237 case M32C_OPERAND_DST16RNQI_S :
4238 fields->f_dst16_rn_QI_s = value;
4239 break;
4240 case M32C_OPERAND_DST16RNSI :
4241 fields->f_dst16_rn = value;
4242 break;
4243 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
4244 fields->f_dst32_an_unprefixed = value;
4245 break;
4246 case M32C_OPERAND_DST32ANPREFIXED :
4247 fields->f_dst32_an_prefixed = value;
4248 break;
4249 case M32C_OPERAND_DST32ANPREFIXEDHI :
4250 fields->f_dst32_an_prefixed = value;
4251 break;
4252 case M32C_OPERAND_DST32ANPREFIXEDQI :
4253 fields->f_dst32_an_prefixed = value;
4254 break;
4255 case M32C_OPERAND_DST32ANPREFIXEDSI :
4256 fields->f_dst32_an_prefixed = value;
4257 break;
4258 case M32C_OPERAND_DST32ANUNPREFIXED :
4259 fields->f_dst32_an_unprefixed = value;
4260 break;
4261 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
4262 fields->f_dst32_an_unprefixed = value;
4263 break;
4264 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
4265 fields->f_dst32_an_unprefixed = value;
4266 break;
4267 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
4268 fields->f_dst32_an_unprefixed = value;
4269 break;
4270 case M32C_OPERAND_DST32R0HI_S :
4271 break;
4272 case M32C_OPERAND_DST32R0QI_S :
4273 break;
4274 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
4275 fields->f_dst32_rn_ext_unprefixed = value;
4276 break;
4277 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
4278 fields->f_dst32_rn_ext_unprefixed = value;
4279 break;
4280 case M32C_OPERAND_DST32RNPREFIXEDHI :
4281 fields->f_dst32_rn_prefixed_HI = value;
4282 break;
4283 case M32C_OPERAND_DST32RNPREFIXEDQI :
4284 fields->f_dst32_rn_prefixed_QI = value;
4285 break;
4286 case M32C_OPERAND_DST32RNPREFIXEDSI :
4287 fields->f_dst32_rn_prefixed_SI = value;
4288 break;
4289 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
4290 fields->f_dst32_rn_unprefixed_HI = value;
4291 break;
4292 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
4293 fields->f_dst32_rn_unprefixed_QI = value;
4294 break;
4295 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
4296 fields->f_dst32_rn_unprefixed_SI = value;
4297 break;
4298 case M32C_OPERAND_G :
4299 break;
4300 case M32C_OPERAND_IMM_12_S4 :
4301 fields->f_imm_12_s4 = value;
4302 break;
4303 case M32C_OPERAND_IMM_12_S4N :
4304 fields->f_imm_12_s4 = value;
4305 break;
4306 case M32C_OPERAND_IMM_13_U3 :
4307 fields->f_imm_13_u3 = value;
4308 break;
4309 case M32C_OPERAND_IMM_16_HI :
4310 fields->f_dsp_16_s16 = value;
4311 break;
4312 case M32C_OPERAND_IMM_16_QI :
4313 fields->f_dsp_16_s8 = value;
4314 break;
4315 case M32C_OPERAND_IMM_16_SI :
4316 fields->f_dsp_16_s32 = value;
4317 break;
4318 case M32C_OPERAND_IMM_20_S4 :
4319 fields->f_imm_20_s4 = value;
4320 break;
4321 case M32C_OPERAND_IMM_24_HI :
4322 fields->f_dsp_24_s16 = value;
4323 break;
4324 case M32C_OPERAND_IMM_24_QI :
4325 fields->f_dsp_24_s8 = value;
4326 break;
4327 case M32C_OPERAND_IMM_24_SI :
4328 fields->f_dsp_24_s32 = value;
4329 break;
4330 case M32C_OPERAND_IMM_32_HI :
4331 fields->f_dsp_32_s16 = value;
4332 break;
4333 case M32C_OPERAND_IMM_32_QI :
4334 fields->f_dsp_32_s8 = value;
4335 break;
4336 case M32C_OPERAND_IMM_32_SI :
4337 fields->f_dsp_32_s32 = value;
4338 break;
4339 case M32C_OPERAND_IMM_40_HI :
4340 fields->f_dsp_40_s16 = value;
4341 break;
4342 case M32C_OPERAND_IMM_40_QI :
4343 fields->f_dsp_40_s8 = value;
4344 break;
4345 case M32C_OPERAND_IMM_40_SI :
4346 fields->f_dsp_40_s32 = value;
4347 break;
4348 case M32C_OPERAND_IMM_48_HI :
4349 fields->f_dsp_48_s16 = value;
4350 break;
4351 case M32C_OPERAND_IMM_48_QI :
4352 fields->f_dsp_48_s8 = value;
4353 break;
4354 case M32C_OPERAND_IMM_48_SI :
4355 fields->f_dsp_48_s32 = value;
4356 break;
4357 case M32C_OPERAND_IMM_56_HI :
4358 fields->f_dsp_56_s16 = value;
4359 break;
4360 case M32C_OPERAND_IMM_56_QI :
4361 fields->f_dsp_56_s8 = value;
4362 break;
4363 case M32C_OPERAND_IMM_64_HI :
4364 fields->f_dsp_64_s16 = value;
4365 break;
4366 case M32C_OPERAND_IMM_8_HI :
4367 fields->f_dsp_8_s16 = value;
4368 break;
4369 case M32C_OPERAND_IMM_8_QI :
4370 fields->f_dsp_8_s8 = value;
4371 break;
4372 case M32C_OPERAND_IMM_8_S4 :
4373 fields->f_imm_8_s4 = value;
4374 break;
4375 case M32C_OPERAND_IMM_8_S4N :
4376 fields->f_imm_8_s4 = value;
4377 break;
4378 case M32C_OPERAND_IMM_SH_12_S4 :
4379 fields->f_imm_12_s4 = value;
4380 break;
4381 case M32C_OPERAND_IMM_SH_20_S4 :
4382 fields->f_imm_20_s4 = value;
4383 break;
4384 case M32C_OPERAND_IMM_SH_8_S4 :
4385 fields->f_imm_8_s4 = value;
4386 break;
4387 case M32C_OPERAND_IMM1_S :
4388 fields->f_imm1_S = value;
4389 break;
4390 case M32C_OPERAND_IMM3_S :
4391 fields->f_imm3_S = value;
4392 break;
4393 case M32C_OPERAND_LAB_16_8 :
4394 fields->f_lab_16_8 = value;
4395 break;
4396 case M32C_OPERAND_LAB_24_8 :
4397 fields->f_lab_24_8 = value;
4398 break;
4399 case M32C_OPERAND_LAB_32_8 :
4400 fields->f_lab_32_8 = value;
4401 break;
4402 case M32C_OPERAND_LAB_40_8 :
4403 fields->f_lab_40_8 = value;
4404 break;
4405 case M32C_OPERAND_LAB_5_3 :
4406 fields->f_lab_5_3 = value;
4407 break;
4408 case M32C_OPERAND_LAB_8_16 :
4409 fields->f_lab_8_16 = value;
4410 break;
4411 case M32C_OPERAND_LAB_8_24 :
4412 fields->f_lab_8_24 = value;
4413 break;
4414 case M32C_OPERAND_LAB_8_8 :
4415 fields->f_lab_8_8 = value;
4416 break;
4417 case M32C_OPERAND_LAB32_JMP_S :
4418 fields->f_lab32_jmp_s = value;
4419 break;
4420 case M32C_OPERAND_Q :
4421 break;
4422 case M32C_OPERAND_R0 :
4423 break;
4424 case M32C_OPERAND_R0H :
4425 break;
4426 case M32C_OPERAND_R0L :
4427 break;
4428 case M32C_OPERAND_R1 :
4429 break;
4430 case M32C_OPERAND_R1R2R0 :
4431 break;
4432 case M32C_OPERAND_R2 :
4433 break;
4434 case M32C_OPERAND_R2R0 :
4435 break;
4436 case M32C_OPERAND_R3 :
4437 break;
4438 case M32C_OPERAND_R3R1 :
4439 break;
4440 case M32C_OPERAND_REGSETPOP :
4441 fields->f_8_8 = value;
4442 break;
4443 case M32C_OPERAND_REGSETPUSH :
4444 fields->f_8_8 = value;
4445 break;
4446 case M32C_OPERAND_RN16_PUSH_S :
4447 fields->f_4_1 = value;
4448 break;
4449 case M32C_OPERAND_S :
4450 break;
4451 case M32C_OPERAND_SRC16AN :
4452 fields->f_src16_an = value;
4453 break;
4454 case M32C_OPERAND_SRC16ANHI :
4455 fields->f_src16_an = value;
4456 break;
4457 case M32C_OPERAND_SRC16ANQI :
4458 fields->f_src16_an = value;
4459 break;
4460 case M32C_OPERAND_SRC16RNHI :
4461 fields->f_src16_rn = value;
4462 break;
4463 case M32C_OPERAND_SRC16RNQI :
4464 fields->f_src16_rn = value;
4465 break;
4466 case M32C_OPERAND_SRC32ANPREFIXED :
4467 fields->f_src32_an_prefixed = value;
4468 break;
4469 case M32C_OPERAND_SRC32ANPREFIXEDHI :
4470 fields->f_src32_an_prefixed = value;
4471 break;
4472 case M32C_OPERAND_SRC32ANPREFIXEDQI :
4473 fields->f_src32_an_prefixed = value;
4474 break;
4475 case M32C_OPERAND_SRC32ANPREFIXEDSI :
4476 fields->f_src32_an_prefixed = value;
4477 break;
4478 case M32C_OPERAND_SRC32ANUNPREFIXED :
4479 fields->f_src32_an_unprefixed = value;
4480 break;
4481 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
4482 fields->f_src32_an_unprefixed = value;
4483 break;
4484 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
4485 fields->f_src32_an_unprefixed = value;
4486 break;
4487 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
4488 fields->f_src32_an_unprefixed = value;
4489 break;
4490 case M32C_OPERAND_SRC32RNPREFIXEDHI :
4491 fields->f_src32_rn_prefixed_HI = value;
4492 break;
4493 case M32C_OPERAND_SRC32RNPREFIXEDQI :
4494 fields->f_src32_rn_prefixed_QI = value;
4495 break;
4496 case M32C_OPERAND_SRC32RNPREFIXEDSI :
4497 fields->f_src32_rn_prefixed_SI = value;
4498 break;
4499 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
4500 fields->f_src32_rn_unprefixed_HI = value;
4501 break;
4502 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
4503 fields->f_src32_rn_unprefixed_QI = value;
4504 break;
4505 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
4506 fields->f_src32_rn_unprefixed_SI = value;
4507 break;
4508 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
4509 fields->f_5_1 = value;
4510 break;
4511 case M32C_OPERAND_X :
4512 break;
4513 case M32C_OPERAND_Z :
4514 break;
4515 case M32C_OPERAND_COND16_16 :
4516 fields->f_dsp_16_u8 = value;
4517 break;
4518 case M32C_OPERAND_COND16_24 :
4519 fields->f_dsp_24_u8 = value;
4520 break;
4521 case M32C_OPERAND_COND16_32 :
4522 fields->f_dsp_32_u8 = value;
4523 break;
4524 case M32C_OPERAND_COND16C :
4525 fields->f_cond16 = value;
4526 break;
4527 case M32C_OPERAND_COND16J :
4528 fields->f_cond16 = value;
4529 break;
4530 case M32C_OPERAND_COND16J5 :
4531 fields->f_cond16j_5 = value;
4532 break;
4533 case M32C_OPERAND_COND32 :
4534 fields->f_cond32 = value;
4535 break;
4536 case M32C_OPERAND_COND32_16 :
4537 fields->f_dsp_16_u8 = value;
4538 break;
4539 case M32C_OPERAND_COND32_24 :
4540 fields->f_dsp_24_u8 = value;
4541 break;
4542 case M32C_OPERAND_COND32_32 :
4543 fields->f_dsp_32_u8 = value;
4544 break;
4545 case M32C_OPERAND_COND32_40 :
4546 fields->f_dsp_40_u8 = value;
4547 break;
4548 case M32C_OPERAND_COND32J :
4549 fields->f_cond32j = value;
4550 break;
4551 case M32C_OPERAND_CR1_PREFIXED_32 :
4552 fields->f_21_3 = value;
4553 break;
4554 case M32C_OPERAND_CR1_UNPREFIXED_32 :
4555 fields->f_13_3 = value;
4556 break;
4557 case M32C_OPERAND_CR16 :
4558 fields->f_9_3 = value;
4559 break;
4560 case M32C_OPERAND_CR2_32 :
4561 fields->f_13_3 = value;
4562 break;
4563 case M32C_OPERAND_CR3_PREFIXED_32 :
4564 fields->f_21_3 = value;
4565 break;
4566 case M32C_OPERAND_CR3_UNPREFIXED_32 :
4567 fields->f_13_3 = value;
4568 break;
4569 case M32C_OPERAND_FLAGS16 :
4570 fields->f_9_3 = value;
4571 break;
4572 case M32C_OPERAND_FLAGS32 :
4573 fields->f_13_3 = value;
4574 break;
4575 case M32C_OPERAND_SCCOND32 :
4576 fields->f_cond16 = value;
4577 break;
4578 case M32C_OPERAND_SIZE :
4579 break;
4580
4581 default :
4582 /* xgettext:c-format */
4583 fprintf (stderr, _("Unrecognized field %d while setting int operand.\n"),
4584 opindex);
4585 abort ();
4586 }
4587 }
4588
4589 void
4590 m32c_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
4591 int opindex,
4592 CGEN_FIELDS * fields,
4593 bfd_vma value)
4594 {
4595 switch (opindex)
4596 {
4597 case M32C_OPERAND_A0 :
4598 break;
4599 case M32C_OPERAND_A1 :
4600 break;
4601 case M32C_OPERAND_AN16_PUSH_S :
4602 fields->f_4_1 = value;
4603 break;
4604 case M32C_OPERAND_BIT16AN :
4605 fields->f_dst16_an = value;
4606 break;
4607 case M32C_OPERAND_BIT16RN :
4608 fields->f_dst16_rn = value;
4609 break;
4610 case M32C_OPERAND_BIT32ANPREFIXED :
4611 fields->f_dst32_an_prefixed = value;
4612 break;
4613 case M32C_OPERAND_BIT32ANUNPREFIXED :
4614 fields->f_dst32_an_unprefixed = value;
4615 break;
4616 case M32C_OPERAND_BIT32RNPREFIXED :
4617 fields->f_dst32_rn_prefixed_QI = value;
4618 break;
4619 case M32C_OPERAND_BIT32RNUNPREFIXED :
4620 fields->f_dst32_rn_unprefixed_QI = value;
4621 break;
4622 case M32C_OPERAND_BITBASE16_16_S8 :
4623 fields->f_dsp_16_s8 = value;
4624 break;
4625 case M32C_OPERAND_BITBASE16_16_U16 :
4626 fields->f_dsp_16_u16 = value;
4627 break;
4628 case M32C_OPERAND_BITBASE16_16_U8 :
4629 fields->f_dsp_16_u8 = value;
4630 break;
4631 case M32C_OPERAND_BITBASE16_8_U11_S :
4632 fields->f_bitbase16_u11_S = value;
4633 break;
4634 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
4635 fields->f_bitbase32_16_s11_unprefixed = value;
4636 break;
4637 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
4638 fields->f_bitbase32_16_s19_unprefixed = value;
4639 break;
4640 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
4641 fields->f_bitbase32_16_u11_unprefixed = value;
4642 break;
4643 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
4644 fields->f_bitbase32_16_u19_unprefixed = value;
4645 break;
4646 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
4647 fields->f_bitbase32_16_u27_unprefixed = value;
4648 break;
4649 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
4650 fields->f_bitbase32_24_s11_prefixed = value;
4651 break;
4652 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
4653 fields->f_bitbase32_24_s19_prefixed = value;
4654 break;
4655 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
4656 fields->f_bitbase32_24_u11_prefixed = value;
4657 break;
4658 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
4659 fields->f_bitbase32_24_u19_prefixed = value;
4660 break;
4661 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
4662 fields->f_bitbase32_24_u27_prefixed = value;
4663 break;
4664 case M32C_OPERAND_BITNO16R :
4665 fields->f_dsp_16_u8 = value;
4666 break;
4667 case M32C_OPERAND_BITNO32PREFIXED :
4668 fields->f_bitno32_prefixed = value;
4669 break;
4670 case M32C_OPERAND_BITNO32UNPREFIXED :
4671 fields->f_bitno32_unprefixed = value;
4672 break;
4673 case M32C_OPERAND_DSP_10_U6 :
4674 fields->f_dsp_10_u6 = value;
4675 break;
4676 case M32C_OPERAND_DSP_16_S16 :
4677 fields->f_dsp_16_s16 = value;
4678 break;
4679 case M32C_OPERAND_DSP_16_S8 :
4680 fields->f_dsp_16_s8 = value;
4681 break;
4682 case M32C_OPERAND_DSP_16_U16 :
4683 fields->f_dsp_16_u16 = value;
4684 break;
4685 case M32C_OPERAND_DSP_16_U20 :
4686 fields->f_dsp_16_u24 = value;
4687 break;
4688 case M32C_OPERAND_DSP_16_U24 :
4689 fields->f_dsp_16_u24 = value;
4690 break;
4691 case M32C_OPERAND_DSP_16_U8 :
4692 fields->f_dsp_16_u8 = value;
4693 break;
4694 case M32C_OPERAND_DSP_24_S16 :
4695 fields->f_dsp_24_s16 = value;
4696 break;
4697 case M32C_OPERAND_DSP_24_S8 :
4698 fields->f_dsp_24_s8 = value;
4699 break;
4700 case M32C_OPERAND_DSP_24_U16 :
4701 fields->f_dsp_24_u16 = value;
4702 break;
4703 case M32C_OPERAND_DSP_24_U20 :
4704 fields->f_dsp_24_u24 = value;
4705 break;
4706 case M32C_OPERAND_DSP_24_U24 :
4707 fields->f_dsp_24_u24 = value;
4708 break;
4709 case M32C_OPERAND_DSP_24_U8 :
4710 fields->f_dsp_24_u8 = value;
4711 break;
4712 case M32C_OPERAND_DSP_32_S16 :
4713 fields->f_dsp_32_s16 = value;
4714 break;
4715 case M32C_OPERAND_DSP_32_S8 :
4716 fields->f_dsp_32_s8 = value;
4717 break;
4718 case M32C_OPERAND_DSP_32_U16 :
4719 fields->f_dsp_32_u16 = value;
4720 break;
4721 case M32C_OPERAND_DSP_32_U20 :
4722 fields->f_dsp_32_u24 = value;
4723 break;
4724 case M32C_OPERAND_DSP_32_U24 :
4725 fields->f_dsp_32_u24 = value;
4726 break;
4727 case M32C_OPERAND_DSP_32_U8 :
4728 fields->f_dsp_32_u8 = value;
4729 break;
4730 case M32C_OPERAND_DSP_40_S16 :
4731 fields->f_dsp_40_s16 = value;
4732 break;
4733 case M32C_OPERAND_DSP_40_S8 :
4734 fields->f_dsp_40_s8 = value;
4735 break;
4736 case M32C_OPERAND_DSP_40_U16 :
4737 fields->f_dsp_40_u16 = value;
4738 break;
4739 case M32C_OPERAND_DSP_40_U24 :
4740 fields->f_dsp_40_u24 = value;
4741 break;
4742 case M32C_OPERAND_DSP_40_U8 :
4743 fields->f_dsp_40_u8 = value;
4744 break;
4745 case M32C_OPERAND_DSP_48_S16 :
4746 fields->f_dsp_48_s16 = value;
4747 break;
4748 case M32C_OPERAND_DSP_48_S8 :
4749 fields->f_dsp_48_s8 = value;
4750 break;
4751 case M32C_OPERAND_DSP_48_U16 :
4752 fields->f_dsp_48_u16 = value;
4753 break;
4754 case M32C_OPERAND_DSP_48_U24 :
4755 fields->f_dsp_48_u24 = value;
4756 break;
4757 case M32C_OPERAND_DSP_48_U8 :
4758 fields->f_dsp_48_u8 = value;
4759 break;
4760 case M32C_OPERAND_DSP_8_S24 :
4761 fields->f_dsp_8_s24 = value;
4762 break;
4763 case M32C_OPERAND_DSP_8_S8 :
4764 fields->f_dsp_8_s8 = value;
4765 break;
4766 case M32C_OPERAND_DSP_8_U16 :
4767 fields->f_dsp_8_u16 = value;
4768 break;
4769 case M32C_OPERAND_DSP_8_U24 :
4770 fields->f_dsp_8_u24 = value;
4771 break;
4772 case M32C_OPERAND_DSP_8_U6 :
4773 fields->f_dsp_8_u6 = value;
4774 break;
4775 case M32C_OPERAND_DSP_8_U8 :
4776 fields->f_dsp_8_u8 = value;
4777 break;
4778 case M32C_OPERAND_DST16AN :
4779 fields->f_dst16_an = value;
4780 break;
4781 case M32C_OPERAND_DST16AN_S :
4782 fields->f_dst16_an_s = value;
4783 break;
4784 case M32C_OPERAND_DST16ANHI :
4785 fields->f_dst16_an = value;
4786 break;
4787 case M32C_OPERAND_DST16ANQI :
4788 fields->f_dst16_an = value;
4789 break;
4790 case M32C_OPERAND_DST16ANQI_S :
4791 fields->f_dst16_rn_QI_s = value;
4792 break;
4793 case M32C_OPERAND_DST16ANSI :
4794 fields->f_dst16_an = value;
4795 break;
4796 case M32C_OPERAND_DST16RNEXTQI :
4797 fields->f_dst16_rn_ext = value;
4798 break;
4799 case M32C_OPERAND_DST16RNHI :
4800 fields->f_dst16_rn = value;
4801 break;
4802 case M32C_OPERAND_DST16RNQI :
4803 fields->f_dst16_rn = value;
4804 break;
4805 case M32C_OPERAND_DST16RNQI_S :
4806 fields->f_dst16_rn_QI_s = value;
4807 break;
4808 case M32C_OPERAND_DST16RNSI :
4809 fields->f_dst16_rn = value;
4810 break;
4811 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
4812 fields->f_dst32_an_unprefixed = value;
4813 break;
4814 case M32C_OPERAND_DST32ANPREFIXED :
4815 fields->f_dst32_an_prefixed = value;
4816 break;
4817 case M32C_OPERAND_DST32ANPREFIXEDHI :
4818 fields->f_dst32_an_prefixed = value;
4819 break;
4820 case M32C_OPERAND_DST32ANPREFIXEDQI :
4821 fields->f_dst32_an_prefixed = value;
4822 break;
4823 case M32C_OPERAND_DST32ANPREFIXEDSI :
4824 fields->f_dst32_an_prefixed = value;
4825 break;
4826 case M32C_OPERAND_DST32ANUNPREFIXED :
4827 fields->f_dst32_an_unprefixed = value;
4828 break;
4829 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
4830 fields->f_dst32_an_unprefixed = value;
4831 break;
4832 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
4833 fields->f_dst32_an_unprefixed = value;
4834 break;
4835 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
4836 fields->f_dst32_an_unprefixed = value;
4837 break;
4838 case M32C_OPERAND_DST32R0HI_S :
4839 break;
4840 case M32C_OPERAND_DST32R0QI_S :
4841 break;
4842 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
4843 fields->f_dst32_rn_ext_unprefixed = value;
4844 break;
4845 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
4846 fields->f_dst32_rn_ext_unprefixed = value;
4847 break;
4848 case M32C_OPERAND_DST32RNPREFIXEDHI :
4849 fields->f_dst32_rn_prefixed_HI = value;
4850 break;
4851 case M32C_OPERAND_DST32RNPREFIXEDQI :
4852 fields->f_dst32_rn_prefixed_QI = value;
4853 break;
4854 case M32C_OPERAND_DST32RNPREFIXEDSI :
4855 fields->f_dst32_rn_prefixed_SI = value;
4856 break;
4857 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
4858 fields->f_dst32_rn_unprefixed_HI = value;
4859 break;
4860 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
4861 fields->f_dst32_rn_unprefixed_QI = value;
4862 break;
4863 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
4864 fields->f_dst32_rn_unprefixed_SI = value;
4865 break;
4866 case M32C_OPERAND_G :
4867 break;
4868 case M32C_OPERAND_IMM_12_S4 :
4869 fields->f_imm_12_s4 = value;
4870 break;
4871 case M32C_OPERAND_IMM_12_S4N :
4872 fields->f_imm_12_s4 = value;
4873 break;
4874 case M32C_OPERAND_IMM_13_U3 :
4875 fields->f_imm_13_u3 = value;
4876 break;
4877 case M32C_OPERAND_IMM_16_HI :
4878 fields->f_dsp_16_s16 = value;
4879 break;
4880 case M32C_OPERAND_IMM_16_QI :
4881 fields->f_dsp_16_s8 = value;
4882 break;
4883 case M32C_OPERAND_IMM_16_SI :
4884 fields->f_dsp_16_s32 = value;
4885 break;
4886 case M32C_OPERAND_IMM_20_S4 :
4887 fields->f_imm_20_s4 = value;
4888 break;
4889 case M32C_OPERAND_IMM_24_HI :
4890 fields->f_dsp_24_s16 = value;
4891 break;
4892 case M32C_OPERAND_IMM_24_QI :
4893 fields->f_dsp_24_s8 = value;
4894 break;
4895 case M32C_OPERAND_IMM_24_SI :
4896 fields->f_dsp_24_s32 = value;
4897 break;
4898 case M32C_OPERAND_IMM_32_HI :
4899 fields->f_dsp_32_s16 = value;
4900 break;
4901 case M32C_OPERAND_IMM_32_QI :
4902 fields->f_dsp_32_s8 = value;
4903 break;
4904 case M32C_OPERAND_IMM_32_SI :
4905 fields->f_dsp_32_s32 = value;
4906 break;
4907 case M32C_OPERAND_IMM_40_HI :
4908 fields->f_dsp_40_s16 = value;
4909 break;
4910 case M32C_OPERAND_IMM_40_QI :
4911 fields->f_dsp_40_s8 = value;
4912 break;
4913 case M32C_OPERAND_IMM_40_SI :
4914 fields->f_dsp_40_s32 = value;
4915 break;
4916 case M32C_OPERAND_IMM_48_HI :
4917 fields->f_dsp_48_s16 = value;
4918 break;
4919 case M32C_OPERAND_IMM_48_QI :
4920 fields->f_dsp_48_s8 = value;
4921 break;
4922 case M32C_OPERAND_IMM_48_SI :
4923 fields->f_dsp_48_s32 = value;
4924 break;
4925 case M32C_OPERAND_IMM_56_HI :
4926 fields->f_dsp_56_s16 = value;
4927 break;
4928 case M32C_OPERAND_IMM_56_QI :
4929 fields->f_dsp_56_s8 = value;
4930 break;
4931 case M32C_OPERAND_IMM_64_HI :
4932 fields->f_dsp_64_s16 = value;
4933 break;
4934 case M32C_OPERAND_IMM_8_HI :
4935 fields->f_dsp_8_s16 = value;
4936 break;
4937 case M32C_OPERAND_IMM_8_QI :
4938 fields->f_dsp_8_s8 = value;
4939 break;
4940 case M32C_OPERAND_IMM_8_S4 :
4941 fields->f_imm_8_s4 = value;
4942 break;
4943 case M32C_OPERAND_IMM_8_S4N :
4944 fields->f_imm_8_s4 = value;
4945 break;
4946 case M32C_OPERAND_IMM_SH_12_S4 :
4947 fields->f_imm_12_s4 = value;
4948 break;
4949 case M32C_OPERAND_IMM_SH_20_S4 :
4950 fields->f_imm_20_s4 = value;
4951 break;
4952 case M32C_OPERAND_IMM_SH_8_S4 :
4953 fields->f_imm_8_s4 = value;
4954 break;
4955 case M32C_OPERAND_IMM1_S :
4956 fields->f_imm1_S = value;
4957 break;
4958 case M32C_OPERAND_IMM3_S :
4959 fields->f_imm3_S = value;
4960 break;
4961 case M32C_OPERAND_LAB_16_8 :
4962 fields->f_lab_16_8 = value;
4963 break;
4964 case M32C_OPERAND_LAB_24_8 :
4965 fields->f_lab_24_8 = value;
4966 break;
4967 case M32C_OPERAND_LAB_32_8 :
4968 fields->f_lab_32_8 = value;
4969 break;
4970 case M32C_OPERAND_LAB_40_8 :
4971 fields->f_lab_40_8 = value;
4972 break;
4973 case M32C_OPERAND_LAB_5_3 :
4974 fields->f_lab_5_3 = value;
4975 break;
4976 case M32C_OPERAND_LAB_8_16 :
4977 fields->f_lab_8_16 = value;
4978 break;
4979 case M32C_OPERAND_LAB_8_24 :
4980 fields->f_lab_8_24 = value;
4981 break;
4982 case M32C_OPERAND_LAB_8_8 :
4983 fields->f_lab_8_8 = value;
4984 break;
4985 case M32C_OPERAND_LAB32_JMP_S :
4986 fields->f_lab32_jmp_s = value;
4987 break;
4988 case M32C_OPERAND_Q :
4989 break;
4990 case M32C_OPERAND_R0 :
4991 break;
4992 case M32C_OPERAND_R0H :
4993 break;
4994 case M32C_OPERAND_R0L :
4995 break;
4996 case M32C_OPERAND_R1 :
4997 break;
4998 case M32C_OPERAND_R1R2R0 :
4999 break;
5000 case M32C_OPERAND_R2 :
5001 break;
5002 case M32C_OPERAND_R2R0 :
5003 break;
5004 case M32C_OPERAND_R3 :
5005 break;
5006 case M32C_OPERAND_R3R1 :
5007 break;
5008 case M32C_OPERAND_REGSETPOP :
5009 fields->f_8_8 = value;
5010 break;
5011 case M32C_OPERAND_REGSETPUSH :
5012 fields->f_8_8 = value;
5013 break;
5014 case M32C_OPERAND_RN16_PUSH_S :
5015 fields->f_4_1 = value;
5016 break;
5017 case M32C_OPERAND_S :
5018 break;
5019 case M32C_OPERAND_SRC16AN :
5020 fields->f_src16_an = value;
5021 break;
5022 case M32C_OPERAND_SRC16ANHI :
5023 fields->f_src16_an = value;
5024 break;
5025 case M32C_OPERAND_SRC16ANQI :
5026 fields->f_src16_an = value;
5027 break;
5028 case M32C_OPERAND_SRC16RNHI :
5029 fields->f_src16_rn = value;
5030 break;
5031 case M32C_OPERAND_SRC16RNQI :
5032 fields->f_src16_rn = value;
5033 break;
5034 case M32C_OPERAND_SRC32ANPREFIXED :
5035 fields->f_src32_an_prefixed = value;
5036 break;
5037 case M32C_OPERAND_SRC32ANPREFIXEDHI :
5038 fields->f_src32_an_prefixed = value;
5039 break;
5040 case M32C_OPERAND_SRC32ANPREFIXEDQI :
5041 fields->f_src32_an_prefixed = value;
5042 break;
5043 case M32C_OPERAND_SRC32ANPREFIXEDSI :
5044 fields->f_src32_an_prefixed = value;
5045 break;
5046 case M32C_OPERAND_SRC32ANUNPREFIXED :
5047 fields->f_src32_an_unprefixed = value;
5048 break;
5049 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
5050 fields->f_src32_an_unprefixed = value;
5051 break;
5052 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
5053 fields->f_src32_an_unprefixed = value;
5054 break;
5055 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
5056 fields->f_src32_an_unprefixed = value;
5057 break;
5058 case M32C_OPERAND_SRC32RNPREFIXEDHI :
5059 fields->f_src32_rn_prefixed_HI = value;
5060 break;
5061 case M32C_OPERAND_SRC32RNPREFIXEDQI :
5062 fields->f_src32_rn_prefixed_QI = value;
5063 break;
5064 case M32C_OPERAND_SRC32RNPREFIXEDSI :
5065 fields->f_src32_rn_prefixed_SI = value;
5066 break;
5067 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
5068 fields->f_src32_rn_unprefixed_HI = value;
5069 break;
5070 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
5071 fields->f_src32_rn_unprefixed_QI = value;
5072 break;
5073 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
5074 fields->f_src32_rn_unprefixed_SI = value;
5075 break;
5076 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
5077 fields->f_5_1 = value;
5078 break;
5079 case M32C_OPERAND_X :
5080 break;
5081 case M32C_OPERAND_Z :
5082 break;
5083 case M32C_OPERAND_COND16_16 :
5084 fields->f_dsp_16_u8 = value;
5085 break;
5086 case M32C_OPERAND_COND16_24 :
5087 fields->f_dsp_24_u8 = value;
5088 break;
5089 case M32C_OPERAND_COND16_32 :
5090 fields->f_dsp_32_u8 = value;
5091 break;
5092 case M32C_OPERAND_COND16C :
5093 fields->f_cond16 = value;
5094 break;
5095 case M32C_OPERAND_COND16J :
5096 fields->f_cond16 = value;
5097 break;
5098 case M32C_OPERAND_COND16J5 :
5099 fields->f_cond16j_5 = value;
5100 break;
5101 case M32C_OPERAND_COND32 :
5102 fields->f_cond32 = value;
5103 break;
5104 case M32C_OPERAND_COND32_16 :
5105 fields->f_dsp_16_u8 = value;
5106 break;
5107 case M32C_OPERAND_COND32_24 :
5108 fields->f_dsp_24_u8 = value;
5109 break;
5110 case M32C_OPERAND_COND32_32 :
5111 fields->f_dsp_32_u8 = value;
5112 break;
5113 case M32C_OPERAND_COND32_40 :
5114 fields->f_dsp_40_u8 = value;
5115 break;
5116 case M32C_OPERAND_COND32J :
5117 fields->f_cond32j = value;
5118 break;
5119 case M32C_OPERAND_CR1_PREFIXED_32 :
5120 fields->f_21_3 = value;
5121 break;
5122 case M32C_OPERAND_CR1_UNPREFIXED_32 :
5123 fields->f_13_3 = value;
5124 break;
5125 case M32C_OPERAND_CR16 :
5126 fields->f_9_3 = value;
5127 break;
5128 case M32C_OPERAND_CR2_32 :
5129 fields->f_13_3 = value;
5130 break;
5131 case M32C_OPERAND_CR3_PREFIXED_32 :
5132 fields->f_21_3 = value;
5133 break;
5134 case M32C_OPERAND_CR3_UNPREFIXED_32 :
5135 fields->f_13_3 = value;
5136 break;
5137 case M32C_OPERAND_FLAGS16 :
5138 fields->f_9_3 = value;
5139 break;
5140 case M32C_OPERAND_FLAGS32 :
5141 fields->f_13_3 = value;
5142 break;
5143 case M32C_OPERAND_SCCOND32 :
5144 fields->f_cond16 = value;
5145 break;
5146 case M32C_OPERAND_SIZE :
5147 break;
5148
5149 default :
5150 /* xgettext:c-format */
5151 fprintf (stderr, _("Unrecognized field %d while setting vma operand.\n"),
5152 opindex);
5153 abort ();
5154 }
5155 }
5156
5157 /* Function to call before using the instruction builder tables. */
5158
5159 void
5160 m32c_cgen_init_ibld_table (CGEN_CPU_DESC cd)
5161 {
5162 cd->insert_handlers = & m32c_cgen_insert_handlers[0];
5163 cd->extract_handlers = & m32c_cgen_extract_handlers[0];
5164
5165 cd->insert_operand = m32c_cgen_insert_operand;
5166 cd->extract_operand = m32c_cgen_extract_operand;
5167
5168 cd->get_int_operand = m32c_cgen_get_int_operand;
5169 cd->set_int_operand = m32c_cgen_set_int_operand;
5170 cd->get_vma_operand = m32c_cgen_get_vma_operand;
5171 cd->set_vma_operand = m32c_cgen_set_vma_operand;
5172 }
git-cvsimport of binutils cvsroot