1 2005-12-13 DJ Delorie <dj@redhat.com>
3 * m32c-desc.c: Regenerate.
4 * m32c-opc.c: Regenerate.
5 * m32c-opc.h: Regenerate.
7 2005-12-12 Nathan Sidwell <nathan@codesourcery.com>
9 * Makefile.am (CLEANFILES, CGEN_CPUS, MT_DEPS): Replace ms1 with mt.
10 * Makefile.in: Rebuilt.
11 * configure.in: Replace ms1 files with mt files.
14 2005-12-08 Jan Beulich <jbeulich@novell.com>
16 * i386-dis.c (MAXLEN): Reduce to architectural limit.
17 (fetch_data): Check for sufficient buffer size.
19 2005-12-08 Jan Beulich <jbeulich@novell.com>
21 * i386-dis.c (OP_ST): Remove prefix in Intel mode.
23 2005-12-08 Daniel Jacobowitz <dan@codesourcery.com>
25 * i386-dis.c (dofloat): Handle %rip-relative floating point addressing.
27 2005-12-07 Hans-Peter Nilsson <hp@axis.com>
29 * cris-opc.c (cris_opcodes) <"move" "s,P">: Define using
30 MOVE_M_TO_PREG_OPCODE and MOVE_M_TO_PREG_ZBITS instead of constants.
32 2005-12-06 H.J. Lu <hongjiu.lu@intel.com>
35 * i386-dis.c (address_mode): New enum type.
36 (address_mode): New variable.
37 (mode_64bit): Removed.
38 (ckprefix): Updated to check address_mode instead of mode_64bit.
39 (prefix_name): Likewise.
40 (print_insn): Likewise.
42 (print_operand_value): Likewise.
43 (intel_operand_size): Likewise.
54 (SVME_Fixup): Likewise.
55 (print_insn): Set address_mode.
56 (PNI_Fixup): Add 64bit and address size override support for
59 2005-12-06 Hans-Peter Nilsson <hp@axis.com>
61 * cris-dis.c (bytes_to_skip): Handle new parameter prefix_matchedp.
62 (print_with_operands): Check for prefix when [PC+] is seen.
64 2005-12-02 Dave Brolley <brolley@redhat.com>
66 * configure.in (cgen_files): Add cgen-bitset.lo.
67 (ta): Add cgen-bitset.lo when arch==bfd_cris_arch.
68 * Makefile.am (CFILES): Add cgen-bitset.c.
69 (ALL_MACHINES): Add cgen-bitset.lo.
70 (cgen-bitset.lo): New target.
71 * cgen-opc.c (cgen_bitset_create, cgen_bitset_init, cgen_bitset_clear)
72 (cgen_bitset_add, cgen_bitset_set, cgen_bitset_contains)
73 (cgen_bitset_compare, cgen_bitset_intersect_p, cgen_bitset_copy)
74 (cgen_bitset_union): Moved from here ...
75 * cgen-bitset.c: ... to here. New file.
76 * Makefile.in: Regenerated.
77 * configure: Regenerated.
79 2005-11-22 James E Wilson <wilson@specifix.com>
81 * ia64-gen.c (_opcode_int64_low, _opcode_int64_high,
82 opcode_fprintf_vma): New.
83 (print_main_table): New opcode_fprintf_vma instead of fprintf_vma.
85 2005-11-16 Alan Modra <amodra@bigpond.net.au>
87 * ppc-opc.c (powerpc_opcodes): Add frin,friz,frip,frim. Correct
90 2005-11-14 David Ung <davidu@mips.com>
92 * mips16-opc.c: Add MIPS16e save/restore opcodes.
93 * mips-dis.c (print_mips16_insn_arg): Handle printing of 'm'/'M'
94 codes for save/restore.
96 2005-11-10 Andreas Schwab <schwab@suse.de>
98 * m68k-dis.c (print_insn_m68k): Only match FPU insns with
101 2005-11-08 H.J. Lu <hongjiu.lu@intel.com>
103 * m32c-desc.c: Regenerated.
105 2005-11-08 Nathan Sidwell <nathan@codesourcery.com>
108 * ms1-asm.c, ms1-desc.c, ms1-desc.h, ms1-dis.c, ms1-ibld.c,
109 ms1-opc.c, ms1-opc.h: Regenerated.
111 2005-11-07 Steve Ellcey <sje@cup.hp.com>
113 * configure: Regenerate after modifying bfd/warning.m4.
115 2005-11-07 Alan Modra <amodra@bigpond.net.au>
117 * i386-dis.c (ckprefix): Handle rex on fwait. Don't print
118 ignored rex prefixes here.
119 (print_insn): Instead, handle them similarly to fwait followed
122 2005-11-02 H.J. Lu <hongjiu.lu@intel.com>
124 * iq2000-desc.c: Regenerated.
125 * iq2000-desc.h: Likewise.
126 * iq2000-dis.c: Likewise.
127 * iq2000-opc.c: Likewise.
129 2005-11-02 Paul Brook <paul@codesourcery.com>
131 * arm-dis.c (print_insn_thumb32): Word align blx target address.
133 2005-10-31 Alan Modra <amodra@bigpond.net.au>
135 * arm-dis.c (print_insn): Warning fix.
137 2005-10-30 H.J. Lu <hongjiu.lu@intel.com>
139 * Makefile.am: Run "make dep-am".
140 * Makefile.in: Regenerated.
142 * dep-in.sed: Replace " ./" with " ".
144 2005-10-28 Dave Brolley <brolley@redhat.com>
146 * All CGEN-generated sources: Regenerate.
148 Contribute the following changes:
149 2005-09-19 Dave Brolley <brolley@redhat.com>
151 * disassemble.c (disassemble_init_for_target): Add 'break' to case for
152 bfd_arch_tic4x. Use cgen_bitset_create and cgen_bitset_set for
155 2005-02-16 Dave Brolley <brolley@redhat.com>
157 * cgen-dis.in: Rename CGEN_ISA_MASK to CGEN_BITSET. Rename
158 cgen_isa_mask_* to cgen_bitset_*.
159 * cgen-opc.c: Likewise.
161 2003-11-28 Richard Sandiford <rsandifo@redhat.com>
163 * cgen-dis.in (print_insn_@arch@): Fix comparison with cached isas.
164 * *-dis.c: Regenerate.
166 2003-06-05 DJ Delorie <dj@redhat.com>
168 * cgen-dis.in (print_insn_@arch@): Copy prev_isas, don't assign
169 it, as it may point to a reused buffer. Set prev_isas when we
172 2002-12-13 Dave Brolley <brolley@redhat.com>
174 * cgen-opc.c (cgen_isa_mask_create): New support function for
176 (cgen_isa_mask_init): Ditto.
177 (cgen_isa_mask_clear): Ditto.
178 (cgen_isa_mask_add): Ditto.
179 (cgen_isa_mask_set): Ditto.
180 (cgen_isa_supported): Ditto.
181 (cgen_isa_mask_compare): Ditto.
182 (cgen_isa_mask_intersection): Ditto.
183 (cgen_isa_mask_copy): Ditto.
184 (cgen_isa_mask_combine): Ditto.
185 * cgen-dis.in (libiberty.h): #include it.
186 (isas): Renamed from 'isa' and now (CGEN_ISA_MASK *).
187 (print_insn_@arch@): Use CGEN_ISA_MASK and support functions.
188 * Makefile.am (CGENDEPS): Add utils-cgen.scm and attrs.scm.
189 * Makefile.in: Regenerated.
191 2005-10-27 DJ Delorie <dj@redhat.com>
193 * m32c-asm.c: Regenerate.
194 * m32c-desc.c: Regenerate.
195 * m32c-desc.h: Regenerate.
196 * m32c-dis.c: Regenerate.
197 * m32c-ibld.c: Regenerate.
198 * m32c-opc.c: Regenerate.
199 * m32c-opc.h: Regenerate.
201 2005-10-26 DJ Delorie <dj@redhat.com>
203 * m32c-asm.c: Regenerate.
204 * m32c-desc.c: Regenerate.
205 * m32c-desc.h: Regenerate.
206 * m32c-dis.c: Regenerate.
207 * m32c-ibld.c: Regenerate.
208 * m32c-opc.c: Regenerate.
209 * m32c-opc.h: Regenerate.
211 2005-10-26 Paul Brook <paul@codesourcery.com>
213 * arm-dis.c (arm_opcodes): Correct "sel" entry.
215 2005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
217 * m32r-asm.c: Regenerate.
219 2005-10-25 DJ Delorie <dj@redhat.com>
221 * m32c-asm.c: Regenerate.
222 * m32c-desc.c: Regenerate.
223 * m32c-desc.h: Regenerate.
224 * m32c-dis.c: Regenerate.
225 * m32c-ibld.c: Regenerate.
226 * m32c-opc.c: Regenerate.
227 * m32c-opc.h: Regenerate.
229 2005-10-25 Arnold Metselaar <arnold.metselaar@planet.nl>
231 * configure.in: Add target architecture bfd_arch_z80.
232 * configure: Regenerated.
233 * disassemble.c (disassembler)<ARCH_z80>: Add case
235 * z80-dis.c: New file.
237 2005-10-25 Alan Modra <amodra@bigpond.net.au>
239 * po/POTFILES.in: Regenerate.
240 * po/opcodes.pot: Regenerate.
242 2005-10-24 Jan Beulich <jbeulich@novell.com>
244 * ia64-asmtab.c: Regenerate.
246 2005-10-21 DJ Delorie <dj@redhat.com>
248 * m32c-asm.c: Regenerate.
249 * m32c-desc.c: Regenerate.
250 * m32c-desc.h: Regenerate.
251 * m32c-dis.c: Regenerate.
252 * m32c-ibld.c: Regenerate.
253 * m32c-opc.c: Regenerate.
254 * m32c-opc.h: Regenerate.
256 2005-10-21 Nick Clifton <nickc@redhat.com>
258 * bfin-dis.c: Tidy up code, removing redundant constructs.
260 2005-10-19 Martin Schwidefsky <schwidefsky@de.ibm.com>
262 * s390-opc.txt: Add unnormalized hfp multiply and multiply-and-add
265 2005-10-18 Nick Clifton <nickc@redhat.com>
267 * m32r-asm.c: Regenerate after updating m32r.opc.
269 2005-10-18 Jie Zhang <jie.zhang@analog.com>
271 * bfin-dis.c (print_insn_bfin): Do proper endian transform when
272 reading instruction from memory.
274 2005-10-18 Nick Clifton <nickc@redhat.com>
276 * m32r-asm.c: Regenerate after updating m32r.opc.
278 2005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
280 * m32r-asm.c: Regenerate after updating m32r.opc.
282 2005-10-08 James Lemke <jim@wasabisystems.com>
284 * arm-dis.c (coprocessor_opcodes): Fix mask for various Maverick CDP
287 2005-10-06 Daniel Jacobowitz <dan@codesourcery.com>
289 * ppc-dis.c (struct dis_private): Remove.
290 (powerpc_dialect): Avoid aliasing warnings.
291 (print_insn_big_powerpc, print_insn_little_powerpc): Likewise.
293 2005-09-30 Nick Clifton <nickc@redhat.com>
295 * po/ga.po: New Irish translation.
296 * configure.in (ALL_LINGUAS): Add "ga".
297 * configure: Regenerate.
299 2005-09-30 H.J. Lu <hongjiu.lu@intel.com>
301 * Makefile.am: Run "make dep-am".
302 * Makefile.in: Regenerated.
303 * aclocal.m4: Likewise.
304 * configure: Likewise.
306 2005-09-30 Catherine Moore <clm@cm00re.com>
308 * Makefile.am: Bfin support.
309 * Makefile.in: Regenerated.
310 * aclocal.m4: Regenerated.
311 * bfin-dis.c: New file.
312 * configure.in: Bfin support.
313 * configure: Regenerated.
314 * disassemble.c (ARCH_bfin): Define.
315 (disassembler): Add case for bfd_arch_bfin.
317 2005-09-28 Jan Beulich <jbeulich@novell.com>
319 * i386-dis.c (stack_v_mode): Renamed from branch_v_mode.
322 (Ob64, Ov64): Rename to Ob, Ov. Delete unused original definitions.
323 (dis386): Document and use new 'V' meta character. Use it for
324 single-byte push/pop opcode forms. Use stackEv for mod-r/m push/pop
325 opcode forms. Correct typo in 'pop ss'. Replace Ob64/Ov64 by Ob/Ov.
326 (putop): 'q' suffix for 'T' and 'U' meta depends on DFLAG. Mark
327 data prefix as used whenever DFLAG was examined. Handle 'V'.
328 (intel_operand_size): Use stack_v_mode.
329 (OP_E): Use stack_v_mode, but handle only the special case of
330 64-bit mode without operand size override here; fall through to
331 v_mode case otherwise.
332 (OP_REG): Special case rAX_reg ... rDI_reg only when 64-bit mode
333 and no operand size override is present.
334 (OP_J): Use get32s for obtaining the displacement also when rex64
337 2005-09-08 Paul Brook <paul@codesourcery.com>
339 * arm-dis.c (arm_opcodes, thumb32_opcodes): Rename smi to smc.
341 2005-09-06 Chao-ying Fu <fu@mips.com>
343 * mips-opc.c (MT32): New define.
344 (mips_builtin_opcodes): Move "bc0f", "bc0fl", "bc0t", "bc0tl" to the
345 bottom to avoid opcode collision with "mftr" and "mttr".
347 * mips-dis.c (mips_arch_choices): Enable INSN_MT for mips32r2.
348 (print_insn_args): Add supports for +t, +T, !, $, *, &, g operand
351 2005-09-02 Paul Brook <paul@codesourcery.com>
353 * arm-dis.c (coprocessor_opcodes): Add null terminator.
355 2005-09-02 Paul Brook <paul@codesourcery.com>
357 * arm-dis.c (coprocessor_opcodes): New.
358 (arm_opcodes, thumb32_opcodes): Remove coprocessor insns.
359 (print_insn_coprocessor): New function.
360 (print_insn_arm): Use print_insn_coprocessor. Remove coprocessor
362 (print_insn_thumb32): Use print_insn_coprocessor.
364 2005-08-30 Paul Brook <paul@codesourcery.com>
366 * arm-dis.c (thumb_opcodes): Disassemble sub(3) as subs.
368 2005-08-26 Jan Beulich <jbeulich@novell.com>
370 * i386-dis.c (intel_operand_size): New, broken out from OP_E for
372 (OP_E): Call intel_operand_size, move call site out of mode
374 (OP_OFF): Call intel_operand_size if suffix_always. Remove
375 ATTRIBUTE_UNUSED from parameters.
376 (OP_OFF64): Likewise.
377 (OP_ESreg): Call intel_operand_size.
378 (OP_DSreg): Likewise.
379 (OP_DIR): Use colon rather than semicolon as separator of far
382 2005-08-25 Chao-ying Fu <fu@mips.com>
384 * mips-opc.c (WR_a, RD_a, MOD_a, DSP_VOLA, D32): New define.
385 (mips_builtin_opcodes): Add DSP instructions.
386 * mips-dis.c (mips_arch_choices): Enable INSN_DSP for mips32, mips32r2,
388 (print_insn_args): Add supports for 3, 4, 5, 6, 7, 8, 9, 0, :, ', @
391 2005-08-23 David Ung <davidu@mips.com>
393 * mips16-opc.c (mips16_opcodes): Add the MIPS16e jalrc/jrc
394 instructions to the table.
396 2005-08-18 Alan Modra <amodra@bigpond.net.au>
398 * a29k-dis.c: Delete.
399 * Makefile.am: Remove a29k support.
400 * configure.in: Likewise.
401 * disassemble.c: Likewise.
402 * Makefile.in: Regenerate.
403 * configure: Regenerate.
404 * po/POTFILES.in: Regenerate.
406 2005-08-15 Daniel Jacobowitz <dan@codesourcery.com>
408 * ppc-dis.c (powerpc_dialect): Handle e300.
409 (print_ppc_disassembler_options): Likewise.
410 * ppc-opc.c (PPCE300): Define.
411 (powerpc_opcodes): Mark icbt as available for the e300.
413 2005-08-13 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
415 * hppa-dis.c (print_insn_hppa): Don't print '%' before register names.
416 Use "rp" instead of "%r2" in "b,l" insns.
418 2005-08-12 Martin Schwidefsky <schwidefsky@de.ibm.com>
420 * s390-dis.c (print_insn_s390): Print unsigned operands with %u.
421 * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109.
423 * s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
424 and 4 bit optional masks.
425 (INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD,
426 INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats.
427 (MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD,
428 MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise.
429 (s390_opformats): Likewise.
430 * s390-opc.txt: Add new instructions for cpu type z9-109.
432 2005-08-05 John David Anglin <dave.anglin@nrc-crnc.gc.ca>
434 * hppa-dis.c (print_insn_hppa): Prefix 21-bit values with "L%".
436 2005-07-29 Paul Brook <paul@codesourcery.com>
438 * arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
440 2005-07-29 Paul Brook <paul@codesourcery.com>
442 * arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
443 (print_insn_thumb32): Fix decoding of thumb2 'I' operands.
445 2005-07-25 DJ Delorie <dj@redhat.com>
447 * m32c-asm.c Regenerate.
448 * m32c-dis.c Regenerate.
450 2005-07-20 DJ Delorie <dj@redhat.com>
452 * disassemble.c (disassemble_init_for_target): M32C ISAs are
453 enums, so convert them to bit masks, which attributes are.
455 2005-07-18 Nick Clifton <nickc@redhat.com>
457 * configure.in: Restore alpha ordering to list of arches.
458 * configure: Regenerate.
459 * disassemble.c: Restore alpha ordering to list of arches.
461 2005-07-18 Nick Clifton <nickc@redhat.com>
463 * m32c-asm.c: Regenerate.
464 * m32c-desc.c: Regenerate.
465 * m32c-desc.h: Regenerate.
466 * m32c-dis.c: Regenerate.
467 * m32c-ibld.h: Regenerate.
468 * m32c-opc.c: Regenerate.
469 * m32c-opc.h: Regenerate.
471 2005-07-18 H.J. Lu <hongjiu.lu@intel.com>
473 * i386-dis.c (PNI_Fixup): Update comment.
474 (VMX_Fixup): Properly handle the suffix check.
476 2005-07-16 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
478 * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
481 2005-07-16 Alan Modra <amodra@bigpond.net.au>
483 * Makefile.am: Run "make dep-am".
484 (stamp-m32c): Fix cpu dependencies.
485 * Makefile.in: Regenerate.
486 * ip2k-dis.c: Regenerate.
488 2007-07-15 H.J. Lu <hongjiu.lu@intel.com>
490 * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
491 (VMX_Fixup): New. Fix up Intel VMX Instructions.
495 (dis386_twobyte): Updated entries 0x78 and 0x79.
496 (twobyte_has_modrm): Likewise.
497 (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
498 (OP_G): Handle m_mode.
500 2005-07-14 Jim Blandy <jimb@redhat.com>
502 Add support for the Renesas M32C and M16C.
503 * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
504 * m32c-desc.h, m32c-opc.h: New.
505 * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
506 (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
508 (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
509 m32c-ibld.lo, m32c-opc.lo.
510 (CLEANFILES): List stamp-m32c.
511 (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
512 (CGEN_CPUS): Add m32c.
513 (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
514 (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
515 (m32c_opc_h): New variable.
516 (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
517 (m32c-opc.lo): New rules.
518 * Makefile.in: Regenerated.
519 * configure.in: Add case for bfd_m32c_arch.
520 * configure: Regenerated.
521 * disassemble.c (ARCH_m32c): New.
522 [ARCH_m32c]: #include "m32c-desc.h".
523 (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
524 (disassemble_init_for_target) [ARCH_m32c]: Same.
526 * cgen-ops.h, cgen-types.h: New files.
527 * Makefile.am (HFILES): List them.
528 * Makefile.in: Regenerated.
530 2005-07-07 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
532 * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
533 d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
534 ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
535 m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
536 ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
537 v850-dis.c: Fix format bugs.
538 * ia64-gen.c (fail, warn): Add format attribute.
539 * or32-opc.c (debug): Likewise.
541 2005-07-07 Khem Raj <kraj@mvista.com>
543 * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
546 2005-07-06 Alan Modra <amodra@bigpond.net.au>
548 * Makefile.am (stamp-m32r): Fix path to cpu files.
549 (stamp-m32r, stamp-iq2000): Likewise.
550 * Makefile.in: Regenerate.
551 * m32r-asm.c: Regenerate.
552 * po/POTFILES.in: Remove arm-opc.h. Add ms1-asm.c, ms1-desc.c,
553 ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
555 2005-07-05 Nick Clifton <nickc@redhat.com>
557 * iq2000-asm.c: Regenerate.
558 * ms1-asm.c: Regenerate.
560 2005-07-05 Jan Beulich <jbeulich@novell.com>
562 * i386-dis.c (SVME_Fixup): New.
563 (grps): Use it for the lidt entry.
564 (PNI_Fixup): Call OP_M rather than OP_E.
565 (INVLPG_Fixup): Likewise.
567 2005-07-04 H.J. Lu <hongjiu.lu@intel.com>
569 * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
571 2005-07-01 Nick Clifton <nickc@redhat.com>
573 * a29k-dis.c: Update to ISO C90 style function declarations and
575 * alpha-opc.c: Likewise.
576 * arc-dis.c: Likewise.
577 * arc-opc.c: Likewise.
578 * avr-dis.c: Likewise.
579 * cgen-asm.in: Likewise.
580 * cgen-dis.in: Likewise.
581 * cgen-ibld.in: Likewise.
582 * cgen-opc.c: Likewise.
583 * cris-dis.c: Likewise.
584 * d10v-dis.c: Likewise.
585 * d30v-dis.c: Likewise.
586 * d30v-opc.c: Likewise.
587 * dis-buf.c: Likewise.
588 * dlx-dis.c: Likewise.
589 * h8300-dis.c: Likewise.
590 * h8500-dis.c: Likewise.
591 * hppa-dis.c: Likewise.
592 * i370-dis.c: Likewise.
593 * i370-opc.c: Likewise.
594 * m10200-dis.c: Likewise.
595 * m10300-dis.c: Likewise.
596 * m68k-dis.c: Likewise.
597 * m88k-dis.c: Likewise.
598 * mips-dis.c: Likewise.
599 * mmix-dis.c: Likewise.
600 * msp430-dis.c: Likewise.
601 * ns32k-dis.c: Likewise.
602 * or32-dis.c: Likewise.
603 * or32-opc.c: Likewise.
604 * pdp11-dis.c: Likewise.
605 * pj-dis.c: Likewise.
606 * s390-dis.c: Likewise.
607 * sh-dis.c: Likewise.
608 * sh64-dis.c: Likewise.
609 * sparc-dis.c: Likewise.
610 * sparc-opc.c: Likewise.
611 * sysdep.h: Likewise.
612 * tic30-dis.c: Likewise.
613 * tic4x-dis.c: Likewise.
614 * tic80-dis.c: Likewise.
615 * v850-dis.c: Likewise.
616 * v850-opc.c: Likewise.
617 * vax-dis.c: Likewise.
618 * w65-dis.c: Likewise.
619 * z8kgen.c: Likewise.
621 * fr30-*: Regenerate.
623 * ip2k-*: Regenerate.
624 * iq2000-*: Regenerate.
625 * m32r-*: Regenerate.
627 * openrisc-*: Regenerate.
628 * xstormy16-*: Regenerate.
630 2005-06-23 Ben Elliston <bje@gnu.org>
632 * m68k-dis.c: Use ISC C90.
633 * m68k-opc.c: Formatting fixes.
635 2005-06-16 David Ung <davidu@mips.com>
637 * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
638 instructions to the table; seb/seh/sew/zeb/zeh/zew.
640 2005-06-15 Dave Brolley <brolley@redhat.com>
642 Contribute Morpho ms1 on behalf of Red Hat
643 * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
644 ms1-opc.h: New files, Morpho ms1 target.
646 2004-05-14 Stan Cox <scox@redhat.com>
648 * disassemble.c (ARCH_ms1): Define.
649 (disassembler): Handle bfd_arch_ms1
651 2004-05-13 Michael Snyder <msnyder@redhat.com>
653 * Makefile.am, Makefile.in: Add ms1 target.
654 * configure.in: Ditto.
656 2005-06-08 Zack Weinberg <zack@codesourcery.com>
658 * arm-opc.h: Delete; fold contents into ...
659 * arm-dis.c: ... here. Move includes of internal COFF headers
660 next to includes of internal ELF headers.
661 (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
662 (struct arm_opcode): Rename struct opcode32. Make 'assembler' const.
663 (struct thumb_opcode): Rename struct opcode16. Make 'assembler' const.
664 (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
665 (iwmmxt_wwnames, iwmmxt_wwssnames):
667 (regnames): Remove iWMMXt coprocessor register sets.
668 (iwmmxt_regnames, iwmmxt_cregnames): New statics.
669 (get_arm_regnames): Adjust fourth argument to match above changes.
670 (set_iwmmxt_regnames): Delete.
671 (print_insn_arm): Constify 'c'. Use ISO syntax for function
672 pointer calls. Expand sole use of BDISP. Use iwmmxt_regnames
673 and iwmmxt_cregnames, not set_iwmmxt_regnames.
674 (print_insn_thumb16, print_insn_thumb32): Constify 'c'. Use
675 ISO syntax for function pointer calls.
677 2005-06-07 Zack Weinberg <zack@codesourcery.com>
679 * arm-dis.c: Split up the comments describing the format codes, so
680 that the ARM and 16-bit Thumb opcode tables each have comments
681 preceding them that describe all the codes, and only the codes,
682 valid in those tables. (32-bit Thumb table is already like this.)
683 Reorder the lists in all three comments to match the order in
684 which the codes are implemented.
685 Remove all forward declarations of static functions. Convert all
686 function definitions to ISO C format.
687 (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
689 (print_insn_thumb16): Remove unused case 'I'.
690 (print_insn): Update for changed calling convention of subroutines.
692 2005-05-25 Jan Beulich <jbeulich@novell.com>
694 * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
695 hex (but retain it being displayed as signed). Remove redundant
696 checks. Add handling of displacements for 16-bit addressing in Intel
699 2005-05-25 Jan Beulich <jbeulich@novell.com>
701 * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
702 (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
703 masking of 'rm' in 16-bit memory address handling.
705 2005-05-19 Anton Blanchard <anton@samba.org>
707 * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
708 (print_ppc_disassembler_options): Document it.
709 * ppc-opc.c (SVC_LEV): Define.
710 (LEV): Allow optional operand.
712 (powerpc_opcodes): Extend "sc". Adjust "svc" and "svcl". Add
713 "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
715 2005-05-19 Kelley Cook <kcook@gcc.gnu.org>
717 * Makefile.in: Regenerate.
719 2005-05-17 Zack Weinberg <zack@codesourcery.com>
721 * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
722 instructions. Adjust disassembly of some opcodes to match
724 (thumb32_opcodes): New table.
725 (print_insn_thumb): Rename print_insn_thumb16; don't handle
726 two-halfword branches here.
727 (print_insn_thumb32): New function.
728 (print_insn): Choose among print_insn_arm, print_insn_thumb16,
729 and print_insn_thumb32. Be consistent about order of
730 halfwords when printing 32-bit instructions.
732 2005-05-07 H.J. Lu <hongjiu.lu@intel.com>
735 * i386-dis.c (branch_v_mode): New.
736 (indirEv): Use branch_v_mode instead of v_mode.
737 (OP_E): Handle branch_v_mode.
739 2005-05-07 H.J. Lu <hongjiu.lu@intel.com>
741 * d10v-dis.c (dis_2_short): Support 64bit host.
743 2005-05-07 Nick Clifton <nickc@redhat.com>
745 * po/nl.po: Updated translation.
747 2005-05-07 Nick Clifton <nickc@redhat.com>
749 * Update the address and phone number of the FSF organization in
750 the GPL notices in the following files:
751 a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
752 arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
753 avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
754 cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
755 crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
756 d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
757 fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
758 fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
759 frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
760 h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
761 i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
762 ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
763 ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
764 ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
765 ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
766 iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
767 iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
768 m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
769 m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
770 m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
771 maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
772 mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
773 openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
774 openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
775 or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
776 pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
777 s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
778 sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
779 tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
780 v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
781 xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
782 xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
783 xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
785 2005-05-05 James E Wilson <wilson@specifixinc.com>
787 * ia64-opc.c: Include sysdep.h before libiberty.h.
789 2005-05-05 Nick Clifton <nickc@redhat.com>
791 * configure.in (ALL_LINGUAS): Add vi.
792 * configure: Regenerate.
795 2005-04-26 Jerome Guitton <guitton@gnat.com>
797 * configure.in: Fix the check for basename declaration.
798 * configure: Regenerate.
800 2005-04-19 Alan Modra <amodra@bigpond.net.au>
802 * ppc-opc.c (RTO): Define.
803 (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
804 entries to suit PPC440.
806 2005-04-18 Mark Kettenis <kettenis@gnu.org>
808 * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
811 2005-04-14 Nick Clifton <nickc@redhat.com>
813 * po/fi.po: New translation: Finnish.
814 * configure.in (ALL_LINGUAS): Add fi.
815 * configure: Regenerate.
817 2005-04-14 Alan Modra <amodra@bigpond.net.au>
819 * Makefile.am (NO_WERROR): Define.
820 * configure.in: Invoke AM_BINUTILS_WARNINGS.
821 * Makefile.in: Regenerate.
822 * aclocal.m4: Regenerate.
823 * configure: Regenerate.
825 2005-04-04 Nick Clifton <nickc@redhat.com>
827 * fr30-asm.c: Regenerate.
828 * frv-asm.c: Regenerate.
829 * iq2000-asm.c: Regenerate.
830 * m32r-asm.c: Regenerate.
831 * openrisc-asm.c: Regenerate.
833 2005-04-01 Jan Beulich <jbeulich@novell.com>
835 * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
836 visible operands in Intel mode. The first operand of monitor is
839 2005-04-01 Jan Beulich <jbeulich@novell.com>
841 * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
842 easier future additions.
844 2005-03-31 Jerome Guitton <guitton@gnat.com>
846 * configure.in: Check for basename.
847 * configure: Regenerate.
850 2005-03-29 H.J. Lu <hongjiu.lu@intel.com>
852 * i386-dis.c (SEG_Fixup): New.
854 (dis386): Use "Sv" for 0x8c and 0x8e.
856 2005-03-21 Jan-Benedict Glaw <jbglaw@lug-owl.de>
857 Nick Clifton <nickc@redhat.com>
859 * vax-dis.c: (entry_addr): New varible: An array of user supplied
860 function entry mask addresses.
861 (entry_addr_occupied_slots): New variable: The number of occupied
862 elements in entry_addr.
863 (entry_addr_total_slots): New variable: The total number of
864 elements in entry_addr.
865 (parse_disassembler_options): New function. Fills in the entry_addr
867 (free_entry_array): New function. Release the memory used by the
868 entry addr array. Suppressed because there is no way to call it.
869 (is_function_entry): Check if a given address is a function's
870 start address by looking at supplied entry mask addresses and
871 symbol information, if available.
872 (print_insn_vax): Use parse_disassembler_options and is_function_entry.
874 2005-03-23 H.J. Lu <hongjiu.lu@intel.com>
876 * cris-dis.c (print_with_operands): Use ~31L for long instead
879 2005-03-20 H.J. Lu <hongjiu.lu@intel.com>
881 * mmix-opc.c (O): Revert the last change.
884 2005-03-19 H.J. Lu <hongjiu.lu@intel.com>
886 * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
889 2005-03-19 Hans-Peter Nilsson <hp@bitrange.com>
891 * mmix-opc.c (O, Z): Force expression as unsigned long.
893 2005-03-18 Nick Clifton <nickc@redhat.com>
895 * ip2k-asm.c: Regenerate.
896 * op/opcodes.pot: Regenerate.
898 2005-03-16 Nick Clifton <nickc@redhat.com>
899 Ben Elliston <bje@au.ibm.com>
901 * configure.in (werror): New switch: Add -Werror to the
902 compiler command line. Enabled by default. Disable via
904 * configure: Regenerate.
906 2005-03-16 Alan Modra <amodra@bigpond.net.au>
908 * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
911 2005-03-15 Alan Modra <amodra@bigpond.net.au>
913 * po/es.po: Commit new Spanish translation.
915 * po/fr.po: Commit new French translation.
917 2005-03-14 Jan-Benedict Glaw <jbglaw@lug-owl.de>
919 * vax-dis.c: Fix spelling error
920 (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
921 of just "Entry mask: < r1 ... >"
923 2005-03-12 Zack Weinberg <zack@codesourcery.com>
925 * arm-dis.c (arm_opcodes): Document %E and %V.
926 Add entries for v6T2 ARM instructions:
927 bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
928 (print_insn_arm): Add support for %E and %V.
929 (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
931 2005-03-10 Jeff Baker <jbaker@qnx.com>
932 Alan Modra <amodra@bigpond.net.au>
934 * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
935 (powerpc_operands <SPRG>): Call the above. Bit field is 5 bits.
937 (XSPRG_MASK): Mask off extra bits now part of sprg field.
938 (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask. Move
939 mfsprg4..7 after msprg and consolidate.
941 2005-03-09 Jan-Benedict Glaw <jbglaw@lug-owl.de>
943 * vax-dis.c (entry_mask_bit): New array.
944 (print_insn_vax): Decode function entry mask.
946 2005-03-07 Aldy Hernandez <aldyh@redhat.com>
948 * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
950 2005-03-05 Alan Modra <amodra@bigpond.net.au>
952 * po/opcodes.pot: Regenerate.
954 2005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan@codito.com>
956 * arc-dis.c (a4_decoding_class): New enum.
957 (dsmOneArcInst): Use the enum values for the decoding class.
958 Remove redundant case in the switch for decodingClass value 11.
960 2005-03-02 Jan Beulich <jbeulich@novell.com>
962 * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
964 (OP_C): Consider lock prefix in non-64-bit modes.
966 2005-02-24 Alan Modra <amodra@bigpond.net.au>
968 * cris-dis.c (format_hex): Remove ineffective warning fix.
969 * crx-dis.c (make_instruction): Warning fix.
970 * frv-asm.c: Regenerate.
972 2005-02-23 Nick Clifton <nickc@redhat.com>
974 * cgen-dis.in: Use bfd_byte for buffers that are passed to
977 * ia64-opc.c (locate_opcode_ent): Initialise opval array.
979 * crx-dis.c (make_instruction): Move argument structure into inner
980 scope and ensure that all of its fields are initialised before
983 * fr30-asm.c: Regenerate.
984 * fr30-dis.c: Regenerate.
985 * frv-asm.c: Regenerate.
986 * frv-dis.c: Regenerate.
987 * ip2k-asm.c: Regenerate.
988 * ip2k-dis.c: Regenerate.
989 * iq2000-asm.c: Regenerate.
990 * iq2000-dis.c: Regenerate.
991 * m32r-asm.c: Regenerate.
992 * m32r-dis.c: Regenerate.
993 * openrisc-asm.c: Regenerate.
994 * openrisc-dis.c: Regenerate.
995 * xstormy16-asm.c: Regenerate.
996 * xstormy16-dis.c: Regenerate.
998 2005-02-22 Alan Modra <amodra@bigpond.net.au>
1000 * arc-ext.c: Warning fixes.
1001 * arc-ext.h: Likewise.
1002 * cgen-opc.c: Likewise.
1003 * ia64-gen.c: Likewise.
1004 * maxq-dis.c: Likewise.
1005 * ns32k-dis.c: Likewise.
1006 * w65-dis.c: Likewise.
1007 * ia64-asmtab.c: Regenerate.
1009 2005-02-22 Alan Modra <amodra@bigpond.net.au>
1011 * fr30-desc.c: Regenerate.
1012 * fr30-desc.h: Regenerate.
1013 * fr30-opc.c: Regenerate.
1014 * fr30-opc.h: Regenerate.
1015 * frv-desc.c: Regenerate.
1016 * frv-desc.h: Regenerate.
1017 * frv-opc.c: Regenerate.
1018 * frv-opc.h: Regenerate.
1019 * ip2k-desc.c: Regenerate.
1020 * ip2k-desc.h: Regenerate.
1021 * ip2k-opc.c: Regenerate.
1022 * ip2k-opc.h: Regenerate.
1023 * iq2000-desc.c: Regenerate.
1024 * iq2000-desc.h: Regenerate.
1025 * iq2000-opc.c: Regenerate.
1026 * iq2000-opc.h: Regenerate.
1027 * m32r-desc.c: Regenerate.
1028 * m32r-desc.h: Regenerate.
1029 * m32r-opc.c: Regenerate.
1030 * m32r-opc.h: Regenerate.
1031 * m32r-opinst.c: Regenerate.
1032 * openrisc-desc.c: Regenerate.
1033 * openrisc-desc.h: Regenerate.
1034 * openrisc-opc.c: Regenerate.
1035 * openrisc-opc.h: Regenerate.
1036 * xstormy16-desc.c: Regenerate.
1037 * xstormy16-desc.h: Regenerate.
1038 * xstormy16-opc.c: Regenerate.
1039 * xstormy16-opc.h: Regenerate.
1041 2005-02-21 Alan Modra <amodra@bigpond.net.au>
1043 * Makefile.am: Run "make dep-am"
1044 * Makefile.in: Regenerate.
1046 2005-02-15 Nick Clifton <nickc@redhat.com>
1048 * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
1049 compile time warnings.
1050 (print_keyword): Likewise.
1051 (default_print_insn): Likewise.
1053 * fr30-desc.c: Regenerated.
1054 * fr30-desc.h: Regenerated.
1055 * fr30-dis.c: Regenerated.
1056 * fr30-opc.c: Regenerated.
1057 * fr30-opc.h: Regenerated.
1058 * frv-desc.c: Regenerated.
1059 * frv-dis.c: Regenerated.
1060 * frv-opc.c: Regenerated.
1061 * ip2k-asm.c: Regenerated.
1062 * ip2k-desc.c: Regenerated.
1063 * ip2k-desc.h: Regenerated.
1064 * ip2k-dis.c: Regenerated.
1065 * ip2k-opc.c: Regenerated.
1066 * ip2k-opc.h: Regenerated.
1067 * iq2000-desc.c: Regenerated.
1068 * iq2000-dis.c: Regenerated.
1069 * iq2000-opc.c: Regenerated.
1070 * m32r-asm.c: Regenerated.
1071 * m32r-desc.c: Regenerated.
1072 * m32r-desc.h: Regenerated.
1073 * m32r-dis.c: Regenerated.
1074 * m32r-opc.c: Regenerated.
1075 * m32r-opc.h: Regenerated.
1076 * m32r-opinst.c: Regenerated.
1077 * openrisc-desc.c: Regenerated.
1078 * openrisc-desc.h: Regenerated.
1079 * openrisc-dis.c: Regenerated.
1080 * openrisc-opc.c: Regenerated.
1081 * openrisc-opc.h: Regenerated.
1082 * xstormy16-desc.c: Regenerated.
1083 * xstormy16-desc.h: Regenerated.
1084 * xstormy16-dis.c: Regenerated.
1085 * xstormy16-opc.c: Regenerated.
1086 * xstormy16-opc.h: Regenerated.
1088 2005-02-14 H.J. Lu <hongjiu.lu@intel.com>
1090 * dis-buf.c (perror_memory): Use sprintf_vma to print out
1093 2005-02-11 Nick Clifton <nickc@redhat.com>
1095 * iq2000-asm.c: Regenerate.
1097 * frv-dis.c: Regenerate.
1099 2005-02-07 Jim Blandy <jimb@redhat.com>
1101 * Makefile.am (CGEN): Load guile.scm before calling the main
1103 * Makefile.in: Regenerated.
1104 * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
1105 Simply pass the cgen-opc.scm path to ${cgen} as its first
1106 argument; ${cgen} itself now contains the '-s', or whatever is
1107 appropriate for the Scheme being used.
1109 2005-01-31 Andrew Cagney <cagney@gnu.org>
1111 * configure: Regenerate to track ../gettext.m4.
1113 2005-01-31 Jan Beulich <jbeulich@novell.com>
1115 * ia64-gen.c (NELEMS): Define.
1116 (shrink): Generate alias with missing second predicate register when
1117 opcode has two outputs and these are both predicates.
1118 * ia64-opc-i.c (FULL17): Define.
1119 (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
1120 here to generate output template.
1121 (TBITCM, TNATCM): Undefine after use.
1122 * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
1123 first input. Add ld16 aliases without ar.csd as second output. Add
1124 st16 aliases without ar.csd as second input. Add cmpxchg aliases
1125 without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
1126 ar.ccv as third/fourth inputs. Consolidate through...
1127 (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
1128 CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
1129 * ia64-asmtab.c: Regenerate.
1131 2005-01-27 Andrew Cagney <cagney@gnu.org>
1133 * configure: Regenerate to track ../gettext.m4 change.
1135 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
1137 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
1138 * frv-asm.c: Rebuilt.
1139 * frv-desc.c: Rebuilt.
1140 * frv-desc.h: Rebuilt.
1141 * frv-dis.c: Rebuilt.
1142 * frv-ibld.c: Rebuilt.
1143 * frv-opc.c: Rebuilt.
1144 * frv-opc.h: Rebuilt.
1146 2005-01-24 Andrew Cagney <cagney@gnu.org>
1148 * configure: Regenerate, ../gettext.m4 was updated.
1150 2005-01-21 Fred Fish <fnf@specifixinc.com>
1152 * mips-opc.c: Change INSN_ALIAS to INSN2_ALIAS.
1153 Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
1154 Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
1155 * mips-dis.c: Ditto.
1157 2005-01-20 Alan Modra <amodra@bigpond.net.au>
1159 * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
1161 2005-01-19 Fred Fish <fnf@specifixinc.com>
1163 * mips-dis.c (no_aliases): New disassembly option flag.
1164 (set_default_mips_dis_options): Init no_aliases to zero.
1165 (parse_mips_dis_option): Handle no-aliases option.
1166 (print_insn_mips): Ignore table entries that are aliases
1167 if no_aliases is set.
1168 (print_insn_mips16): Ditto.
1169 * mips-opc.c (mips_builtin_opcodes): Add initializer column for
1170 new pinfo2 member and add INSN_ALIAS initializers as needed. Also
1171 move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
1172 * mips16-opc.c (mips16_opcodes): Ditto.
1174 2005-01-17 Andrew Stubbs <andrew.stubbs@st.com>
1176 * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
1177 (inheritance diagram): Add missing edge.
1178 (arch_sh1_up): Rename arch_sh_up to match external name to make life
1179 easier for the testsuite.
1180 (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
1181 (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
1182 (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
1183 arch_sh2a_or_sh4_up child.
1184 (sh_table): Do renaming as above.
1185 Correct comment for ldc.l for gas testsuite to read.
1186 Remove rogue mul.l from sh1 (duplicate of the one for sh2).
1187 Correct comments for movy.w and movy.l for gas testsuite to read.
1188 Correct comments for fmov.d and fmov.s for gas testsuite to read.
1190 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
1192 * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
1194 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
1196 * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
1198 2005-01-10 Andreas Schwab <schwab@suse.de>
1200 * disassemble.c (disassemble_init_for_target) <case
1201 bfd_arch_ia64>: Set skip_zeroes to 16.
1202 <case bfd_arch_tic4x>: Set skip_zeroes to 32.
1204 2004-12-23 Tomer Levi <Tomer.Levi@nsc.com>
1206 * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
1208 2004-12-14 Svein E. Seldal <Svein.Seldal@solidas.com>
1210 * avr-dis.c: Prettyprint. Added printing of symbol names in all
1211 memory references. Convert avr_operand() to C90 formatting.
1213 2004-12-05 Tomer Levi <Tomer.Levi@nsc.com>
1215 * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
1217 2004-11-29 Tomer Levi <Tomer.Levi@nsc.com>
1219 * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
1220 (no_op_insn): Initialize array with instructions that have no
1222 * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
1224 2004-11-29 Richard Earnshaw <rearnsha@arm.com>
1226 * arm-dis.c: Correct top-level comment.
1228 2004-11-27 Richard Earnshaw <rearnsha@arm.com>
1230 * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
1231 architecuture defining the insn.
1232 (arm_opcodes, thumb_opcodes): Delete. Move to ...
1233 * arm-dis.c (arm_opcodes, thumb_opcodes): Here. Add architecutre
1235 Also include opcode/arm.h.
1236 * Makefile.am (arm-dis.lo): Update dependency list.
1237 * Makefile.in: Regenerate.
1239 2004-11-22 Ravi Ramaseshan <ravi.ramaseshan@codito.com>
1241 * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
1242 reflect the change to the short immediate syntax.
1244 2004-11-19 Alan Modra <amodra@bigpond.net.au>
1246 * or32-opc.c (debug): Warning fix.
1247 * po/POTFILES.in: Regenerate.
1249 * maxq-dis.c: Formatting.
1250 (print_insn): Warning fix.
1252 2004-11-17 Daniel Jacobowitz <dan@codesourcery.com>
1254 * arm-dis.c (WORD_ADDRESS): Define.
1255 (print_insn): Use it. Correct big-endian end-of-section handling.
1257 2004-11-08 Inderpreet Singh <inderpreetb@nioda.hcltech.com>
1258 Vineet Sharma <vineets@noida.hcltech.com>
1260 * maxq-dis.c: New file.
1261 * disassemble.c (ARCH_maxq): Define.
1262 (disassembler): Add 'print_insn_maxq_little' for handling maxq
1264 * configure.in: Add case for bfd_maxq_arch.
1265 * configure: Regenerate.
1266 * Makefile.am: Add support for maxq-dis.c
1267 * Makefile.in: Regenerate.
1268 * aclocal.m4: Regenerate.
1270 2004-11-05 Tomer Levi <Tomer.Levi@nsc.com>
1272 * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
1274 * crx-dis.c: Likewise.
1276 2004-11-04 Hans-Peter Nilsson <hp@axis.com>
1278 Generally, handle CRISv32.
1279 * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
1280 (struct cris_disasm_data): New type.
1281 (format_reg, format_hex, cris_constraint, print_flags)
1282 (get_opcode_entry): Add struct cris_disasm_data * parameter. All
1284 (format_sup_reg, print_insn_crisv32_with_register_prefix)
1285 (print_insn_crisv32_without_register_prefix)
1286 (print_insn_crisv10_v32_with_register_prefix)
1287 (print_insn_crisv10_v32_without_register_prefix)
1288 (cris_parse_disassembler_options): New functions.
1289 (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
1290 parameter. All callers changed.
1291 (get_opcode_entry): Call malloc, not xmalloc. Return NULL on
1293 (cris_constraint) <case 'Y', 'U'>: New cases.
1294 (bytes_to_skip): Handle 'Y' and 'N' as 's'. Skip size is 4 bytes
1296 (print_with_operands) <case 'Y'>: New case.
1297 (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
1298 <case 'N', 'Y', 'Q'>: New cases.
1299 (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
1300 (print_insn_cris_with_register_prefix)
1301 (print_insn_cris_without_register_prefix): Call
1302 cris_parse_disassembler_options.
1303 * cris-opc.c (cris_spec_regs): Mention that this table isn't used
1304 for CRISv32 and the size of immediate operands. New v32-only
1305 entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
1306 spc. Add v32-only 4-byte entries for p2, p3, p5 and p6. Change
1307 ccr, ibr, irp to be v0..v10. Change bar, dccr to be v8..v10.
1308 Change brp to be v3..v10.
1309 (cris_support_regs): New vector.
1310 (cris_opcodes): Update head comment. New format characters '[',
1311 ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
1312 Add new opcodes for v32 and adjust existing opcodes to accommodate
1313 differences to earlier variants.
1314 (cris_cond15s): New vector.
1316 2004-11-04 Jan Beulich <jbeulich@novell.com>
1318 * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
1320 (Mp): Use f_mode rather than none at all.
1321 (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
1322 replaces what previously was x_mode; x_mode now means 128-bit SSE
1324 (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
1325 mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
1326 pinsrw's second operand is Edqw.
1327 (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
1328 operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
1329 fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
1330 mode when an operand size override is present or always suffixing.
1331 More instructions will need to be added to this group.
1332 (putop): Handle new macro chars 'C' (short/long suffix selector),
1333 'I' (Intel mode override for following macro char), and 'J' (for
1334 adding the 'l' prefix to far branches in AT&T mode). When an
1335 alternative was specified in the template, honor macro character when
1336 specified for Intel mode.
1337 (OP_E): Handle new *_mode values. Correct pointer specifications for
1338 memory operands. Consolidate output of index register.
1339 (OP_G): Handle new *_mode values.
1340 (OP_I): Handle const_1_mode.
1341 (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
1342 respective opcode prefix bits have been consumed.
1343 (OP_EM, OP_EX): Provide some default handling for generating pointer
1346 2004-10-28 Tomer Levi <Tomer.Levi@nsc.com>
1348 * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
1351 2004-10-27 Tomer Levi <Tomer.Levi@nsc.com>
1353 * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
1354 (getregliststring): Support HI/LO and user registers.
1355 * crx-opc.c (crx_instruction): Update data structure according to the
1356 rearrangement done in CRX opcode header file.
1357 (crx_regtab): Likewise.
1358 (crx_optab): Likewise.
1359 (crx_instruction): Reorder load/stor instructions, remove unsupported
1361 support new Co-Processor instruction 'cpi'.
1363 2004-10-27 Nick Clifton <nickc@redhat.com>
1365 * opcodes/iq2000-asm.c: Regenerate.
1366 * opcodes/iq2000-desc.c: Regenerate.
1367 * opcodes/iq2000-desc.h: Regenerate.
1368 * opcodes/iq2000-dis.c: Regenerate.
1369 * opcodes/iq2000-ibld.c: Regenerate.
1370 * opcodes/iq2000-opc.c: Regenerate.
1371 * opcodes/iq2000-opc.h: Regenerate.
1373 2004-10-21 Tomer Levi <Tomer.Levi@nsc.com>
1375 * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
1376 us4, us5 (respectively).
1377 Remove unsupported 'popa' instruction.
1378 Reverse operands order in store co-processor instructions.
1380 2004-10-15 Alan Modra <amodra@bigpond.net.au>
1382 * Makefile.am: Run "make dep-am"
1383 * Makefile.in: Regenerate.
1385 2004-10-12 Bob Wilson <bob.wilson@acm.org>
1387 * xtensa-dis.c: Use ISO C90 formatting.
1389 2004-10-09 Alan Modra <amodra@bigpond.net.au>
1391 * ppc-opc.c: Revert 2004-09-09 change.
1393 2004-10-07 Bob Wilson <bob.wilson@acm.org>
1395 * xtensa-dis.c (state_names): Delete.
1396 (fetch_data): Use xtensa_isa_maxlength.
1397 (print_xtensa_operand): Replace operand parameter with opcode/operand
1398 pair. Remove print_sr_name parameter. Use new xtensa-isa.h functions.
1399 (print_insn_xtensa): Use new xtensa-isa.h functions. Handle multislot
1400 instruction bundles. Use xmalloc instead of malloc.
1402 2004-10-07 David Gibson <david@gibson.dropbear.id.au>
1404 * ppc-opc.c: Replace literal "0"s with NULLs in pointer
1407 2004-10-07 Tomer Levi <Tomer.Levi@nsc.com>
1409 * crx-opc.c (crx_instruction): Support Co-processor insns.
1410 * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
1411 (getregliststring): Change function to use the above enum.
1412 (print_arg): Handle CO-Processor insns.
1413 (crx_cinvs): Add 'b' option to invalidate the branch-target
1416 2004-10-06 Aldy Hernandez <aldyh@redhat.com>
1418 * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
1419 efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
1420 efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
1421 efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
1422 efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
1424 2004-10-01 Bill Farmer <Bill@the-farmers.freeserve.co.uk>
1426 * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
1429 2004-09-30 Paul Brook <paul@codesourcery.com>
1431 * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
1432 * arm-opc.h: Document %e. Add ARMv6ZK instructions.
1434 2004-09-17 H.J. Lu <hongjiu.lu@intel.com>
1436 * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
1437 (CONFIG_STATUS_DEPENDENCIES): New.
1438 (Makefile): Removed.
1439 (config.status): Likewise.
1440 * Makefile.in: Regenerated.
1442 2004-09-17 Alan Modra <amodra@bigpond.net.au>
1444 * Makefile.am: Run "make dep-am".
1445 * Makefile.in: Regenerate.
1446 * aclocal.m4: Regenerate.
1447 * configure: Regenerate.
1448 * po/POTFILES.in: Regenerate.
1449 * po/opcodes.pot: Regenerate.
1451 2004-09-11 Andreas Schwab <schwab@suse.de>
1453 * configure: Rebuild.
1455 2004-09-09 Segher Boessenkool <segher@kernel.crashing.org>
1457 * ppc-opc.c (L): Make this field not optional.
1459 2004-09-03 Tomer Levi <Tomer.Levi@nsc.com>
1461 * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
1462 Fix parameter to 'm[t|f]csr' insns.
1464 2004-08-30 Nathanael Nerode <neroden@gcc.gnu.org>
1466 * configure.in: Autoupdate to autoconf 2.59.
1467 * aclocal.m4: Rebuild with aclocal 1.4p6.
1468 * configure: Rebuild with autoconf 2.59.
1469 * Makefile.in: Rebuild with automake 1.4p6 (picking up
1470 bfd changes for autoconf 2.59 on the way).
1471 * config.in: Rebuild with autoheader 2.59.
1473 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
1475 * frv-desc.[ch], frv-opc.[ch]: Regenerated.
1477 2004-07-30 Michal Ludvig <mludvig@suse.cz>
1479 * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1480 (GRPPADLCK2): New define.
1481 (twobyte_has_modrm): True for 0xA6.
1482 (grps): GRPPADLCK2 for opcode 0xA6.
1484 2004-07-29 Alexandre Oliva <aoliva@redhat.com>
1486 Introduce SH2a support.
1487 * sh-opc.h (arch_sh2a_base): Renumber.
1488 (arch_sh2a_nofpu_base): Remove.
1489 (arch_sh_base_mask): Adjust.
1490 (arch_opann_mask): New.
1491 (arch_sh2a, arch_sh2a_nofpu): Adjust.
1492 (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1493 (sh_table): Adjust whitespace.
1494 2004-02-24 Corinna Vinschen <vinschen@redhat.com>
1495 * sh-opc.h (arch_sh2a_nofpu_up): New. Use instead of arch_sh2a_up in
1496 instruction list throughout.
1497 (arch_sh2a_up): Redefine to include fpu instruction set. Use instead
1498 of arch_sh2a in instruction list throughout.
1499 (arch_sh2e_up): Accomodate above changes.
1500 (arch_sh2_up): Ditto.
1501 2004-02-20 Corinna Vinschen <vinschen@redhat.com>
1502 * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1503 2004-02-18 Corinna Vinschen <vinschen@redhat.com>
1504 * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1505 * sh-opc.h (arch_sh2a_nofpu): New.
1506 (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1507 (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1509 2004-01-20 DJ Delorie <dj@redhat.com>
1510 * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1511 2003-12-29 DJ Delorie <dj@redhat.com>
1512 * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1513 sh_opcode_info, sh_table): Add sh2a support.
1514 (arch_op32): New, to tag 32-bit opcodes.
1515 * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1516 2003-12-02 Michael Snyder <msnyder@redhat.com>
1517 * sh-opc.h (arch_sh2a): Add.
1518 * sh-dis.c (arch_sh2a): Handle.
1519 * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1521 2004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
1523 * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1525 2004-07-22 Nick Clifton <nickc@redhat.com>
1528 * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1529 insns - this is done by objdump itself.
1530 * h8500-dis.c (print_insn_h8500): Likewise.
1532 2004-07-21 Jan Beulich <jbeulich@novell.com>
1534 * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1535 regardless of address size prefix in effect.
1536 (ptr_reg): Size or address registers does not depend on rex64, but
1537 on the presence of an address size override.
1538 (OP_MMX): Use rex.x only for xmm registers.
1539 (OP_EM): Use rex.z only for xmm registers.
1541 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1543 * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1544 move/branch operations to the bottom so that VR5400 multimedia
1545 instructions take precedence in disassembly.
1547 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1549 * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1550 ISA-specific "break" encoding.
1552 2004-07-13 Elvis Chiang <elvisfb@gmail.com>
1554 * arm-opc.h: Fix typo in comment.
1556 2004-07-11 Andreas Schwab <schwab@suse.de>
1558 * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1560 2004-07-09 Andreas Schwab <schwab@suse.de>
1562 * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1564 2004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
1566 * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1567 (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1568 (crx-dis.lo): New target.
1569 (crx-opc.lo): Likewise.
1570 * Makefile.in: Regenerate.
1571 * configure.in: Handle bfd_crx_arch.
1572 * configure: Regenerate.
1573 * crx-dis.c: New file.
1574 * crx-opc.c: New file.
1575 * disassemble.c (ARCH_crx): Define.
1576 (disassembler): Handle ARCH_crx.
1578 2004-06-29 James E Wilson <wilson@specifixinc.com>
1580 * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1581 * ia64-asmtab.c: Regnerate.
1583 2004-06-28 Alan Modra <amodra@bigpond.net.au>
1585 * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1586 (extract_fxm): Don't test dialect.
1587 (XFXFXM_MASK): Include the power4 bit.
1588 (XFXM): Add p4 param.
1589 (powerpc_opcodes): Add mfocrf and mtocrf. Adjust mtcr.
1591 2004-06-27 Alexandre Oliva <aoliva@redhat.com>
1593 2003-07-21 Richard Sandiford <rsandifo@redhat.com>
1594 * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1596 2004-06-26 Alan Modra <amodra@bigpond.net.au>
1598 * ppc-opc.c (BH, XLBH_MASK): Define.
1599 (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1601 2004-06-24 Alan Modra <amodra@bigpond.net.au>
1603 * i386-dis.c (x_mode): Comment.
1604 (two_source_ops): File scope.
1605 (float_mem): Correct fisttpll and fistpll.
1606 (float_mem_mode): New table.
1608 (OP_E): Correct intel mode PTR output.
1609 (ptr_reg): Use open_char and close_char.
1610 (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for
1611 operands. Set two_source_ops.
1613 2004-06-15 Alan Modra <amodra@bigpond.net.au>
1615 * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1616 instead of _raw_size.
1618 2004-06-08 Jakub Jelinek <jakub@redhat.com>
1620 * ia64-gen.c (in_iclass): Handle more postinc st
1622 * ia64-asmtab.c: Rebuilt.
1624 2004-06-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
1626 * s390-opc.txt: Correct architecture mask for some opcodes.
1627 lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1628 in the esa mode as well.
1630 2004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
1632 * sh-dis.c (target_arch): Make unsigned.
1633 (print_insn_sh): Replace (most of) switch with a call to
1634 sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1635 * sh-opc.h: Redefine architecture flags values.
1636 Add sh3-nommu architecture.
1637 Reorganise <arch>_up macros so they make more visual sense.
1638 (SH_MERGE_ARCH_SET): Define new macro.
1639 (SH_VALID_BASE_ARCH_SET): Likewise.
1640 (SH_VALID_MMU_ARCH_SET): Likewise.
1641 (SH_VALID_CO_ARCH_SET): Likewise.
1642 (SH_VALID_ARCH_SET): Likewise.
1643 (SH_MERGE_ARCH_SET_VALID): Likewise.
1644 (SH_ARCH_SET_HAS_FPU): Likewise.
1645 (SH_ARCH_SET_HAS_DSP): Likewise.
1646 (SH_ARCH_UNKNOWN_ARCH): Likewise.
1647 (sh_get_arch_from_bfd_mach): Add prototype.
1648 (sh_get_arch_up_from_bfd_mach): Likewise.
1649 (sh_get_bfd_mach_from_arch_set): Likewise.
1650 (sh_merge_bfd_arc): Likewise.
1652 2004-05-24 Peter Barada <peter@the-baradas.com>
1654 * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
1655 into new match_insn_m68k function. Loop over canidate
1656 matches and select first that completely matches.
1657 * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1658 * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
1659 to verify addressing for MAC/EMAC.
1660 * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1661 reigster halves since 'fpu' and 'spl' look misleading.
1662 * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1663 * m68k-opc.c: Rearragne mac/emac cases to use longest for
1664 first, tighten up match masks.
1665 * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce
1666 'size' from special case code in print_insn_m68k to
1667 determine decode size of insns.
1669 2004-05-19 Alan Modra <amodra@bigpond.net.au>
1671 * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1672 well as when -mpower4.
1674 2004-05-13 Nick Clifton <nickc@redhat.com>
1676 * po/fr.po: Updated French translation.
1678 2004-05-05 Peter Barada <peter@the-baradas.com>
1680 * m68k-dis.c(print_insn_m68k): Add new chips, use core
1681 variants in arch_mask. Only set m68881/68851 for 68k chips.
1682 * m68k-op.c: Switch from ColdFire chips to core variants.
1684 2004-05-05 Alan Modra <amodra@bigpond.net.au>
1687 * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1689 2004-04-29 Ben Elliston <bje@au.ibm.com>
1691 * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1692 (powerpc_opcodes): Add "dbczl" instruction for PPC970.
1694 2004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp>
1696 * sh-dis.c (print_insn_sh): Print the value in constant pool
1697 as a symbol if it looks like a symbol.
1699 2004-04-22 Peter Barada <peter@the-baradas.com>
1701 * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1702 appropriate ColdFire architectures.
1703 (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1705 Add EMAC instructions, fix MAC instructions. Remove
1706 macmw/macml/msacmw/msacml instructions since mask addressing now
1709 2004-04-20 Jakub Jelinek <jakub@redhat.com>
1711 * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1712 (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1713 suffix. Use fmov*x macros, create all 3 fpsize variants in one
1714 macro. Adjust all users.
1716 2004-04-15 Anil Paranjpe <anilp1@kpitcummins.com>
1718 * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1721 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1723 * m32r-asm.c: Regenerate.
1725 2004-03-29 Stan Shebs <shebs@apple.com>
1727 * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1730 2004-03-19 Alan Modra <amodra@bigpond.net.au>
1732 * aclocal.m4: Regenerate.
1733 * config.in: Regenerate.
1734 * configure: Regenerate.
1735 * po/POTFILES.in: Regenerate.
1736 * po/opcodes.pot: Regenerate.
1738 2004-03-16 Alan Modra <amodra@bigpond.net.au>
1740 * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
1742 * ppc-opc.c (RA0): Define.
1743 (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1744 (RAOPT): Rename from RAO. Update all uses.
1745 (powerpc_opcodes): Use RA0 as appropriate.
1747 2004-03-15 Aldy Hernandez <aldyh@redhat.com>
1749 * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1751 2004-03-15 Alan Modra <amodra@bigpond.net.au>
1753 * sparc-dis.c (print_insn_sparc): Update getword prototype.
1755 2004-03-12 Michal Ludvig <mludvig@suse.cz>
1757 * i386-dis.c (GRPPLOCK): Delete.
1758 (grps): Delete GRPPLOCK entry.
1760 2004-03-12 Alan Modra <amodra@bigpond.net.au>
1762 * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1764 (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1765 (GRPPADLCK): Define.
1766 (dis386): Use NOP_Fixup on "nop".
1767 (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1768 (twobyte_has_modrm): Set for 0xa7.
1769 (padlock_table): Delete. Move to..
1770 (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
1772 (print_insn): Revert PADLOCK_SPECIAL code.
1773 (OP_E): Delete sfence, lfence, mfence checks.
1775 2004-03-12 Jakub Jelinek <jakub@redhat.com>
1777 * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1778 (INVLPG_Fixup): New function.
1779 (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1781 2004-03-12 Michal Ludvig <mludvig@suse.cz>
1783 * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1784 (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1785 (padlock_table): New struct with PadLock instructions.
1786 (print_insn): Handle PADLOCK_SPECIAL.
1788 2004-03-12 Alan Modra <amodra@bigpond.net.au>
1790 * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1791 (OP_E): Twiddle clflush to sfence here.
1793 2004-03-08 Nick Clifton <nickc@redhat.com>
1795 * po/de.po: Updated German translation.
1797 2003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>
1799 * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1800 nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
1801 * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1804 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1806 * frv-asm.c: Regenerate.
1807 * frv-desc.c: Regenerate.
1808 * frv-desc.h: Regenerate.
1809 * frv-dis.c: Regenerate.
1810 * frv-ibld.c: Regenerate.
1811 * frv-opc.c: Regenerate.
1812 * frv-opc.h: Regenerate.
1814 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1816 * frv-desc.c, frv-opc.c: Regenerate.
1818 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1820 * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1822 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1824 * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1825 Also correct mistake in the comment.
1827 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1829 * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1830 ensure that double registers have even numbers.
1831 Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1832 that reserved instruction 0xfffd does not decode the same
1834 * sh-opc.h: Add REG_N_D nibble type and use it whereever
1835 REG_N refers to a double register.
1836 Add REG_N_B01 nibble type and use it instead of REG_NM
1838 Adjust the bit patterns in a few comments.
1840 2004-02-25 Aldy Hernandez <aldyh@redhat.com>
1842 * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1844 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1846 * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1848 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1850 * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1852 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1854 * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1855 mtivor32, mtivor33, mtivor34.
1857 2004-02-19 Aldy Hernandez <aldyh@redhat.com>
1859 * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1861 2004-02-10 Petko Manolov <petkan@nucleusys.com>
1863 * arm-opc.h Maverick accumulator register opcode fixes.
1865 2004-02-13 Ben Elliston <bje@wasabisystems.com>
1867 * m32r-dis.c: Regenerate.
1869 2004-01-27 Michael Snyder <msnyder@redhat.com>
1871 * sh-opc.h (sh_table): "fsrra", not "fssra".
1873 2004-01-23 Andrew Over <andrew.over@cs.anu.edu.au>
1875 * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1878 2004-01-19 Andrew Over <andrew.over@cs.anu.edu.au>
1880 * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1882 2004-01-19 Alan Modra <amodra@bigpond.net.au>
1884 * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1885 1. Don't print scale factor on AT&T mode when index missing.
1887 2004-01-16 Alexandre Oliva <aoliva@redhat.com>
1889 * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1890 when loaded into XR registers.
1892 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
1894 * frv-desc.h: Regenerate.
1895 * frv-desc.c: Regenerate.
1896 * frv-opc.c: Regenerate.
1898 2004-01-13 Michael Snyder <msnyder@redhat.com>
1900 * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1902 2004-01-09 Paul Brook <paul@codesourcery.com>
1904 * arm-opc.h (arm_opcodes): Move generic mcrr after known
1907 2004-01-07 Daniel Jacobowitz <drow@mvista.com>
1909 * Makefile.am (libopcodes_la_DEPENDENCIES)
1910 (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
1911 comment about the problem.
1912 * Makefile.in: Regenerate.
1914 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
1916 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
1917 * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1918 cut&paste errors in shifting/truncating numerical operands.
1919 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1920 * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1921 (parse_uslo16): Likewise.
1922 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1923 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1924 (parse_s12): Likewise.
1925 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1926 * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1927 (parse_uslo16): Likewise.
1928 (parse_uhi16): Parse gothi and gotfuncdeschi.
1929 (parse_d12): Parse got12 and gotfuncdesc12.
1930 (parse_s12): Likewise.
1932 2004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
1934 * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1935 instruction which looks similar to an 'rla' instruction.
1937 For older changes see ChangeLog-0203
1943 version-control: never