| blob | 63aa1cb80fe370ccfc7a72990cdb9b5daadd83ee |
1 Mon Feb 12 17:39:31 CET 2001 Jan Hubicka <jh@suse.cz>
3 * i386.h (i386_optab): SSE integer converison instructions have
4 64bit versions on x86-64.
6 2001-01-24 Karsten Keil <kkeil@suse.de>
8 * i386.h (i386_optab): Fix swapgs
10 2001-01-14 Alan Modra <alan@linuxcare.com.au>
12 * hppa.h: Describe new '<' and '>' operand types, and tidy
13 existing comments.
14 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
15 Remove duplicate "ldw j(s,b),x". Sort some entries.
17 Sat Jan 13 09:56:32 MET 2001 Jan Hubicka <jh@suse.cz>
19 * i386.h (i386_optab): Fix pusha and ret templates.
21 2001-01-11 Peter Targett <peter.targett@arccores.com>
23 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
24 definitions for masking cpu type.
25 (arc_ext_operand_value) New structure for storing extended
26 operands.
27 (ARC_OPERAND_*) Flags for operand values.
29 2001-01-10 Jan Hubicka <jh@suse.cz>
31 * i386.h (pinsrw): Add.
32 (pshufw): Remove.
33 (cvttpd2dq): Fix operands.
34 (cvttps2dq): Likewise.
35 (movq2q): Rename to movdq2q.
37 2001-01-10 Richard Schaal <richard.schaal@intel.com>
39 * i386.h: Correct movnti instruction.
41 2001-01-09 Jeff Johnston <jjohnstn@redhat.com>
43 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
44 of operands (unsigned char or unsigned short).
45 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
46 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
48 2001-01-05 Jan Hubicka <jh@suse.cz>
50 * i386.h (i386_optab): Make [sml]fence template to use immext field.
52 2001-01-03 Jan Hubicka <jh@suse.cz>
54 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
55 introduced by Pentium4
57 2000-12-30 Jan Hubicka <jh@suse.cz>
59 * i386.h (i386_optab): Add "rex*" instructions;
60 add swapgs; disable jmp/call far direct instructions for
61 64bit mode; add syscall and sysret; disable registers for 0xc6
62 template. Add 'q' suffixes to extendable instructions, disable
63 obsolete instructions, add new sign/zero extension ones.
64 (i386_regtab): Add extended registers.
65 (*Suf): Add No_qSuf.
66 (q_Suf, wlq_Suf, bwlq_Suf): New.
68 2000-12-20 Jan Hubicka <jh@suse.cz>
70 * i386.h (i386_optab): Replace "Imm" with "EncImm".
71 (i386_regtab): Add flags field.
73 2000-12-12 Nick Clifton <nickc@redhat.com>
75 * mips.h: Fix formatting.
77 2000-12-01 Chris Demetriou <cgd@sibyte.com>
79 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
80 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
81 OP_*_SYSCALL definitions.
82 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
83 19 bit wait codes.
84 (MIPS operand specifier comments): Remove 'm', add 'U' and
85 'J', and update the meaning of 'B' so that it's more general.
87 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
88 INSN_ISA5): Renumber, redefine to mean the ISA at which the
89 instruction was added.
90 (INSN_ISA32): New constant.
91 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
92 Renumber to avoid new and/or renumbered INSN_* constants.
93 (INSN_MIPS32): Delete.
94 (ISA_UNKNOWN): New constant to indicate unknown ISA.
95 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
96 ISA_MIPS32): New constants, defined to be the mask of INSN_*
97 constants available at that ISA level.
98 (CPU_UNKNOWN): New constant to indicate unknown CPU.
99 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
100 define it with a unique value.
101 (OPCODE_IS_MEMBER): Update for new ISA membership-related
102 constant meanings.
104 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
105 definitions.
107 * mips.h (CPU_SB1): New constant.
109 2000-10-20 Jakub Jelinek <jakub@redhat.com>
111 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
112 Note that '3' is used for siam operand.
114 2000-09-22 Jim Wilson <wilson@cygnus.com>
116 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
118 2000-09-13 Anders Norlander <anorland@acc.umu.se>
120 * mips.h: Use defines instead of hard-coded processor numbers.
121 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
122 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
123 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
124 CPU_4KC, CPU_4KM, CPU_4KP): Define..
125 (OPCODE_IS_MEMBER): Use new defines.
126 (OP_MASK_SEL, OP_SH_SEL): Define.
127 (OP_MASK_CODE20, OP_SH_CODE20): Define.
128 Add 'P' to used characters.
129 Use 'H' for coprocessor select field.
130 Use 'm' for 20 bit breakpoint code.
131 Document new arg characters and add to used characters.
132 (INSN_MIPS32): New define for MIPS32 extensions.
133 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
135 2000-09-05 Alan Modra <alan@linuxcare.com.au>
137 * hppa.h: Mention cz completer.
139 2000-08-16 Jim Wilson <wilson@cygnus.com>
141 * ia64.h (IA64_OPCODE_POSTINC): New.
143 2000-08-15 H.J. Lu <hjl@gnu.org>
145 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
146 IgnoreSize change.
148 2000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
150 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
151 Move related opcodes closer to each other.
152 Minor changes in comments, list undefined opcodes.
154 2000-07-26 Dave Brolley <brolley@redhat.com>
156 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
158 2000-07-20 Hans-Peter Nilsson <hp@axis.com>
160 cris.h: New file.
162 2000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
164 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
165 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
166 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
167 (AVR_ISA_M83): Define for ATmega83, ATmega85.
168 (espm): Remove, because ESPM removed in databook update.
169 (eicall, eijmp): Move to the end of opcode table.
171 2000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
173 * m68hc11.h: New file for support of Motorola 68hc11.
175 Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
177 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
179 Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
181 * avr.h: New file with AVR opcodes.
183 Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
185 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
187 2000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
189 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
191 2000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
193 * i386.h: Use sl_FP, not sl_Suf for fild.
195 2000-05-16 Frank Ch. Eigler <fche@redhat.com>
197 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
198 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
199 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
200 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
202 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
204 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
206 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
207 Alexander Sokolov <robocop@netlink.ru>
209 * i386.h (i386_optab): Add cpu_flags for all instructions.
211 2000-05-13 Alan Modra <alan@linuxcare.com.au>
213 From Gavin Romig-Koch <gavin@cygnus.com>
214 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
216 2000-05-04 Timothy Wall <twall@cygnus.com>
218 * tic54x.h: New.
220 2000-05-03 J.T. Conklin <jtc@redback.com>
222 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
223 (PPC_OPERAND_VR): New operand flag for vector registers.
225 2000-05-01 Kazu Hirata <kazu@hxi.com>
227 * h8300.h (EOP): Add missing initializer.
229 Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
231 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
232 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
233 New operand types l,y,&,fe,fE,fx added to support above forms.
234 (pa_opcodes): Replaced usage of 'x' as source/target for
235 floating point double-word loads/stores with 'fx'.
237 Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
238 David Mosberger <davidm@hpl.hp.com>
239 Timothy Wall <twall@cygnus.com>
240 Jim Wilson <wilson@cygnus.com>
242 * ia64.h: New file.
244 2000-03-27 Nick Clifton <nickc@cygnus.com>
246 * d30v.h (SHORT_A1): Fix value.
247 (SHORT_AR): Renumber so that it is at the end of the list of short
248 instructions, not the end of the list of long instructions.
250 2000-03-26 Alan Modra <alan@linuxcare.com>
252 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
253 problem isn't really specific to Unixware.
254 (OLDGCC_COMPAT): Define.
255 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
256 destination %st(0).
257 Fix lots of comments.
259 2000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
261 * d30v.h:
262 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
263 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
264 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
265 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
266 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
267 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
268 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
270 2000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
272 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
273 fistpd without suffix.
275 2000-02-24 Nick Clifton <nickc@cygnus.com>
277 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
278 'signed_overflow_ok_p'.
279 Delete prototypes for cgen_set_flags() and cgen_get_flags().
281 2000-02-24 Andrew Haley <aph@cygnus.com>
283 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
284 (CGEN_CPU_TABLE): flags: new field.
285 Add prototypes for new functions.
287 2000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
289 * i386.h: Add some more UNIXWARE_COMPAT comments.
291 2000-02-23 Linas Vepstas <linas@linas.org>
293 * i370.h: New file.
295 2000-02-22 Andrew Haley <aph@cygnus.com>
297 * mips.h: (OPCODE_IS_MEMBER): Add comment.
299 1999-12-30 Andrew Haley <aph@cygnus.com>
301 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
302 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
303 insns.
305 2000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
307 * i386.h: Qualify intel mode far call and jmp with x_Suf.
309 1999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
311 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
312 indirect jumps and calls. Add FF/3 call for intel mode.
314 Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
316 * mn10300.h: Add new operand types. Add new instruction formats.
318 Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
320 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
321 instruction.
323 1999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
325 * mips.h (INSN_ISA5): New.
327 1999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
329 * mips.h (OPCODE_IS_MEMBER): New.
331 1999-10-29 Nick Clifton <nickc@cygnus.com>
333 * d30v.h (SHORT_AR): Define.
335 1999-10-18 Michael Meissner <meissner@cygnus.com>
337 * alpha.h (alpha_num_opcodes): Convert to unsigned.
338 (alpha_num_operands): Ditto.
340 Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
342 * hppa.h (pa_opcodes): Add load and store cache control to
343 instructions. Add ordered access load and store.
345 * hppa.h (pa_opcode): Add new entries for addb and addib.
347 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
349 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
351 Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
353 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
355 Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
357 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
358 and "be" using completer prefixes.
360 * hppa.h (pa_opcodes): Add initializers to silence compiler.
362 * hppa.h: Update comments about character usage.
364 Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
366 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
367 up the new fstw & bve instructions.
369 Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
371 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
372 instructions.
374 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
376 * hppa.h (pa_opcodes): Add long offset double word load/store
377 instructions.
379 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
380 stores.
382 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
384 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
386 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
388 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
390 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
392 * hppa.h (pa_opcodes): Add support for "b,l".
394 * hppa.h (pa_opcodes): Add support for "b,gate".
396 Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
398 * hppa.h (pa_opcodes): Use 'fX' for first register operand
399 in xmpyu.
401 * hppa.h (pa_opcodes): Fix mask for probe and probei.
403 * hppa.h (pa_opcodes): Fix mask for depwi.
405 Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
407 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
408 an explicit output argument.
410 Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
412 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
413 Add a few PA2.0 loads and store variants.
415 1999-09-04 Steve Chamberlain <sac@pobox.com>
417 * pj.h: New file.
419 1999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
421 * i386.h (i386_regtab): Move %st to top of table, and split off
422 other fp reg entries.
423 (i386_float_regtab): To here.
425 Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
427 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
428 by 'f'.
430 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
431 Add supporting args.
433 * hppa.h: Document new completers and args.
434 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
435 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
436 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
437 pmenb and pmdis.
439 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
440 hshr, hsub, mixh, mixw, permh.
442 * hppa.h (pa_opcodes): Change completers in instructions to
443 use 'c' prefix.
445 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
446 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
448 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
449 fnegabs to use 'I' instead of 'F'.
451 1999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
453 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
454 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
455 Alphabetically sort PIII insns.
457 Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
459 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
461 Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
463 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
464 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
466 * hppa.h: Document 64 bit condition completers.
468 Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
470 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
472 1999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
474 * i386.h (i386_optab): Add DefaultSize modifier to all insns
475 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
476 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
478 Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
479 Jeff Law <law@cygnus.com>
481 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
483 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
485 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
486 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
488 1999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
490 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
492 Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
494 * hppa.h (struct pa_opcode): Add new field "flags".
495 (FLAGS_STRICT): Define.
497 Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
498 Jeff Law <law@cygnus.com>
500 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
502 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
504 1999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
506 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
507 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
508 flag to fcomi and friends.
510 Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
512 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
513 integer logical instructions.
515 1999-05-28 Linus Nordberg <linus.nordberg@canit.se>
517 * m68k.h: Document new formats `E', `G', `H' and new places `N',
518 `n', `o'.
520 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
521 and new places `m', `M', `h'.
523 Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
525 * hppa.h (pa_opcodes): Add several processor specific system
526 instructions.
528 Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
530 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
531 "addb", and "addib" to be used by the disassembler.
533 1999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
535 * i386.h (ReverseModrm): Remove all occurences.
536 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
537 movmskps, pextrw, pmovmskb, maskmovq.
538 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
539 ignore the data size prefix.
541 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
542 Mostly stolen from Doug Ledford <dledford@redhat.com>
544 Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
546 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
548 1999-04-14 Doug Evans <devans@casey.cygnus.com>
550 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
551 (CGEN_ATTR_TYPE): Update.
552 (CGEN_ATTR_MASK): Number booleans starting at 0.
553 (CGEN_ATTR_VALUE): Update.
554 (CGEN_INSN_ATTR): Update.
556 Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
558 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
559 instructions.
561 Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
563 * hppa.h (bb, bvb): Tweak opcode/mask.
566 1999-03-22 Doug Evans <devans@casey.cygnus.com>
568 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
569 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
570 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
571 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
572 Delete member max_insn_size.
573 (enum cgen_cpu_open_arg): New enum.
574 (cpu_open): Update prototype.
575 (cpu_open_1): Declare.
576 (cgen_set_cpu): Delete.
578 1999-03-11 Doug Evans <devans@casey.cygnus.com>
580 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
581 (CGEN_OPERAND_NIL): New macro.
582 (CGEN_OPERAND): New member `type'.
583 (@arch@_cgen_operand_table): Delete decl.
584 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
585 (CGEN_OPERAND_TABLE): New struct.
586 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
587 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
588 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
589 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
590 {get,set}_{int,vma}_operand.
591 (@arch@_cgen_cpu_open): New arg `isa'.
592 (cgen_set_cpu): Ditto.
594 Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
596 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
598 1999-02-25 Doug Evans <devans@casey.cygnus.com>
600 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
601 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
602 enum cgen_hw_type.
603 (CGEN_HW_TABLE): New struct.
604 (hw_table): Delete declaration.
605 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
606 to table entry to enum.
607 (CGEN_OPINST): Ditto.
608 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
610 Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
612 * alpha.h (AXP_OPCODE_EV6): New.
613 (AXP_OPCODE_NOPAL): Include it.
615 1999-02-09 Doug Evans <devans@casey.cygnus.com>
617 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
618 All uses updated. New members int_insn_p, max_insn_size,
619 parse_operand,insert_operand,extract_operand,print_operand,
620 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
621 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
622 extract_handlers,print_handlers.
623 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
624 (CGEN_ATTR_BOOL_OFFSET): New macro.
625 (CGEN_ATTR_MASK): Subtract it to compute bit number.
626 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
627 (cgen_opcode_handler): Renamed from cgen_base.
628 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
629 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
630 all uses updated.
631 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
632 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
633 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
634 (CGEN_OPCODE,CGEN_IBASE): New types.
635 (CGEN_INSN): Rewrite.
636 (CGEN_{ASM,DIS}_HASH*): Delete.
637 (init_opcode_table,init_ibld_table): Declare.
638 (CGEN_INSN_ATTR): New type.
640 Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
642 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
643 (x_FP, d_FP, dls_FP, sldx_FP): Define.
644 Change *Suf definitions to include x and d suffixes.
645 (movsx): Use w_Suf and b_Suf.
646 (movzx): Likewise.
647 (movs): Use bwld_Suf.
648 (fld): Change ordering. Use sld_FP.
649 (fild): Add Intel Syntax equivalent of fildq.
650 (fst): Use sld_FP.
651 (fist): Use sld_FP.
652 (fstp): Use sld_FP. Add x_FP version.
653 (fistp): LLongMem version for Intel Syntax.
654 (fcom, fcomp): Use sld_FP.
655 (fadd, fiadd, fsub): Use sld_FP.
656 (fsubr): Use sld_FP.
657 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
659 1999-01-27 Doug Evans <devans@casey.cygnus.com>
661 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
662 CGEN_MODE_UINT.
664 Sat Jan 16 01:29:25 1999 Jeffrey A Law (law@cygnus.com)
666 * hppa.h (bv): Fix mask.
668 1999-01-05 Doug Evans <devans@casey.cygnus.com>
670 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
671 (CGEN_ATTR): Use it.
672 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
673 (CGEN_ATTR_TABLE): New member dfault.
675 1998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
677 * mips.h (MIPS16_INSN_BRANCH): New.
679 Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
681 The following is part of a change made by Edith Epstein
682 <eepstein@sophia.cygnus.com> as part of a project to merge in
683 changes by HP; HP did not create ChangeLog entries.
685 * hppa.h (completer_chars): list of chars to not put a space
686 after.
688 Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
690 * i386.h (i386_optab): Permit w suffix on processor control and
691 status word instructions.
693 1998-11-30 Doug Evans <devans@casey.cygnus.com>
695 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
696 (struct cgen_keyword_entry): Ditto.
697 (struct cgen_operand): Ditto.
698 (CGEN_IFLD): New typedef, with associated access macros.
699 (CGEN_IFMT): New typedef, with associated access macros.
700 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
701 (CGEN_IVALUE): New typedef.
702 (struct cgen_insn): Delete const on syntax,attrs members.
703 `format' now points to format data. Type of `value' is now
704 CGEN_IVALUE.
705 (struct cgen_opcode_table): New member ifld_table.
707 1998-11-18 Doug Evans <devans@casey.cygnus.com>
709 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
710 (CGEN_OPERAND_INSTANCE): New member `attrs'.
711 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
712 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
713 (cgen_opcode_table): Update type of dis_hash fn.
714 (extract_operand): Update type of `insn_value' arg.
716 Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
718 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
720 Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
722 * mips.h (INSN_MULT): Added.
724 Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
726 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
728 Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
730 * cgen.h (CGEN_INSN_INT): New typedef.
731 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
732 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
733 (CGEN_INSN_BYTES_PTR): New typedef.
734 (CGEN_EXTRACT_INFO): New typedef.
735 (cgen_insert_fn,cgen_extract_fn): Update.
736 (cgen_opcode_table): New member `insn_endian'.
737 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
738 (insert_operand,extract_operand): Update.
739 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
741 Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
743 * cgen.h (CGEN_ATTR_BOOLS): New macro.
744 (struct CGEN_HW_ENTRY): New member `attrs'.
745 (CGEN_HW_ATTR): New macro.
746 (struct CGEN_OPERAND_INSTANCE): New member `name'.
747 (CGEN_INSN_INVALID_P): New macro.
749 Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
751 * hppa.h: Add "fid".
753 Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
755 From Robert Andrew Dale <rob@nb.net>
756 * i386.h (i386_optab): Add AMD 3DNow! instructions.
757 (AMD_3DNOW_OPCODE): Define.
759 Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
761 * d30v.h (EITHER_BUT_PREFER_MU): Define.
763 Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
765 * cgen.h (cgen_insn): #if 0 out element `cdx'.
767 Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
769 Move all global state data into opcode table struct, and treat
770 opcode table as something that is "opened/closed".
771 * cgen.h (CGEN_OPCODE_DESC): New type.
772 (all fns): New first arg of opcode table descriptor.
773 (cgen_set_parse_operand_fn): Add prototype.
774 (cgen_current_machine,cgen_current_endian): Delete.
775 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
776 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
777 dis_hash_table,dis_hash_table_entries.
778 (opcode_open,opcode_close): Add prototypes.
780 * cgen.h (cgen_insn): New element `cdx'.
782 Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
784 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
786 Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
788 * mn10300.h: Add "no_match_operands" field for instructions.
789 (MN10300_MAX_OPERANDS): Define.
791 Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
793 * cgen.h (cgen_macro_insn_count): Declare.
795 Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
797 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
798 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
799 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
800 set_{int,vma}_operand.
802 Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
804 * mn10300.h: Add "machine" field for instructions.
805 (MN103, AM30): Define machine types.
807 Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
809 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
811 1998-06-18 Ulrich Drepper <drepper@cygnus.com>
813 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
815 Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
817 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
818 and ud2b.
819 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
820 those that happen to be implemented on pentiums.
822 Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
824 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
825 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
826 with Size16|IgnoreSize or Size32|IgnoreSize.
828 Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
830 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
831 (REPE): Rename to REPE_PREFIX_OPCODE.
832 (i386_regtab_end): Remove.
833 (i386_prefixtab, i386_prefixtab_end): Remove.
834 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
835 of md_begin.
836 (MAX_OPCODE_SIZE): Define.
837 (i386_optab_end): Remove.
838 (sl_Suf): Define.
839 (sl_FP): Use sl_Suf.
841 * i386.h (i386_optab): Allow 16 bit displacement for `mov
842 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
843 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
844 data32, dword, and adword prefixes.
845 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
846 regs.
848 Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
850 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
852 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
853 register operands, because this is a common idiom. Flag them with
854 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
855 fdivrp because gcc erroneously generates them. Also flag with a
856 warning.
858 * i386.h: Add suffix modifiers to most insns, and tighter operand
859 checks in some cases. Fix a number of UnixWare compatibility
860 issues with float insns. Merge some floating point opcodes, using
861 new FloatMF modifier.
862 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
863 consistency.
865 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
866 IgnoreDataSize where appropriate.
868 Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
870 * i386.h: (one_byte_segment_defaults): Remove.
871 (two_byte_segment_defaults): Remove.
872 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
874 Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
876 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
877 (cgen_hw_lookup_by_num): Declare.
879 Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
881 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
882 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
884 Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
886 * cgen.h (cgen_asm_init_parse): Delete.
887 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
888 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
890 Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
892 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
893 (cgen_asm_finish_insn): Update prototype.
894 (cgen_insn): New members num, data.
895 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
896 dis_hash, dis_hash_table_size moved to ...
897 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
898 All uses updated. New members asm_hash_p, dis_hash_p.
899 (CGEN_MINSN_EXPANSION): New struct.
900 (cgen_expand_macro_insn): Declare.
901 (cgen_macro_insn_count): Declare.
902 (get_insn_operands): Update prototype.
903 (lookup_get_insn_operands): Declare.
905 Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
907 * i386.h (i386_optab): Change iclrKludge and imulKludge to
908 regKludge. Add operands types for string instructions.
910 Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
912 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
913 table.
915 Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
917 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
918 for `gettext'.
920 Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
922 * i386.h: Remove NoModrm flag from all insns: it's never checked.
923 Add IsString flag to string instructions.
924 (IS_STRING): Don't define.
925 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
926 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
927 (SS_PREFIX_OPCODE): Define.
929 Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
931 * i386.h: Revert March 24 patch; no more LinearAddress.
933 Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
935 * i386.h (i386_optab): Remove fwait (9b) from all floating point
936 instructions, and instead add FWait opcode modifier. Add short
937 form of fldenv and fstenv.
938 (FWAIT_OPCODE): Define.
940 * i386.h (i386_optab): Change second operand constraint of `mov
941 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
942 allow legal instructions such as `movl %gs,%esi'
944 Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
946 * h8300.h: Various changes to fully bracket initializers.
948 Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
950 * i386.h: Set LinearAddress for lidt and lgdt.
952 Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
954 * cgen.h (CGEN_BOOL_ATTR): New macro.
956 Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
958 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
960 Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
962 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
963 (cgen_insn): Record syntax and format entries here, rather than
964 separately.
966 Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
968 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
970 Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
972 * cgen.h (cgen_insert_fn): Change type of result to const char *.
973 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
974 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
976 Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
978 * cgen.h (lookup_insn): New argument alias_p.
980 Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
982 Fix rac to accept only a0:
983 * d10v.h (OPERAND_ACC): Split into:
984 (OPERAND_ACC0, OPERAND_ACC1) .
985 (OPERAND_GPR): Define.
987 Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
989 * cgen.h (CGEN_FIELDS): Define here.
990 (CGEN_HW_ENTRY): New member `type'.
991 (hw_list): Delete decl.
992 (enum cgen_mode): Declare.
993 (CGEN_OPERAND): New member `hw'.
994 (enum cgen_operand_instance_type): Declare.
995 (CGEN_OPERAND_INSTANCE): New type.
996 (CGEN_INSN): New member `operands'.
997 (CGEN_OPCODE_DATA): Make hw_list const.
998 (get_insn_operands,lookup_insn): Add prototypes for.
1000 Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1002 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1003 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1004 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1005 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1007 Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1009 * cgen.h: Correct typo in comment end marker.
1011 Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1013 * tic30.h: New file.
1015 Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
1017 * cgen.h: Add prototypes for cgen_save_fixups(),
1018 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1019 of cgen_asm_finish_insn() to return a char *.
1021 Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1023 * cgen.h: Formatting changes to improve readability.
1025 Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1027 * cgen.h (*): Clean up pass over `struct foo' usage.
1028 (CGEN_ATTR): Make unsigned char.
1029 (CGEN_ATTR_TYPE): Update.
1030 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1031 (cgen_base): Move member `attrs' to cgen_insn.
1032 (CGEN_KEYWORD): New member `null_entry'.
1033 (CGEN_{SYNTAX,FORMAT}): New types.
1034 (cgen_insn): Format and syntax separated from each other.
1036 Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1038 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1039 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1040 flags_{used,set} long.
1041 (d30v_operand): Make flags field long.
1043 Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1045 * m68k.h: Fix comment describing operand types.
1047 Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1049 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1050 everything else after down.
1052 Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1054 * d10v.h (OPERAND_FLAG): Split into:
1055 (OPERAND_FFLAG, OPERAND_CFLAG) .
1057 Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1059 * mips.h (struct mips_opcode): Changed comments to reflect new
1060 field usage.
1062 Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1064 * mips.h: Added to comments a quick-ref list of all assigned
1065 operand type characters.
1066 (OP_{MASK,SH}_PERFREG): New macros.
1068 Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1070 * sparc.h: Add '_' and '/' for v9a asr's.
1071 Patch from David Miller <davem@vger.rutgers.edu>
1073 Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1075 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1076 area are not available in the base model (H8/300).
1078 Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1080 * m68k.h: Remove documentation of ` operand specifier.
1082 Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1084 * m68k.h: Document q and v operand specifiers.
1086 Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1088 * v850.h (struct v850_opcode): Add processors field.
1089 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1090 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1091 (PROCESSOR_V850EA): New bit constants.
1093 Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1095 Merge changes from Martin Hunt:
1097 * d30v.h: Allow up to 64 control registers. Add
1098 SHORT_A5S format.
1100 * d30v.h (LONG_Db): New form for delayed branches.
1102 * d30v.h: (LONG_Db): New form for repeati.
1104 * d30v.h (SHORT_D2B): New form.
1106 * d30v.h (SHORT_A2): New form.
1108 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1109 registers are used. Needed for VLIW optimization.
1111 Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1113 * cgen.h: Move assembler interface section
1114 up so cgen_parse_operand_result is defined for cgen_parse_address.
1115 (cgen_parse_address): Update prototype.
1117 Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1119 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1121 Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1123 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1124 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1125 <paubert@iram.es>.
1127 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1128 <paubert@iram.es>.
1130 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1131 <paubert@iram.es>.
1133 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1134 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1136 Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1138 * v850.h (V850_NOT_R0): New flag.
1140 Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1142 * v850.h (struct v850_opcode): Remove flags field.
1144 Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1146 * v850.h (struct v850_opcode): Add flags field.
1147 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1148 fields.
1149 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1150 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1152 Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1154 * arc.h: New file.
1156 Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1158 * sparc.h (sparc_opcodes): Declare as const.
1160 Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1162 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1163 uses single or double precision floating point resources.
1164 (INSN_NO_ISA, INSN_ISA1): Define.
1165 (cpu specific INSN macros): Tweak into bitmasks outside the range
1166 of INSN_ISA field.
1168 Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1170 * i386.h: Fix pand opcode.
1172 Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1174 * mips.h: Widen INSN_ISA and move it to a more convenient
1175 bit position. Add INSN_3900.
1177 Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1179 * mips.h (struct mips_opcode): added new field membership.
1181 Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1183 * i386.h (movd): only Reg32 is allowed.
1185 * i386.h: add fcomp and ud2. From Wayne Scott
1186 <wscott@ichips.intel.com>.
1188 Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1190 * i386.h: Add MMX instructions.
1192 Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1194 * i386.h: Remove W modifier from conditional move instructions.
1196 Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1198 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1199 with no arguments to match that generated by the UnixWare
1200 assembler.
1202 Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1204 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1205 (cgen_parse_operand_fn): Declare.
1206 (cgen_init_parse_operand): Declare.
1207 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1208 new argument `want'.
1209 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1210 (enum cgen_parse_operand_type): New enum.
1212 Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1214 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1216 Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1218 * cgen.h: New file.
1220 Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1222 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1223 fdivrp.
1225 Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1227 * v850.h (extract): Make unsigned.
1229 Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1231 * i386.h: Add iclr.
1233 Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1235 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1236 take a direction bit.
1238 Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1240 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1242 Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1244 * sparc.h: Include <ansidecl.h>. Update function declarations to
1245 use prototypes, and to use const when appropriate.
1247 Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1249 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1251 Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1253 * d10v.h: Change pre_defined_registers to
1254 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1256 Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1258 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1259 Change mips_opcodes from const array to a pointer,
1260 and change bfd_mips_num_opcodes from const int to int,
1261 so that we can increase the size of the mips opcodes table
1262 dynamically.
1264 Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1266 * d30v.h (FLAG_X): Remove unused flag.
1268 Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1270 * d30v.h: New file.
1272 Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1274 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1275 (PDS_VALUE): Macro to access value field of predefined symbols.
1276 (tic80_next_predefined_symbol): Add prototype.
1278 Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1280 * tic80.h (tic80_symbol_to_value): Change prototype to match
1281 change in function, added class parameter.
1283 Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1285 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1286 endmask fields, which are somewhat weird in that 0 and 32 are
1287 treated exactly the same.
1289 Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1291 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1292 rather than a constant that is 2**X. Reorder them to put bits for
1293 operands that have symbolic names in the upper bits, so they can
1294 be packed into an int where the lower bits contain the value that
1295 corresponds to that symbolic name.
1296 (predefined_symbo): Add struct.
1297 (tic80_predefined_symbols): Declare array of translations.
1298 (tic80_num_predefined_symbols): Declare size of that array.
1299 (tic80_value_to_symbol): Declare function.
1300 (tic80_symbol_to_value): Declare function.
1302 Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1304 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1306 Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1308 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1309 be the destination register.
1311 Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1313 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1314 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1315 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1316 that the opcode can have two vector instructions in a single
1317 32 bit word and we have to encode/decode both.
1319 Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1321 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1322 TIC80_OPERAND_RELATIVE for PC relative.
1323 (TIC80_OPERAND_BASEREL): New flag bit for register
1324 base relative.
1326 Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1328 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1330 Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1332 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1333 ":s" modifier for scaling.
1335 Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1337 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1338 (TIC80_OPERAND_M_LI): Ditto
1340 Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1342 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1343 (TIC80_OPERAND_CC): New define for condition code operand.
1344 (TIC80_OPERAND_CR): New define for control register operand.
1346 Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1348 * tic80.h (struct tic80_opcode): Name changed.
1349 (struct tic80_opcode): Remove format field.
1350 (struct tic80_operand): Add insertion and extraction functions.
1351 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1352 correct ones.
1353 (FMT_*): Ditto.
1355 Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1357 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1358 type IV instruction offsets.
1360 Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1362 * tic80.h: New file.
1364 Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1366 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1368 Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1370 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1371 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1372 * v850.h: Fix comment, v850_operand not powerpc_operand.
1374 Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1376 * mn10200.h: Flesh out structures and definitions needed by
1377 the mn10200 assembler & disassembler.
1379 Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1381 * mips.h: Add mips16 definitions.
1383 Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1385 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1387 Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1389 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1390 (MN10300_OPERAND_MEMADDR): Define.
1392 Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1394 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1396 Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1398 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1400 Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1402 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1404 Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1406 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1408 Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1410 * alpha.h: Don't include "bfd.h"; private relocation types are now
1411 negative to minimize problems with shared libraries. Organize
1412 instruction subsets by AMASK extensions and PALcode
1413 implementation.
1414 (struct alpha_operand): Move flags slot for better packing.
1416 Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1418 * v850.h (V850_OPERAND_RELAX): New operand flag.
1420 Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1422 * mn10300.h (FMT_*): Move operand format definitions
1423 here.
1425 Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1427 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1429 Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1431 * mn10300.h (mn10300_opcode): Add "format" field.
1432 (MN10300_OPERAND_*): Define.
1434 Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1436 * mn10x00.h: Delete.
1437 * mn10200.h, mn10300.h: New files.
1439 Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1441 * mn10x00.h: New file.
1443 Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1445 * v850.h: Add new flag to indicate this instruction uses a PC
1446 displacement.
1448 Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1450 * h8300.h (stmac): Add missing instruction.
1452 Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1454 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1455 field.
1457 Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1459 * v850.h (V850_OPERAND_EP): Define.
1461 * v850.h (v850_opcode): Add size field.
1463 Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1465 * v850.h (v850_operands): Add insert and extract fields, pointers
1466 to functions used to handle unusual operand encoding.
1467 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1468 V850_OPERAND_SIGNED): Defined.
1470 Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1472 * v850.h (v850_operands): Add flags field.
1473 (OPERAND_REG, OPERAND_NUM): Defined.
1475 Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1477 * v850.h: New file.
1479 Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1481 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1482 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1483 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1484 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1485 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1486 Defined.
1488 Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1490 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1491 a 3 bit space id instead of a 2 bit space id.
1493 Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1495 * d10v.h: Add some additional defines to support the
1496 assembler in determining which operations can be done in parallel.
1498 Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1500 * h8300.h (SN): Define.
1501 (eepmov.b): Renamed from "eepmov"
1502 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1503 with them.
1505 Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1507 * d10v.h (OPERAND_SHIFT): New operand flag.
1509 Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1511 * d10v.h: Changes for divs, parallel-only instructions, and
1512 signed numbers.
1514 Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1516 * d10v.h (pd_reg): Define. Putting the definition here allows
1517 the assembler and disassembler to share the same struct.
1519 Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1521 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1522 Williams <steve@icarus.com>.
1524 Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1526 * d10v.h: New file.
1528 Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1530 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1532 Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1534 * m68k.h (mcf5200): New macro.
1535 Document names of coldfire control registers.
1537 Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1539 * h8300.h (SRC_IN_DST): Define.
1541 * h8300.h (UNOP3): Mark the register operand in this insn
1542 as a source operand, not a destination operand.
1543 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1544 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1545 register operand with SRC_IN_DST.
1547 Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1549 * alpha.h: New file.
1551 Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1553 * rs6k.h: Remove obsolete file.
1555 Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1557 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1558 fdivp, and fdivrp. Add ffreep.
1560 Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1562 * h8300.h: Reorder various #defines for readability.
1563 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1564 (BITOP): Accept additional (unused) argument. All callers changed.
1565 (EBITOP): Likewise.
1566 (O_LAST): Bump.
1567 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1569 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1570 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1571 (BITOP, EBITOP): Handle new H8/S addressing modes for
1572 bit insns.
1573 (UNOP3): Handle new shift/rotate insns on the H8/S.
1574 (insns using exr): New instructions.
1575 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1577 Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1579 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1580 was incorrect.
1582 Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1584 * h8300.h (START): Remove.
1585 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1586 and mov.l insns that can be relaxed.
1588 Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1590 * i386.h: Remove Abs32 from lcall.
1592 Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1594 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1595 (SLCPOP): New macro.
1596 Mark X,Y opcode letters as in use.
1598 Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1600 * sparc.h (F_FLOAT, F_FBR): Define.
1602 Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1604 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1605 from all insns.
1606 (ABS8SRC,ABS8DST): Add ABS8MEM.
1607 (add.l): Fix reg+reg variant.
1608 (eepmov.w): Renamed from eepmovw.
1609 (ldc,stc): Fix many cases.
1611 Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1613 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1615 Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1617 * sparc.h (O): Mark operand letter as in use.
1619 Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1621 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1622 Mark operand letters uU as in use.
1624 Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1626 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1627 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1628 (SPARC_OPCODE_SUPPORTED): New macro.
1629 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1630 (F_NOTV9): Delete.
1632 Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1634 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1635 declaration consistent with return type in definition.
1637 Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1639 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1641 Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1643 * i386.h (i386_regtab): Add 80486 test registers.
1645 Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1647 * i960.h (I_HX): Define.
1648 (i960_opcodes): Add HX instruction.
1650 Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1652 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1653 and fclex.
1655 Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1657 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1658 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1659 (bfd_* defines): Delete.
1660 (sparc_opcode_archs): Replaces architecture_pname.
1661 (sparc_opcode_lookup_arch): Declare.
1662 (NUMOPCODES): Delete.
1664 Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1666 * sparc.h (enum sparc_architecture): Add v9a.
1667 (ARCHITECTURES_CONFLICT_P): Update.
1669 Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1671 * i386.h: Added Pentium Pro instructions.
1673 Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1675 * m68k.h: Document new 'W' operand place.
1677 Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1679 * hppa.h: Add lci and syncdma instructions.
1681 Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1683 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1684 instructions.
1686 Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1688 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1689 assembler's -mcom and -many switches.
1691 Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1693 * i386.h: Fix cmpxchg8b extension opcode description.
1695 Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1697 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1698 and register cr4.
1700 Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1702 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1704 Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1706 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1708 Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1710 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1712 Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1714 * m68kmri.h: Remove.
1716 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1717 declarations. Remove F_ALIAS and flag field of struct
1718 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1719 int. Make name and args fields of struct m68k_opcode const.
1721 Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1723 * sparc.h (F_NOTV9): Define.
1725 Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1727 * mips.h (INSN_4010): Define.
1729 Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1731 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1733 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1734 * m68k.h: Fix argument descriptions of coprocessor
1735 instructions to allow only alterable operands where appropriate.
1736 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1737 (m68k_opcode_aliases): Add more aliases.
1739 Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1741 * m68k.h: Added explcitly short-sized conditional branches, and a
1742 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1743 svr4-based configurations.
1745 Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1747 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1748 * i386.h: added missing Data16/Data32 flags to a few instructions.
1750 Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1752 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1753 (OP_MASK_BCC, OP_SH_BCC): Define.
1754 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1755 (OP_MASK_CCC, OP_SH_CCC): Define.
1756 (INSN_READ_FPR_R): Define.
1757 (INSN_RFE): Delete.
1759 Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1761 * m68k.h (enum m68k_architecture): Deleted.
1762 (struct m68k_opcode_alias): New type.
1763 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1764 matching constraints, values and flags. As a side effect of this,
1765 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1766 as I know were never used, now may need re-examining.
1767 (numopcodes): Now const.
1768 (m68k_opcode_aliases, numaliases): New variables.
1769 (endop): Deleted.
1770 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1771 m68k_opcode_aliases; update declaration of m68k_opcodes.
1773 Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1775 * hppa.h (delay_type): Delete unused enumeration.
1776 (pa_opcode): Replace unused delayed field with an architecture
1777 field.
1778 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1780 Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1782 * mips.h (INSN_ISA4): Define.
1784 Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1786 * mips.h (M_DLA_AB, M_DLI): Define.
1788 Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1790 * hppa.h (fstwx): Fix single-bit error.
1792 Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1794 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1796 Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1798 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1799 debug registers. From Charles Hannum (mycroft@netbsd.org).
1801 Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1803 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1804 i386 support:
1805 * i386.h (MOV_AX_DISP32): New macro.
1806 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1807 of several call/return instructions.
1808 (ADDR_PREFIX_OPCODE): New macro.
1810 Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1812 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1814 * ../include/opcode/vax.h (struct vot_wot, field `args'): make
1815 it pointer to const char;
1816 (struct vot, field `name'): ditto.
1818 Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1820 * vax.h: Supply and properly group all values in end sentinel.
1822 Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1824 * mips.h (INSN_ISA, INSN_4650): Define.
1826 Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1828 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1829 systems with a separate instruction and data cache, such as the
1830 29040, these instructions take an optional argument.
1832 Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1834 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1835 INSN_TRAP.
1837 Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1839 * mips.h (INSN_STORE_MEMORY): Define.
1841 Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1843 * sparc.h: Document new operand type 'x'.
1845 Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1847 * i960.h (I_CX2): New instruction category. It includes
1848 instructions available on Cx and Jx processors.
1849 (I_JX): New instruction category, for JX-only instructions.
1850 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
1851 Jx-only instructions, in I_JX category.
1853 Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1855 * ns32k.h (endop): Made pointer const too.
1857 Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
1859 * ns32k.h: Drop Q operand type as there is no correct use
1860 for it. Add I and Z operand types which allow better checking.
1862 Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
1864 * h8300.h (xor.l) :fix bit pattern.
1865 (L_2): New size of operand.
1866 (trapa): Use it.
1868 Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1870 * m68k.h: Move "trap" before "tpcc" to change disassembly.
1872 Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1874 * sparc.h: Include v9 definitions.
1876 Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1878 * m68k.h (m68060): Defined.
1879 (m68040up, mfloat, mmmu): Include it.
1880 (struct m68k_opcode): Widen `arch' field.
1881 (m68k_opcodes): Updated for M68060. Removed comments that were
1882 instructions commented out by "JF" years ago.
1884 Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1886 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
1887 add a one-bit `flags' field.
1888 (F_ALIAS): New macro.
1890 Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
1892 * h8300.h (dec, inc): Get encoding right.
1894 Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1896 * ppc.h (struct powerpc_operand): Removed signedp field; just use
1897 a flag instead.
1898 (PPC_OPERAND_SIGNED): Define.
1899 (PPC_OPERAND_SIGNOPT): Define.
1901 Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1903 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
1904 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
1906 Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1908 * i386.h: Reverse last change. It'll be handled in gas instead.
1910 Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1912 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
1913 slower on the 486 and used the implicit shift count despite the
1914 explicit operand. The one-operand form is still available to get
1915 the shorter form with the implicit shift count.
1917 Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
1919 * hppa.h: Fix typo in fstws arg string.
1921 Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1923 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
1925 Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1927 * ppc.h (PPC_OPCODE_601): Define.
1929 Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1931 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
1932 (so we can determine valid completers for both addb and addb[tf].)
1934 * hppa.h (xmpyu): No floating point format specifier for the
1935 xmpyu instruction.
1937 Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1939 * ppc.h (PPC_OPERAND_NEXT): Define.
1940 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
1941 (struct powerpc_macro): Define.
1942 (powerpc_macros, powerpc_num_macros): Declare.
1944 Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1946 * ppc.h: New file. Header file for PowerPC opcode table.
1948 Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1950 * hppa.h: More minor template fixes for sfu and copr (to allow
1951 for easier disassembly).
1953 * hppa.h: Fix templates for all the sfu and copr instructions.
1955 Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
1957 * i386.h (push): Permit Imm16 operand too.
1959 Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1961 * h8300.h (andc): Exists in base arch.
1963 Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1965 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
1966 * hppa.h: #undef NONE to avoid conflict with hiux include files.
1968 Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1970 * hppa.h: Add FP quadword store instructions.
1972 Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1974 * mips.h: (M_J_A): Added.
1975 (M_LA): Removed.
1977 Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1979 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
1980 <mellon@pepper.ncd.com>.
1982 Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1984 * hppa.h: Immediate field in probei instructions is unsigned,
1985 not low-sign extended.
1987 Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1989 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
1991 Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
1993 * i386.h: Add "fxch" without operand.
1995 Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1997 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
1999 Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2001 * hppa.h: Add gfw and gfr to the opcode table.
2003 Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2005 * m88k.h: extended to handle m88110.
2007 Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2009 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2010 addresses.
2012 Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2014 * i960.h (i960_opcodes): Properly bracket initializers.
2016 Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2018 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2020 Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2022 * m68k.h (two): Protect second argument with parentheses.
2024 Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2026 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2027 Deleted old in/out instructions in "#if 0" section.
2029 Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2031 * i386.h (i386_optab): Properly bracket initializers.
2033 Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2035 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2036 Jeff Law, law@cs.utah.edu).
2038 Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2040 * i386.h (lcall): Accept Imm32 operand also.
2042 Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2044 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2045 (M_DABS): Added.
2047 Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2049 * mips.h (INSN_*): Changed values. Removed unused definitions.
2050 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2051 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2052 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2053 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2054 (M_*): Added new values for r6000 and r4000 macros.
2055 (ANY_DELAY): Removed.
2057 Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2059 * mips.h: Added M_LI_S and M_LI_SS.
2061 Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2063 * h8300.h: Get some rare mov.bs correct.
2065 Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2067 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2068 been included.
2070 Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2072 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2073 jump instructions, for use in disassemblers.
2075 Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2077 * m88k.h: Make bitfields just unsigned, not unsigned long or
2078 unsigned short.
2080 Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2082 * hppa.h: New argument type 'y'. Use in various float instructions.
2084 Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2086 * hppa.h (break): First immediate field is unsigned.
2088 * hppa.h: Add rfir instruction.
2090 Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2092 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2094 Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2096 * mips.h: Reworked the hazard information somewhat, and fixed some
2097 bugs in the instruction hazard descriptions.
2099 Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2101 * m88k.h: Corrected a couple of opcodes.
2103 Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2105 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2106 new version includes instruction hazard information, but is
2107 otherwise reasonably similar.
2109 Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2111 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2113 Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2115 Patches from Jeff Law, law@cs.utah.edu:
2116 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2117 Make the tables be the same for the following instructions:
2118 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2119 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2120 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2121 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2122 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2123 "fcmp", and "ftest".
2125 * hppa.h: Make new and old tables the same for "break", "mtctl",
2126 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2127 Fix typo in last patch. Collapse several #ifdefs into a
2128 single #ifdef.
2130 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2131 of the comments up-to-date.
2133 * hppa.h: Update "free list" of letters and update
2134 comments describing each letter's function.
2136 Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2138 * h8300.h: checkpoint, includes H8/300-H opcodes.
2140 Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2142 * Patches from Jeffrey Law <law@cs.utah.edu>.
2143 * hppa.h: Rework single precision FP
2144 instructions so that they correctly disassemble code
2145 PA1.1 code.
2147 Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2149 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2150 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2152 Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2154 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2155 gdb will define it for now.
2157 Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2159 * sparc.h: Don't end enumerator list with comma.
2161 Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2163 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2164 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2165 ("bc2t"): Correct typo.
2166 ("[ls]wc[023]"): Use T rather than t.
2167 ("c[0123]"): Define general coprocessor instructions.
2169 Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2171 * m68k.h: Move split point for gcc compilation more towards
2172 middle.
2174 Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2176 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2177 simply wrong, ics, rfi, & rfsvc were missing).
2178 Add "a" to opr_ext for "bb". Doc fix.
2180 Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2182 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2183 * mips.h: Add casts, to suppress warnings about shifting too much.
2184 * m68k.h: Document the placement code '9'.
2186 Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2188 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2189 allows callers to break up the large initialized struct full of
2190 opcodes into two half-sized ones. This permits GCC to compile
2191 this module, since it takes exponential space for initializers.
2192 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2194 Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2196 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2197 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2198 initialized structs in it.
2200 Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2202 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2203 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2204 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2206 Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2208 * mips.h: document "i" and "j" operands correctly.
2210 Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2212 * mips.h: Removed endianness dependency.
2214 Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2216 * h8300.h: include info on number of cycles per instruction.
2218 Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2220 * hppa.h: Move handy aliases to the front. Fix masks for extract
2221 and deposit instructions.
2223 Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2225 * i386.h: accept shld and shrd both with and without the shift
2226 count argument, which is always %cl.
2228 Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2230 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2231 (one_byte_segment_defaults, two_byte_segment_defaults,
2232 i386_prefixtab_end): Ditto.
2234 Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2236 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2237 for operand 2; from John Carr, jfc@dsg.dec.com.
2239 Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2241 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2242 always use 16-bit offsets. Makes calculated-size jump tables
2243 feasible.
2245 Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2247 * i386.h: Fix one-operand forms of in* and out* patterns.
2249 Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2251 * m68k.h: Added CPU32 support.
2253 Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2255 * mips.h (break): Disassemble the argument. Patch from
2256 jonathan@cs.stanford.edu (Jonathan Stone).
2258 Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2260 * m68k.h: merged Motorola and MIT syntax.
2262 Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2264 * m68k.h (pmove): make the tests less strict, the 68k book is
2265 wrong.
2267 Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2269 * m68k.h (m68ec030): Defined as alias for 68030.
2270 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2271 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2272 them. Tightened description of "fmovex" to distinguish it from
2273 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2274 up descriptions that claimed versions were available for chips not
2275 supporting them. Added "pmovefd".
2277 Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2279 * m68k.h: fix where the . goes in divull
2281 Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2283 * m68k.h: the cas2 instruction is supposed to be written with
2284 indirection on the last two operands, which can be either data or
2285 address registers. Added a new operand type 'r' which accepts
2286 either register type. Added new cases for cas2l and cas2w which
2287 use them. Corrected masks for cas2 which failed to recognize use
2288 of address register.
2290 Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2292 * m68k.h: Merged in patches (mostly m68040-specific) from
2293 Colin Smith <colin@wrs.com>.
2295 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2296 base). Also cleaned up duplicates, re-ordered instructions for
2297 the sake of dis-assembling (so aliases come after standard names).
2298 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2300 Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2302 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2303 all missing .s
2305 Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2307 * sparc.h: Moved tables to BFD library.
2309 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2311 Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2313 * h8300.h: Finish filling in all the holes in the opcode table,
2314 so that the Lucid C compiler can digest this as well...
2316 Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2318 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2319 Fix opcodes on various sizes of fild/fist instructions
2320 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2321 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2323 Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2325 * h8300.h: Fill in all the holes in the opcode table so that the
2326 losing HPUX C compiler can digest this...
2328 Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2330 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2331 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2333 Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2335 * sparc.h: Add new architecture variant sparclite; add its scan
2336 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2338 Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2340 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2341 fy@lucid.com).
2343 Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2345 * rs6k.h: New version from IBM (Metin).
2347 Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2349 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2350 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2352 Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2354 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2356 Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2358 * m68k.h (one, two): Cast macro args to unsigned to suppress
2359 complaints from compiler and lint about integer overflow during
2360 shift.
2362 Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2364 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2366 Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2368 * mips.h: Make bitfield layout depend on the HOST compiler,
2369 not on the TARGET system.
2371 Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2373 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2374 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2375 <TRANLE@INTELLICORP.COM>.
2377 Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2379 * h8300.h: turned op_type enum into #define list
2381 Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2383 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2384 similar instructions -- they've been renamed to "fitoq", etc.
2385 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2386 number of arguments.
2387 * h8300.h: Remove extra ; which produces compiler warning.
2389 Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2391 * sparc.h: fix opcode for tsubcctv.
2393 Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2395 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2397 Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2399 * sparc.h (nop): Made the 'lose' field be even tighter,
2400 so only a standard 'nop' is disassembled as a nop.
2402 Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2404 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2405 disassembled as a nop.
2407 Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2409 * sparc.h: fix a typo.
2411 Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2413 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2414 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2415 vax.h, ChangeLog: renamed from ../<foo>-opcode.h
2417 \f
2418 Local Variables:
2419 version-control: never
2420 End: