| blob | b19006f9d766037ffe4f782926cc322cd394b735 |
1 This is as.info, produced by makeinfo version 4.3 from as.texinfo.
3 START-INFO-DIR-ENTRY
4 * As: (as). The GNU assembler.
5 * Gas: (as). The GNU assembler.
6 END-INFO-DIR-ENTRY
8 This file documents the GNU Assembler "as".
10 Copyright (C) 1991, 92, 93, 94, 95, 96, 97, 98, 99, 2000, 2001, 2002
11 Free Software Foundation, Inc.
13 Permission is granted to copy, distribute and/or modify this document
14 under the terms of the GNU Free Documentation License, Version 1.1 or
15 any later version published by the Free Software Foundation; with no
16 Invariant Sections, with no Front-Cover Texts, and with no Back-Cover
17 Texts. A copy of the license is included in the section entitled "GNU
18 Free Documentation License".
20 \x1f
21 File: as.info, Node: D10V-Syntax, Next: D10V-Float, Prev: D10V-Opts, Up: D10V-Dependent
23 Syntax
24 ------
26 The D10V syntax is based on the syntax in Mitsubishi's D10V
27 architecture manual. The differences are detailed below.
29 * Menu:
31 * D10V-Size:: Size Modifiers
32 * D10V-Subs:: Sub-Instructions
33 * D10V-Chars:: Special Characters
34 * D10V-Regs:: Register Names
35 * D10V-Addressing:: Addressing Modes
36 * D10V-Word:: @WORD Modifier
38 \x1f
39 File: as.info, Node: D10V-Size, Next: D10V-Subs, Up: D10V-Syntax
41 Size Modifiers
42 ..............
44 The D10V version of `as' uses the instruction names in the D10V
45 Architecture Manual. However, the names in the manual are sometimes
46 ambiguous. There are instruction names that can assemble to a short or
47 long form opcode. How does the assembler pick the correct form? `as'
48 will always pick the smallest form if it can. When dealing with a
49 symbol that is not defined yet when a line is being assembled, it will
50 always use the long form. If you need to force the assembler to use
51 either the short or long form of the instruction, you can append either
52 `.s' (short) or `.l' (long) to it. For example, if you are writing an
53 assembly program and you want to do a branch to a symbol that is
54 defined later in your program, you can write `bra.s foo'. Objdump
55 and GDB will always append `.s' or `.l' to instructions which have both
56 short and long forms.
58 \x1f
59 File: as.info, Node: D10V-Subs, Next: D10V-Chars, Prev: D10V-Size, Up: D10V-Syntax
61 Sub-Instructions
62 ................
64 The D10V assembler takes as input a series of instructions, either
65 one-per-line, or in the special two-per-line format described in the
66 next section. Some of these instructions will be short-form or
67 sub-instructions. These sub-instructions can be packed into a single
68 instruction. The assembler will do this automatically. It will also
69 detect when it should not pack instructions. For example, when a label
70 is defined, the next instruction will never be packaged with the
71 previous one. Whenever a branch and link instruction is called, it
72 will not be packaged with the next instruction so the return address
73 will be valid. Nops are automatically inserted when necessary.
75 If you do not want the assembler automatically making these
76 decisions, you can control the packaging and execution type (parallel
77 or sequential) with the special execution symbols described in the next
78 section.
80 \x1f
81 File: as.info, Node: D10V-Chars, Next: D10V-Regs, Prev: D10V-Subs, Up: D10V-Syntax
83 Special Characters
84 ..................
86 `;' and `#' are the line comment characters. Sub-instructions may
87 be executed in order, in reverse-order, or in parallel. Instructions
88 listed in the standard one-per-line format will be executed
89 sequentially. To specify the executing order, use the following
90 symbols:
91 `->'
92 Sequential with instruction on the left first.
94 `<-'
95 Sequential with instruction on the right first.
97 `||'
98 Parallel The D10V syntax allows either one instruction per line,
99 one instruction per line with the execution symbol, or two instructions
100 per line. For example
101 `abs a1 -> abs r0'
102 Execute these sequentially. The instruction on the right is in
103 the right container and is executed second.
105 `abs r0 <- abs a1'
106 Execute these reverse-sequentially. The instruction on the right
107 is in the right container, and is executed first.
109 `ld2w r2,@r8+ || mac a0,r0,r7'
110 Execute these in parallel.
112 `ld2w r2,@r8+ ||'
113 `mac a0,r0,r7'
114 Two-line format. Execute these in parallel.
116 `ld2w r2,@r8+'
117 `mac a0,r0,r7'
118 Two-line format. Execute these sequentially. Assembler will put
119 them in the proper containers.
121 `ld2w r2,@r8+ ->'
122 `mac a0,r0,r7'
123 Two-line format. Execute these sequentially. Same as above but
124 second instruction will always go into right container. Since `$'
125 has no special meaning, you may use it in symbol names.
127 \x1f
128 File: as.info, Node: D10V-Regs, Next: D10V-Addressing, Prev: D10V-Chars, Up: D10V-Syntax
130 Register Names
131 ..............
133 You can use the predefined symbols `r0' through `r15' to refer to
134 the D10V registers. You can also use `sp' as an alias for `r15'. The
135 accumulators are `a0' and `a1'. There are special register-pair names
136 that may optionally be used in opcodes that require even-numbered
137 registers. Register names are not case sensitive.
139 Register Pairs
140 `r0-r1'
142 `r2-r3'
144 `r4-r5'
146 `r6-r7'
148 `r8-r9'
150 `r10-r11'
152 `r12-r13'
154 `r14-r15'
155 The D10V also has predefined symbols for these control registers and
156 status bits:
157 `psw'
158 Processor Status Word
160 `bpsw'
161 Backup Processor Status Word
163 `pc'
164 Program Counter
166 `bpc'
167 Backup Program Counter
169 `rpt_c'
170 Repeat Count
172 `rpt_s'
173 Repeat Start address
175 `rpt_e'
176 Repeat End address
178 `mod_s'
179 Modulo Start address
181 `mod_e'
182 Modulo End address
184 `iba'
185 Instruction Break Address
187 `f0'
188 Flag 0
190 `f1'
191 Flag 1
193 `c'
194 Carry flag
196 \x1f
197 File: as.info, Node: D10V-Addressing, Next: D10V-Word, Prev: D10V-Regs, Up: D10V-Syntax
199 Addressing Modes
200 ................
202 `as' understands the following addressing modes for the D10V. `RN'
203 in the following refers to any of the numbered registers, but _not_ the
204 control registers.
205 `RN'
206 Register direct
208 `@RN'
209 Register indirect
211 `@RN+'
212 Register indirect with post-increment
214 `@RN-'
215 Register indirect with post-decrement
217 `@-SP'
218 Register indirect with pre-decrement
220 `@(DISP, RN)'
221 Register indirect with displacement
223 `ADDR'
224 PC relative address (for branch or rep).
226 `#IMM'
227 Immediate data (the `#' is optional and ignored)
229 \x1f
230 File: as.info, Node: D10V-Word, Prev: D10V-Addressing, Up: D10V-Syntax
232 @WORD Modifier
233 ..............
235 Any symbol followed by `@word' will be replaced by the symbol's value
236 shifted right by 2. This is used in situations such as loading a
237 register with the address of a function (or any other code fragment).
238 For example, if you want to load a register with the location of the
239 function `main' then jump to that function, you could do it as follws:
240 ldi r2, main@word
241 jmp r2
243 \x1f
244 File: as.info, Node: D10V-Float, Next: D10V-Opcodes, Prev: D10V-Syntax, Up: D10V-Dependent
246 Floating Point
247 --------------
249 The D10V has no hardware floating point, but the `.float' and
250 `.double' directives generates IEEE floating-point numbers for
251 compatibility with other development tools.
253 \x1f
254 File: as.info, Node: D10V-Opcodes, Prev: D10V-Float, Up: D10V-Dependent
256 Opcodes
257 -------
259 For detailed information on the D10V machine instruction set, see
260 `D10V Architecture: A VLIW Microprocessor for Multimedia Applications'
261 (Mitsubishi Electric Corp.). `as' implements all the standard D10V
262 opcodes. The only changes are those described in the section on size
263 modifiers
265 \x1f
266 File: as.info, Node: D30V-Dependent, Next: H8/300-Dependent, Prev: D10V-Dependent, Up: Machine Dependencies
268 D30V Dependent Features
269 =======================
271 * Menu:
273 * D30V-Opts:: D30V Options
274 * D30V-Syntax:: Syntax
275 * D30V-Float:: Floating Point
276 * D30V-Opcodes:: Opcodes
278 \x1f
279 File: as.info, Node: D30V-Opts, Next: D30V-Syntax, Up: D30V-Dependent
281 D30V Options
282 ------------
284 The Mitsubishi D30V version of `as' has a few machine dependent
285 options.
287 `-O'
288 The D30V can often execute two sub-instructions in parallel. When
289 this option is used, `as' will attempt to optimize its output by
290 detecting when instructions can be executed in parallel.
292 `-n'
293 When this option is used, `as' will issue a warning every time it
294 adds a nop instruction.
296 `-N'
297 When this option is used, `as' will issue a warning if it needs to
298 insert a nop after a 32-bit multiply before a load or 16-bit
299 multiply instruction.
301 \x1f
302 File: as.info, Node: D30V-Syntax, Next: D30V-Float, Prev: D30V-Opts, Up: D30V-Dependent
304 Syntax
305 ------
307 The D30V syntax is based on the syntax in Mitsubishi's D30V
308 architecture manual. The differences are detailed below.
310 * Menu:
312 * D30V-Size:: Size Modifiers
313 * D30V-Subs:: Sub-Instructions
314 * D30V-Chars:: Special Characters
315 * D30V-Guarded:: Guarded Execution
316 * D30V-Regs:: Register Names
317 * D30V-Addressing:: Addressing Modes
319 \x1f
320 File: as.info, Node: D30V-Size, Next: D30V-Subs, Up: D30V-Syntax
322 Size Modifiers
323 ..............
325 The D30V version of `as' uses the instruction names in the D30V
326 Architecture Manual. However, the names in the manual are sometimes
327 ambiguous. There are instruction names that can assemble to a short or
328 long form opcode. How does the assembler pick the correct form? `as'
329 will always pick the smallest form if it can. When dealing with a
330 symbol that is not defined yet when a line is being assembled, it will
331 always use the long form. If you need to force the assembler to use
332 either the short or long form of the instruction, you can append either
333 `.s' (short) or `.l' (long) to it. For example, if you are writing an
334 assembly program and you want to do a branch to a symbol that is
335 defined later in your program, you can write `bra.s foo'. Objdump and
336 GDB will always append `.s' or `.l' to instructions which have both
337 short and long forms.
339 \x1f
340 File: as.info, Node: D30V-Subs, Next: D30V-Chars, Prev: D30V-Size, Up: D30V-Syntax
342 Sub-Instructions
343 ................
345 The D30V assembler takes as input a series of instructions, either
346 one-per-line, or in the special two-per-line format described in the
347 next section. Some of these instructions will be short-form or
348 sub-instructions. These sub-instructions can be packed into a single
349 instruction. The assembler will do this automatically. It will also
350 detect when it should not pack instructions. For example, when a label
351 is defined, the next instruction will never be packaged with the
352 previous one. Whenever a branch and link instruction is called, it
353 will not be packaged with the next instruction so the return address
354 will be valid. Nops are automatically inserted when necessary.
356 If you do not want the assembler automatically making these
357 decisions, you can control the packaging and execution type (parallel
358 or sequential) with the special execution symbols described in the next
359 section.
361 \x1f
362 File: as.info, Node: D30V-Chars, Next: D30V-Guarded, Prev: D30V-Subs, Up: D30V-Syntax
364 Special Characters
365 ..................
367 `;' and `#' are the line comment characters. Sub-instructions may
368 be executed in order, in reverse-order, or in parallel. Instructions
369 listed in the standard one-per-line format will be executed
370 sequentially unless you use the `-O' option.
372 To specify the executing order, use the following symbols:
373 `->'
374 Sequential with instruction on the left first.
376 `<-'
377 Sequential with instruction on the right first.
379 `||'
380 Parallel
382 The D30V syntax allows either one instruction per line, one
383 instruction per line with the execution symbol, or two instructions per
384 line. For example
385 `abs r2,r3 -> abs r4,r5'
386 Execute these sequentially. The instruction on the right is in
387 the right container and is executed second.
389 `abs r2,r3 <- abs r4,r5'
390 Execute these reverse-sequentially. The instruction on the right
391 is in the right container, and is executed first.
393 `abs r2,r3 || abs r4,r5'
394 Execute these in parallel.
396 `ldw r2,@(r3,r4) ||'
397 `mulx r6,r8,r9'
398 Two-line format. Execute these in parallel.
400 `mulx a0,r8,r9'
401 `stw r2,@(r3,r4)'
402 Two-line format. Execute these sequentially unless `-O' option is
403 used. If the `-O' option is used, the assembler will determine if
404 the instructions could be done in parallel (the above two
405 instructions can be done in parallel), and if so, emit them as
406 parallel instructions. The assembler will put them in the proper
407 containers. In the above example, the assembler will put the
408 `stw' instruction in left container and the `mulx' instruction in
409 the right container.
411 `stw r2,@(r3,r4) ->'
412 `mulx a0,r8,r9'
413 Two-line format. Execute the `stw' instruction followed by the
414 `mulx' instruction sequentially. The first instruction goes in the
415 left container and the second instruction goes into right
416 container. The assembler will give an error if the machine
417 ordering constraints are violated.
419 `stw r2,@(r3,r4) <-'
420 `mulx a0,r8,r9'
421 Same as previous example, except that the `mulx' instruction is
422 executed before the `stw' instruction.
424 Since `$' has no special meaning, you may use it in symbol names.
426 \x1f
427 File: as.info, Node: D30V-Guarded, Next: D30V-Regs, Prev: D30V-Chars, Up: D30V-Syntax
429 Guarded Execution
430 .................
432 `as' supports the full range of guarded execution directives for
433 each instruction. Just append the directive after the instruction
434 proper. The directives are:
436 `/tx'
437 Execute the instruction if flag f0 is true.
439 `/fx'
440 Execute the instruction if flag f0 is false.
442 `/xt'
443 Execute the instruction if flag f1 is true.
445 `/xf'
446 Execute the instruction if flag f1 is false.
448 `/tt'
449 Execute the instruction if both flags f0 and f1 are true.
451 `/tf'
452 Execute the instruction if flag f0 is true and flag f1 is false.
454 \x1f
455 File: as.info, Node: D30V-Regs, Next: D30V-Addressing, Prev: D30V-Guarded, Up: D30V-Syntax
457 Register Names
458 ..............
460 You can use the predefined symbols `r0' through `r63' to refer to
461 the D30V registers. You can also use `sp' as an alias for `r63' and
462 `link' as an alias for `r62'. The accumulators are `a0' and `a1'.
464 The D30V also has predefined symbols for these control registers and
465 status bits:
466 `psw'
467 Processor Status Word
469 `bpsw'
470 Backup Processor Status Word
472 `pc'
473 Program Counter
475 `bpc'
476 Backup Program Counter
478 `rpt_c'
479 Repeat Count
481 `rpt_s'
482 Repeat Start address
484 `rpt_e'
485 Repeat End address
487 `mod_s'
488 Modulo Start address
490 `mod_e'
491 Modulo End address
493 `iba'
494 Instruction Break Address
496 `f0'
497 Flag 0
499 `f1'
500 Flag 1
502 `f2'
503 Flag 2
505 `f3'
506 Flag 3
508 `f4'
509 Flag 4
511 `f5'
512 Flag 5
514 `f6'
515 Flag 6
517 `f7'
518 Flag 7
520 `s'
521 Same as flag 4 (saturation flag)
523 `v'
524 Same as flag 5 (overflow flag)
526 `va'
527 Same as flag 6 (sticky overflow flag)
529 `c'
530 Same as flag 7 (carry/borrow flag)
532 `b'
533 Same as flag 7 (carry/borrow flag)
535 \x1f
536 File: as.info, Node: D30V-Addressing, Prev: D30V-Regs, Up: D30V-Syntax
538 Addressing Modes
539 ................
541 `as' understands the following addressing modes for the D30V. `RN'
542 in the following refers to any of the numbered registers, but _not_ the
543 control registers.
544 `RN'
545 Register direct
547 `@RN'
548 Register indirect
550 `@RN+'
551 Register indirect with post-increment
553 `@RN-'
554 Register indirect with post-decrement
556 `@-SP'
557 Register indirect with pre-decrement
559 `@(DISP, RN)'
560 Register indirect with displacement
562 `ADDR'
563 PC relative address (for branch or rep).
565 `#IMM'
566 Immediate data (the `#' is optional and ignored)
568 \x1f
569 File: as.info, Node: D30V-Float, Next: D30V-Opcodes, Prev: D30V-Syntax, Up: D30V-Dependent
571 Floating Point
572 --------------
574 The D30V has no hardware floating point, but the `.float' and
575 `.double' directives generates IEEE floating-point numbers for
576 compatibility with other development tools.
578 \x1f
579 File: as.info, Node: D30V-Opcodes, Prev: D30V-Float, Up: D30V-Dependent
581 Opcodes
582 -------
584 For detailed information on the D30V machine instruction set, see
585 `D30V Architecture: A VLIW Microprocessor for Multimedia Applications'
586 (Mitsubishi Electric Corp.). `as' implements all the standard D30V
587 opcodes. The only changes are those described in the section on size
588 modifiers
590 \x1f
591 File: as.info, Node: H8/300-Dependent, Next: H8/500-Dependent, Prev: D30V-Dependent, Up: Machine Dependencies
593 H8/300 Dependent Features
594 =========================
596 * Menu:
598 * H8/300 Options:: Options
599 * H8/300 Syntax:: Syntax
600 * H8/300 Floating Point:: Floating Point
601 * H8/300 Directives:: H8/300 Machine Directives
602 * H8/300 Opcodes:: Opcodes
604 \x1f
605 File: as.info, Node: H8/300 Options, Next: H8/300 Syntax, Up: H8/300-Dependent
607 Options
608 -------
610 `as' has no additional command-line options for the Hitachi H8/300
611 family.
613 \x1f
614 File: as.info, Node: H8/300 Syntax, Next: H8/300 Floating Point, Prev: H8/300 Options, Up: H8/300-Dependent
616 Syntax
617 ------
619 * Menu:
621 * H8/300-Chars:: Special Characters
622 * H8/300-Regs:: Register Names
623 * H8/300-Addressing:: Addressing Modes
625 \x1f
626 File: as.info, Node: H8/300-Chars, Next: H8/300-Regs, Up: H8/300 Syntax
628 Special Characters
629 ..................
631 `;' is the line comment character.
633 `$' can be used instead of a newline to separate statements.
634 Therefore _you may not use `$' in symbol names_ on the H8/300.
636 \x1f
637 File: as.info, Node: H8/300-Regs, Next: H8/300-Addressing, Prev: H8/300-Chars, Up: H8/300 Syntax
639 Register Names
640 ..............
642 You can use predefined symbols of the form `rNh' and `rNl' to refer
643 to the H8/300 registers as sixteen 8-bit general-purpose registers. N
644 is a digit from `0' to `7'); for instance, both `r0h' and `r7l' are
645 valid register names.
647 You can also use the eight predefined symbols `rN' to refer to the
648 H8/300 registers as 16-bit registers (you must use this form for
649 addressing).
651 On the H8/300H, you can also use the eight predefined symbols `erN'
652 (`er0' ... `er7') to refer to the 32-bit general purpose registers.
654 The two control registers are called `pc' (program counter; a 16-bit
655 register, except on the H8/300H where it is 24 bits) and `ccr'
656 (condition code register; an 8-bit register). `r7' is used as the
657 stack pointer, and can also be called `sp'.
659 \x1f
660 File: as.info, Node: H8/300-Addressing, Prev: H8/300-Regs, Up: H8/300 Syntax
662 Addressing Modes
663 ................
665 as understands the following addressing modes for the H8/300:
666 `rN'
667 Register direct
669 `@rN'
670 Register indirect
672 `@(D, rN)'
673 `@(D:16, rN)'
674 `@(D:24, rN)'
675 Register indirect: 16-bit or 24-bit displacement D from register
676 N. (24-bit displacements are only meaningful on the H8/300H.)
678 `@rN+'
679 Register indirect with post-increment
681 `@-rN'
682 Register indirect with pre-decrement
684 ``@'AA'
685 ``@'AA:8'
686 ``@'AA:16'
687 ``@'AA:24'
688 Absolute address `aa'. (The address size `:24' only makes sense
689 on the H8/300H.)
691 `#XX'
692 `#XX:8'
693 `#XX:16'
694 `#XX:32'
695 Immediate data XX. You may specify the `:8', `:16', or `:32' for
696 clarity, if you wish; but `as' neither requires this nor uses
697 it--the data size required is taken from context.
699 ``@'`@'AA'
700 ``@'`@'AA:8'
701 Memory indirect. You may specify the `:8' for clarity, if you
702 wish; but `as' neither requires this nor uses it.
704 \x1f
705 File: as.info, Node: H8/300 Floating Point, Next: H8/300 Directives, Prev: H8/300 Syntax, Up: H8/300-Dependent
707 Floating Point
708 --------------
710 The H8/300 family has no hardware floating point, but the `.float'
711 directive generates IEEE floating-point numbers for compatibility with
712 other development tools.
714 \x1f
715 File: as.info, Node: H8/300 Directives, Next: H8/300 Opcodes, Prev: H8/300 Floating Point, Up: H8/300-Dependent
717 H8/300 Machine Directives
718 -------------------------
720 `as' has only one machine-dependent directive for the H8/300:
722 `.h8300h'
723 Recognize and emit additional instructions for the H8/300H
724 variant, and also make `.int' emit 32-bit numbers rather than the
725 usual (16-bit) for the H8/300 family.
727 On the H8/300 family (including the H8/300H) `.word' directives
728 generate 16-bit numbers.
730 \x1f
731 File: as.info, Node: H8/300 Opcodes, Prev: H8/300 Directives, Up: H8/300-Dependent
733 Opcodes
734 -------
736 For detailed information on the H8/300 machine instruction set, see
737 `H8/300 Series Programming Manual' (Hitachi ADE-602-025). For
738 information specific to the H8/300H, see `H8/300H Series Programming
739 Manual' (Hitachi).
741 `as' implements all the standard H8/300 opcodes. No additional
742 pseudo-instructions are needed on this family.
744 The following table summarizes the H8/300 opcodes, and their
745 arguments. Entries marked `*' are opcodes used only on the H8/300H.
747 Legend:
748 Rs source register
749 Rd destination register
750 abs absolute address
751 imm immediate data
752 disp:N N-bit displacement from a register
753 pcrel:N N-bit displacement relative to program counter
755 add.b #imm,rd * andc #imm,ccr
756 add.b rs,rd band #imm,rd
757 add.w rs,rd band #imm,@rd
758 * add.w #imm,rd band #imm,@abs:8
759 * add.l rs,rd bra pcrel:8
760 * add.l #imm,rd * bra pcrel:16
761 adds #imm,rd bt pcrel:8
762 addx #imm,rd * bt pcrel:16
763 addx rs,rd brn pcrel:8
764 and.b #imm,rd * brn pcrel:16
765 and.b rs,rd bf pcrel:8
766 * and.w rs,rd * bf pcrel:16
767 * and.w #imm,rd bhi pcrel:8
768 * and.l #imm,rd * bhi pcrel:16
769 * and.l rs,rd bls pcrel:8
771 * bls pcrel:16 bld #imm,rd
772 bcc pcrel:8 bld #imm,@rd
773 * bcc pcrel:16 bld #imm,@abs:8
774 bhs pcrel:8 bnot #imm,rd
775 * bhs pcrel:16 bnot #imm,@rd
776 bcs pcrel:8 bnot #imm,@abs:8
777 * bcs pcrel:16 bnot rs,rd
778 blo pcrel:8 bnot rs,@rd
779 * blo pcrel:16 bnot rs,@abs:8
780 bne pcrel:8 bor #imm,rd
781 * bne pcrel:16 bor #imm,@rd
782 beq pcrel:8 bor #imm,@abs:8
783 * beq pcrel:16 bset #imm,rd
784 bvc pcrel:8 bset #imm,@rd
785 * bvc pcrel:16 bset #imm,@abs:8
786 bvs pcrel:8 bset rs,rd
787 * bvs pcrel:16 bset rs,@rd
788 bpl pcrel:8 bset rs,@abs:8
789 * bpl pcrel:16 bsr pcrel:8
790 bmi pcrel:8 bsr pcrel:16
791 * bmi pcrel:16 bst #imm,rd
792 bge pcrel:8 bst #imm,@rd
793 * bge pcrel:16 bst #imm,@abs:8
794 blt pcrel:8 btst #imm,rd
795 * blt pcrel:16 btst #imm,@rd
796 bgt pcrel:8 btst #imm,@abs:8
797 * bgt pcrel:16 btst rs,rd
798 ble pcrel:8 btst rs,@rd
799 * ble pcrel:16 btst rs,@abs:8
800 bclr #imm,rd bxor #imm,rd
801 bclr #imm,@rd bxor #imm,@rd
802 bclr #imm,@abs:8 bxor #imm,@abs:8
803 bclr rs,rd cmp.b #imm,rd
804 bclr rs,@rd cmp.b rs,rd
805 bclr rs,@abs:8 cmp.w rs,rd
806 biand #imm,rd cmp.w rs,rd
807 biand #imm,@rd * cmp.w #imm,rd
808 biand #imm,@abs:8 * cmp.l #imm,rd
809 bild #imm,rd * cmp.l rs,rd
810 bild #imm,@rd daa rs
811 bild #imm,@abs:8 das rs
812 bior #imm,rd dec.b rs
813 bior #imm,@rd * dec.w #imm,rd
814 bior #imm,@abs:8 * dec.l #imm,rd
815 bist #imm,rd divxu.b rs,rd
816 bist #imm,@rd * divxu.w rs,rd
817 bist #imm,@abs:8 * divxs.b rs,rd
818 bixor #imm,rd * divxs.w rs,rd
819 bixor #imm,@rd eepmov
820 bixor #imm,@abs:8 * eepmovw
822 * exts.w rd mov.w rs,@abs:16
823 * exts.l rd * mov.l #imm,rd
824 * extu.w rd * mov.l rs,rd
825 * extu.l rd * mov.l @rs,rd
826 inc rs * mov.l @(disp:16,rs),rd
827 * inc.w #imm,rd * mov.l @(disp:24,rs),rd
828 * inc.l #imm,rd * mov.l @rs+,rd
829 jmp @rs * mov.l @abs:16,rd
830 jmp abs * mov.l @abs:24,rd
831 jmp @@abs:8 * mov.l rs,@rd
832 jsr @rs * mov.l rs,@(disp:16,rd)
833 jsr abs * mov.l rs,@(disp:24,rd)
834 jsr @@abs:8 * mov.l rs,@-rd
835 ldc #imm,ccr * mov.l rs,@abs:16
836 ldc rs,ccr * mov.l rs,@abs:24
837 * ldc @abs:16,ccr movfpe @abs:16,rd
838 * ldc @abs:24,ccr movtpe rs,@abs:16
839 * ldc @(disp:16,rs),ccr mulxu.b rs,rd
840 * ldc @(disp:24,rs),ccr * mulxu.w rs,rd
841 * ldc @rs+,ccr * mulxs.b rs,rd
842 * ldc @rs,ccr * mulxs.w rs,rd
843 * mov.b @(disp:24,rs),rd neg.b rs
844 * mov.b rs,@(disp:24,rd) * neg.w rs
845 mov.b @abs:16,rd * neg.l rs
846 mov.b rs,rd nop
847 mov.b @abs:8,rd not.b rs
848 mov.b rs,@abs:8 * not.w rs
849 mov.b rs,rd * not.l rs
850 mov.b #imm,rd or.b #imm,rd
851 mov.b @rs,rd or.b rs,rd
852 mov.b @(disp:16,rs),rd * or.w #imm,rd
853 mov.b @rs+,rd * or.w rs,rd
854 mov.b @abs:8,rd * or.l #imm,rd
855 mov.b rs,@rd * or.l rs,rd
856 mov.b rs,@(disp:16,rd) orc #imm,ccr
857 mov.b rs,@-rd pop.w rs
858 mov.b rs,@abs:8 * pop.l rs
859 mov.w rs,@rd push.w rs
860 * mov.w @(disp:24,rs),rd * push.l rs
861 * mov.w rs,@(disp:24,rd) rotl.b rs
862 * mov.w @abs:24,rd * rotl.w rs
863 * mov.w rs,@abs:24 * rotl.l rs
864 mov.w rs,rd rotr.b rs
865 mov.w #imm,rd * rotr.w rs
866 mov.w @rs,rd * rotr.l rs
867 mov.w @(disp:16,rs),rd rotxl.b rs
868 mov.w @rs+,rd * rotxl.w rs
869 mov.w @abs:16,rd * rotxl.l rs
870 mov.w rs,@(disp:16,rd) rotxr.b rs
871 mov.w rs,@-rd * rotxr.w rs
873 * rotxr.l rs * stc ccr,@(disp:24,rd)
874 bpt * stc ccr,@-rd
875 rte * stc ccr,@abs:16
876 rts * stc ccr,@abs:24
877 shal.b rs sub.b rs,rd
878 * shal.w rs sub.w rs,rd
879 * shal.l rs * sub.w #imm,rd
880 shar.b rs * sub.l rs,rd
881 * shar.w rs * sub.l #imm,rd
882 * shar.l rs subs #imm,rd
883 shll.b rs subx #imm,rd
884 * shll.w rs subx rs,rd
885 * shll.l rs * trapa #imm
886 shlr.b rs xor #imm,rd
887 * shlr.w rs xor rs,rd
888 * shlr.l rs * xor.w #imm,rd
889 sleep * xor.w rs,rd
890 stc ccr,rd * xor.l #imm,rd
891 * stc ccr,@rs * xor.l rs,rd
892 * stc ccr,@(disp:16,rd) xorc #imm,ccr
894 Four H8/300 instructions (`add', `cmp', `mov', `sub') are defined
895 with variants using the suffixes `.b', `.w', and `.l' to specify the
896 size of a memory operand. `as' supports these suffixes, but does not
897 require them; since one of the operands is always a register, `as' can
898 deduce the correct size.
900 For example, since `r0' refers to a 16-bit register,
901 mov r0,@foo
902 is equivalent to
903 mov.w r0,@foo
905 If you use the size suffixes, `as' issues a warning when the suffix
906 and the register size do not match.
908 \x1f
909 File: as.info, Node: H8/500-Dependent, Next: HPPA-Dependent, Prev: H8/300-Dependent, Up: Machine Dependencies
911 H8/500 Dependent Features
912 =========================
914 * Menu:
916 * H8/500 Options:: Options
917 * H8/500 Syntax:: Syntax
918 * H8/500 Floating Point:: Floating Point
919 * H8/500 Directives:: H8/500 Machine Directives
920 * H8/500 Opcodes:: Opcodes
922 \x1f
923 File: as.info, Node: H8/500 Options, Next: H8/500 Syntax, Up: H8/500-Dependent
925 Options
926 -------
928 `as' has no additional command-line options for the Hitachi H8/500
929 family.
931 \x1f
932 File: as.info, Node: H8/500 Syntax, Next: H8/500 Floating Point, Prev: H8/500 Options, Up: H8/500-Dependent
934 Syntax
935 ------
937 * Menu:
939 * H8/500-Chars:: Special Characters
940 * H8/500-Regs:: Register Names
941 * H8/500-Addressing:: Addressing Modes
943 \x1f
944 File: as.info, Node: H8/500-Chars, Next: H8/500-Regs, Up: H8/500 Syntax
946 Special Characters
947 ..................
949 `!' is the line comment character.
951 `;' can be used instead of a newline to separate statements.
953 Since `$' has no special meaning, you may use it in symbol names.
955 \x1f
956 File: as.info, Node: H8/500-Regs, Next: H8/500-Addressing, Prev: H8/500-Chars, Up: H8/500 Syntax
958 Register Names
959 ..............
961 You can use the predefined symbols `r0', `r1', `r2', `r3', `r4',
962 `r5', `r6', and `r7' to refer to the H8/500 registers.
964 The H8/500 also has these control registers:
966 `cp'
967 code pointer
969 `dp'
970 data pointer
972 `bp'
973 base pointer
975 `tp'
976 stack top pointer
978 `ep'
979 extra pointer
981 `sr'
982 status register
984 `ccr'
985 condition code register
987 All registers are 16 bits long. To represent 32 bit numbers, use two
988 adjacent registers; for distant memory addresses, use one of the segment
989 pointers (`cp' for the program counter; `dp' for `r0'-`r3'; `ep' for
990 `r4' and `r5'; and `tp' for `r6' and `r7'.
992 \x1f
993 File: as.info, Node: H8/500-Addressing, Prev: H8/500-Regs, Up: H8/500 Syntax
995 Addressing Modes
996 ................
998 as understands the following addressing modes for the H8/500:
999 `RN'
1000 Register direct
1002 `@RN'
1003 Register indirect
1005 `@(d:8, RN)'
1006 Register indirect with 8 bit signed displacement
1008 `@(d:16, RN)'
1009 Register indirect with 16 bit signed displacement
1011 `@-RN'
1012 Register indirect with pre-decrement
1014 `@RN+'
1015 Register indirect with post-increment
1017 `@AA:8'
1018 8 bit absolute address
1020 `@AA:16'
1021 16 bit absolute address
1023 `#XX:8'
1024 8 bit immediate
1026 `#XX:16'
1027 16 bit immediate
1029 \x1f
1030 File: as.info, Node: H8/500 Floating Point, Next: H8/500 Directives, Prev: H8/500 Syntax, Up: H8/500-Dependent
1032 Floating Point
1033 --------------
1035 The H8/500 family has no hardware floating point, but the `.float'
1036 directive generates IEEE floating-point numbers for compatibility with
1037 other development tools.
1039 \x1f
1040 File: as.info, Node: H8/500 Directives, Next: H8/500 Opcodes, Prev: H8/500 Floating Point, Up: H8/500-Dependent
1042 H8/500 Machine Directives
1043 -------------------------
1045 `as' has no machine-dependent directives for the H8/500. However,
1046 on this platform the `.int' and `.word' directives generate 16-bit
1047 numbers.
1049 \x1f
1050 File: as.info, Node: H8/500 Opcodes, Prev: H8/500 Directives, Up: H8/500-Dependent
1052 Opcodes
1053 -------
1055 For detailed information on the H8/500 machine instruction set, see
1056 `H8/500 Series Programming Manual' (Hitachi M21T001).
1058 `as' implements all the standard H8/500 opcodes. No additional
1059 pseudo-instructions are needed on this family.
1061 The following table summarizes H8/500 opcodes and their operands:
1063 Legend:
1064 abs8 8-bit absolute address
1065 abs16 16-bit absolute address
1066 abs24 24-bit absolute address
1067 crb `ccr', `br', `ep', `dp', `tp', `dp'
1068 disp8 8-bit displacement
1069 ea `rn', `@rn', `@(d:8, rn)', `@(d:16, rn)',
1070 `@-rn', `@rn+', `@aa:8', `@aa:16',
1071 `#xx:8', `#xx:16'
1072 ea_mem `@rn', `@(d:8, rn)', `@(d:16, rn)',
1073 `@-rn', `@rn+', `@aa:8', `@aa:16'
1074 ea_noimm `rn', `@rn', `@(d:8, rn)', `@(d:16, rn)',
1075 `@-rn', `@rn+', `@aa:8', `@aa:16'
1076 fp r6
1077 imm4 4-bit immediate data
1078 imm8 8-bit immediate data
1079 imm16 16-bit immediate data
1080 pcrel8 8-bit offset from program counter
1081 pcrel16 16-bit offset from program counter
1082 qim `-2', `-1', `1', `2'
1083 rd any register
1084 rs a register distinct from rd
1085 rlist comma-separated list of registers in parentheses;
1086 register ranges `rd-rs' are allowed
1087 sp stack pointer (`r7')
1088 sr status register
1089 sz size; `.b' or `.w'. If omitted, default `.w'
1091 ldc[.b] ea,crb bcc[.w] pcrel16
1092 ldc[.w] ea,sr bcc[.b] pcrel8
1093 add[:q] sz qim,ea_noimm bhs[.w] pcrel16
1094 add[:g] sz ea,rd bhs[.b] pcrel8
1095 adds sz ea,rd bcs[.w] pcrel16
1096 addx sz ea,rd bcs[.b] pcrel8
1097 and sz ea,rd blo[.w] pcrel16
1098 andc[.b] imm8,crb blo[.b] pcrel8
1099 andc[.w] imm16,sr bne[.w] pcrel16
1100 bpt bne[.b] pcrel8
1101 bra[.w] pcrel16 beq[.w] pcrel16
1102 bra[.b] pcrel8 beq[.b] pcrel8
1103 bt[.w] pcrel16 bvc[.w] pcrel16
1104 bt[.b] pcrel8 bvc[.b] pcrel8
1105 brn[.w] pcrel16 bvs[.w] pcrel16
1106 brn[.b] pcrel8 bvs[.b] pcrel8
1107 bf[.w] pcrel16 bpl[.w] pcrel16
1108 bf[.b] pcrel8 bpl[.b] pcrel8
1109 bhi[.w] pcrel16 bmi[.w] pcrel16
1110 bhi[.b] pcrel8 bmi[.b] pcrel8
1111 bls[.w] pcrel16 bge[.w] pcrel16
1112 bls[.b] pcrel8 bge[.b] pcrel8
1114 blt[.w] pcrel16 mov[:g][.b] imm8,ea_mem
1115 blt[.b] pcrel8 mov[:g][.w] imm16,ea_mem
1116 bgt[.w] pcrel16 movfpe[.b] ea,rd
1117 bgt[.b] pcrel8 movtpe[.b] rs,ea_noimm
1118 ble[.w] pcrel16 mulxu sz ea,rd
1119 ble[.b] pcrel8 neg sz ea
1120 bclr sz imm4,ea_noimm nop
1121 bclr sz rs,ea_noimm not sz ea
1122 bnot sz imm4,ea_noimm or sz ea,rd
1123 bnot sz rs,ea_noimm orc[.b] imm8,crb
1124 bset sz imm4,ea_noimm orc[.w] imm16,sr
1125 bset sz rs,ea_noimm pjmp abs24
1126 bsr[.b] pcrel8 pjmp @rd
1127 bsr[.w] pcrel16 pjsr abs24
1128 btst sz imm4,ea_noimm pjsr @rd
1129 btst sz rs,ea_noimm prtd imm8
1130 clr sz ea prtd imm16
1131 cmp[:e][.b] imm8,rd prts
1132 cmp[:i][.w] imm16,rd rotl sz ea
1133 cmp[:g].b imm8,ea_noimm rotr sz ea
1134 cmp[:g][.w] imm16,ea_noimm rotxl sz ea
1135 Cmp[:g] sz ea,rd rotxr sz ea
1136 dadd rs,rd rtd imm8
1137 divxu sz ea,rd rtd imm16
1138 dsub rs,rd rts
1139 exts[.b] rd scb/f rs,pcrel8
1140 extu[.b] rd scb/ne rs,pcrel8
1141 jmp @rd scb/eq rs,pcrel8
1142 jmp @(imm8,rd) shal sz ea
1143 jmp @(imm16,rd) shar sz ea
1144 jmp abs16 shll sz ea
1145 jsr @rd shlr sz ea
1146 jsr @(imm8,rd) sleep
1147 jsr @(imm16,rd) stc[.b] crb,ea_noimm
1148 jsr abs16 stc[.w] sr,ea_noimm
1149 ldm @sp+,(rlist) stm (rlist),@-sp
1150 link fp,imm8 sub sz ea,rd
1151 link fp,imm16 subs sz ea,rd
1152 mov[:e][.b] imm8,rd subx sz ea,rd
1153 mov[:i][.w] imm16,rd swap[.b] rd
1154 mov[:l][.w] abs8,rd tas[.b] ea
1155 mov[:l].b abs8,rd trapa imm4
1156 mov[:s][.w] rs,abs8 trap/vs
1157 mov[:s].b rs,abs8 tst sz ea
1158 mov[:f][.w] @(disp8,fp),rd unlk fp
1159 mov[:f][.w] rs,@(disp8,fp) xch[.w] rs,rd
1160 mov[:f].b @(disp8,fp),rd xor sz ea,rd
1161 mov[:f].b rs,@(disp8,fp) xorc.b imm8,crb
1162 mov[:g] sz rs,ea_mem xorc.w imm16,sr
1163 mov[:g] sz ea,rd
1165 \x1f
1166 File: as.info, Node: HPPA-Dependent, Next: ESA/390-Dependent, Prev: H8/500-Dependent, Up: Machine Dependencies
1168 HPPA Dependent Features
1169 =======================
1171 * Menu:
1173 * HPPA Notes:: Notes
1174 * HPPA Options:: Options
1175 * HPPA Syntax:: Syntax
1176 * HPPA Floating Point:: Floating Point
1177 * HPPA Directives:: HPPA Machine Directives
1178 * HPPA Opcodes:: Opcodes
1180 \x1f
1181 File: as.info, Node: HPPA Notes, Next: HPPA Options, Up: HPPA-Dependent
1183 Notes
1184 -----
1186 As a back end for GNU CC `as' has been throughly tested and should
1187 work extremely well. We have tested it only minimally on hand written
1188 assembly code and no one has tested it much on the assembly output from
1189 the HP compilers.
1191 The format of the debugging sections has changed since the original
1192 `as' port (version 1.3X) was released; therefore, you must rebuild all
1193 HPPA objects and libraries with the new assembler so that you can debug
1194 the final executable.
1196 The HPPA `as' port generates a small subset of the relocations
1197 available in the SOM and ELF object file formats. Additional relocation
1198 support will be added as it becomes necessary.
1200 \x1f
1201 File: as.info, Node: HPPA Options, Next: HPPA Syntax, Prev: HPPA Notes, Up: HPPA-Dependent
1203 Options
1204 -------
1206 `as' has no machine-dependent command-line options for the HPPA.
1208 \x1f
1209 File: as.info, Node: HPPA Syntax, Next: HPPA Floating Point, Prev: HPPA Options, Up: HPPA-Dependent
1211 Syntax
1212 ------
1214 The assembler syntax closely follows the HPPA instruction set
1215 reference manual; assembler directives and general syntax closely
1216 follow the HPPA assembly language reference manual, with a few
1217 noteworthy differences.
1219 First, a colon may immediately follow a label definition. This is
1220 simply for compatibility with how most assembly language programmers
1221 write code.
1223 Some obscure expression parsing problems may affect hand written
1224 code which uses the `spop' instructions, or code which makes significant
1225 use of the `!' line separator.
1227 `as' is much less forgiving about missing arguments and other
1228 similar oversights than the HP assembler. `as' notifies you of missing
1229 arguments as syntax errors; this is regarded as a feature, not a bug.
1231 Finally, `as' allows you to use an external symbol without
1232 explicitly importing the symbol. _Warning:_ in the future this will be
1233 an error for HPPA targets.
1235 Special characters for HPPA targets include:
1237 `;' is the line comment character.
1239 `!' can be used instead of a newline to separate statements.
1241 Since `$' has no special meaning, you may use it in symbol names.
1243 \x1f
1244 File: as.info, Node: HPPA Floating Point, Next: HPPA Directives, Prev: HPPA Syntax, Up: HPPA-Dependent
1246 Floating Point
1247 --------------
1249 The HPPA family uses IEEE floating-point numbers.
1251 \x1f
1252 File: as.info, Node: HPPA Directives, Next: HPPA Opcodes, Prev: HPPA Floating Point, Up: HPPA-Dependent
1254 HPPA Assembler Directives
1255 -------------------------
1257 `as' for the HPPA supports many additional directives for
1258 compatibility with the native assembler. This section describes them
1259 only briefly. For detailed information on HPPA-specific assembler
1260 directives, see `HP9000 Series 800 Assembly Language Reference Manual'
1261 (HP 92432-90001).
1263 `as' does _not_ support the following assembler directives described
1264 in the HP manual:
1266 .endm .liston
1267 .enter .locct
1268 .leave .macro
1269 .listoff
1271 Beyond those implemented for compatibility, `as' supports one
1272 additional assembler directive for the HPPA: `.param'. It conveys
1273 register argument locations for static functions. Its syntax closely
1274 follows the `.export' directive.
1276 These are the additional directives in `as' for the HPPA:
1278 `.block N'
1279 `.blockz N'
1280 Reserve N bytes of storage, and initialize them to zero.
1282 `.call'
1283 Mark the beginning of a procedure call. Only the special case
1284 with _no arguments_ is allowed.
1286 `.callinfo [ PARAM=VALUE, ... ] [ FLAG, ... ]'
1287 Specify a number of parameters and flags that define the
1288 environment for a procedure.
1290 PARAM may be any of `frame' (frame size), `entry_gr' (end of
1291 general register range), `entry_fr' (end of float register range),
1292 `entry_sr' (end of space register range).
1294 The values for FLAG are `calls' or `caller' (proc has
1295 subroutines), `no_calls' (proc does not call subroutines),
1296 `save_rp' (preserve return pointer), `save_sp' (proc preserves
1297 stack pointer), `no_unwind' (do not unwind this proc), `hpux_int'
1298 (proc is interrupt routine).
1300 `.code'
1301 Assemble into the standard section called `$TEXT$', subsection
1302 `$CODE$'.
1304 `.copyright "STRING"'
1305 In the SOM object format, insert STRING into the object code,
1306 marked as a copyright string.
1308 `.copyright "STRING"'
1309 In the ELF object format, insert STRING into the object code,
1310 marked as a version string.
1312 `.enter'
1313 Not yet supported; the assembler rejects programs containing this
1314 directive.
1316 `.entry'
1317 Mark the beginning of a procedure.
1319 `.exit'
1320 Mark the end of a procedure.
1322 `.export NAME [ ,TYP ] [ ,PARAM=R ]'
1323 Make a procedure NAME available to callers. TYP, if present, must
1324 be one of `absolute', `code' (ELF only, not SOM), `data', `entry',
1325 `data', `entry', `millicode', `plabel', `pri_prog', or `sec_prog'.
1327 PARAM, if present, provides either relocation information for the
1328 procedure arguments and result, or a privilege level. PARAM may be
1329 `argwN' (where N ranges from `0' to `3', and indicates one of four
1330 one-word arguments); `rtnval' (the procedure's result); or
1331 `priv_lev' (privilege level). For arguments or the result, R
1332 specifies how to relocate, and must be one of `no' (not
1333 relocatable), `gr' (argument is in general register), `fr' (in
1334 floating point register), or `fu' (upper half of float register).
1335 For `priv_lev', R is an integer.
1337 `.half N'
1338 Define a two-byte integer constant N; synonym for the portable
1339 `as' directive `.short'.
1341 `.import NAME [ ,TYP ]'
1342 Converse of `.export'; make a procedure available to call. The
1343 arguments use the same conventions as the first two arguments for
1344 `.export'.
1346 `.label NAME'
1347 Define NAME as a label for the current assembly location.
1349 `.leave'
1350 Not yet supported; the assembler rejects programs containing this
1351 directive.
1353 `.origin LC'
1354 Advance location counter to LC. Synonym for the `{No value for
1355 `as'}' portable directive `.org'.
1357 `.param NAME [ ,TYP ] [ ,PARAM=R ]'
1358 Similar to `.export', but used for static procedures.
1360 `.proc'
1361 Use preceding the first statement of a procedure.
1363 `.procend'
1364 Use following the last statement of a procedure.
1366 `LABEL .reg EXPR'
1367 Synonym for `.equ'; define LABEL with the absolute expression EXPR
1368 as its value.
1370 `.space SECNAME [ ,PARAMS ]'
1371 Switch to section SECNAME, creating a new section by that name if
1372 necessary. You may only use PARAMS when creating a new section,
1373 not when switching to an existing one. SECNAME may identify a
1374 section by number rather than by name.
1376 If specified, the list PARAMS declares attributes of the section,
1377 identified by keywords. The keywords recognized are `spnum=EXP'
1378 (identify this section by the number EXP, an absolute expression),
1379 `sort=EXP' (order sections according to this sort key when linking;
1380 EXP is an absolute expression), `unloadable' (section contains no
1381 loadable data), `notdefined' (this section defined elsewhere), and
1382 `private' (data in this section not available to other programs).
1384 `.spnum SECNAM'
1385 Allocate four bytes of storage, and initialize them with the
1386 section number of the section named SECNAM. (You can define the
1387 section number with the HPPA `.space' directive.)
1389 `.string "STR"'
1390 Copy the characters in the string STR to the object file. *Note
1391 Strings: Strings, for information on escape sequences you can use
1392 in `as' strings.
1394 _Warning!_ The HPPA version of `.string' differs from the usual
1395 `as' definition: it does _not_ write a zero byte after copying STR.
1397 `.stringz "STR"'
1398 Like `.string', but appends a zero byte after copying STR to object
1399 file.
1401 `.subspa NAME [ ,PARAMS ]'
1402 `.nsubspa NAME [ ,PARAMS ]'
1403 Similar to `.space', but selects a subsection NAME within the
1404 current section. You may only specify PARAMS when you create a
1405 subsection (in the first instance of `.subspa' for this NAME).
1407 If specified, the list PARAMS declares attributes of the
1408 subsection, identified by keywords. The keywords recognized are
1409 `quad=EXPR' ("quadrant" for this subsection), `align=EXPR'
1410 (alignment for beginning of this subsection; a power of two),
1411 `access=EXPR' (value for "access rights" field), `sort=EXPR'
1412 (sorting order for this subspace in link), `code_only' (subsection
1413 contains only code), `unloadable' (subsection cannot be loaded
1414 into memory), `common' (subsection is common block), `dup_comm'
1415 (initialized data may have duplicate names), or `zero' (subsection
1416 is all zeros, do not write in object file).
1418 `.nsubspa' always creates a new subspace with the given name, even
1419 if one with the same name already exists.
1421 `.version "STR"'
1422 Write STR as version identifier in object code.
1424 \x1f
1425 File: as.info, Node: HPPA Opcodes, Prev: HPPA Directives, Up: HPPA-Dependent
1427 Opcodes
1428 -------
1430 For detailed information on the HPPA machine instruction set, see
1431 `PA-RISC Architecture and Instruction Set Reference Manual' (HP
1432 09740-90039).
1434 \x1f
1435 File: as.info, Node: ESA/390-Dependent, Next: i386-Dependent, Prev: HPPA-Dependent, Up: Machine Dependencies
1437 ESA/390 Dependent Features
1438 ==========================
1440 * Menu:
1442 * ESA/390 Notes:: Notes
1443 * ESA/390 Options:: Options
1444 * ESA/390 Syntax:: Syntax
1445 * ESA/390 Floating Point:: Floating Point
1446 * ESA/390 Directives:: ESA/390 Machine Directives
1447 * ESA/390 Opcodes:: Opcodes
1449 \x1f
1450 File: as.info, Node: ESA/390 Notes, Next: ESA/390 Options, Up: ESA/390-Dependent
1452 Notes
1453 -----
1455 The ESA/390 `as' port is currently intended to be a back-end for the
1456 GNU CC compiler. It is not HLASM compatible, although it does support
1457 a subset of some of the HLASM directives. The only supported binary
1458 file format is ELF; none of the usual MVS/VM/OE/USS object file
1459 formats, such as ESD or XSD, are supported.
1461 When used with the GNU CC compiler, the ESA/390 `as' will produce
1462 correct, fully relocated, functional binaries, and has been used to
1463 compile and execute large projects. However, many aspects should still
1464 be considered experimental; these include shared library support,
1465 dynamically loadable objects, and any relocation other than the 31-bit
1466 relocation.
1468 \x1f
1469 File: as.info, Node: ESA/390 Options, Next: ESA/390 Syntax, Prev: ESA/390 Notes, Up: ESA/390-Dependent
1471 Options
1472 -------
1474 `as' has no machine-dependent command-line options for the ESA/390.
1476 \x1f
1477 File: as.info, Node: ESA/390 Syntax, Next: ESA/390 Floating Point, Prev: ESA/390 Options, Up: ESA/390-Dependent
1479 Syntax
1480 ------
1482 The opcode/operand syntax follows the ESA/390 Principles of Operation
1483 manual; assembler directives and general syntax are loosely based on the
1484 prevailing AT&T/SVR4/ELF/Solaris style notation. HLASM-style directives
1485 are _not_ supported for the most part, with the exception of those
1486 described herein.
1488 A leading dot in front of directives is optional, and the case of
1489 directives is ignored; thus for example, .using and USING have the same
1490 effect.
1492 A colon may immediately follow a label definition. This is simply
1493 for compatibility with how most assembly language programmers write
1494 code.
1496 `#' is the line comment character.
1498 `;' can be used instead of a newline to separate statements.
1500 Since `$' has no special meaning, you may use it in symbol names.
1502 Registers can be given the symbolic names r0..r15, fp0, fp2, fp4,
1503 fp6. By using thesse symbolic names, `as' can detect simple syntax
1504 errors. The name rarg or r.arg is a synonym for r11, rtca or r.tca for
1505 r12, sp, r.sp, dsa r.dsa for r13, lr or r.lr for r14, rbase or r.base
1506 for r3 and rpgt or r.pgt for r4.
1508 `*' is the current location counter. Unlike `.' it is always
1509 relative to the last USING directive. Note that this means that
1510 expressions cannot use multiplication, as any occurence of `*' will be
1511 interpreted as a location counter.
1513 All labels are relative to the last USING. Thus, branches to a label
1514 always imply the use of base+displacement.
1516 Many of the usual forms of address constants / address literals are
1517 supported. Thus,
1518 .using *,r3
1519 L r15,=A(some_routine)
1520 LM r6,r7,=V(some_longlong_extern)
1521 A r1,=F'12'
1522 AH r0,=H'42'
1523 ME r6,=E'3.1416'
1524 MD r6,=D'3.14159265358979'
1525 O r6,=XL4'cacad0d0'
1526 .ltorg
1527 should all behave as expected: that is, an entry in the literal pool
1528 will be created (or reused if it already exists), and the instruction
1529 operands will be the displacement into the literal pool using the
1530 current base register (as last declared with the `.using' directive).
1532 \x1f
1533 File: as.info, Node: ESA/390 Floating Point, Next: ESA/390 Directives, Prev: ESA/390 Syntax, Up: ESA/390-Dependent
1535 Floating Point
1536 --------------
1538 The assembler generates only IEEE floating-point numbers. The older
1539 floiating point formats are not supported.