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[binutils.git] / opcodes / m32r-asm.c
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1 /* Assembler interface for targets using CGEN. -*- C -*-
2 CGEN: Cpu tools GENerator
4 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 - the resultant file is machine generated, cgen-asm.in isn't
7 Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
9 This file is part of the GNU Binutils and GDB, the GNU debugger.
11 This program is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 2, or (at your option)
14 any later version.
16 This program is distributed in the hope that it will be useful,
17 but WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 GNU General Public License for more details.
21 You should have received a copy of the GNU General Public License
22 along with this program; if not, write to the Free Software Foundation, Inc.,
23 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
25 /* ??? Eventually more and more of this stuff can go to cpu-independent files.
26 Keep that in mind. */
28 #include "sysdep.h"
29 #include <stdio.h>
30 #include "ansidecl.h"
31 #include "bfd.h"
32 #include "symcat.h"
33 #include "m32r-desc.h"
34 #include "m32r-opc.h"
35 #include "opintl.h"
36 #include "xregex.h"
37 #include "libiberty.h"
38 #include "safe-ctype.h"
40 #undef min
41 #define min(a,b) ((a) < (b) ? (a) : (b))
42 #undef max
43 #define max(a,b) ((a) > (b) ? (a) : (b))
45 static const char * parse_insn_normal
46 (CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *);
48 /* -- assembler routines inserted here. */
50 /* -- asm.c */
51 static const char * parse_hash
52 PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *));
53 static const char * parse_hi16
54 PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *));
55 static const char * parse_slo16
56 PARAMS ((CGEN_CPU_DESC, const char **, int, long *));
57 static const char * parse_ulo16
58 PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *));
60 /* Handle '#' prefixes (i.e. skip over them). */
62 static const char *
63 parse_hash (cd, strp, opindex, valuep)
64 CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
65 const char **strp;
66 int opindex ATTRIBUTE_UNUSED;
67 unsigned long *valuep ATTRIBUTE_UNUSED;
69 if (**strp == '#')
70 ++*strp;
71 return NULL;
74 /* Handle shigh(), high(). */
76 static const char *
77 parse_hi16 (cd, strp, opindex, valuep)
78 CGEN_CPU_DESC cd;
79 const char **strp;
80 int opindex;
81 unsigned long *valuep;
83 const char *errmsg;
84 enum cgen_parse_operand_result result_type;
85 bfd_vma value;
87 if (**strp == '#')
88 ++*strp;
90 if (strncasecmp (*strp, "high(", 5) == 0)
92 *strp += 5;
93 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_HI16_ULO,
94 &result_type, &value);
95 if (**strp != ')')
96 return "missing `)'";
97 ++*strp;
98 if (errmsg == NULL
99 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
100 value >>= 16;
101 *valuep = value;
102 return errmsg;
104 else if (strncasecmp (*strp, "shigh(", 6) == 0)
106 *strp += 6;
107 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_HI16_SLO,
108 &result_type, &value);
109 if (**strp != ')')
110 return "missing `)'";
111 ++*strp;
112 if (errmsg == NULL
113 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
114 value = (value >> 16) + (value & 0x8000 ? 1 : 0);
115 *valuep = value;
116 return errmsg;
119 return cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
122 /* Handle low() in a signed context. Also handle sda().
123 The signedness of the value doesn't matter to low(), but this also
124 handles the case where low() isn't present. */
126 static const char *
127 parse_slo16 (cd, strp, opindex, valuep)
128 CGEN_CPU_DESC cd;
129 const char **strp;
130 int opindex;
131 long *valuep;
133 const char *errmsg;
134 enum cgen_parse_operand_result result_type;
135 bfd_vma value;
137 if (**strp == '#')
138 ++*strp;
140 if (strncasecmp (*strp, "low(", 4) == 0)
142 *strp += 4;
143 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_LO16,
144 &result_type, &value);
145 if (**strp != ')')
146 return "missing `)'";
147 ++*strp;
148 if (errmsg == NULL
149 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
151 value &= 0xffff;
152 if (value & 0x8000)
153 value |= 0xffff0000;
155 *valuep = value;
156 return errmsg;
159 if (strncasecmp (*strp, "sda(", 4) == 0)
161 *strp += 4;
162 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_SDA16,
163 NULL, &value);
164 if (**strp != ')')
165 return "missing `)'";
166 ++*strp;
167 *valuep = value;
168 return errmsg;
171 return cgen_parse_signed_integer (cd, strp, opindex, valuep);
174 /* Handle low() in an unsigned context.
175 The signedness of the value doesn't matter to low(), but this also
176 handles the case where low() isn't present. */
178 static const char *
179 parse_ulo16 (cd, strp, opindex, valuep)
180 CGEN_CPU_DESC cd;
181 const char **strp;
182 int opindex;
183 unsigned long *valuep;
185 const char *errmsg;
186 enum cgen_parse_operand_result result_type;
187 bfd_vma value;
189 if (**strp == '#')
190 ++*strp;
192 if (strncasecmp (*strp, "low(", 4) == 0)
194 *strp += 4;
195 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_LO16,
196 &result_type, &value);
197 if (**strp != ')')
198 return "missing `)'";
199 ++*strp;
200 if (errmsg == NULL
201 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
202 value &= 0xffff;
203 *valuep = value;
204 return errmsg;
207 return cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
210 /* -- */
212 const char * m32r_cgen_parse_operand
213 PARAMS ((CGEN_CPU_DESC, int, const char **, CGEN_FIELDS *));
215 /* Main entry point for operand parsing.
217 This function is basically just a big switch statement. Earlier versions
218 used tables to look up the function to use, but
219 - if the table contains both assembler and disassembler functions then
220 the disassembler contains much of the assembler and vice-versa,
221 - there's a lot of inlining possibilities as things grow,
222 - using a switch statement avoids the function call overhead.
224 This function could be moved into `parse_insn_normal', but keeping it
225 separate makes clear the interface between `parse_insn_normal' and each of
226 the handlers. */
228 const char *
229 m32r_cgen_parse_operand (cd, opindex, strp, fields)
230 CGEN_CPU_DESC cd;
231 int opindex;
232 const char ** strp;
233 CGEN_FIELDS * fields;
235 const char * errmsg = NULL;
236 /* Used by scalar operands that still need to be parsed. */
237 long junk ATTRIBUTE_UNUSED;
239 switch (opindex)
241 case M32R_OPERAND_ACC :
242 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_h_accums, & fields->f_acc);
243 break;
244 case M32R_OPERAND_ACCD :
245 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_h_accums, & fields->f_accd);
246 break;
247 case M32R_OPERAND_ACCS :
248 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_h_accums, & fields->f_accs);
249 break;
250 case M32R_OPERAND_DCR :
251 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_cr_names, & fields->f_r1);
252 break;
253 case M32R_OPERAND_DISP16 :
255 bfd_vma value;
256 errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_DISP16, 0, NULL, & value);
257 fields->f_disp16 = value;
259 break;
260 case M32R_OPERAND_DISP24 :
262 bfd_vma value;
263 errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_DISP24, 0, NULL, & value);
264 fields->f_disp24 = value;
266 break;
267 case M32R_OPERAND_DISP8 :
269 bfd_vma value;
270 errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_DISP8, 0, NULL, & value);
271 fields->f_disp8 = value;
273 break;
274 case M32R_OPERAND_DR :
275 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_gr_names, & fields->f_r1);
276 break;
277 case M32R_OPERAND_HASH :
278 errmsg = parse_hash (cd, strp, M32R_OPERAND_HASH, &junk);
279 break;
280 case M32R_OPERAND_HI16 :
281 errmsg = parse_hi16 (cd, strp, M32R_OPERAND_HI16, &fields->f_hi16);
282 break;
283 case M32R_OPERAND_IMM1 :
284 errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_IMM1, &fields->f_imm1);
285 break;
286 case M32R_OPERAND_SCR :
287 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_cr_names, & fields->f_r2);
288 break;
289 case M32R_OPERAND_SIMM16 :
290 errmsg = cgen_parse_signed_integer (cd, strp, M32R_OPERAND_SIMM16, &fields->f_simm16);
291 break;
292 case M32R_OPERAND_SIMM8 :
293 errmsg = cgen_parse_signed_integer (cd, strp, M32R_OPERAND_SIMM8, &fields->f_simm8);
294 break;
295 case M32R_OPERAND_SLO16 :
296 errmsg = parse_slo16 (cd, strp, M32R_OPERAND_SLO16, &fields->f_simm16);
297 break;
298 case M32R_OPERAND_SR :
299 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_gr_names, & fields->f_r2);
300 break;
301 case M32R_OPERAND_SRC1 :
302 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_gr_names, & fields->f_r1);
303 break;
304 case M32R_OPERAND_SRC2 :
305 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_gr_names, & fields->f_r2);
306 break;
307 case M32R_OPERAND_UIMM16 :
308 errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM16, &fields->f_uimm16);
309 break;
310 case M32R_OPERAND_UIMM24 :
312 bfd_vma value;
313 errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_UIMM24, 0, NULL, & value);
314 fields->f_uimm24 = value;
316 break;
317 case M32R_OPERAND_UIMM3 :
318 errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM3, &fields->f_uimm3);
319 break;
320 case M32R_OPERAND_UIMM4 :
321 errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM4, &fields->f_uimm4);
322 break;
323 case M32R_OPERAND_UIMM5 :
324 errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM5, &fields->f_uimm5);
325 break;
326 case M32R_OPERAND_UIMM8 :
327 errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM8, &fields->f_uimm8);
328 break;
329 case M32R_OPERAND_ULO16 :
330 errmsg = parse_ulo16 (cd, strp, M32R_OPERAND_ULO16, &fields->f_uimm16);
331 break;
333 default :
334 /* xgettext:c-format */
335 fprintf (stderr, _("Unrecognized field %d while parsing.\n"), opindex);
336 abort ();
339 return errmsg;
342 cgen_parse_fn * const m32r_cgen_parse_handlers[] =
344 parse_insn_normal,
347 void
348 m32r_cgen_init_asm (cd)
349 CGEN_CPU_DESC cd;
351 m32r_cgen_init_opcode_table (cd);
352 m32r_cgen_init_ibld_table (cd);
353 cd->parse_handlers = & m32r_cgen_parse_handlers[0];
354 cd->parse_operand = m32r_cgen_parse_operand;
359 /* Regex construction routine.
361 This translates an opcode syntax string into a regex string,
362 by replacing any non-character syntax element (such as an
363 opcode) with the pattern '.*'
365 It then compiles the regex and stores it in the opcode, for
366 later use by m32r_cgen_assemble_insn
368 Returns NULL for success, an error message for failure. */
370 char *
371 m32r_cgen_build_insn_regex (CGEN_INSN *insn)
373 CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn);
374 const char *mnem = CGEN_INSN_MNEMONIC (insn);
375 char rxbuf[CGEN_MAX_RX_ELEMENTS];
376 char *rx = rxbuf;
377 const CGEN_SYNTAX_CHAR_TYPE *syn;
378 int reg_err;
380 syn = CGEN_SYNTAX_STRING (CGEN_OPCODE_SYNTAX (opc));
382 /* Mnemonics come first in the syntax string. */
383 if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
384 return _("missing mnemonic in syntax string");
385 ++syn;
387 /* Generate a case sensitive regular expression that emulates case
388 insensitive matching in the "C" locale. We cannot generate a case
389 insensitive regular expression because in Turkish locales, 'i' and 'I'
390 are not equal modulo case conversion. */
392 /* Copy the literal mnemonic out of the insn. */
393 for (; *mnem; mnem++)
395 char c = *mnem;
397 if (ISALPHA (c))
399 *rx++ = '[';
400 *rx++ = TOLOWER (c);
401 *rx++ = TOUPPER (c);
402 *rx++ = ']';
404 else
405 *rx++ = c;
408 /* Copy any remaining literals from the syntax string into the rx. */
409 for(; * syn != 0 && rx <= rxbuf + (CGEN_MAX_RX_ELEMENTS - 7 - 4); ++syn)
411 if (CGEN_SYNTAX_CHAR_P (* syn))
413 char c = CGEN_SYNTAX_CHAR (* syn);
415 switch (c)
417 /* Escape any regex metacharacters in the syntax. */
418 case '.': case '[': case '\\':
419 case '*': case '^': case '$':
421 #ifdef CGEN_ESCAPE_EXTENDED_REGEX
422 case '?': case '{': case '}':
423 case '(': case ')': case '*':
424 case '|': case '+': case ']':
425 #endif
426 *rx++ = '\\';
427 *rx++ = c;
428 break;
430 default:
431 if (ISALPHA (c))
433 *rx++ = '[';
434 *rx++ = TOLOWER (c);
435 *rx++ = TOUPPER (c);
436 *rx++ = ']';
438 else
439 *rx++ = c;
440 break;
443 else
445 /* Replace non-syntax fields with globs. */
446 *rx++ = '.';
447 *rx++ = '*';
451 /* Trailing whitespace ok. */
452 * rx++ = '[';
453 * rx++ = ' ';
454 * rx++ = '\t';
455 * rx++ = ']';
456 * rx++ = '*';
458 /* But anchor it after that. */
459 * rx++ = '$';
460 * rx = '\0';
462 CGEN_INSN_RX (insn) = xmalloc (sizeof (regex_t));
463 reg_err = regcomp ((regex_t *) CGEN_INSN_RX (insn), rxbuf, REG_NOSUB);
465 if (reg_err == 0)
466 return NULL;
467 else
469 static char msg[80];
471 regerror (reg_err, (regex_t *) CGEN_INSN_RX (insn), msg, 80);
472 regfree ((regex_t *) CGEN_INSN_RX (insn));
473 free (CGEN_INSN_RX (insn));
474 (CGEN_INSN_RX (insn)) = NULL;
475 return msg;
480 /* Default insn parser.
482 The syntax string is scanned and operands are parsed and stored in FIELDS.
483 Relocs are queued as we go via other callbacks.
485 ??? Note that this is currently an all-or-nothing parser. If we fail to
486 parse the instruction, we return 0 and the caller will start over from
487 the beginning. Backtracking will be necessary in parsing subexpressions,
488 but that can be handled there. Not handling backtracking here may get
489 expensive in the case of the m68k. Deal with later.
491 Returns NULL for success, an error message for failure. */
493 static const char *
494 parse_insn_normal (CGEN_CPU_DESC cd,
495 const CGEN_INSN *insn,
496 const char **strp,
497 CGEN_FIELDS *fields)
499 /* ??? Runtime added insns not handled yet. */
500 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
501 const char *str = *strp;
502 const char *errmsg;
503 const char *p;
504 const CGEN_SYNTAX_CHAR_TYPE * syn;
505 #ifdef CGEN_MNEMONIC_OPERANDS
506 /* FIXME: wip */
507 int past_opcode_p;
508 #endif
510 /* For now we assume the mnemonic is first (there are no leading operands).
511 We can parse it without needing to set up operand parsing.
512 GAS's input scrubber will ensure mnemonics are lowercase, but we may
513 not be called from GAS. */
514 p = CGEN_INSN_MNEMONIC (insn);
515 while (*p && TOLOWER (*p) == TOLOWER (*str))
516 ++p, ++str;
518 if (* p)
519 return _("unrecognized instruction");
521 #ifndef CGEN_MNEMONIC_OPERANDS
522 if (* str && ! ISSPACE (* str))
523 return _("unrecognized instruction");
524 #endif
526 CGEN_INIT_PARSE (cd);
527 cgen_init_parse_operand (cd);
528 #ifdef CGEN_MNEMONIC_OPERANDS
529 past_opcode_p = 0;
530 #endif
532 /* We don't check for (*str != '\0') here because we want to parse
533 any trailing fake arguments in the syntax string. */
534 syn = CGEN_SYNTAX_STRING (syntax);
536 /* Mnemonics come first for now, ensure valid string. */
537 if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
538 abort ();
540 ++syn;
542 while (* syn != 0)
544 /* Non operand chars must match exactly. */
545 if (CGEN_SYNTAX_CHAR_P (* syn))
547 /* FIXME: While we allow for non-GAS callers above, we assume the
548 first char after the mnemonic part is a space. */
549 /* FIXME: We also take inappropriate advantage of the fact that
550 GAS's input scrubber will remove extraneous blanks. */
551 if (TOLOWER (*str) == TOLOWER (CGEN_SYNTAX_CHAR (* syn)))
553 #ifdef CGEN_MNEMONIC_OPERANDS
554 if (CGEN_SYNTAX_CHAR(* syn) == ' ')
555 past_opcode_p = 1;
556 #endif
557 ++ syn;
558 ++ str;
560 else if (*str)
562 /* Syntax char didn't match. Can't be this insn. */
563 static char msg [80];
565 /* xgettext:c-format */
566 sprintf (msg, _("syntax error (expected char `%c', found `%c')"),
567 CGEN_SYNTAX_CHAR(*syn), *str);
568 return msg;
570 else
572 /* Ran out of input. */
573 static char msg [80];
575 /* xgettext:c-format */
576 sprintf (msg, _("syntax error (expected char `%c', found end of instruction)"),
577 CGEN_SYNTAX_CHAR(*syn));
578 return msg;
580 continue;
583 /* We have an operand of some sort. */
584 errmsg = cd->parse_operand (cd, CGEN_SYNTAX_FIELD (*syn),
585 &str, fields);
586 if (errmsg)
587 return errmsg;
589 /* Done with this operand, continue with next one. */
590 ++ syn;
593 /* If we're at the end of the syntax string, we're done. */
594 if (* syn == 0)
596 /* FIXME: For the moment we assume a valid `str' can only contain
597 blanks now. IE: We needn't try again with a longer version of
598 the insn and it is assumed that longer versions of insns appear
599 before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3). */
600 while (ISSPACE (* str))
601 ++ str;
603 if (* str != '\0')
604 return _("junk at end of line"); /* FIXME: would like to include `str' */
606 return NULL;
609 /* We couldn't parse it. */
610 return _("unrecognized instruction");
613 /* Main entry point.
614 This routine is called for each instruction to be assembled.
615 STR points to the insn to be assembled.
616 We assume all necessary tables have been initialized.
617 The assembled instruction, less any fixups, is stored in BUF.
618 Remember that if CGEN_INT_INSN_P then BUF is an int and thus the value
619 still needs to be converted to target byte order, otherwise BUF is an array
620 of bytes in target byte order.
621 The result is a pointer to the insn's entry in the opcode table,
622 or NULL if an error occured (an error message will have already been
623 printed).
625 Note that when processing (non-alias) macro-insns,
626 this function recurses.
628 ??? It's possible to make this cpu-independent.
629 One would have to deal with a few minor things.
630 At this point in time doing so would be more of a curiosity than useful
631 [for example this file isn't _that_ big], but keeping the possibility in
632 mind helps keep the design clean. */
634 const CGEN_INSN *
635 m32r_cgen_assemble_insn (CGEN_CPU_DESC cd,
636 const char *str,
637 CGEN_FIELDS *fields,
638 CGEN_INSN_BYTES_PTR buf,
639 char **errmsg)
641 const char *start;
642 CGEN_INSN_LIST *ilist;
643 const char *parse_errmsg = NULL;
644 const char *insert_errmsg = NULL;
645 int recognized_mnemonic = 0;
647 /* Skip leading white space. */
648 while (ISSPACE (* str))
649 ++ str;
651 /* The instructions are stored in hashed lists.
652 Get the first in the list. */
653 ilist = CGEN_ASM_LOOKUP_INSN (cd, str);
655 /* Keep looking until we find a match. */
656 start = str;
657 for ( ; ilist != NULL ; ilist = CGEN_ASM_NEXT_INSN (ilist))
659 const CGEN_INSN *insn = ilist->insn;
660 recognized_mnemonic = 1;
662 #ifdef CGEN_VALIDATE_INSN_SUPPORTED
663 /* Not usually needed as unsupported opcodes
664 shouldn't be in the hash lists. */
665 /* Is this insn supported by the selected cpu? */
666 if (! m32r_cgen_insn_supported (cd, insn))
667 continue;
668 #endif
669 /* If the RELAXED attribute is set, this is an insn that shouldn't be
670 chosen immediately. Instead, it is used during assembler/linker
671 relaxation if possible. */
672 if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED) != 0)
673 continue;
675 str = start;
677 /* Skip this insn if str doesn't look right lexically. */
678 if (CGEN_INSN_RX (insn) != NULL &&
679 regexec ((regex_t *) CGEN_INSN_RX (insn), str, 0, NULL, 0) == REG_NOMATCH)
680 continue;
682 /* Allow parse/insert handlers to obtain length of insn. */
683 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
685 parse_errmsg = CGEN_PARSE_FN (cd, insn) (cd, insn, & str, fields);
686 if (parse_errmsg != NULL)
687 continue;
689 /* ??? 0 is passed for `pc'. */
690 insert_errmsg = CGEN_INSERT_FN (cd, insn) (cd, insn, fields, buf,
691 (bfd_vma) 0);
692 if (insert_errmsg != NULL)
693 continue;
695 /* It is up to the caller to actually output the insn and any
696 queued relocs. */
697 return insn;
701 static char errbuf[150];
702 #ifdef CGEN_VERBOSE_ASSEMBLER_ERRORS
703 const char *tmp_errmsg;
705 /* If requesting verbose error messages, use insert_errmsg.
706 Failing that, use parse_errmsg. */
707 tmp_errmsg = (insert_errmsg ? insert_errmsg :
708 parse_errmsg ? parse_errmsg :
709 recognized_mnemonic ?
710 _("unrecognized form of instruction") :
711 _("unrecognized instruction"));
713 if (strlen (start) > 50)
714 /* xgettext:c-format */
715 sprintf (errbuf, "%s `%.50s...'", tmp_errmsg, start);
716 else
717 /* xgettext:c-format */
718 sprintf (errbuf, "%s `%.50s'", tmp_errmsg, start);
719 #else
720 if (strlen (start) > 50)
721 /* xgettext:c-format */
722 sprintf (errbuf, _("bad instruction `%.50s...'"), start);
723 else
724 /* xgettext:c-format */
725 sprintf (errbuf, _("bad instruction `%.50s'"), start);
726 #endif
728 *errmsg = errbuf;
729 return NULL;
733 #if 0 /* This calls back to GAS which we can't do without care. */
735 /* Record each member of OPVALS in the assembler's symbol table.
736 This lets GAS parse registers for us.
737 ??? Interesting idea but not currently used. */
739 /* Record each member of OPVALS in the assembler's symbol table.
740 FIXME: Not currently used. */
742 void
743 m32r_cgen_asm_hash_keywords (CGEN_CPU_DESC cd, CGEN_KEYWORD *opvals)
745 CGEN_KEYWORD_SEARCH search = cgen_keyword_search_init (opvals, NULL);
746 const CGEN_KEYWORD_ENTRY * ke;
748 while ((ke = cgen_keyword_search_next (& search)) != NULL)
750 #if 0 /* Unnecessary, should be done in the search routine. */
751 if (! m32r_cgen_opval_supported (ke))
752 continue;
753 #endif
754 cgen_asm_record_register (cd, ke->name, ke->value);
758 #endif /* 0 */