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[binutils.git] / opcodes / m32c-ibld.c
blob31d5f9f99cf6a3064a4b733bd5e5c55721fd463c
1 /* Instruction building/extraction support for m32c. -*- C -*-
2
3 THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
4 - the resultant file is machine generated, cgen-ibld.in isn't
5
6 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005, 2006
7 Free Software Foundation, Inc.
8
9 This file is part of the GNU Binutils and GDB, the GNU debugger.
10
11 This program is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 2, or (at your option)
14 any later version.
15
16 This program is distributed in the hope that it will be useful,
17 but WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 GNU General Public License for more details.
20
21 You should have received a copy of the GNU General Public License
22 along with this program; if not, write to the Free Software Foundation, Inc.,
23 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
24
25 /* ??? Eventually more and more of this stuff can go to cpu-independent files.
26 Keep that in mind. */
27
28 #include "sysdep.h"
29 #include <stdio.h>
30 #include "ansidecl.h"
31 #include "dis-asm.h"
32 #include "bfd.h"
33 #include "symcat.h"
34 #include "m32c-desc.h"
35 #include "m32c-opc.h"
36 #include "opintl.h"
37 #include "safe-ctype.h"
38
39 #undef min
40 #define min(a,b) ((a) < (b) ? (a) : (b))
41 #undef max
42 #define max(a,b) ((a) > (b) ? (a) : (b))
43
44 /* Used by the ifield rtx function. */
45 #define FLD(f) (fields->f)
46
47 static const char * insert_normal
48 (CGEN_CPU_DESC, long, unsigned int, unsigned int, unsigned int,
49 unsigned int, unsigned int, unsigned int, CGEN_INSN_BYTES_PTR);
50 static const char * insert_insn_normal
51 (CGEN_CPU_DESC, const CGEN_INSN *,
52 CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
53 static int extract_normal
54 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, CGEN_INSN_INT,
55 unsigned int, unsigned int, unsigned int, unsigned int,
56 unsigned int, unsigned int, bfd_vma, long *);
57 static int extract_insn_normal
58 (CGEN_CPU_DESC, const CGEN_INSN *, CGEN_EXTRACT_INFO *,
59 CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
60 #if CGEN_INT_INSN_P
61 static void put_insn_int_value
62 (CGEN_CPU_DESC, CGEN_INSN_BYTES_PTR, int, int, CGEN_INSN_INT);
63 #endif
64 #if ! CGEN_INT_INSN_P
65 static CGEN_INLINE void insert_1
66 (CGEN_CPU_DESC, unsigned long, int, int, int, unsigned char *);
67 static CGEN_INLINE int fill_cache
68 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, bfd_vma);
69 static CGEN_INLINE long extract_1
70 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, int, unsigned char *, bfd_vma);
71 #endif
72 \f
73 /* Operand insertion. */
74
75 #if ! CGEN_INT_INSN_P
76
77 /* Subroutine of insert_normal. */
78
79 static CGEN_INLINE void
80 insert_1 (CGEN_CPU_DESC cd,
81 unsigned long value,
82 int start,
83 int length,
84 int word_length,
85 unsigned char *bufp)
86 {
87 unsigned long x,mask;
88 int shift;
89
90 x = cgen_get_insn_value (cd, bufp, word_length);
91
92 /* Written this way to avoid undefined behaviour. */
93 mask = (((1L << (length - 1)) - 1) << 1) | 1;
94 if (CGEN_INSN_LSB0_P)
95 shift = (start + 1) - length;
96 else
97 shift = (word_length - (start + length));
98 x = (x & ~(mask << shift)) | ((value & mask) << shift);
99
100 cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x);
101 }
102
103 #endif /* ! CGEN_INT_INSN_P */
104
105 /* Default insertion routine.
106
107 ATTRS is a mask of the boolean attributes.
108 WORD_OFFSET is the offset in bits from the start of the insn of the value.
109 WORD_LENGTH is the length of the word in bits in which the value resides.
110 START is the starting bit number in the word, architecture origin.
111 LENGTH is the length of VALUE in bits.
112 TOTAL_LENGTH is the total length of the insn in bits.
113
114 The result is an error message or NULL if success. */
115
116 /* ??? This duplicates functionality with bfd's howto table and
117 bfd_install_relocation. */
118 /* ??? This doesn't handle bfd_vma's. Create another function when
119 necessary. */
120
121 static const char *
122 insert_normal (CGEN_CPU_DESC cd,
123 long value,
124 unsigned int attrs,
125 unsigned int word_offset,
126 unsigned int start,
127 unsigned int length,
128 unsigned int word_length,
129 unsigned int total_length,
130 CGEN_INSN_BYTES_PTR buffer)
131 {
132 static char errbuf[100];
133 /* Written this way to avoid undefined behaviour. */
134 unsigned long mask = (((1L << (length - 1)) - 1) << 1) | 1;
135
136 /* If LENGTH is zero, this operand doesn't contribute to the value. */
137 if (length == 0)
138 return NULL;
139
140 if (word_length > 32)
141 abort ();
142
143 /* For architectures with insns smaller than the base-insn-bitsize,
144 word_length may be too big. */
145 if (cd->min_insn_bitsize < cd->base_insn_bitsize)
146 {
147 if (word_offset == 0
148 && word_length > total_length)
149 word_length = total_length;
150 }
151
152 /* Ensure VALUE will fit. */
153 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT))
154 {
155 long minval = - (1L << (length - 1));
156 unsigned long maxval = mask;
157
158 if ((value > 0 && (unsigned long) value > maxval)
159 || value < minval)
160 {
161 /* xgettext:c-format */
162 sprintf (errbuf,
163 _("operand out of range (%ld not between %ld and %lu)"),
164 value, minval, maxval);
165 return errbuf;
166 }
167 }
168 else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED))
169 {
170 unsigned long maxval = mask;
171 unsigned long val = (unsigned long) value;
172
173 /* For hosts with a word size > 32 check to see if value has been sign
174 extended beyond 32 bits. If so then ignore these higher sign bits
175 as the user is attempting to store a 32-bit signed value into an
176 unsigned 32-bit field which is allowed. */
177 if (sizeof (unsigned long) > 4 && ((value >> 32) == -1))
178 val &= 0xFFFFFFFF;
179
180 if (val > maxval)
181 {
182 /* xgettext:c-format */
183 sprintf (errbuf,
184 _("operand out of range (0x%lx not between 0 and 0x%lx)"),
185 val, maxval);
186 return errbuf;
187 }
188 }
189 else
190 {
191 if (! cgen_signed_overflow_ok_p (cd))
192 {
193 long minval = - (1L << (length - 1));
194 long maxval = (1L << (length - 1)) - 1;
195
196 if (value < minval || value > maxval)
197 {
198 sprintf
199 /* xgettext:c-format */
200 (errbuf, _("operand out of range (%ld not between %ld and %ld)"),
201 value, minval, maxval);
202 return errbuf;
203 }
204 }
205 }
206
207 #if CGEN_INT_INSN_P
208
209 {
210 int shift;
211
212 if (CGEN_INSN_LSB0_P)
213 shift = (word_offset + start + 1) - length;
214 else
215 shift = total_length - (word_offset + start + length);
216 *buffer = (*buffer & ~(mask << shift)) | ((value & mask) << shift);
217 }
218
219 #else /* ! CGEN_INT_INSN_P */
220
221 {
222 unsigned char *bufp = (unsigned char *) buffer + word_offset / 8;
223
224 insert_1 (cd, value, start, length, word_length, bufp);
225 }
226
227 #endif /* ! CGEN_INT_INSN_P */
228
229 return NULL;
230 }
231
232 /* Default insn builder (insert handler).
233 The instruction is recorded in CGEN_INT_INSN_P byte order (meaning
234 that if CGEN_INSN_BYTES_PTR is an int * and thus, the value is
235 recorded in host byte order, otherwise BUFFER is an array of bytes
236 and the value is recorded in target byte order).
237 The result is an error message or NULL if success. */
238
239 static const char *
240 insert_insn_normal (CGEN_CPU_DESC cd,
241 const CGEN_INSN * insn,
242 CGEN_FIELDS * fields,
243 CGEN_INSN_BYTES_PTR buffer,
244 bfd_vma pc)
245 {
246 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
247 unsigned long value;
248 const CGEN_SYNTAX_CHAR_TYPE * syn;
249
250 CGEN_INIT_INSERT (cd);
251 value = CGEN_INSN_BASE_VALUE (insn);
252
253 /* If we're recording insns as numbers (rather than a string of bytes),
254 target byte order handling is deferred until later. */
255
256 #if CGEN_INT_INSN_P
257
258 put_insn_int_value (cd, buffer, cd->base_insn_bitsize,
259 CGEN_FIELDS_BITSIZE (fields), value);
260
261 #else
262
263 cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize,
264 (unsigned) CGEN_FIELDS_BITSIZE (fields)),
265 value);
266
267 #endif /* ! CGEN_INT_INSN_P */
268
269 /* ??? It would be better to scan the format's fields.
270 Still need to be able to insert a value based on the operand though;
271 e.g. storing a branch displacement that got resolved later.
272 Needs more thought first. */
273
274 for (syn = CGEN_SYNTAX_STRING (syntax); * syn; ++ syn)
275 {
276 const char *errmsg;
277
278 if (CGEN_SYNTAX_CHAR_P (* syn))
279 continue;
280
281 errmsg = (* cd->insert_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
282 fields, buffer, pc);
283 if (errmsg)
284 return errmsg;
285 }
286
287 return NULL;
288 }
289
290 #if CGEN_INT_INSN_P
291 /* Cover function to store an insn value into an integral insn. Must go here
292 because it needs <prefix>-desc.h for CGEN_INT_INSN_P. */
293
294 static void
295 put_insn_int_value (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
296 CGEN_INSN_BYTES_PTR buf,
297 int length,
298 int insn_length,
299 CGEN_INSN_INT value)
300 {
301 /* For architectures with insns smaller than the base-insn-bitsize,
302 length may be too big. */
303 if (length > insn_length)
304 *buf = value;
305 else
306 {
307 int shift = insn_length - length;
308 /* Written this way to avoid undefined behaviour. */
309 CGEN_INSN_INT mask = (((1L << (length - 1)) - 1) << 1) | 1;
310
311 *buf = (*buf & ~(mask << shift)) | ((value & mask) << shift);
312 }
313 }
314 #endif
315 \f
316 /* Operand extraction. */
317
318 #if ! CGEN_INT_INSN_P
319
320 /* Subroutine of extract_normal.
321 Ensure sufficient bytes are cached in EX_INFO.
322 OFFSET is the offset in bytes from the start of the insn of the value.
323 BYTES is the length of the needed value.
324 Returns 1 for success, 0 for failure. */
325
326 static CGEN_INLINE int
327 fill_cache (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
328 CGEN_EXTRACT_INFO *ex_info,
329 int offset,
330 int bytes,
331 bfd_vma pc)
332 {
333 /* It's doubtful that the middle part has already been fetched so
334 we don't optimize that case. kiss. */
335 unsigned int mask;
336 disassemble_info *info = (disassemble_info *) ex_info->dis_info;
337
338 /* First do a quick check. */
339 mask = (1 << bytes) - 1;
340 if (((ex_info->valid >> offset) & mask) == mask)
341 return 1;
342
343 /* Search for the first byte we need to read. */
344 for (mask = 1 << offset; bytes > 0; --bytes, ++offset, mask <<= 1)
345 if (! (mask & ex_info->valid))
346 break;
347
348 if (bytes)
349 {
350 int status;
351
352 pc += offset;
353 status = (*info->read_memory_func)
354 (pc, ex_info->insn_bytes + offset, bytes, info);
355
356 if (status != 0)
357 {
358 (*info->memory_error_func) (status, pc, info);
359 return 0;
360 }
361
362 ex_info->valid |= ((1 << bytes) - 1) << offset;
363 }
364
365 return 1;
366 }
367
368 /* Subroutine of extract_normal. */
369
370 static CGEN_INLINE long
371 extract_1 (CGEN_CPU_DESC cd,
372 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
373 int start,
374 int length,
375 int word_length,
376 unsigned char *bufp,
377 bfd_vma pc ATTRIBUTE_UNUSED)
378 {
379 unsigned long x;
380 int shift;
381
382 x = cgen_get_insn_value (cd, bufp, word_length);
383
384 if (CGEN_INSN_LSB0_P)
385 shift = (start + 1) - length;
386 else
387 shift = (word_length - (start + length));
388 return x >> shift;
389 }
390
391 #endif /* ! CGEN_INT_INSN_P */
392
393 /* Default extraction routine.
394
395 INSN_VALUE is the first base_insn_bitsize bits of the insn in host order,
396 or sometimes less for cases like the m32r where the base insn size is 32
397 but some insns are 16 bits.
398 ATTRS is a mask of the boolean attributes. We only need `SIGNED',
399 but for generality we take a bitmask of all of them.
400 WORD_OFFSET is the offset in bits from the start of the insn of the value.
401 WORD_LENGTH is the length of the word in bits in which the value resides.
402 START is the starting bit number in the word, architecture origin.
403 LENGTH is the length of VALUE in bits.
404 TOTAL_LENGTH is the total length of the insn in bits.
405
406 Returns 1 for success, 0 for failure. */
407
408 /* ??? The return code isn't properly used. wip. */
409
410 /* ??? This doesn't handle bfd_vma's. Create another function when
411 necessary. */
412
413 static int
414 extract_normal (CGEN_CPU_DESC cd,
415 #if ! CGEN_INT_INSN_P
416 CGEN_EXTRACT_INFO *ex_info,
417 #else
418 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
419 #endif
420 CGEN_INSN_INT insn_value,
421 unsigned int attrs,
422 unsigned int word_offset,
423 unsigned int start,
424 unsigned int length,
425 unsigned int word_length,
426 unsigned int total_length,
427 #if ! CGEN_INT_INSN_P
428 bfd_vma pc,
429 #else
430 bfd_vma pc ATTRIBUTE_UNUSED,
431 #endif
432 long *valuep)
433 {
434 long value, mask;
435
436 /* If LENGTH is zero, this operand doesn't contribute to the value
437 so give it a standard value of zero. */
438 if (length == 0)
439 {
440 *valuep = 0;
441 return 1;
442 }
443
444 if (word_length > 32)
445 abort ();
446
447 /* For architectures with insns smaller than the insn-base-bitsize,
448 word_length may be too big. */
449 if (cd->min_insn_bitsize < cd->base_insn_bitsize)
450 {
451 if (word_offset + word_length > total_length)
452 word_length = total_length - word_offset;
453 }
454
455 /* Does the value reside in INSN_VALUE, and at the right alignment? */
456
457 if (CGEN_INT_INSN_P || (word_offset == 0 && word_length == total_length))
458 {
459 if (CGEN_INSN_LSB0_P)
460 value = insn_value >> ((word_offset + start + 1) - length);
461 else
462 value = insn_value >> (total_length - ( word_offset + start + length));
463 }
464
465 #if ! CGEN_INT_INSN_P
466
467 else
468 {
469 unsigned char *bufp = ex_info->insn_bytes + word_offset / 8;
470
471 if (word_length > 32)
472 abort ();
473
474 if (fill_cache (cd, ex_info, word_offset / 8, word_length / 8, pc) == 0)
475 return 0;
476
477 value = extract_1 (cd, ex_info, start, length, word_length, bufp, pc);
478 }
479
480 #endif /* ! CGEN_INT_INSN_P */
481
482 /* Written this way to avoid undefined behaviour. */
483 mask = (((1L << (length - 1)) - 1) << 1) | 1;
484
485 value &= mask;
486 /* sign extend? */
487 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED)
488 && (value & (1L << (length - 1))))
489 value |= ~mask;
490
491 *valuep = value;
492
493 return 1;
494 }
495
496 /* Default insn extractor.
497
498 INSN_VALUE is the first base_insn_bitsize bits, translated to host order.
499 The extracted fields are stored in FIELDS.
500 EX_INFO is used to handle reading variable length insns.
501 Return the length of the insn in bits, or 0 if no match,
502 or -1 if an error occurs fetching data (memory_error_func will have
503 been called). */
504
505 static int
506 extract_insn_normal (CGEN_CPU_DESC cd,
507 const CGEN_INSN *insn,
508 CGEN_EXTRACT_INFO *ex_info,
509 CGEN_INSN_INT insn_value,
510 CGEN_FIELDS *fields,
511 bfd_vma pc)
512 {
513 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
514 const CGEN_SYNTAX_CHAR_TYPE *syn;
515
516 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
517
518 CGEN_INIT_EXTRACT (cd);
519
520 for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
521 {
522 int length;
523
524 if (CGEN_SYNTAX_CHAR_P (*syn))
525 continue;
526
527 length = (* cd->extract_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
528 ex_info, insn_value, fields, pc);
529 if (length <= 0)
530 return length;
531 }
532
533 /* We recognized and successfully extracted this insn. */
534 return CGEN_INSN_BITSIZE (insn);
535 }
536 \f
537 /* Machine generated code added here. */
538
539 const char * m32c_cgen_insert_operand
540 (CGEN_CPU_DESC, int, CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
541
542 /* Main entry point for operand insertion.
543
544 This function is basically just a big switch statement. Earlier versions
545 used tables to look up the function to use, but
546 - if the table contains both assembler and disassembler functions then
547 the disassembler contains much of the assembler and vice-versa,
548 - there's a lot of inlining possibilities as things grow,
549 - using a switch statement avoids the function call overhead.
550
551 This function could be moved into `parse_insn_normal', but keeping it
552 separate makes clear the interface between `parse_insn_normal' and each of
553 the handlers. It's also needed by GAS to insert operands that couldn't be
554 resolved during parsing. */
555
556 const char *
557 m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
558 int opindex,
559 CGEN_FIELDS * fields,
560 CGEN_INSN_BYTES_PTR buffer,
561 bfd_vma pc ATTRIBUTE_UNUSED)
562 {
563 const char * errmsg = NULL;
564 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
565
566 switch (opindex)
567 {
568 case M32C_OPERAND_A0 :
569 break;
570 case M32C_OPERAND_A1 :
571 break;
572 case M32C_OPERAND_AN16_PUSH_S :
573 errmsg = insert_normal (cd, fields->f_4_1, 0, 0, 4, 1, 32, total_length, buffer);
574 break;
575 case M32C_OPERAND_BIT16AN :
576 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
577 break;
578 case M32C_OPERAND_BIT16RN :
579 errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer);
580 break;
581 case M32C_OPERAND_BIT3_S :
582 {
583 {
584 FLD (f_7_1) = ((((FLD (f_imm3_S)) - (1))) & (1));
585 FLD (f_2_2) = ((((unsigned int) (((FLD (f_imm3_S)) - (1))) >> (1))) & (3));
586 }
587 errmsg = insert_normal (cd, fields->f_2_2, 0, 0, 2, 2, 32, total_length, buffer);
588 if (errmsg)
589 break;
590 errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer);
591 if (errmsg)
592 break;
593 }
594 break;
595 case M32C_OPERAND_BIT32ANPREFIXED :
596 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
597 break;
598 case M32C_OPERAND_BIT32ANUNPREFIXED :
599 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
600 break;
601 case M32C_OPERAND_BIT32RNPREFIXED :
602 {
603 long value = fields->f_dst32_rn_prefixed_QI;
604 value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1))));
605 errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer);
606 }
607 break;
608 case M32C_OPERAND_BIT32RNUNPREFIXED :
609 {
610 long value = fields->f_dst32_rn_unprefixed_QI;
611 value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1))));
612 errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer);
613 }
614 break;
615 case M32C_OPERAND_BITBASE16_16_S8 :
616 errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer);
617 break;
618 case M32C_OPERAND_BITBASE16_16_U16 :
619 {
620 long value = fields->f_dsp_16_u16;
621 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
622 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
623 }
624 break;
625 case M32C_OPERAND_BITBASE16_16_U8 :
626 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
627 break;
628 case M32C_OPERAND_BITBASE16_8_U11_S :
629 {
630 {
631 FLD (f_bitno16_S) = ((FLD (f_bitbase16_u11_S)) & (7));
632 FLD (f_dsp_8_u8) = ((((unsigned int) (FLD (f_bitbase16_u11_S)) >> (3))) & (255));
633 }
634 errmsg = insert_normal (cd, fields->f_bitno16_S, 0, 0, 5, 3, 32, total_length, buffer);
635 if (errmsg)
636 break;
637 errmsg = insert_normal (cd, fields->f_dsp_8_u8, 0, 0, 8, 8, 32, total_length, buffer);
638 if (errmsg)
639 break;
640 }
641 break;
642 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
643 {
644 {
645 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_s11_unprefixed)) & (7));
646 FLD (f_dsp_16_s8) = ((int) (FLD (f_bitbase32_16_s11_unprefixed)) >> (3));
647 }
648 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
649 if (errmsg)
650 break;
651 errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer);
652 if (errmsg)
653 break;
654 }
655 break;
656 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
657 {
658 {
659 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_s19_unprefixed)) & (7));
660 FLD (f_dsp_16_s16) = ((int) (FLD (f_bitbase32_16_s19_unprefixed)) >> (3));
661 }
662 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
663 if (errmsg)
664 break;
665 {
666 long value = fields->f_dsp_16_s16;
667 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
668 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, buffer);
669 }
670 if (errmsg)
671 break;
672 }
673 break;
674 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
675 {
676 {
677 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_u11_unprefixed)) & (7));
678 FLD (f_dsp_16_u8) = ((((unsigned int) (FLD (f_bitbase32_16_u11_unprefixed)) >> (3))) & (255));
679 }
680 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
681 if (errmsg)
682 break;
683 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
684 if (errmsg)
685 break;
686 }
687 break;
688 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
689 {
690 {
691 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_u19_unprefixed)) & (7));
692 FLD (f_dsp_16_u16) = ((((unsigned int) (FLD (f_bitbase32_16_u19_unprefixed)) >> (3))) & (65535));
693 }
694 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
695 if (errmsg)
696 break;
697 {
698 long value = fields->f_dsp_16_u16;
699 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
700 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
701 }
702 if (errmsg)
703 break;
704 }
705 break;
706 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
707 {
708 {
709 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_u27_unprefixed)) & (7));
710 FLD (f_dsp_16_u16) = ((((unsigned int) (FLD (f_bitbase32_16_u27_unprefixed)) >> (3))) & (65535));
711 FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_bitbase32_16_u27_unprefixed)) >> (19))) & (255));
712 }
713 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
714 if (errmsg)
715 break;
716 {
717 long value = fields->f_dsp_16_u16;
718 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
719 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
720 }
721 if (errmsg)
722 break;
723 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
724 if (errmsg)
725 break;
726 }
727 break;
728 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
729 {
730 {
731 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_s11_prefixed)) & (7));
732 FLD (f_dsp_24_s8) = ((int) (FLD (f_bitbase32_24_s11_prefixed)) >> (3));
733 }
734 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
735 if (errmsg)
736 break;
737 errmsg = insert_normal (cd, fields->f_dsp_24_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, buffer);
738 if (errmsg)
739 break;
740 }
741 break;
742 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
743 {
744 {
745 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_s19_prefixed)) & (7));
746 FLD (f_dsp_24_u8) = ((((unsigned int) (FLD (f_bitbase32_24_s19_prefixed)) >> (3))) & (255));
747 FLD (f_dsp_32_s8) = ((int) (FLD (f_bitbase32_24_s19_prefixed)) >> (11));
748 }
749 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
750 if (errmsg)
751 break;
752 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
753 if (errmsg)
754 break;
755 errmsg = insert_normal (cd, fields->f_dsp_32_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, buffer);
756 if (errmsg)
757 break;
758 }
759 break;
760 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
761 {
762 {
763 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_u11_prefixed)) & (7));
764 FLD (f_dsp_24_u8) = ((((unsigned int) (FLD (f_bitbase32_24_u11_prefixed)) >> (3))) & (255));
765 }
766 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
767 if (errmsg)
768 break;
769 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
770 if (errmsg)
771 break;
772 }
773 break;
774 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
775 {
776 {
777 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_u19_prefixed)) & (7));
778 FLD (f_dsp_24_u8) = ((((unsigned int) (FLD (f_bitbase32_24_u19_prefixed)) >> (3))) & (255));
779 FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_bitbase32_24_u19_prefixed)) >> (11))) & (255));
780 }
781 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
782 if (errmsg)
783 break;
784 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
785 if (errmsg)
786 break;
787 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
788 if (errmsg)
789 break;
790 }
791 break;
792 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
793 {
794 {
795 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_u27_prefixed)) & (7));
796 FLD (f_dsp_24_u8) = ((((unsigned int) (FLD (f_bitbase32_24_u27_prefixed)) >> (3))) & (255));
797 FLD (f_dsp_32_u16) = ((((unsigned int) (FLD (f_bitbase32_24_u27_prefixed)) >> (11))) & (65535));
798 }
799 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
800 if (errmsg)
801 break;
802 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
803 if (errmsg)
804 break;
805 {
806 long value = fields->f_dsp_32_u16;
807 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
808 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
809 }
810 if (errmsg)
811 break;
812 }
813 break;
814 case M32C_OPERAND_BITNO16R :
815 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
816 break;
817 case M32C_OPERAND_BITNO32PREFIXED :
818 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
819 break;
820 case M32C_OPERAND_BITNO32UNPREFIXED :
821 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
822 break;
823 case M32C_OPERAND_DSP_10_U6 :
824 errmsg = insert_normal (cd, fields->f_dsp_10_u6, 0, 0, 10, 6, 32, total_length, buffer);
825 break;
826 case M32C_OPERAND_DSP_16_S16 :
827 {
828 long value = fields->f_dsp_16_s16;
829 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
830 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, buffer);
831 }
832 break;
833 case M32C_OPERAND_DSP_16_S8 :
834 errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer);
835 break;
836 case M32C_OPERAND_DSP_16_U16 :
837 {
838 long value = fields->f_dsp_16_u16;
839 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
840 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
841 }
842 break;
843 case M32C_OPERAND_DSP_16_U20 :
844 {
845 {
846 FLD (f_dsp_16_u16) = ((FLD (f_dsp_16_u24)) & (65535));
847 FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_dsp_16_u24)) >> (16))) & (255));
848 }
849 {
850 long value = fields->f_dsp_16_u16;
851 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
852 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
853 }
854 if (errmsg)
855 break;
856 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
857 if (errmsg)
858 break;
859 }
860 break;
861 case M32C_OPERAND_DSP_16_U24 :
862 {
863 {
864 FLD (f_dsp_16_u16) = ((FLD (f_dsp_16_u24)) & (65535));
865 FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_dsp_16_u24)) >> (16))) & (255));
866 }
867 {
868 long value = fields->f_dsp_16_u16;
869 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
870 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
871 }
872 if (errmsg)
873 break;
874 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
875 if (errmsg)
876 break;
877 }
878 break;
879 case M32C_OPERAND_DSP_16_U8 :
880 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
881 break;
882 case M32C_OPERAND_DSP_24_S16 :
883 {
884 {
885 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_s16)) & (255));
886 FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_dsp_24_s16)) >> (8))) & (255));
887 }
888 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
889 if (errmsg)
890 break;
891 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
892 if (errmsg)
893 break;
894 }
895 break;
896 case M32C_OPERAND_DSP_24_S8 :
897 errmsg = insert_normal (cd, fields->f_dsp_24_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, buffer);
898 break;
899 case M32C_OPERAND_DSP_24_U16 :
900 {
901 {
902 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_u16)) & (255));
903 FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_dsp_24_u16)) >> (8))) & (255));
904 }
905 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
906 if (errmsg)
907 break;
908 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
909 if (errmsg)
910 break;
911 }
912 break;
913 case M32C_OPERAND_DSP_24_U20 :
914 {
915 {
916 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_u24)) & (255));
917 FLD (f_dsp_32_u16) = ((((unsigned int) (FLD (f_dsp_24_u24)) >> (8))) & (65535));
918 }
919 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
920 if (errmsg)
921 break;
922 {
923 long value = fields->f_dsp_32_u16;
924 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
925 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
926 }
927 if (errmsg)
928 break;
929 }
930 break;
931 case M32C_OPERAND_DSP_24_U24 :
932 {
933 {
934 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_u24)) & (255));
935 FLD (f_dsp_32_u16) = ((((unsigned int) (FLD (f_dsp_24_u24)) >> (8))) & (65535));
936 }
937 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
938 if (errmsg)
939 break;
940 {
941 long value = fields->f_dsp_32_u16;
942 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
943 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
944 }
945 if (errmsg)
946 break;
947 }
948 break;
949 case M32C_OPERAND_DSP_24_U8 :
950 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
951 break;
952 case M32C_OPERAND_DSP_32_S16 :
953 {
954 long value = fields->f_dsp_32_s16;
955 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
956 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, buffer);
957 }
958 break;
959 case M32C_OPERAND_DSP_32_S8 :
960 errmsg = insert_normal (cd, fields->f_dsp_32_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, buffer);
961 break;
962 case M32C_OPERAND_DSP_32_U16 :
963 {
964 long value = fields->f_dsp_32_u16;
965 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
966 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
967 }
968 break;
969 case M32C_OPERAND_DSP_32_U20 :
970 {
971 long value = fields->f_dsp_32_u24;
972 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
973 errmsg = insert_normal (cd, value, 0, 32, 0, 24, 32, total_length, buffer);
974 }
975 break;
976 case M32C_OPERAND_DSP_32_U24 :
977 {
978 long value = fields->f_dsp_32_u24;
979 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
980 errmsg = insert_normal (cd, value, 0, 32, 0, 24, 32, total_length, buffer);
981 }
982 break;
983 case M32C_OPERAND_DSP_32_U8 :
984 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
985 break;
986 case M32C_OPERAND_DSP_40_S16 :
987 {
988 long value = fields->f_dsp_40_s16;
989 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
990 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, buffer);
991 }
992 break;
993 case M32C_OPERAND_DSP_40_S8 :
994 errmsg = insert_normal (cd, fields->f_dsp_40_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, buffer);
995 break;
996 case M32C_OPERAND_DSP_40_U16 :
997 {
998 long value = fields->f_dsp_40_u16;
999 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1000 errmsg = insert_normal (cd, value, 0, 32, 8, 16, 32, total_length, buffer);
1001 }
1002 break;
1003 case M32C_OPERAND_DSP_40_U24 :
1004 {
1005 long value = fields->f_dsp_40_u24;
1006 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
1007 errmsg = insert_normal (cd, value, 0, 32, 8, 24, 32, total_length, buffer);
1008 }
1009 break;
1010 case M32C_OPERAND_DSP_40_U8 :
1011 errmsg = insert_normal (cd, fields->f_dsp_40_u8, 0, 32, 8, 8, 32, total_length, buffer);
1012 break;
1013 case M32C_OPERAND_DSP_48_S16 :
1014 {
1015 long value = fields->f_dsp_48_s16;
1016 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1017 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, buffer);
1018 }
1019 break;
1020 case M32C_OPERAND_DSP_48_S8 :
1021 errmsg = insert_normal (cd, fields->f_dsp_48_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, buffer);
1022 break;
1023 case M32C_OPERAND_DSP_48_U16 :
1024 {
1025 long value = fields->f_dsp_48_u16;
1026 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1027 errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer);
1028 }
1029 break;
1030 case M32C_OPERAND_DSP_48_U24 :
1031 {
1032 {
1033 FLD (f_dsp_64_u8) = ((((unsigned int) (FLD (f_dsp_48_u24)) >> (16))) & (255));
1034 FLD (f_dsp_48_u16) = ((FLD (f_dsp_48_u24)) & (65535));
1035 }
1036 {
1037 long value = fields->f_dsp_48_u16;
1038 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1039 errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer);
1040 }
1041 if (errmsg)
1042 break;
1043 errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer);
1044 if (errmsg)
1045 break;
1046 }
1047 break;
1048 case M32C_OPERAND_DSP_48_U8 :
1049 errmsg = insert_normal (cd, fields->f_dsp_48_u8, 0, 32, 16, 8, 32, total_length, buffer);
1050 break;
1051 case M32C_OPERAND_DSP_8_S24 :
1052 {
1053 long value = fields->f_dsp_8_s24;
1054 value = ((((((unsigned int) (value) >> (16))) | (((value) & (65280))))) | (((EXTQISI (TRUNCSIQI (((value) & (255))))) << (16))));
1055 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 24, 32, total_length, buffer);
1056 }
1057 break;
1058 case M32C_OPERAND_DSP_8_S8 :
1059 errmsg = insert_normal (cd, fields->f_dsp_8_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, buffer);
1060 break;
1061 case M32C_OPERAND_DSP_8_U16 :
1062 {
1063 long value = fields->f_dsp_8_u16;
1064 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1065 errmsg = insert_normal (cd, value, 0, 0, 8, 16, 32, total_length, buffer);
1066 }
1067 break;
1068 case M32C_OPERAND_DSP_8_U24 :
1069 {
1070 long value = fields->f_dsp_8_u24;
1071 value = ((((((unsigned int) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
1072 errmsg = insert_normal (cd, value, 0, 0, 8, 24, 32, total_length, buffer);
1073 }
1074 break;
1075 case M32C_OPERAND_DSP_8_U6 :
1076 errmsg = insert_normal (cd, fields->f_dsp_8_u6, 0, 0, 8, 6, 32, total_length, buffer);
1077 break;
1078 case M32C_OPERAND_DSP_8_U8 :
1079 errmsg = insert_normal (cd, fields->f_dsp_8_u8, 0, 0, 8, 8, 32, total_length, buffer);
1080 break;
1081 case M32C_OPERAND_DST16AN :
1082 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
1083 break;
1084 case M32C_OPERAND_DST16AN_S :
1085 errmsg = insert_normal (cd, fields->f_dst16_an_s, 0, 0, 4, 1, 32, total_length, buffer);
1086 break;
1087 case M32C_OPERAND_DST16ANHI :
1088 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
1089 break;
1090 case M32C_OPERAND_DST16ANQI :
1091 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
1092 break;
1093 case M32C_OPERAND_DST16ANQI_S :
1094 errmsg = insert_normal (cd, fields->f_dst16_rn_QI_s, 0, 0, 5, 1, 32, total_length, buffer);
1095 break;
1096 case M32C_OPERAND_DST16ANSI :
1097 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
1098 break;
1099 case M32C_OPERAND_DST16RNEXTQI :
1100 errmsg = insert_normal (cd, fields->f_dst16_rn_ext, 0, 0, 14, 1, 32, total_length, buffer);
1101 break;
1102 case M32C_OPERAND_DST16RNHI :
1103 errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer);
1104 break;
1105 case M32C_OPERAND_DST16RNQI :
1106 errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer);
1107 break;
1108 case M32C_OPERAND_DST16RNQI_S :
1109 errmsg = insert_normal (cd, fields->f_dst16_rn_QI_s, 0, 0, 5, 1, 32, total_length, buffer);
1110 break;
1111 case M32C_OPERAND_DST16RNSI :
1112 errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer);
1113 break;
1114 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
1115 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1116 break;
1117 case M32C_OPERAND_DST32ANPREFIXED :
1118 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
1119 break;
1120 case M32C_OPERAND_DST32ANPREFIXEDHI :
1121 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
1122 break;
1123 case M32C_OPERAND_DST32ANPREFIXEDQI :
1124 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
1125 break;
1126 case M32C_OPERAND_DST32ANPREFIXEDSI :
1127 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
1128 break;
1129 case M32C_OPERAND_DST32ANUNPREFIXED :
1130 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1131 break;
1132 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
1133 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1134 break;
1135 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
1136 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1137 break;
1138 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
1139 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1140 break;
1141 case M32C_OPERAND_DST32R0HI_S :
1142 break;
1143 case M32C_OPERAND_DST32R0QI_S :
1144 break;
1145 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
1146 errmsg = insert_normal (cd, fields->f_dst32_rn_ext_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1147 break;
1148 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
1149 errmsg = insert_normal (cd, fields->f_dst32_rn_ext_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1150 break;
1151 case M32C_OPERAND_DST32RNPREFIXEDHI :
1152 {
1153 long value = fields->f_dst32_rn_prefixed_HI;
1154 value = ((((value) + (2))) % (4));
1155 errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer);
1156 }
1157 break;
1158 case M32C_OPERAND_DST32RNPREFIXEDQI :
1159 {
1160 long value = fields->f_dst32_rn_prefixed_QI;
1161 value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1))));
1162 errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer);
1163 }
1164 break;
1165 case M32C_OPERAND_DST32RNPREFIXEDSI :
1166 {
1167 long value = fields->f_dst32_rn_prefixed_SI;
1168 value = ((value) + (2));
1169 errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer);
1170 }
1171 break;
1172 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
1173 {
1174 long value = fields->f_dst32_rn_unprefixed_HI;
1175 value = ((((value) + (2))) % (4));
1176 errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer);
1177 }
1178 break;
1179 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
1180 {
1181 long value = fields->f_dst32_rn_unprefixed_QI;
1182 value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1))));
1183 errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer);
1184 }
1185 break;
1186 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
1187 {
1188 long value = fields->f_dst32_rn_unprefixed_SI;
1189 value = ((value) + (2));
1190 errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer);
1191 }
1192 break;
1193 case M32C_OPERAND_G :
1194 break;
1195 case M32C_OPERAND_IMM_12_S4 :
1196 errmsg = insert_normal (cd, fields->f_imm_12_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, buffer);
1197 break;
1198 case M32C_OPERAND_IMM_12_S4N :
1199 errmsg = insert_normal (cd, fields->f_imm_12_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, buffer);
1200 break;
1201 case M32C_OPERAND_IMM_13_U3 :
1202 errmsg = insert_normal (cd, fields->f_imm_13_u3, 0, 0, 13, 3, 32, total_length, buffer);
1203 break;
1204 case M32C_OPERAND_IMM_16_HI :
1205 {
1206 long value = fields->f_dsp_16_s16;
1207 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1208 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, buffer);
1209 }
1210 break;
1211 case M32C_OPERAND_IMM_16_QI :
1212 errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer);
1213 break;
1214 case M32C_OPERAND_IMM_16_SI :
1215 {
1216 {
1217 FLD (f_dsp_32_u16) = ((((unsigned int) (FLD (f_dsp_16_s32)) >> (16))) & (65535));
1218 FLD (f_dsp_16_u16) = ((FLD (f_dsp_16_s32)) & (65535));
1219 }
1220 {
1221 long value = fields->f_dsp_16_u16;
1222 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1223 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
1224 }
1225 if (errmsg)
1226 break;
1227 {
1228 long value = fields->f_dsp_32_u16;
1229 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1230 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
1231 }
1232 if (errmsg)
1233 break;
1234 }
1235 break;
1236 case M32C_OPERAND_IMM_20_S4 :
1237 errmsg = insert_normal (cd, fields->f_imm_20_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, buffer);
1238 break;
1239 case M32C_OPERAND_IMM_24_HI :
1240 {
1241 {
1242 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_s16)) & (255));
1243 FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_dsp_24_s16)) >> (8))) & (255));
1244 }
1245 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
1246 if (errmsg)
1247 break;
1248 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
1249 if (errmsg)
1250 break;
1251 }
1252 break;
1253 case M32C_OPERAND_IMM_24_QI :
1254 errmsg = insert_normal (cd, fields->f_dsp_24_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, buffer);
1255 break;
1256 case M32C_OPERAND_IMM_24_SI :
1257 {
1258 {
1259 FLD (f_dsp_32_u24) = ((((unsigned int) (FLD (f_dsp_24_s32)) >> (8))) & (16777215));
1260 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_s32)) & (255));
1261 }
1262 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
1263 if (errmsg)
1264 break;
1265 {
1266 long value = fields->f_dsp_32_u24;
1267 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
1268 errmsg = insert_normal (cd, value, 0, 32, 0, 24, 32, total_length, buffer);
1269 }
1270 if (errmsg)
1271 break;
1272 }
1273 break;
1274 case M32C_OPERAND_IMM_32_HI :
1275 {
1276 long value = fields->f_dsp_32_s16;
1277 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1278 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, buffer);
1279 }
1280 break;
1281 case M32C_OPERAND_IMM_32_QI :
1282 errmsg = insert_normal (cd, fields->f_dsp_32_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, buffer);
1283 break;
1284 case M32C_OPERAND_IMM_32_SI :
1285 {
1286 long value = fields->f_dsp_32_s32;
1287 value = EXTSISI (((((((((unsigned int) (value) >> (24))) & (255))) | (((((unsigned int) (value) >> (8))) & (65280))))) | (((((((value) << (8))) & (16711680))) | (((((value) << (24))) & (0xff000000)))))));
1288 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 32, 32, total_length, buffer);
1289 }
1290 break;
1291 case M32C_OPERAND_IMM_40_HI :
1292 {
1293 long value = fields->f_dsp_40_s16;
1294 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1295 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, buffer);
1296 }
1297 break;
1298 case M32C_OPERAND_IMM_40_QI :
1299 errmsg = insert_normal (cd, fields->f_dsp_40_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, buffer);
1300 break;
1301 case M32C_OPERAND_IMM_40_SI :
1302 {
1303 {
1304 FLD (f_dsp_64_u8) = ((((unsigned int) (FLD (f_dsp_40_s32)) >> (24))) & (255));
1305 FLD (f_dsp_40_u24) = ((FLD (f_dsp_40_s32)) & (16777215));
1306 }
1307 {
1308 long value = fields->f_dsp_40_u24;
1309 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
1310 errmsg = insert_normal (cd, value, 0, 32, 8, 24, 32, total_length, buffer);
1311 }
1312 if (errmsg)
1313 break;
1314 errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer);
1315 if (errmsg)
1316 break;
1317 }
1318 break;
1319 case M32C_OPERAND_IMM_48_HI :
1320 {
1321 long value = fields->f_dsp_48_s16;
1322 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1323 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, buffer);
1324 }
1325 break;
1326 case M32C_OPERAND_IMM_48_QI :
1327 errmsg = insert_normal (cd, fields->f_dsp_48_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, buffer);
1328 break;
1329 case M32C_OPERAND_IMM_48_SI :
1330 {
1331 {
1332 FLD (f_dsp_64_u16) = ((((unsigned int) (FLD (f_dsp_48_s32)) >> (16))) & (65535));
1333 FLD (f_dsp_48_u16) = ((FLD (f_dsp_48_s32)) & (65535));
1334 }
1335 {
1336 long value = fields->f_dsp_48_u16;
1337 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1338 errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer);
1339 }
1340 if (errmsg)
1341 break;
1342 {
1343 long value = fields->f_dsp_64_u16;
1344 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1345 errmsg = insert_normal (cd, value, 0, 64, 0, 16, 32, total_length, buffer);
1346 }
1347 if (errmsg)
1348 break;
1349 }
1350 break;
1351 case M32C_OPERAND_IMM_56_HI :
1352 {
1353 {
1354 FLD (f_dsp_56_u8) = ((FLD (f_dsp_56_s16)) & (255));
1355 FLD (f_dsp_64_u8) = ((((unsigned int) (FLD (f_dsp_56_s16)) >> (8))) & (255));
1356 }
1357 errmsg = insert_normal (cd, fields->f_dsp_56_u8, 0, 32, 24, 8, 32, total_length, buffer);
1358 if (errmsg)
1359 break;
1360 errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer);
1361 if (errmsg)
1362 break;
1363 }
1364 break;
1365 case M32C_OPERAND_IMM_56_QI :
1366 errmsg = insert_normal (cd, fields->f_dsp_56_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 24, 8, 32, total_length, buffer);
1367 break;
1368 case M32C_OPERAND_IMM_64_HI :
1369 {
1370 long value = fields->f_dsp_64_s16;
1371 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1372 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 64, 0, 16, 32, total_length, buffer);
1373 }
1374 break;
1375 case M32C_OPERAND_IMM_8_HI :
1376 {
1377 long value = fields->f_dsp_8_s16;
1378 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1379 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 16, 32, total_length, buffer);
1380 }
1381 break;
1382 case M32C_OPERAND_IMM_8_QI :
1383 errmsg = insert_normal (cd, fields->f_dsp_8_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, buffer);
1384 break;
1385 case M32C_OPERAND_IMM_8_S4 :
1386 errmsg = insert_normal (cd, fields->f_imm_8_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, buffer);
1387 break;
1388 case M32C_OPERAND_IMM_8_S4N :
1389 errmsg = insert_normal (cd, fields->f_imm_8_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, buffer);
1390 break;
1391 case M32C_OPERAND_IMM_SH_12_S4 :
1392 errmsg = insert_normal (cd, fields->f_imm_12_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, buffer);
1393 break;
1394 case M32C_OPERAND_IMM_SH_20_S4 :
1395 errmsg = insert_normal (cd, fields->f_imm_20_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, buffer);
1396 break;
1397 case M32C_OPERAND_IMM_SH_8_S4 :
1398 errmsg = insert_normal (cd, fields->f_imm_8_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, buffer);
1399 break;
1400 case M32C_OPERAND_IMM1_S :
1401 {
1402 long value = fields->f_imm1_S;
1403 value = ((value) - (1));
1404 errmsg = insert_normal (cd, value, 0, 0, 2, 1, 32, total_length, buffer);
1405 }
1406 break;
1407 case M32C_OPERAND_IMM3_S :
1408 {
1409 {
1410 FLD (f_7_1) = ((((FLD (f_imm3_S)) - (1))) & (1));
1411 FLD (f_2_2) = ((((unsigned int) (((FLD (f_imm3_S)) - (1))) >> (1))) & (3));
1412 }
1413 errmsg = insert_normal (cd, fields->f_2_2, 0, 0, 2, 2, 32, total_length, buffer);
1414 if (errmsg)
1415 break;
1416 errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer);
1417 if (errmsg)
1418 break;
1419 }
1420 break;
1421 case M32C_OPERAND_LAB_16_8 :
1422 {
1423 long value = fields->f_lab_16_8;
1424 value = ((value) - (((pc) + (2))));
1425 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 16, 8, 32, total_length, buffer);
1426 }
1427 break;
1428 case M32C_OPERAND_LAB_24_8 :
1429 {
1430 long value = fields->f_lab_24_8;
1431 value = ((value) - (((pc) + (2))));
1432 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 24, 8, 32, total_length, buffer);
1433 }
1434 break;
1435 case M32C_OPERAND_LAB_32_8 :
1436 {
1437 long value = fields->f_lab_32_8;
1438 value = ((value) - (((pc) + (2))));
1439 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 0, 8, 32, total_length, buffer);
1440 }
1441 break;
1442 case M32C_OPERAND_LAB_40_8 :
1443 {
1444 long value = fields->f_lab_40_8;
1445 value = ((value) - (((pc) + (2))));
1446 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 8, 8, 32, total_length, buffer);
1447 }
1448 break;
1449 case M32C_OPERAND_LAB_5_3 :
1450 {
1451 long value = fields->f_lab_5_3;
1452 value = ((value) - (((pc) + (2))));
1453 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_PCREL_ADDR), 0, 5, 3, 32, total_length, buffer);
1454 }
1455 break;
1456 case M32C_OPERAND_LAB_8_16 :
1457 {
1458 long value = fields->f_lab_8_16;
1459 value = ((((((((value) - (((pc) + (1))))) & (255))) << (8))) | (((unsigned int) (((((value) - (((pc) + (1))))) & (65535))) >> (8))));
1460 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGN_OPT)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 16, 32, total_length, buffer);
1461 }
1462 break;
1463 case M32C_OPERAND_LAB_8_24 :
1464 {
1465 long value = fields->f_lab_8_24;
1466 value = ((((((unsigned int) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
1467 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 8, 24, 32, total_length, buffer);
1468 }
1469 break;
1470 case M32C_OPERAND_LAB_8_8 :
1471 {
1472 long value = fields->f_lab_8_8;
1473 value = ((value) - (((pc) + (1))));
1474 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 32, total_length, buffer);
1475 }
1476 break;
1477 case M32C_OPERAND_LAB32_JMP_S :
1478 {
1479 {
1480 SI tmp_val;
1481 tmp_val = ((((FLD (f_lab32_jmp_s)) - (pc))) - (2));
1482 FLD (f_7_1) = ((tmp_val) & (1));
1483 FLD (f_2_2) = ((unsigned int) (tmp_val) >> (1));
1484 }
1485 errmsg = insert_normal (cd, fields->f_2_2, 0, 0, 2, 2, 32, total_length, buffer);
1486 if (errmsg)
1487 break;
1488 errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer);
1489 if (errmsg)
1490 break;
1491 }
1492 break;
1493 case M32C_OPERAND_Q :
1494 break;
1495 case M32C_OPERAND_R0 :
1496 break;
1497 case M32C_OPERAND_R0H :
1498 break;
1499 case M32C_OPERAND_R0L :
1500 break;
1501 case M32C_OPERAND_R1 :
1502 break;
1503 case M32C_OPERAND_R1R2R0 :
1504 break;
1505 case M32C_OPERAND_R2 :
1506 break;
1507 case M32C_OPERAND_R2R0 :
1508 break;
1509 case M32C_OPERAND_R3 :
1510 break;
1511 case M32C_OPERAND_R3R1 :
1512 break;
1513 case M32C_OPERAND_REGSETPOP :
1514 errmsg = insert_normal (cd, fields->f_8_8, 0, 0, 8, 8, 32, total_length, buffer);
1515 break;
1516 case M32C_OPERAND_REGSETPUSH :
1517 errmsg = insert_normal (cd, fields->f_8_8, 0, 0, 8, 8, 32, total_length, buffer);
1518 break;
1519 case M32C_OPERAND_RN16_PUSH_S :
1520 errmsg = insert_normal (cd, fields->f_4_1, 0, 0, 4, 1, 32, total_length, buffer);
1521 break;
1522 case M32C_OPERAND_S :
1523 break;
1524 case M32C_OPERAND_SRC16AN :
1525 errmsg = insert_normal (cd, fields->f_src16_an, 0, 0, 11, 1, 32, total_length, buffer);
1526 break;
1527 case M32C_OPERAND_SRC16ANHI :
1528 errmsg = insert_normal (cd, fields->f_src16_an, 0, 0, 11, 1, 32, total_length, buffer);
1529 break;
1530 case M32C_OPERAND_SRC16ANQI :
1531 errmsg = insert_normal (cd, fields->f_src16_an, 0, 0, 11, 1, 32, total_length, buffer);
1532 break;
1533 case M32C_OPERAND_SRC16RNHI :
1534 errmsg = insert_normal (cd, fields->f_src16_rn, 0, 0, 10, 2, 32, total_length, buffer);
1535 break;
1536 case M32C_OPERAND_SRC16RNQI :
1537 errmsg = insert_normal (cd, fields->f_src16_rn, 0, 0, 10, 2, 32, total_length, buffer);
1538 break;
1539 case M32C_OPERAND_SRC32ANPREFIXED :
1540 errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer);
1541 break;
1542 case M32C_OPERAND_SRC32ANPREFIXEDHI :
1543 errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer);
1544 break;
1545 case M32C_OPERAND_SRC32ANPREFIXEDQI :
1546 errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer);
1547 break;
1548 case M32C_OPERAND_SRC32ANPREFIXEDSI :
1549 errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer);
1550 break;
1551 case M32C_OPERAND_SRC32ANUNPREFIXED :
1552 errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer);
1553 break;
1554 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
1555 errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer);
1556 break;
1557 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
1558 errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer);
1559 break;
1560 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
1561 errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer);
1562 break;
1563 case M32C_OPERAND_SRC32RNPREFIXEDHI :
1564 {
1565 long value = fields->f_src32_rn_prefixed_HI;
1566 value = ((((value) + (2))) % (4));
1567 errmsg = insert_normal (cd, value, 0, 0, 18, 2, 32, total_length, buffer);
1568 }
1569 break;
1570 case M32C_OPERAND_SRC32RNPREFIXEDQI :
1571 {
1572 long value = fields->f_src32_rn_prefixed_QI;
1573 value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1))));
1574 errmsg = insert_normal (cd, value, 0, 0, 18, 2, 32, total_length, buffer);
1575 }
1576 break;
1577 case M32C_OPERAND_SRC32RNPREFIXEDSI :
1578 {
1579 long value = fields->f_src32_rn_prefixed_SI;
1580 value = ((value) + (2));
1581 errmsg = insert_normal (cd, value, 0, 0, 18, 2, 32, total_length, buffer);
1582 }
1583 break;
1584 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
1585 {
1586 long value = fields->f_src32_rn_unprefixed_HI;
1587 value = ((((value) + (2))) % (4));
1588 errmsg = insert_normal (cd, value, 0, 0, 10, 2, 32, total_length, buffer);
1589 }
1590 break;
1591 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
1592 {
1593 long value = fields->f_src32_rn_unprefixed_QI;
1594 value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1))));
1595 errmsg = insert_normal (cd, value, 0, 0, 10, 2, 32, total_length, buffer);
1596 }
1597 break;
1598 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
1599 {
1600 long value = fields->f_src32_rn_unprefixed_SI;
1601 value = ((value) + (2));
1602 errmsg = insert_normal (cd, value, 0, 0, 10, 2, 32, total_length, buffer);
1603 }
1604 break;
1605 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
1606 errmsg = insert_normal (cd, fields->f_5_1, 0, 0, 5, 1, 32, total_length, buffer);
1607 break;
1608 case M32C_OPERAND_X :
1609 break;
1610 case M32C_OPERAND_Z :
1611 break;
1612 case M32C_OPERAND_COND16_16 :
1613 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
1614 break;
1615 case M32C_OPERAND_COND16_24 :
1616 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
1617 break;
1618 case M32C_OPERAND_COND16_32 :
1619 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
1620 break;
1621 case M32C_OPERAND_COND16C :
1622 errmsg = insert_normal (cd, fields->f_cond16, 0, 0, 12, 4, 32, total_length, buffer);
1623 break;
1624 case M32C_OPERAND_COND16J :
1625 errmsg = insert_normal (cd, fields->f_cond16, 0, 0, 12, 4, 32, total_length, buffer);
1626 break;
1627 case M32C_OPERAND_COND16J5 :
1628 errmsg = insert_normal (cd, fields->f_cond16j_5, 0, 0, 5, 3, 32, total_length, buffer);
1629 break;
1630 case M32C_OPERAND_COND32 :
1631 {
1632 {
1633 FLD (f_9_1) = ((((unsigned int) (FLD (f_cond32)) >> (3))) & (1));
1634 FLD (f_13_3) = ((FLD (f_cond32)) & (7));
1635 }
1636 errmsg = insert_normal (cd, fields->f_9_1, 0, 0, 9, 1, 32, total_length, buffer);
1637 if (errmsg)
1638 break;
1639 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1640 if (errmsg)
1641 break;
1642 }
1643 break;
1644 case M32C_OPERAND_COND32_16 :
1645 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
1646 break;
1647 case M32C_OPERAND_COND32_24 :
1648 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
1649 break;
1650 case M32C_OPERAND_COND32_32 :
1651 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
1652 break;
1653 case M32C_OPERAND_COND32_40 :
1654 errmsg = insert_normal (cd, fields->f_dsp_40_u8, 0, 32, 8, 8, 32, total_length, buffer);
1655 break;
1656 case M32C_OPERAND_COND32J :
1657 {
1658 {
1659 FLD (f_1_3) = ((((unsigned int) (FLD (f_cond32j)) >> (1))) & (7));
1660 FLD (f_7_1) = ((FLD (f_cond32j)) & (1));
1661 }
1662 errmsg = insert_normal (cd, fields->f_1_3, 0, 0, 1, 3, 32, total_length, buffer);
1663 if (errmsg)
1664 break;
1665 errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer);
1666 if (errmsg)
1667 break;
1668 }
1669 break;
1670 case M32C_OPERAND_CR1_PREFIXED_32 :
1671 errmsg = insert_normal (cd, fields->f_21_3, 0, 0, 21, 3, 32, total_length, buffer);
1672 break;
1673 case M32C_OPERAND_CR1_UNPREFIXED_32 :
1674 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1675 break;
1676 case M32C_OPERAND_CR16 :
1677 errmsg = insert_normal (cd, fields->f_9_3, 0, 0, 9, 3, 32, total_length, buffer);
1678 break;
1679 case M32C_OPERAND_CR2_32 :
1680 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1681 break;
1682 case M32C_OPERAND_CR3_PREFIXED_32 :
1683 errmsg = insert_normal (cd, fields->f_21_3, 0, 0, 21, 3, 32, total_length, buffer);
1684 break;
1685 case M32C_OPERAND_CR3_UNPREFIXED_32 :
1686 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1687 break;
1688 case M32C_OPERAND_FLAGS16 :
1689 errmsg = insert_normal (cd, fields->f_9_3, 0, 0, 9, 3, 32, total_length, buffer);
1690 break;
1691 case M32C_OPERAND_FLAGS32 :
1692 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1693 break;
1694 case M32C_OPERAND_SCCOND32 :
1695 errmsg = insert_normal (cd, fields->f_cond16, 0, 0, 12, 4, 32, total_length, buffer);
1696 break;
1697 case M32C_OPERAND_SIZE :
1698 break;
1699
1700 default :
1701 /* xgettext:c-format */
1702 fprintf (stderr, _("Unrecognized field %d while building insn.\n"),
1703 opindex);
1704 abort ();
1705 }
1706
1707 return errmsg;
1708 }
1709
1710 int m32c_cgen_extract_operand
1711 (CGEN_CPU_DESC, int, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
1712
1713 /* Main entry point for operand extraction.
1714 The result is <= 0 for error, >0 for success.
1715 ??? Actual values aren't well defined right now.
1716
1717 This function is basically just a big switch statement. Earlier versions
1718 used tables to look up the function to use, but
1719 - if the table contains both assembler and disassembler functions then
1720 the disassembler contains much of the assembler and vice-versa,
1721 - there's a lot of inlining possibilities as things grow,
1722 - using a switch statement avoids the function call overhead.
1723
1724 This function could be moved into `print_insn_normal', but keeping it
1725 separate makes clear the interface between `print_insn_normal' and each of
1726 the handlers. */
1727
1728 int
1729 m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
1730 int opindex,
1731 CGEN_EXTRACT_INFO *ex_info,
1732 CGEN_INSN_INT insn_value,
1733 CGEN_FIELDS * fields,
1734 bfd_vma pc)
1735 {
1736 /* Assume success (for those operands that are nops). */
1737 int length = 1;
1738 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
1739
1740 switch (opindex)
1741 {
1742 case M32C_OPERAND_A0 :
1743 break;
1744 case M32C_OPERAND_A1 :
1745 break;
1746 case M32C_OPERAND_AN16_PUSH_S :
1747 length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 1, 32, total_length, pc, & fields->f_4_1);
1748 break;
1749 case M32C_OPERAND_BIT16AN :
1750 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
1751 break;
1752 case M32C_OPERAND_BIT16RN :
1753 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn);
1754 break;
1755 case M32C_OPERAND_BIT3_S :
1756 {
1757 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 2, 32, total_length, pc, & fields->f_2_2);
1758 if (length <= 0) break;
1759 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1);
1760 if (length <= 0) break;
1761 {
1762 FLD (f_imm3_S) = ((((((FLD (f_2_2)) << (1))) | (FLD (f_7_1)))) + (1));
1763 }
1764 }
1765 break;
1766 case M32C_OPERAND_BIT32ANPREFIXED :
1767 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
1768 break;
1769 case M32C_OPERAND_BIT32ANUNPREFIXED :
1770 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
1771 break;
1772 case M32C_OPERAND_BIT32RNPREFIXED :
1773 {
1774 long value;
1775 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value);
1776 value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
1777 fields->f_dst32_rn_prefixed_QI = value;
1778 }
1779 break;
1780 case M32C_OPERAND_BIT32RNUNPREFIXED :
1781 {
1782 long value;
1783 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value);
1784 value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
1785 fields->f_dst32_rn_unprefixed_QI = value;
1786 }
1787 break;
1788 case M32C_OPERAND_BITBASE16_16_S8 :
1789 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8);
1790 break;
1791 case M32C_OPERAND_BITBASE16_16_U16 :
1792 {
1793 long value;
1794 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
1795 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1796 fields->f_dsp_16_u16 = value;
1797 }
1798 break;
1799 case M32C_OPERAND_BITBASE16_16_U8 :
1800 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
1801 break;
1802 case M32C_OPERAND_BITBASE16_8_U11_S :
1803 {
1804 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 3, 32, total_length, pc, & fields->f_bitno16_S);
1805 if (length <= 0) break;
1806 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_u8);
1807 if (length <= 0) break;
1808 {
1809 FLD (f_bitbase16_u11_S) = ((((FLD (f_dsp_8_u8)) << (3))) | (FLD (f_bitno16_S)));
1810 }
1811 }
1812 break;
1813 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
1814 {
1815 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1816 if (length <= 0) break;
1817 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8);
1818 if (length <= 0) break;
1819 {
1820 FLD (f_bitbase32_16_s11_unprefixed) = ((((FLD (f_dsp_16_s8)) << (3))) | (FLD (f_bitno32_unprefixed)));
1821 }
1822 }
1823 break;
1824 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
1825 {
1826 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1827 if (length <= 0) break;
1828 {
1829 long value;
1830 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value);
1831 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1832 fields->f_dsp_16_s16 = value;
1833 }
1834 if (length <= 0) break;
1835 {
1836 FLD (f_bitbase32_16_s19_unprefixed) = ((((FLD (f_dsp_16_s16)) << (3))) | (FLD (f_bitno32_unprefixed)));
1837 }
1838 }
1839 break;
1840 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
1841 {
1842 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1843 if (length <= 0) break;
1844 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
1845 if (length <= 0) break;
1846 {
1847 FLD (f_bitbase32_16_u11_unprefixed) = ((((FLD (f_dsp_16_u8)) << (3))) | (FLD (f_bitno32_unprefixed)));
1848 }
1849 }
1850 break;
1851 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
1852 {
1853 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1854 if (length <= 0) break;
1855 {
1856 long value;
1857 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
1858 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1859 fields->f_dsp_16_u16 = value;
1860 }
1861 if (length <= 0) break;
1862 {
1863 FLD (f_bitbase32_16_u19_unprefixed) = ((((FLD (f_dsp_16_u16)) << (3))) | (FLD (f_bitno32_unprefixed)));
1864 }
1865 }
1866 break;
1867 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
1868 {
1869 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1870 if (length <= 0) break;
1871 {
1872 long value;
1873 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
1874 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1875 fields->f_dsp_16_u16 = value;
1876 }
1877 if (length <= 0) break;
1878 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
1879 if (length <= 0) break;
1880 {
1881 FLD (f_bitbase32_16_u27_unprefixed) = ((((FLD (f_dsp_16_u16)) << (3))) | (((((FLD (f_dsp_32_u8)) << (19))) | (FLD (f_bitno32_unprefixed)))));
1882 }
1883 }
1884 break;
1885 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
1886 {
1887 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1888 if (length <= 0) break;
1889 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_s8);
1890 if (length <= 0) break;
1891 {
1892 FLD (f_bitbase32_24_s11_prefixed) = ((((FLD (f_dsp_24_s8)) << (3))) | (FLD (f_bitno32_prefixed)));
1893 }
1894 }
1895 break;
1896 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
1897 {
1898 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1899 if (length <= 0) break;
1900 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
1901 if (length <= 0) break;
1902 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_s8);
1903 if (length <= 0) break;
1904 {
1905 FLD (f_bitbase32_24_s19_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (((((FLD (f_dsp_32_s8)) << (11))) | (FLD (f_bitno32_prefixed)))));
1906 }
1907 }
1908 break;
1909 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
1910 {
1911 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1912 if (length <= 0) break;
1913 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
1914 if (length <= 0) break;
1915 {
1916 FLD (f_bitbase32_24_u11_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (FLD (f_bitno32_prefixed)));
1917 }
1918 }
1919 break;
1920 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
1921 {
1922 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1923 if (length <= 0) break;
1924 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
1925 if (length <= 0) break;
1926 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
1927 if (length <= 0) break;
1928 {
1929 FLD (f_bitbase32_24_u19_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (((((FLD (f_dsp_32_u8)) << (11))) | (FLD (f_bitno32_prefixed)))));
1930 }
1931 }
1932 break;
1933 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
1934 {
1935 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1936 if (length <= 0) break;
1937 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
1938 if (length <= 0) break;
1939 {
1940 long value;
1941 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
1942 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1943 fields->f_dsp_32_u16 = value;
1944 }
1945 if (length <= 0) break;
1946 {
1947 FLD (f_bitbase32_24_u27_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (((((FLD (f_dsp_32_u16)) << (11))) | (FLD (f_bitno32_prefixed)))));
1948 }
1949 }
1950 break;
1951 case M32C_OPERAND_BITNO16R :
1952 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
1953 break;
1954 case M32C_OPERAND_BITNO32PREFIXED :
1955 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1956 break;
1957 case M32C_OPERAND_BITNO32UNPREFIXED :
1958 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1959 break;
1960 case M32C_OPERAND_DSP_10_U6 :
1961 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 6, 32, total_length, pc, & fields->f_dsp_10_u6);
1962 break;
1963 case M32C_OPERAND_DSP_16_S16 :
1964 {
1965 long value;
1966 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value);
1967 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1968 fields->f_dsp_16_s16 = value;
1969 }
1970 break;
1971 case M32C_OPERAND_DSP_16_S8 :
1972 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8);
1973 break;
1974 case M32C_OPERAND_DSP_16_U16 :
1975 {
1976 long value;
1977 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
1978 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1979 fields->f_dsp_16_u16 = value;
1980 }
1981 break;
1982 case M32C_OPERAND_DSP_16_U20 :
1983 {
1984 {
1985 long value;
1986 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
1987 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1988 fields->f_dsp_16_u16 = value;
1989 }
1990 if (length <= 0) break;
1991 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
1992 if (length <= 0) break;
1993 {
1994 FLD (f_dsp_16_u24) = ((((FLD (f_dsp_32_u8)) << (16))) | (FLD (f_dsp_16_u16)));
1995 }
1996 }
1997 break;
1998 case M32C_OPERAND_DSP_16_U24 :
1999 {
2000 {
2001 long value;
2002 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
2003 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2004 fields->f_dsp_16_u16 = value;
2005 }
2006 if (length <= 0) break;
2007 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2008 if (length <= 0) break;
2009 {
2010 FLD (f_dsp_16_u24) = ((((FLD (f_dsp_32_u8)) << (16))) | (FLD (f_dsp_16_u16)));
2011 }
2012 }
2013 break;
2014 case M32C_OPERAND_DSP_16_U8 :
2015 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
2016 break;
2017 case M32C_OPERAND_DSP_24_S16 :
2018 {
2019 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2020 if (length <= 0) break;
2021 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2022 if (length <= 0) break;
2023 {
2024 FLD (f_dsp_24_s16) = EXTHISI (((HI) (UINT) (((((FLD (f_dsp_32_u8)) << (8))) | (FLD (f_dsp_24_u8))))));
2025 }
2026 }
2027 break;
2028 case M32C_OPERAND_DSP_24_S8 :
2029 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_s8);
2030 break;
2031 case M32C_OPERAND_DSP_24_U16 :
2032 {
2033 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2034 if (length <= 0) break;
2035 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2036 if (length <= 0) break;
2037 {
2038 FLD (f_dsp_24_u16) = ((((FLD (f_dsp_32_u8)) << (8))) | (FLD (f_dsp_24_u8)));
2039 }
2040 }
2041 break;
2042 case M32C_OPERAND_DSP_24_U20 :
2043 {
2044 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2045 if (length <= 0) break;
2046 {
2047 long value;
2048 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
2049 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2050 fields->f_dsp_32_u16 = value;
2051 }
2052 if (length <= 0) break;
2053 {
2054 FLD (f_dsp_24_u24) = ((((FLD (f_dsp_32_u16)) << (8))) | (FLD (f_dsp_24_u8)));
2055 }
2056 }
2057 break;
2058 case M32C_OPERAND_DSP_24_U24 :
2059 {
2060 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2061 if (length <= 0) break;
2062 {
2063 long value;
2064 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
2065 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2066 fields->f_dsp_32_u16 = value;
2067 }
2068 if (length <= 0) break;
2069 {
2070 FLD (f_dsp_24_u24) = ((((FLD (f_dsp_32_u16)) << (8))) | (FLD (f_dsp_24_u8)));
2071 }
2072 }
2073 break;
2074 case M32C_OPERAND_DSP_24_U8 :
2075 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2076 break;
2077 case M32C_OPERAND_DSP_32_S16 :
2078 {
2079 long value;
2080 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, pc, & value);
2081 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2082 fields->f_dsp_32_s16 = value;
2083 }
2084 break;
2085 case M32C_OPERAND_DSP_32_S8 :
2086 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_s8);
2087 break;
2088 case M32C_OPERAND_DSP_32_U16 :
2089 {
2090 long value;
2091 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
2092 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2093 fields->f_dsp_32_u16 = value;
2094 }
2095 break;
2096 case M32C_OPERAND_DSP_32_U20 :
2097 {
2098 long value;
2099 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value);
2100 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2101 fields->f_dsp_32_u24 = value;
2102 }
2103 break;
2104 case M32C_OPERAND_DSP_32_U24 :
2105 {
2106 long value;
2107 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value);
2108 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2109 fields->f_dsp_32_u24 = value;
2110 }
2111 break;
2112 case M32C_OPERAND_DSP_32_U8 :
2113 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2114 break;
2115 case M32C_OPERAND_DSP_40_S16 :
2116 {
2117 long value;
2118 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, pc, & value);
2119 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2120 fields->f_dsp_40_s16 = value;
2121 }
2122 break;
2123 case M32C_OPERAND_DSP_40_S8 :
2124 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_s8);
2125 break;
2126 case M32C_OPERAND_DSP_40_U16 :
2127 {
2128 long value;
2129 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 16, 32, total_length, pc, & value);
2130 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2131 fields->f_dsp_40_u16 = value;
2132 }
2133 break;
2134 case M32C_OPERAND_DSP_40_U24 :
2135 {
2136 long value;
2137 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 24, 32, total_length, pc, & value);
2138 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2139 fields->f_dsp_40_u24 = value;
2140 }
2141 break;
2142 case M32C_OPERAND_DSP_40_U8 :
2143 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_u8);
2144 break;
2145 case M32C_OPERAND_DSP_48_S16 :
2146 {
2147 long value;
2148 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, pc, & value);
2149 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2150 fields->f_dsp_48_s16 = value;
2151 }
2152 break;
2153 case M32C_OPERAND_DSP_48_S8 :
2154 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, pc, & fields->f_dsp_48_s8);
2155 break;
2156 case M32C_OPERAND_DSP_48_U16 :
2157 {
2158 long value;
2159 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value);
2160 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2161 fields->f_dsp_48_u16 = value;
2162 }
2163 break;
2164 case M32C_OPERAND_DSP_48_U24 :
2165 {
2166 {
2167 long value;
2168 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value);
2169 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2170 fields->f_dsp_48_u16 = value;
2171 }
2172 if (length <= 0) break;
2173 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8);
2174 if (length <= 0) break;
2175 {
2176 FLD (f_dsp_48_u24) = ((((FLD (f_dsp_48_u16)) & (65535))) | (((((FLD (f_dsp_64_u8)) << (16))) & (16711680))));
2177 }
2178 }
2179 break;
2180 case M32C_OPERAND_DSP_48_U8 :
2181 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 8, 32, total_length, pc, & fields->f_dsp_48_u8);
2182 break;
2183 case M32C_OPERAND_DSP_8_S24 :
2184 {
2185 long value;
2186 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 24, 32, total_length, pc, & value);
2187 value = ((((((unsigned int) (value) >> (16))) | (((value) & (65280))))) | (((EXTQISI (TRUNCSIQI (((value) & (255))))) << (16))));
2188 fields->f_dsp_8_s24 = value;
2189 }
2190 break;
2191 case M32C_OPERAND_DSP_8_S8 :
2192 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_s8);
2193 break;
2194 case M32C_OPERAND_DSP_8_U16 :
2195 {
2196 long value;
2197 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 16, 32, total_length, pc, & value);
2198 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2199 fields->f_dsp_8_u16 = value;
2200 }
2201 break;
2202 case M32C_OPERAND_DSP_8_U24 :
2203 {
2204 long value;
2205 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 24, 32, total_length, pc, & value);
2206 value = ((((((unsigned int) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
2207 fields->f_dsp_8_u24 = value;
2208 }
2209 break;
2210 case M32C_OPERAND_DSP_8_U6 :
2211 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 6, 32, total_length, pc, & fields->f_dsp_8_u6);
2212 break;
2213 case M32C_OPERAND_DSP_8_U8 :
2214 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_u8);
2215 break;
2216 case M32C_OPERAND_DST16AN :
2217 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
2218 break;
2219 case M32C_OPERAND_DST16AN_S :
2220 length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 1, 32, total_length, pc, & fields->f_dst16_an_s);
2221 break;
2222 case M32C_OPERAND_DST16ANHI :
2223 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
2224 break;
2225 case M32C_OPERAND_DST16ANQI :
2226 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
2227 break;
2228 case M32C_OPERAND_DST16ANQI_S :
2229 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 1, 32, total_length, pc, & fields->f_dst16_rn_QI_s);
2230 break;
2231 case M32C_OPERAND_DST16ANSI :
2232 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
2233 break;
2234 case M32C_OPERAND_DST16RNEXTQI :
2235 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 1, 32, total_length, pc, & fields->f_dst16_rn_ext);
2236 break;
2237 case M32C_OPERAND_DST16RNHI :
2238 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn);
2239 break;
2240 case M32C_OPERAND_DST16RNQI :
2241 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn);
2242 break;
2243 case M32C_OPERAND_DST16RNQI_S :
2244 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 1, 32, total_length, pc, & fields->f_dst16_rn_QI_s);
2245 break;
2246 case M32C_OPERAND_DST16RNSI :
2247 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn);
2248 break;
2249 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
2250 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2251 break;
2252 case M32C_OPERAND_DST32ANPREFIXED :
2253 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
2254 break;
2255 case M32C_OPERAND_DST32ANPREFIXEDHI :
2256 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
2257 break;
2258 case M32C_OPERAND_DST32ANPREFIXEDQI :
2259 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
2260 break;
2261 case M32C_OPERAND_DST32ANPREFIXEDSI :
2262 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
2263 break;
2264 case M32C_OPERAND_DST32ANUNPREFIXED :
2265 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2266 break;
2267 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
2268 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2269 break;
2270 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
2271 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2272 break;
2273 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
2274 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2275 break;
2276 case M32C_OPERAND_DST32R0HI_S :
2277 break;
2278 case M32C_OPERAND_DST32R0QI_S :
2279 break;
2280 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
2281 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_rn_ext_unprefixed);
2282 break;
2283 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
2284 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_rn_ext_unprefixed);
2285 break;
2286 case M32C_OPERAND_DST32RNPREFIXEDHI :
2287 {
2288 long value;
2289 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value);
2290 value = ((((value) + (2))) % (4));
2291 fields->f_dst32_rn_prefixed_HI = value;
2292 }
2293 break;
2294 case M32C_OPERAND_DST32RNPREFIXEDQI :
2295 {
2296 long value;
2297 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value);
2298 value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
2299 fields->f_dst32_rn_prefixed_QI = value;
2300 }
2301 break;
2302 case M32C_OPERAND_DST32RNPREFIXEDSI :
2303 {
2304 long value;
2305 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value);
2306 value = ((value) - (2));
2307 fields->f_dst32_rn_prefixed_SI = value;
2308 }
2309 break;
2310 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
2311 {
2312 long value;
2313 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value);
2314 value = ((((value) + (2))) % (4));
2315 fields->f_dst32_rn_unprefixed_HI = value;
2316 }
2317 break;
2318 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
2319 {
2320 long value;
2321 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value);
2322 value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
2323 fields->f_dst32_rn_unprefixed_QI = value;
2324 }
2325 break;
2326 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
2327 {
2328 long value;
2329 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value);
2330 value = ((value) - (2));
2331 fields->f_dst32_rn_unprefixed_SI = value;
2332 }
2333 break;
2334 case M32C_OPERAND_G :
2335 break;
2336 case M32C_OPERAND_IMM_12_S4 :
2337 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, pc, & fields->f_imm_12_s4);
2338 break;
2339 case M32C_OPERAND_IMM_12_S4N :
2340 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, pc, & fields->f_imm_12_s4);
2341 break;
2342 case M32C_OPERAND_IMM_13_U3 :
2343 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_imm_13_u3);
2344 break;
2345 case M32C_OPERAND_IMM_16_HI :
2346 {
2347 long value;
2348 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value);
2349 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2350 fields->f_dsp_16_s16 = value;
2351 }
2352 break;
2353 case M32C_OPERAND_IMM_16_QI :
2354 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8);
2355 break;
2356 case M32C_OPERAND_IMM_16_SI :
2357 {
2358 {
2359 long value;
2360 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
2361 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2362 fields->f_dsp_16_u16 = value;
2363 }
2364 if (length <= 0) break;
2365 {
2366 long value;
2367 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
2368 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2369 fields->f_dsp_32_u16 = value;
2370 }
2371 if (length <= 0) break;
2372 {
2373 FLD (f_dsp_16_s32) = ((((FLD (f_dsp_16_u16)) & (65535))) | (((((FLD (f_dsp_32_u16)) << (16))) & (0xffff0000))));
2374 }
2375 }
2376 break;
2377 case M32C_OPERAND_IMM_20_S4 :
2378 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, pc, & fields->f_imm_20_s4);
2379 break;
2380 case M32C_OPERAND_IMM_24_HI :
2381 {
2382 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2383 if (length <= 0) break;
2384 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2385 if (length <= 0) break;
2386 {
2387 FLD (f_dsp_24_s16) = EXTHISI (((HI) (UINT) (((((FLD (f_dsp_32_u8)) << (8))) | (FLD (f_dsp_24_u8))))));
2388 }
2389 }
2390 break;
2391 case M32C_OPERAND_IMM_24_QI :
2392 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_s8);
2393 break;
2394 case M32C_OPERAND_IMM_24_SI :
2395 {
2396 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2397 if (length <= 0) break;
2398 {
2399 long value;
2400 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value);
2401 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2402 fields->f_dsp_32_u24 = value;
2403 }
2404 if (length <= 0) break;
2405 {
2406 FLD (f_dsp_24_s32) = ((((FLD (f_dsp_24_u8)) & (255))) | (((((FLD (f_dsp_32_u24)) << (8))) & (0xffffff00))));
2407 }
2408 }
2409 break;
2410 case M32C_OPERAND_IMM_32_HI :
2411 {
2412 long value;
2413 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, pc, & value);
2414 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2415 fields->f_dsp_32_s16 = value;
2416 }
2417 break;
2418 case M32C_OPERAND_IMM_32_QI :
2419 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_s8);
2420 break;
2421 case M32C_OPERAND_IMM_32_SI :
2422 {
2423 long value;
2424 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 32, 32, total_length, pc, & value);
2425 value = EXTSISI (((((((((unsigned int) (value) >> (24))) & (255))) | (((((unsigned int) (value) >> (8))) & (65280))))) | (((((((value) << (8))) & (16711680))) | (((((value) << (24))) & (0xff000000)))))));
2426 fields->f_dsp_32_s32 = value;
2427 }
2428 break;
2429 case M32C_OPERAND_IMM_40_HI :
2430 {
2431 long value;
2432 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, pc, & value);
2433 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2434 fields->f_dsp_40_s16 = value;
2435 }
2436 break;
2437 case M32C_OPERAND_IMM_40_QI :
2438 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_s8);
2439 break;
2440 case M32C_OPERAND_IMM_40_SI :
2441 {
2442 {
2443 long value;
2444 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 24, 32, total_length, pc, & value);
2445 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2446 fields->f_dsp_40_u24 = value;
2447 }
2448 if (length <= 0) break;
2449 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8);
2450 if (length <= 0) break;
2451 {
2452 FLD (f_dsp_40_s32) = ((((FLD (f_dsp_40_u24)) & (16777215))) | (((((FLD (f_dsp_64_u8)) << (24))) & (0xff000000))));
2453 }
2454 }
2455 break;
2456 case M32C_OPERAND_IMM_48_HI :
2457 {
2458 long value;
2459 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, pc, & value);
2460 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2461 fields->f_dsp_48_s16 = value;
2462 }
2463 break;
2464 case M32C_OPERAND_IMM_48_QI :
2465 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, pc, & fields->f_dsp_48_s8);
2466 break;
2467 case M32C_OPERAND_IMM_48_SI :
2468 {
2469 {
2470 long value;
2471 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value);
2472 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2473 fields->f_dsp_48_u16 = value;
2474 }
2475 if (length <= 0) break;
2476 {
2477 long value;
2478 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 16, 32, total_length, pc, & value);
2479 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2480 fields->f_dsp_64_u16 = value;
2481 }
2482 if (length <= 0) break;
2483 {
2484 FLD (f_dsp_48_s32) = ((((FLD (f_dsp_48_u16)) & (65535))) | (((((FLD (f_dsp_64_u16)) << (16))) & (0xffff0000))));
2485 }
2486 }
2487 break;
2488 case M32C_OPERAND_IMM_56_HI :
2489 {
2490 length = extract_normal (cd, ex_info, insn_value, 0, 32, 24, 8, 32, total_length, pc, & fields->f_dsp_56_u8);
2491 if (length <= 0) break;
2492 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8);
2493 if (length <= 0) break;
2494 {
2495 FLD (f_dsp_56_s16) = EXTHISI (((HI) (UINT) (((((FLD (f_dsp_64_u8)) << (8))) | (FLD (f_dsp_56_u8))))));
2496 }
2497 }
2498 break;
2499 case M32C_OPERAND_IMM_56_QI :
2500 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 24, 8, 32, total_length, pc, & fields->f_dsp_56_s8);
2501 break;
2502 case M32C_OPERAND_IMM_64_HI :
2503 {
2504 long value;
2505 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 64, 0, 16, 32, total_length, pc, & value);
2506 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2507 fields->f_dsp_64_s16 = value;
2508 }
2509 break;
2510 case M32C_OPERAND_IMM_8_HI :
2511 {
2512 long value;
2513 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 16, 32, total_length, pc, & value);
2514 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2515 fields->f_dsp_8_s16 = value;
2516 }
2517 break;
2518 case M32C_OPERAND_IMM_8_QI :
2519 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_s8);
2520 break;
2521 case M32C_OPERAND_IMM_8_S4 :
2522 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, pc, & fields->f_imm_8_s4);
2523 break;
2524 case M32C_OPERAND_IMM_8_S4N :
2525 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, pc, & fields->f_imm_8_s4);
2526 break;
2527 case M32C_OPERAND_IMM_SH_12_S4 :
2528 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, pc, & fields->f_imm_12_s4);
2529 break;
2530 case M32C_OPERAND_IMM_SH_20_S4 :
2531 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, pc, & fields->f_imm_20_s4);
2532 break;
2533 case M32C_OPERAND_IMM_SH_8_S4 :
2534 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, pc, & fields->f_imm_8_s4);
2535 break;
2536 case M32C_OPERAND_IMM1_S :
2537 {
2538 long value;
2539 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 1, 32, total_length, pc, & value);
2540 value = ((value) + (1));
2541 fields->f_imm1_S = value;
2542 }
2543 break;
2544 case M32C_OPERAND_IMM3_S :
2545 {
2546 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 2, 32, total_length, pc, & fields->f_2_2);
2547 if (length <= 0) break;
2548 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1);
2549 if (length <= 0) break;
2550 {
2551 FLD (f_imm3_S) = ((((((FLD (f_2_2)) << (1))) | (FLD (f_7_1)))) + (1));
2552 }
2553 }
2554 break;
2555 case M32C_OPERAND_LAB_16_8 :
2556 {
2557 long value;
2558 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 16, 8, 32, total_length, pc, & value);
2559 value = ((value) + (((pc) + (2))));
2560 fields->f_lab_16_8 = value;
2561 }
2562 break;
2563 case M32C_OPERAND_LAB_24_8 :
2564 {
2565 long value;
2566 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 24, 8, 32, total_length, pc, & value);
2567 value = ((value) + (((pc) + (2))));
2568 fields->f_lab_24_8 = value;
2569 }
2570 break;
2571 case M32C_OPERAND_LAB_32_8 :
2572 {
2573 long value;
2574 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 0, 8, 32, total_length, pc, & value);
2575 value = ((value) + (((pc) + (2))));
2576 fields->f_lab_32_8 = value;
2577 }
2578 break;
2579 case M32C_OPERAND_LAB_40_8 :
2580 {
2581 long value;
2582 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 8, 8, 32, total_length, pc, & value);
2583 value = ((value) + (((pc) + (2))));
2584 fields->f_lab_40_8 = value;
2585 }
2586 break;
2587 case M32C_OPERAND_LAB_5_3 :
2588 {
2589 long value;
2590 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_PCREL_ADDR), 0, 5, 3, 32, total_length, pc, & value);
2591 value = ((value) + (((pc) + (2))));
2592 fields->f_lab_5_3 = value;
2593 }
2594 break;
2595 case M32C_OPERAND_LAB_8_16 :
2596 {
2597 long value;
2598 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGN_OPT)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 16, 32, total_length, pc, & value);
2599 value = ((((((unsigned int) (((value) & (65535))) >> (8))) | (((int) (((((value) & (255))) << (24))) >> (16))))) + (((pc) + (1))));
2600 fields->f_lab_8_16 = value;
2601 }
2602 break;
2603 case M32C_OPERAND_LAB_8_24 :
2604 {
2605 long value;
2606 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 8, 24, 32, total_length, pc, & value);
2607 value = ((((((unsigned int) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
2608 fields->f_lab_8_24 = value;
2609 }
2610 break;
2611 case M32C_OPERAND_LAB_8_8 :
2612 {
2613 long value;
2614 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 32, total_length, pc, & value);
2615 value = ((value) + (((pc) + (1))));
2616 fields->f_lab_8_8 = value;
2617 }
2618 break;
2619 case M32C_OPERAND_LAB32_JMP_S :
2620 {
2621 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 2, 32, total_length, pc, & fields->f_2_2);
2622 if (length <= 0) break;
2623 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1);
2624 if (length <= 0) break;
2625 {
2626 FLD (f_lab32_jmp_s) = ((pc) + (((((((FLD (f_2_2)) << (1))) | (FLD (f_7_1)))) + (2))));
2627 }
2628 }
2629 break;
2630 case M32C_OPERAND_Q :
2631 break;
2632 case M32C_OPERAND_R0 :
2633 break;
2634 case M32C_OPERAND_R0H :
2635 break;
2636 case M32C_OPERAND_R0L :
2637 break;
2638 case M32C_OPERAND_R1 :
2639 break;
2640 case M32C_OPERAND_R1R2R0 :
2641 break;
2642 case M32C_OPERAND_R2 :
2643 break;
2644 case M32C_OPERAND_R2R0 :
2645 break;
2646 case M32C_OPERAND_R3 :
2647 break;
2648 case M32C_OPERAND_R3R1 :
2649 break;
2650 case M32C_OPERAND_REGSETPOP :
2651 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_8_8);
2652 break;
2653 case M32C_OPERAND_REGSETPUSH :
2654 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_8_8);
2655 break;
2656 case M32C_OPERAND_RN16_PUSH_S :
2657 length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 1, 32, total_length, pc, & fields->f_4_1);
2658 break;
2659 case M32C_OPERAND_S :
2660 break;
2661 case M32C_OPERAND_SRC16AN :
2662 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src16_an);
2663 break;
2664 case M32C_OPERAND_SRC16ANHI :
2665 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src16_an);
2666 break;
2667 case M32C_OPERAND_SRC16ANQI :
2668 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src16_an);
2669 break;
2670 case M32C_OPERAND_SRC16RNHI :
2671 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & fields->f_src16_rn);
2672 break;
2673 case M32C_OPERAND_SRC16RNQI :
2674 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & fields->f_src16_rn);
2675 break;
2676 case M32C_OPERAND_SRC32ANPREFIXED :
2677 length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed);
2678 break;
2679 case M32C_OPERAND_SRC32ANPREFIXEDHI :
2680 length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed);
2681 break;
2682 case M32C_OPERAND_SRC32ANPREFIXEDQI :
2683 length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed);
2684 break;
2685 case M32C_OPERAND_SRC32ANPREFIXEDSI :
2686 length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed);
2687 break;
2688 case M32C_OPERAND_SRC32ANUNPREFIXED :
2689 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed);
2690 break;
2691 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
2692 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed);
2693 break;
2694 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
2695 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed);
2696 break;
2697 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
2698 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed);
2699 break;
2700 case M32C_OPERAND_SRC32RNPREFIXEDHI :
2701 {
2702 long value;
2703 length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value);
2704 value = ((((value) + (2))) % (4));
2705 fields->f_src32_rn_prefixed_HI = value;
2706 }
2707 break;
2708 case M32C_OPERAND_SRC32RNPREFIXEDQI :
2709 {
2710 long value;
2711 length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value);
2712 value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
2713 fields->f_src32_rn_prefixed_QI = value;
2714 }
2715 break;
2716 case M32C_OPERAND_SRC32RNPREFIXEDSI :
2717 {
2718 long value;
2719 length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value);
2720 value = ((value) - (2));
2721 fields->f_src32_rn_prefixed_SI = value;
2722 }
2723 break;
2724 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
2725 {
2726 long value;
2727 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value);
2728 value = ((((value) + (2))) % (4));
2729 fields->f_src32_rn_unprefixed_HI = value;
2730 }
2731 break;
2732 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
2733 {
2734 long value;
2735 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value);
2736 value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
2737 fields->f_src32_rn_unprefixed_QI = value;
2738 }
2739 break;
2740 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
2741 {
2742 long value;
2743 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value);
2744 value = ((value) - (2));
2745 fields->f_src32_rn_unprefixed_SI = value;
2746 }
2747 break;
2748 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
2749 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 1, 32, total_length, pc, & fields->f_5_1);
2750 break;
2751 case M32C_OPERAND_X :
2752 break;
2753 case M32C_OPERAND_Z :
2754 break;
2755 case M32C_OPERAND_COND16_16 :
2756 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
2757 break;
2758 case M32C_OPERAND_COND16_24 :
2759 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2760 break;
2761 case M32C_OPERAND_COND16_32 :
2762 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2763 break;
2764 case M32C_OPERAND_COND16C :
2765 length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 32, total_length, pc, & fields->f_cond16);
2766 break;
2767 case M32C_OPERAND_COND16J :
2768 length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 32, total_length, pc, & fields->f_cond16);
2769 break;
2770 case M32C_OPERAND_COND16J5 :
2771 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 3, 32, total_length, pc, & fields->f_cond16j_5);
2772 break;
2773 case M32C_OPERAND_COND32 :
2774 {
2775 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_9_1);
2776 if (length <= 0) break;
2777 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2778 if (length <= 0) break;
2779 {
2780 FLD (f_cond32) = ((((FLD (f_9_1)) << (3))) | (FLD (f_13_3)));
2781 }
2782 }
2783 break;
2784 case M32C_OPERAND_COND32_16 :
2785 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
2786 break;
2787 case M32C_OPERAND_COND32_24 :
2788 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2789 break;
2790 case M32C_OPERAND_COND32_32 :
2791 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2792 break;
2793 case M32C_OPERAND_COND32_40 :
2794 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_u8);
2795 break;
2796 case M32C_OPERAND_COND32J :
2797 {
2798 length = extract_normal (cd, ex_info, insn_value, 0, 0, 1, 3, 32, total_length, pc, & fields->f_1_3);
2799 if (length <= 0) break;
2800 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1);
2801 if (length <= 0) break;
2802 {
2803 FLD (f_cond32j) = ((((FLD (f_1_3)) << (1))) | (FLD (f_7_1)));
2804 }
2805 }
2806 break;
2807 case M32C_OPERAND_CR1_PREFIXED_32 :
2808 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_21_3);
2809 break;
2810 case M32C_OPERAND_CR1_UNPREFIXED_32 :
2811 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2812 break;
2813 case M32C_OPERAND_CR16 :
2814 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 3, 32, total_length, pc, & fields->f_9_3);
2815 break;
2816 case M32C_OPERAND_CR2_32 :
2817 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2818 break;
2819 case M32C_OPERAND_CR3_PREFIXED_32 :
2820 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_21_3);
2821 break;
2822 case M32C_OPERAND_CR3_UNPREFIXED_32 :
2823 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2824 break;
2825 case M32C_OPERAND_FLAGS16 :
2826 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 3, 32, total_length, pc, & fields->f_9_3);
2827 break;
2828 case M32C_OPERAND_FLAGS32 :
2829 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2830 break;
2831 case M32C_OPERAND_SCCOND32 :
2832 length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 32, total_length, pc, & fields->f_cond16);
2833 break;
2834 case M32C_OPERAND_SIZE :
2835 break;
2836
2837 default :
2838 /* xgettext:c-format */
2839 fprintf (stderr, _("Unrecognized field %d while decoding insn.\n"),
2840 opindex);
2841 abort ();
2842 }
2843
2844 return length;
2845 }
2846
2847 cgen_insert_fn * const m32c_cgen_insert_handlers[] =
2848 {
2849 insert_insn_normal,
2850 };
2851
2852 cgen_extract_fn * const m32c_cgen_extract_handlers[] =
2853 {
2854 extract_insn_normal,
2855 };
2856
2857 int m32c_cgen_get_int_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
2858 bfd_vma m32c_cgen_get_vma_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
2859
2860 /* Getting values from cgen_fields is handled by a collection of functions.
2861 They are distinguished by the type of the VALUE argument they return.
2862 TODO: floating point, inlining support, remove cases where result type
2863 not appropriate. */
2864
2865 int
2866 m32c_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
2867 int opindex,
2868 const CGEN_FIELDS * fields)
2869 {
2870 int value;
2871
2872 switch (opindex)
2873 {
2874 case M32C_OPERAND_A0 :
2875 value = 0;
2876 break;
2877 case M32C_OPERAND_A1 :
2878 value = 0;
2879 break;
2880 case M32C_OPERAND_AN16_PUSH_S :
2881 value = fields->f_4_1;
2882 break;
2883 case M32C_OPERAND_BIT16AN :
2884 value = fields->f_dst16_an;
2885 break;
2886 case M32C_OPERAND_BIT16RN :
2887 value = fields->f_dst16_rn;
2888 break;
2889 case M32C_OPERAND_BIT3_S :
2890 value = fields->f_imm3_S;
2891 break;
2892 case M32C_OPERAND_BIT32ANPREFIXED :
2893 value = fields->f_dst32_an_prefixed;
2894 break;
2895 case M32C_OPERAND_BIT32ANUNPREFIXED :
2896 value = fields->f_dst32_an_unprefixed;
2897 break;
2898 case M32C_OPERAND_BIT32RNPREFIXED :
2899 value = fields->f_dst32_rn_prefixed_QI;
2900 break;
2901 case M32C_OPERAND_BIT32RNUNPREFIXED :
2902 value = fields->f_dst32_rn_unprefixed_QI;
2903 break;
2904 case M32C_OPERAND_BITBASE16_16_S8 :
2905 value = fields->f_dsp_16_s8;
2906 break;
2907 case M32C_OPERAND_BITBASE16_16_U16 :
2908 value = fields->f_dsp_16_u16;
2909 break;
2910 case M32C_OPERAND_BITBASE16_16_U8 :
2911 value = fields->f_dsp_16_u8;
2912 break;
2913 case M32C_OPERAND_BITBASE16_8_U11_S :
2914 value = fields->f_bitbase16_u11_S;
2915 break;
2916 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
2917 value = fields->f_bitbase32_16_s11_unprefixed;
2918 break;
2919 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
2920 value = fields->f_bitbase32_16_s19_unprefixed;
2921 break;
2922 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
2923 value = fields->f_bitbase32_16_u11_unprefixed;
2924 break;
2925 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
2926 value = fields->f_bitbase32_16_u19_unprefixed;
2927 break;
2928 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
2929 value = fields->f_bitbase32_16_u27_unprefixed;
2930 break;
2931 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
2932 value = fields->f_bitbase32_24_s11_prefixed;
2933 break;
2934 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
2935 value = fields->f_bitbase32_24_s19_prefixed;
2936 break;
2937 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
2938 value = fields->f_bitbase32_24_u11_prefixed;
2939 break;
2940 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
2941 value = fields->f_bitbase32_24_u19_prefixed;
2942 break;
2943 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
2944 value = fields->f_bitbase32_24_u27_prefixed;
2945 break;
2946 case M32C_OPERAND_BITNO16R :
2947 value = fields->f_dsp_16_u8;
2948 break;
2949 case M32C_OPERAND_BITNO32PREFIXED :
2950 value = fields->f_bitno32_prefixed;
2951 break;
2952 case M32C_OPERAND_BITNO32UNPREFIXED :
2953 value = fields->f_bitno32_unprefixed;
2954 break;
2955 case M32C_OPERAND_DSP_10_U6 :
2956 value = fields->f_dsp_10_u6;
2957 break;
2958 case M32C_OPERAND_DSP_16_S16 :
2959 value = fields->f_dsp_16_s16;
2960 break;
2961 case M32C_OPERAND_DSP_16_S8 :
2962 value = fields->f_dsp_16_s8;
2963 break;
2964 case M32C_OPERAND_DSP_16_U16 :
2965 value = fields->f_dsp_16_u16;
2966 break;
2967 case M32C_OPERAND_DSP_16_U20 :
2968 value = fields->f_dsp_16_u24;
2969 break;
2970 case M32C_OPERAND_DSP_16_U24 :
2971 value = fields->f_dsp_16_u24;
2972 break;
2973 case M32C_OPERAND_DSP_16_U8 :
2974 value = fields->f_dsp_16_u8;
2975 break;
2976 case M32C_OPERAND_DSP_24_S16 :
2977 value = fields->f_dsp_24_s16;
2978 break;
2979 case M32C_OPERAND_DSP_24_S8 :
2980 value = fields->f_dsp_24_s8;
2981 break;
2982 case M32C_OPERAND_DSP_24_U16 :
2983 value = fields->f_dsp_24_u16;
2984 break;
2985 case M32C_OPERAND_DSP_24_U20 :
2986 value = fields->f_dsp_24_u24;
2987 break;
2988 case M32C_OPERAND_DSP_24_U24 :
2989 value = fields->f_dsp_24_u24;
2990 break;
2991 case M32C_OPERAND_DSP_24_U8 :
2992 value = fields->f_dsp_24_u8;
2993 break;
2994 case M32C_OPERAND_DSP_32_S16 :
2995 value = fields->f_dsp_32_s16;
2996 break;
2997 case M32C_OPERAND_DSP_32_S8 :
2998 value = fields->f_dsp_32_s8;
2999 break;
3000 case M32C_OPERAND_DSP_32_U16 :
3001 value = fields->f_dsp_32_u16;
3002 break;
3003 case M32C_OPERAND_DSP_32_U20 :
3004 value = fields->f_dsp_32_u24;
3005 break;
3006 case M32C_OPERAND_DSP_32_U24 :
3007 value = fields->f_dsp_32_u24;
3008 break;
3009 case M32C_OPERAND_DSP_32_U8 :
3010 value = fields->f_dsp_32_u8;
3011 break;
3012 case M32C_OPERAND_DSP_40_S16 :
3013 value = fields->f_dsp_40_s16;
3014 break;
3015 case M32C_OPERAND_DSP_40_S8 :
3016 value = fields->f_dsp_40_s8;
3017 break;
3018 case M32C_OPERAND_DSP_40_U16 :
3019 value = fields->f_dsp_40_u16;
3020 break;
3021 case M32C_OPERAND_DSP_40_U24 :
3022 value = fields->f_dsp_40_u24;
3023 break;
3024 case M32C_OPERAND_DSP_40_U8 :
3025 value = fields->f_dsp_40_u8;
3026 break;
3027 case M32C_OPERAND_DSP_48_S16 :
3028 value = fields->f_dsp_48_s16;
3029 break;
3030 case M32C_OPERAND_DSP_48_S8 :
3031 value = fields->f_dsp_48_s8;
3032 break;
3033 case M32C_OPERAND_DSP_48_U16 :
3034 value = fields->f_dsp_48_u16;
3035 break;
3036 case M32C_OPERAND_DSP_48_U24 :
3037 value = fields->f_dsp_48_u24;
3038 break;
3039 case M32C_OPERAND_DSP_48_U8 :
3040 value = fields->f_dsp_48_u8;
3041 break;
3042 case M32C_OPERAND_DSP_8_S24 :
3043 value = fields->f_dsp_8_s24;
3044 break;
3045 case M32C_OPERAND_DSP_8_S8 :
3046 value = fields->f_dsp_8_s8;
3047 break;
3048 case M32C_OPERAND_DSP_8_U16 :
3049 value = fields->f_dsp_8_u16;
3050 break;
3051 case M32C_OPERAND_DSP_8_U24 :
3052 value = fields->f_dsp_8_u24;
3053 break;
3054 case M32C_OPERAND_DSP_8_U6 :
3055 value = fields->f_dsp_8_u6;
3056 break;
3057 case M32C_OPERAND_DSP_8_U8 :
3058 value = fields->f_dsp_8_u8;
3059 break;
3060 case M32C_OPERAND_DST16AN :
3061 value = fields->f_dst16_an;
3062 break;
3063 case M32C_OPERAND_DST16AN_S :
3064 value = fields->f_dst16_an_s;
3065 break;
3066 case M32C_OPERAND_DST16ANHI :
3067 value = fields->f_dst16_an;
3068 break;
3069 case M32C_OPERAND_DST16ANQI :
3070 value = fields->f_dst16_an;
3071 break;
3072 case M32C_OPERAND_DST16ANQI_S :
3073 value = fields->f_dst16_rn_QI_s;
3074 break;
3075 case M32C_OPERAND_DST16ANSI :
3076 value = fields->f_dst16_an;
3077 break;
3078 case M32C_OPERAND_DST16RNEXTQI :
3079 value = fields->f_dst16_rn_ext;
3080 break;
3081 case M32C_OPERAND_DST16RNHI :
3082 value = fields->f_dst16_rn;
3083 break;
3084 case M32C_OPERAND_DST16RNQI :
3085 value = fields->f_dst16_rn;
3086 break;
3087 case M32C_OPERAND_DST16RNQI_S :
3088 value = fields->f_dst16_rn_QI_s;
3089 break;
3090 case M32C_OPERAND_DST16RNSI :
3091 value = fields->f_dst16_rn;
3092 break;
3093 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
3094 value = fields->f_dst32_an_unprefixed;
3095 break;
3096 case M32C_OPERAND_DST32ANPREFIXED :
3097 value = fields->f_dst32_an_prefixed;
3098 break;
3099 case M32C_OPERAND_DST32ANPREFIXEDHI :
3100 value = fields->f_dst32_an_prefixed;
3101 break;
3102 case M32C_OPERAND_DST32ANPREFIXEDQI :
3103 value = fields->f_dst32_an_prefixed;
3104 break;
3105 case M32C_OPERAND_DST32ANPREFIXEDSI :
3106 value = fields->f_dst32_an_prefixed;
3107 break;
3108 case M32C_OPERAND_DST32ANUNPREFIXED :
3109 value = fields->f_dst32_an_unprefixed;
3110 break;
3111 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
3112 value = fields->f_dst32_an_unprefixed;
3113 break;
3114 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
3115 value = fields->f_dst32_an_unprefixed;
3116 break;
3117 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
3118 value = fields->f_dst32_an_unprefixed;
3119 break;
3120 case M32C_OPERAND_DST32R0HI_S :
3121 value = 0;
3122 break;
3123 case M32C_OPERAND_DST32R0QI_S :
3124 value = 0;
3125 break;
3126 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
3127 value = fields->f_dst32_rn_ext_unprefixed;
3128 break;
3129 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
3130 value = fields->f_dst32_rn_ext_unprefixed;
3131 break;
3132 case M32C_OPERAND_DST32RNPREFIXEDHI :
3133 value = fields->f_dst32_rn_prefixed_HI;
3134 break;
3135 case M32C_OPERAND_DST32RNPREFIXEDQI :
3136 value = fields->f_dst32_rn_prefixed_QI;
3137 break;
3138 case M32C_OPERAND_DST32RNPREFIXEDSI :
3139 value = fields->f_dst32_rn_prefixed_SI;
3140 break;
3141 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
3142 value = fields->f_dst32_rn_unprefixed_HI;
3143 break;
3144 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
3145 value = fields->f_dst32_rn_unprefixed_QI;
3146 break;
3147 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
3148 value = fields->f_dst32_rn_unprefixed_SI;
3149 break;
3150 case M32C_OPERAND_G :
3151 value = 0;
3152 break;
3153 case M32C_OPERAND_IMM_12_S4 :
3154 value = fields->f_imm_12_s4;
3155 break;
3156 case M32C_OPERAND_IMM_12_S4N :
3157 value = fields->f_imm_12_s4;
3158 break;
3159 case M32C_OPERAND_IMM_13_U3 :
3160 value = fields->f_imm_13_u3;
3161 break;
3162 case M32C_OPERAND_IMM_16_HI :
3163 value = fields->f_dsp_16_s16;
3164 break;
3165 case M32C_OPERAND_IMM_16_QI :
3166 value = fields->f_dsp_16_s8;
3167 break;
3168 case M32C_OPERAND_IMM_16_SI :
3169 value = fields->f_dsp_16_s32;
3170 break;
3171 case M32C_OPERAND_IMM_20_S4 :
3172 value = fields->f_imm_20_s4;
3173 break;
3174 case M32C_OPERAND_IMM_24_HI :
3175 value = fields->f_dsp_24_s16;
3176 break;
3177 case M32C_OPERAND_IMM_24_QI :
3178 value = fields->f_dsp_24_s8;
3179 break;
3180 case M32C_OPERAND_IMM_24_SI :
3181 value = fields->f_dsp_24_s32;
3182 break;
3183 case M32C_OPERAND_IMM_32_HI :
3184 value = fields->f_dsp_32_s16;
3185 break;
3186 case M32C_OPERAND_IMM_32_QI :
3187 value = fields->f_dsp_32_s8;
3188 break;
3189 case M32C_OPERAND_IMM_32_SI :
3190 value = fields->f_dsp_32_s32;
3191 break;
3192 case M32C_OPERAND_IMM_40_HI :
3193 value = fields->f_dsp_40_s16;
3194 break;
3195 case M32C_OPERAND_IMM_40_QI :
3196 value = fields->f_dsp_40_s8;
3197 break;
3198 case M32C_OPERAND_IMM_40_SI :
3199 value = fields->f_dsp_40_s32;
3200 break;
3201 case M32C_OPERAND_IMM_48_HI :
3202 value = fields->f_dsp_48_s16;
3203 break;
3204 case M32C_OPERAND_IMM_48_QI :
3205 value = fields->f_dsp_48_s8;
3206 break;
3207 case M32C_OPERAND_IMM_48_SI :
3208 value = fields->f_dsp_48_s32;
3209 break;
3210 case M32C_OPERAND_IMM_56_HI :
3211 value = fields->f_dsp_56_s16;
3212 break;
3213 case M32C_OPERAND_IMM_56_QI :
3214 value = fields->f_dsp_56_s8;
3215 break;
3216 case M32C_OPERAND_IMM_64_HI :
3217 value = fields->f_dsp_64_s16;
3218 break;
3219 case M32C_OPERAND_IMM_8_HI :
3220 value = fields->f_dsp_8_s16;
3221 break;
3222 case M32C_OPERAND_IMM_8_QI :
3223 value = fields->f_dsp_8_s8;
3224 break;
3225 case M32C_OPERAND_IMM_8_S4 :
3226 value = fields->f_imm_8_s4;
3227 break;
3228 case M32C_OPERAND_IMM_8_S4N :
3229 value = fields->f_imm_8_s4;
3230 break;
3231 case M32C_OPERAND_IMM_SH_12_S4 :
3232 value = fields->f_imm_12_s4;
3233 break;
3234 case M32C_OPERAND_IMM_SH_20_S4 :
3235 value = fields->f_imm_20_s4;
3236 break;
3237 case M32C_OPERAND_IMM_SH_8_S4 :
3238 value = fields->f_imm_8_s4;
3239 break;
3240 case M32C_OPERAND_IMM1_S :
3241 value = fields->f_imm1_S;
3242 break;
3243 case M32C_OPERAND_IMM3_S :
3244 value = fields->f_imm3_S;
3245 break;
3246 case M32C_OPERAND_LAB_16_8 :
3247 value = fields->f_lab_16_8;
3248 break;
3249 case M32C_OPERAND_LAB_24_8 :
3250 value = fields->f_lab_24_8;
3251 break;
3252 case M32C_OPERAND_LAB_32_8 :
3253 value = fields->f_lab_32_8;
3254 break;
3255 case M32C_OPERAND_LAB_40_8 :
3256 value = fields->f_lab_40_8;
3257 break;
3258 case M32C_OPERAND_LAB_5_3 :
3259 value = fields->f_lab_5_3;
3260 break;
3261 case M32C_OPERAND_LAB_8_16 :
3262 value = fields->f_lab_8_16;
3263 break;
3264 case M32C_OPERAND_LAB_8_24 :
3265 value = fields->f_lab_8_24;
3266 break;
3267 case M32C_OPERAND_LAB_8_8 :
3268 value = fields->f_lab_8_8;
3269 break;
3270 case M32C_OPERAND_LAB32_JMP_S :
3271 value = fields->f_lab32_jmp_s;
3272 break;
3273 case M32C_OPERAND_Q :
3274 value = 0;
3275 break;
3276 case M32C_OPERAND_R0 :
3277 value = 0;
3278 break;
3279 case M32C_OPERAND_R0H :
3280 value = 0;
3281 break;
3282 case M32C_OPERAND_R0L :
3283 value = 0;
3284 break;
3285 case M32C_OPERAND_R1 :
3286 value = 0;
3287 break;
3288 case M32C_OPERAND_R1R2R0 :
3289 value = 0;
3290 break;
3291 case M32C_OPERAND_R2 :
3292 value = 0;
3293 break;
3294 case M32C_OPERAND_R2R0 :
3295 value = 0;
3296 break;
3297 case M32C_OPERAND_R3 :
3298 value = 0;
3299 break;
3300 case M32C_OPERAND_R3R1 :
3301 value = 0;
3302 break;
3303 case M32C_OPERAND_REGSETPOP :
3304 value = fields->f_8_8;
3305 break;
3306 case M32C_OPERAND_REGSETPUSH :
3307 value = fields->f_8_8;
3308 break;
3309 case M32C_OPERAND_RN16_PUSH_S :
3310 value = fields->f_4_1;
3311 break;
3312 case M32C_OPERAND_S :
3313 value = 0;
3314 break;
3315 case M32C_OPERAND_SRC16AN :
3316 value = fields->f_src16_an;
3317 break;
3318 case M32C_OPERAND_SRC16ANHI :
3319 value = fields->f_src16_an;
3320 break;
3321 case M32C_OPERAND_SRC16ANQI :
3322 value = fields->f_src16_an;
3323 break;
3324 case M32C_OPERAND_SRC16RNHI :
3325 value = fields->f_src16_rn;
3326 break;
3327 case M32C_OPERAND_SRC16RNQI :
3328 value = fields->f_src16_rn;
3329 break;
3330 case M32C_OPERAND_SRC32ANPREFIXED :
3331 value = fields->f_src32_an_prefixed;
3332 break;
3333 case M32C_OPERAND_SRC32ANPREFIXEDHI :
3334 value = fields->f_src32_an_prefixed;
3335 break;
3336 case M32C_OPERAND_SRC32ANPREFIXEDQI :
3337 value = fields->f_src32_an_prefixed;
3338 break;
3339 case M32C_OPERAND_SRC32ANPREFIXEDSI :
3340 value = fields->f_src32_an_prefixed;
3341 break;
3342 case M32C_OPERAND_SRC32ANUNPREFIXED :
3343 value = fields->f_src32_an_unprefixed;
3344 break;
3345 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
3346 value = fields->f_src32_an_unprefixed;
3347 break;
3348 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
3349 value = fields->f_src32_an_unprefixed;
3350 break;
3351 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
3352 value = fields->f_src32_an_unprefixed;
3353 break;
3354 case M32C_OPERAND_SRC32RNPREFIXEDHI :
3355 value = fields->f_src32_rn_prefixed_HI;
3356 break;
3357 case M32C_OPERAND_SRC32RNPREFIXEDQI :
3358 value = fields->f_src32_rn_prefixed_QI;
3359 break;
3360 case M32C_OPERAND_SRC32RNPREFIXEDSI :
3361 value = fields->f_src32_rn_prefixed_SI;
3362 break;
3363 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
3364 value = fields->f_src32_rn_unprefixed_HI;
3365 break;
3366 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
3367 value = fields->f_src32_rn_unprefixed_QI;
3368 break;
3369 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
3370 value = fields->f_src32_rn_unprefixed_SI;
3371 break;
3372 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
3373 value = fields->f_5_1;
3374 break;
3375 case M32C_OPERAND_X :
3376 value = 0;
3377 break;
3378 case M32C_OPERAND_Z :
3379 value = 0;
3380 break;
3381 case M32C_OPERAND_COND16_16 :
3382 value = fields->f_dsp_16_u8;
3383 break;
3384 case M32C_OPERAND_COND16_24 :
3385 value = fields->f_dsp_24_u8;
3386 break;
3387 case M32C_OPERAND_COND16_32 :
3388 value = fields->f_dsp_32_u8;
3389 break;
3390 case M32C_OPERAND_COND16C :
3391 value = fields->f_cond16;
3392 break;
3393 case M32C_OPERAND_COND16J :
3394 value = fields->f_cond16;
3395 break;
3396 case M32C_OPERAND_COND16J5 :
3397 value = fields->f_cond16j_5;
3398 break;
3399 case M32C_OPERAND_COND32 :
3400 value = fields->f_cond32;
3401 break;
3402 case M32C_OPERAND_COND32_16 :
3403 value = fields->f_dsp_16_u8;
3404 break;
3405 case M32C_OPERAND_COND32_24 :
3406 value = fields->f_dsp_24_u8;
3407 break;
3408 case M32C_OPERAND_COND32_32 :
3409 value = fields->f_dsp_32_u8;
3410 break;
3411 case M32C_OPERAND_COND32_40 :
3412 value = fields->f_dsp_40_u8;
3413 break;
3414 case M32C_OPERAND_COND32J :
3415 value = fields->f_cond32j;
3416 break;
3417 case M32C_OPERAND_CR1_PREFIXED_32 :
3418 value = fields->f_21_3;
3419 break;
3420 case M32C_OPERAND_CR1_UNPREFIXED_32 :
3421 value = fields->f_13_3;
3422 break;
3423 case M32C_OPERAND_CR16 :
3424 value = fields->f_9_3;
3425 break;
3426 case M32C_OPERAND_CR2_32 :
3427 value = fields->f_13_3;
3428 break;
3429 case M32C_OPERAND_CR3_PREFIXED_32 :
3430 value = fields->f_21_3;
3431 break;
3432 case M32C_OPERAND_CR3_UNPREFIXED_32 :
3433 value = fields->f_13_3;
3434 break;
3435 case M32C_OPERAND_FLAGS16 :
3436 value = fields->f_9_3;
3437 break;
3438 case M32C_OPERAND_FLAGS32 :
3439 value = fields->f_13_3;
3440 break;
3441 case M32C_OPERAND_SCCOND32 :
3442 value = fields->f_cond16;
3443 break;
3444 case M32C_OPERAND_SIZE :
3445 value = 0;
3446 break;
3447
3448 default :
3449 /* xgettext:c-format */
3450 fprintf (stderr, _("Unrecognized field %d while getting int operand.\n"),
3451 opindex);
3452 abort ();
3453 }
3454
3455 return value;
3456 }
3457
3458 bfd_vma
3459 m32c_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
3460 int opindex,
3461 const CGEN_FIELDS * fields)
3462 {
3463 bfd_vma value;
3464
3465 switch (opindex)
3466 {
3467 case M32C_OPERAND_A0 :
3468 value = 0;
3469 break;
3470 case M32C_OPERAND_A1 :
3471 value = 0;
3472 break;
3473 case M32C_OPERAND_AN16_PUSH_S :
3474 value = fields->f_4_1;
3475 break;
3476 case M32C_OPERAND_BIT16AN :
3477 value = fields->f_dst16_an;
3478 break;
3479 case M32C_OPERAND_BIT16RN :
3480 value = fields->f_dst16_rn;
3481 break;
3482 case M32C_OPERAND_BIT3_S :
3483 value = fields->f_imm3_S;
3484 break;
3485 case M32C_OPERAND_BIT32ANPREFIXED :
3486 value = fields->f_dst32_an_prefixed;
3487 break;
3488 case M32C_OPERAND_BIT32ANUNPREFIXED :
3489 value = fields->f_dst32_an_unprefixed;
3490 break;
3491 case M32C_OPERAND_BIT32RNPREFIXED :
3492 value = fields->f_dst32_rn_prefixed_QI;
3493 break;
3494 case M32C_OPERAND_BIT32RNUNPREFIXED :
3495 value = fields->f_dst32_rn_unprefixed_QI;
3496 break;
3497 case M32C_OPERAND_BITBASE16_16_S8 :
3498 value = fields->f_dsp_16_s8;
3499 break;
3500 case M32C_OPERAND_BITBASE16_16_U16 :
3501 value = fields->f_dsp_16_u16;
3502 break;
3503 case M32C_OPERAND_BITBASE16_16_U8 :
3504 value = fields->f_dsp_16_u8;
3505 break;
3506 case M32C_OPERAND_BITBASE16_8_U11_S :
3507 value = fields->f_bitbase16_u11_S;
3508 break;
3509 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
3510 value = fields->f_bitbase32_16_s11_unprefixed;
3511 break;
3512 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
3513 value = fields->f_bitbase32_16_s19_unprefixed;
3514 break;
3515 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
3516 value = fields->f_bitbase32_16_u11_unprefixed;
3517 break;
3518 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
3519 value = fields->f_bitbase32_16_u19_unprefixed;
3520 break;
3521 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
3522 value = fields->f_bitbase32_16_u27_unprefixed;
3523 break;
3524 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
3525 value = fields->f_bitbase32_24_s11_prefixed;
3526 break;
3527 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
3528 value = fields->f_bitbase32_24_s19_prefixed;
3529 break;
3530 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
3531 value = fields->f_bitbase32_24_u11_prefixed;
3532 break;
3533 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
3534 value = fields->f_bitbase32_24_u19_prefixed;
3535 break;
3536 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
3537 value = fields->f_bitbase32_24_u27_prefixed;
3538 break;
3539 case M32C_OPERAND_BITNO16R :
3540 value = fields->f_dsp_16_u8;
3541 break;
3542 case M32C_OPERAND_BITNO32PREFIXED :
3543 value = fields->f_bitno32_prefixed;
3544 break;
3545 case M32C_OPERAND_BITNO32UNPREFIXED :
3546 value = fields->f_bitno32_unprefixed;
3547 break;
3548 case M32C_OPERAND_DSP_10_U6 :
3549 value = fields->f_dsp_10_u6;
3550 break;
3551 case M32C_OPERAND_DSP_16_S16 :
3552 value = fields->f_dsp_16_s16;
3553 break;
3554 case M32C_OPERAND_DSP_16_S8 :
3555 value = fields->f_dsp_16_s8;
3556 break;
3557 case M32C_OPERAND_DSP_16_U16 :
3558 value = fields->f_dsp_16_u16;
3559 break;
3560 case M32C_OPERAND_DSP_16_U20 :
3561 value = fields->f_dsp_16_u24;
3562 break;
3563 case M32C_OPERAND_DSP_16_U24 :
3564 value = fields->f_dsp_16_u24;
3565 break;
3566 case M32C_OPERAND_DSP_16_U8 :
3567 value = fields->f_dsp_16_u8;
3568 break;
3569 case M32C_OPERAND_DSP_24_S16 :
3570 value = fields->f_dsp_24_s16;
3571 break;
3572 case M32C_OPERAND_DSP_24_S8 :
3573 value = fields->f_dsp_24_s8;
3574 break;
3575 case M32C_OPERAND_DSP_24_U16 :
3576 value = fields->f_dsp_24_u16;
3577 break;
3578 case M32C_OPERAND_DSP_24_U20 :
3579 value = fields->f_dsp_24_u24;
3580 break;
3581 case M32C_OPERAND_DSP_24_U24 :
3582 value = fields->f_dsp_24_u24;
3583 break;
3584 case M32C_OPERAND_DSP_24_U8 :
3585 value = fields->f_dsp_24_u8;
3586 break;
3587 case M32C_OPERAND_DSP_32_S16 :
3588 value = fields->f_dsp_32_s16;
3589 break;
3590 case M32C_OPERAND_DSP_32_S8 :
3591 value = fields->f_dsp_32_s8;
3592 break;
3593 case M32C_OPERAND_DSP_32_U16 :
3594 value = fields->f_dsp_32_u16;
3595 break;
3596 case M32C_OPERAND_DSP_32_U20 :
3597 value = fields->f_dsp_32_u24;
3598 break;
3599 case M32C_OPERAND_DSP_32_U24 :
3600 value = fields->f_dsp_32_u24;
3601 break;
3602 case M32C_OPERAND_DSP_32_U8 :
3603 value = fields->f_dsp_32_u8;
3604 break;
3605 case M32C_OPERAND_DSP_40_S16 :
3606 value = fields->f_dsp_40_s16;
3607 break;
3608 case M32C_OPERAND_DSP_40_S8 :
3609 value = fields->f_dsp_40_s8;
3610 break;
3611 case M32C_OPERAND_DSP_40_U16 :
3612 value = fields->f_dsp_40_u16;
3613 break;
3614 case M32C_OPERAND_DSP_40_U24 :
3615 value = fields->f_dsp_40_u24;
3616 break;
3617 case M32C_OPERAND_DSP_40_U8 :
3618 value = fields->f_dsp_40_u8;
3619 break;
3620 case M32C_OPERAND_DSP_48_S16 :
3621 value = fields->f_dsp_48_s16;
3622 break;
3623 case M32C_OPERAND_DSP_48_S8 :
3624 value = fields->f_dsp_48_s8;
3625 break;
3626 case M32C_OPERAND_DSP_48_U16 :
3627 value = fields->f_dsp_48_u16;
3628 break;
3629 case M32C_OPERAND_DSP_48_U24 :
3630 value = fields->f_dsp_48_u24;
3631 break;
3632 case M32C_OPERAND_DSP_48_U8 :
3633 value = fields->f_dsp_48_u8;
3634 break;
3635 case M32C_OPERAND_DSP_8_S24 :
3636 value = fields->f_dsp_8_s24;
3637 break;
3638 case M32C_OPERAND_DSP_8_S8 :
3639 value = fields->f_dsp_8_s8;
3640 break;
3641 case M32C_OPERAND_DSP_8_U16 :
3642 value = fields->f_dsp_8_u16;
3643 break;
3644 case M32C_OPERAND_DSP_8_U24 :
3645 value = fields->f_dsp_8_u24;
3646 break;
3647 case M32C_OPERAND_DSP_8_U6 :
3648 value = fields->f_dsp_8_u6;
3649 break;
3650 case M32C_OPERAND_DSP_8_U8 :
3651 value = fields->f_dsp_8_u8;
3652 break;
3653 case M32C_OPERAND_DST16AN :
3654 value = fields->f_dst16_an;
3655 break;
3656 case M32C_OPERAND_DST16AN_S :
3657 value = fields->f_dst16_an_s;
3658 break;
3659 case M32C_OPERAND_DST16ANHI :
3660 value = fields->f_dst16_an;
3661 break;
3662 case M32C_OPERAND_DST16ANQI :
3663 value = fields->f_dst16_an;
3664 break;
3665 case M32C_OPERAND_DST16ANQI_S :
3666 value = fields->f_dst16_rn_QI_s;
3667 break;
3668 case M32C_OPERAND_DST16ANSI :
3669 value = fields->f_dst16_an;
3670 break;
3671 case M32C_OPERAND_DST16RNEXTQI :
3672 value = fields->f_dst16_rn_ext;
3673 break;
3674 case M32C_OPERAND_DST16RNHI :
3675 value = fields->f_dst16_rn;
3676 break;
3677 case M32C_OPERAND_DST16RNQI :
3678 value = fields->f_dst16_rn;
3679 break;
3680 case M32C_OPERAND_DST16RNQI_S :
3681 value = fields->f_dst16_rn_QI_s;
3682 break;
3683 case M32C_OPERAND_DST16RNSI :
3684 value = fields->f_dst16_rn;
3685 break;
3686 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
3687 value = fields->f_dst32_an_unprefixed;
3688 break;
3689 case M32C_OPERAND_DST32ANPREFIXED :
3690 value = fields->f_dst32_an_prefixed;
3691 break;
3692 case M32C_OPERAND_DST32ANPREFIXEDHI :
3693 value = fields->f_dst32_an_prefixed;
3694 break;
3695 case M32C_OPERAND_DST32ANPREFIXEDQI :
3696 value = fields->f_dst32_an_prefixed;
3697 break;
3698 case M32C_OPERAND_DST32ANPREFIXEDSI :
3699 value = fields->f_dst32_an_prefixed;
3700 break;
3701 case M32C_OPERAND_DST32ANUNPREFIXED :
3702 value = fields->f_dst32_an_unprefixed;
3703 break;
3704 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
3705 value = fields->f_dst32_an_unprefixed;
3706 break;
3707 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
3708 value = fields->f_dst32_an_unprefixed;
3709 break;
3710 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
3711 value = fields->f_dst32_an_unprefixed;
3712 break;
3713 case M32C_OPERAND_DST32R0HI_S :
3714 value = 0;
3715 break;
3716 case M32C_OPERAND_DST32R0QI_S :
3717 value = 0;
3718 break;
3719 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
3720 value = fields->f_dst32_rn_ext_unprefixed;
3721 break;
3722 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
3723 value = fields->f_dst32_rn_ext_unprefixed;
3724 break;
3725 case M32C_OPERAND_DST32RNPREFIXEDHI :
3726 value = fields->f_dst32_rn_prefixed_HI;
3727 break;
3728 case M32C_OPERAND_DST32RNPREFIXEDQI :
3729 value = fields->f_dst32_rn_prefixed_QI;
3730 break;
3731 case M32C_OPERAND_DST32RNPREFIXEDSI :
3732 value = fields->f_dst32_rn_prefixed_SI;
3733 break;
3734 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
3735 value = fields->f_dst32_rn_unprefixed_HI;
3736 break;
3737 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
3738 value = fields->f_dst32_rn_unprefixed_QI;
3739 break;
3740 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
3741 value = fields->f_dst32_rn_unprefixed_SI;
3742 break;
3743 case M32C_OPERAND_G :
3744 value = 0;
3745 break;
3746 case M32C_OPERAND_IMM_12_S4 :
3747 value = fields->f_imm_12_s4;
3748 break;
3749 case M32C_OPERAND_IMM_12_S4N :
3750 value = fields->f_imm_12_s4;
3751 break;
3752 case M32C_OPERAND_IMM_13_U3 :
3753 value = fields->f_imm_13_u3;
3754 break;
3755 case M32C_OPERAND_IMM_16_HI :
3756 value = fields->f_dsp_16_s16;
3757 break;
3758 case M32C_OPERAND_IMM_16_QI :
3759 value = fields->f_dsp_16_s8;
3760 break;
3761 case M32C_OPERAND_IMM_16_SI :
3762 value = fields->f_dsp_16_s32;
3763 break;
3764 case M32C_OPERAND_IMM_20_S4 :
3765 value = fields->f_imm_20_s4;
3766 break;
3767 case M32C_OPERAND_IMM_24_HI :
3768 value = fields->f_dsp_24_s16;
3769 break;
3770 case M32C_OPERAND_IMM_24_QI :
3771 value = fields->f_dsp_24_s8;
3772 break;
3773 case M32C_OPERAND_IMM_24_SI :
3774 value = fields->f_dsp_24_s32;
3775 break;
3776 case M32C_OPERAND_IMM_32_HI :
3777 value = fields->f_dsp_32_s16;
3778 break;
3779 case M32C_OPERAND_IMM_32_QI :
3780 value = fields->f_dsp_32_s8;
3781 break;
3782 case M32C_OPERAND_IMM_32_SI :
3783 value = fields->f_dsp_32_s32;
3784 break;
3785 case M32C_OPERAND_IMM_40_HI :
3786 value = fields->f_dsp_40_s16;
3787 break;
3788 case M32C_OPERAND_IMM_40_QI :
3789 value = fields->f_dsp_40_s8;
3790 break;
3791 case M32C_OPERAND_IMM_40_SI :
3792 value = fields->f_dsp_40_s32;
3793 break;
3794 case M32C_OPERAND_IMM_48_HI :
3795 value = fields->f_dsp_48_s16;
3796 break;
3797 case M32C_OPERAND_IMM_48_QI :
3798 value = fields->f_dsp_48_s8;
3799 break;
3800 case M32C_OPERAND_IMM_48_SI :
3801 value = fields->f_dsp_48_s32;
3802 break;
3803 case M32C_OPERAND_IMM_56_HI :
3804 value = fields->f_dsp_56_s16;
3805 break;
3806 case M32C_OPERAND_IMM_56_QI :
3807 value = fields->f_dsp_56_s8;
3808 break;
3809 case M32C_OPERAND_IMM_64_HI :
3810 value = fields->f_dsp_64_s16;
3811 break;
3812 case M32C_OPERAND_IMM_8_HI :
3813 value = fields->f_dsp_8_s16;
3814 break;
3815 case M32C_OPERAND_IMM_8_QI :
3816 value = fields->f_dsp_8_s8;
3817 break;
3818 case M32C_OPERAND_IMM_8_S4 :
3819 value = fields->f_imm_8_s4;
3820 break;
3821 case M32C_OPERAND_IMM_8_S4N :
3822 value = fields->f_imm_8_s4;
3823 break;
3824 case M32C_OPERAND_IMM_SH_12_S4 :
3825 value = fields->f_imm_12_s4;
3826 break;
3827 case M32C_OPERAND_IMM_SH_20_S4 :
3828 value = fields->f_imm_20_s4;
3829 break;
3830 case M32C_OPERAND_IMM_SH_8_S4 :
3831 value = fields->f_imm_8_s4;
3832 break;
3833 case M32C_OPERAND_IMM1_S :
3834 value = fields->f_imm1_S;
3835 break;
3836 case M32C_OPERAND_IMM3_S :
3837 value = fields->f_imm3_S;
3838 break;
3839 case M32C_OPERAND_LAB_16_8 :
3840 value = fields->f_lab_16_8;
3841 break;
3842 case M32C_OPERAND_LAB_24_8 :
3843 value = fields->f_lab_24_8;
3844 break;
3845 case M32C_OPERAND_LAB_32_8 :
3846 value = fields->f_lab_32_8;
3847 break;
3848 case M32C_OPERAND_LAB_40_8 :
3849 value = fields->f_lab_40_8;
3850 break;
3851 case M32C_OPERAND_LAB_5_3 :
3852 value = fields->f_lab_5_3;
3853 break;
3854 case M32C_OPERAND_LAB_8_16 :
3855 value = fields->f_lab_8_16;
3856 break;
3857 case M32C_OPERAND_LAB_8_24 :
3858 value = fields->f_lab_8_24;
3859 break;
3860 case M32C_OPERAND_LAB_8_8 :
3861 value = fields->f_lab_8_8;
3862 break;
3863 case M32C_OPERAND_LAB32_JMP_S :
3864 value = fields->f_lab32_jmp_s;
3865 break;
3866 case M32C_OPERAND_Q :
3867 value = 0;
3868 break;
3869 case M32C_OPERAND_R0 :
3870 value = 0;
3871 break;
3872 case M32C_OPERAND_R0H :
3873 value = 0;
3874 break;
3875 case M32C_OPERAND_R0L :
3876 value = 0;
3877 break;
3878 case M32C_OPERAND_R1 :
3879 value = 0;
3880 break;
3881 case M32C_OPERAND_R1R2R0 :
3882 value = 0;
3883 break;
3884 case M32C_OPERAND_R2 :
3885 value = 0;
3886 break;
3887 case M32C_OPERAND_R2R0 :
3888 value = 0;
3889 break;
3890 case M32C_OPERAND_R3 :
3891 value = 0;
3892 break;
3893 case M32C_OPERAND_R3R1 :
3894 value = 0;
3895 break;
3896 case M32C_OPERAND_REGSETPOP :
3897 value = fields->f_8_8;
3898 break;
3899 case M32C_OPERAND_REGSETPUSH :
3900 value = fields->f_8_8;
3901 break;
3902 case M32C_OPERAND_RN16_PUSH_S :
3903 value = fields->f_4_1;
3904 break;
3905 case M32C_OPERAND_S :
3906 value = 0;
3907 break;
3908 case M32C_OPERAND_SRC16AN :
3909 value = fields->f_src16_an;
3910 break;
3911 case M32C_OPERAND_SRC16ANHI :
3912 value = fields->f_src16_an;
3913 break;
3914 case M32C_OPERAND_SRC16ANQI :
3915 value = fields->f_src16_an;
3916 break;
3917 case M32C_OPERAND_SRC16RNHI :
3918 value = fields->f_src16_rn;
3919 break;
3920 case M32C_OPERAND_SRC16RNQI :
3921 value = fields->f_src16_rn;
3922 break;
3923 case M32C_OPERAND_SRC32ANPREFIXED :
3924 value = fields->f_src32_an_prefixed;
3925 break;
3926 case M32C_OPERAND_SRC32ANPREFIXEDHI :
3927 value = fields->f_src32_an_prefixed;
3928 break;
3929 case M32C_OPERAND_SRC32ANPREFIXEDQI :
3930 value = fields->f_src32_an_prefixed;
3931 break;
3932 case M32C_OPERAND_SRC32ANPREFIXEDSI :
3933 value = fields->f_src32_an_prefixed;
3934 break;
3935 case M32C_OPERAND_SRC32ANUNPREFIXED :
3936 value = fields->f_src32_an_unprefixed;
3937 break;
3938 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
3939 value = fields->f_src32_an_unprefixed;
3940 break;
3941 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
3942 value = fields->f_src32_an_unprefixed;
3943 break;
3944 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
3945 value = fields->f_src32_an_unprefixed;
3946 break;
3947 case M32C_OPERAND_SRC32RNPREFIXEDHI :
3948 value = fields->f_src32_rn_prefixed_HI;
3949 break;
3950 case M32C_OPERAND_SRC32RNPREFIXEDQI :
3951 value = fields->f_src32_rn_prefixed_QI;
3952 break;
3953 case M32C_OPERAND_SRC32RNPREFIXEDSI :
3954 value = fields->f_src32_rn_prefixed_SI;
3955 break;
3956 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
3957 value = fields->f_src32_rn_unprefixed_HI;
3958 break;
3959 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
3960 value = fields->f_src32_rn_unprefixed_QI;
3961 break;
3962 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
3963 value = fields->f_src32_rn_unprefixed_SI;
3964 break;
3965 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
3966 value = fields->f_5_1;
3967 break;
3968 case M32C_OPERAND_X :
3969 value = 0;
3970 break;
3971 case M32C_OPERAND_Z :
3972 value = 0;
3973 break;
3974 case M32C_OPERAND_COND16_16 :
3975 value = fields->f_dsp_16_u8;
3976 break;
3977 case M32C_OPERAND_COND16_24 :
3978 value = fields->f_dsp_24_u8;
3979 break;
3980 case M32C_OPERAND_COND16_32 :
3981 value = fields->f_dsp_32_u8;
3982 break;
3983 case M32C_OPERAND_COND16C :
3984 value = fields->f_cond16;
3985 break;
3986 case M32C_OPERAND_COND16J :
3987 value = fields->f_cond16;
3988 break;
3989 case M32C_OPERAND_COND16J5 :
3990 value = fields->f_cond16j_5;
3991 break;
3992 case M32C_OPERAND_COND32 :
3993 value = fields->f_cond32;
3994 break;
3995 case M32C_OPERAND_COND32_16 :
3996 value = fields->f_dsp_16_u8;
3997 break;
3998 case M32C_OPERAND_COND32_24 :
3999 value = fields->f_dsp_24_u8;
4000 break;
4001 case M32C_OPERAND_COND32_32 :
4002 value = fields->f_dsp_32_u8;
4003 break;
4004 case M32C_OPERAND_COND32_40 :
4005 value = fields->f_dsp_40_u8;
4006 break;
4007 case M32C_OPERAND_COND32J :
4008 value = fields->f_cond32j;
4009 break;
4010 case M32C_OPERAND_CR1_PREFIXED_32 :
4011 value = fields->f_21_3;
4012 break;
4013 case M32C_OPERAND_CR1_UNPREFIXED_32 :
4014 value = fields->f_13_3;
4015 break;
4016 case M32C_OPERAND_CR16 :
4017 value = fields->f_9_3;
4018 break;
4019 case M32C_OPERAND_CR2_32 :
4020 value = fields->f_13_3;
4021 break;
4022 case M32C_OPERAND_CR3_PREFIXED_32 :
4023 value = fields->f_21_3;
4024 break;
4025 case M32C_OPERAND_CR3_UNPREFIXED_32 :
4026 value = fields->f_13_3;
4027 break;
4028 case M32C_OPERAND_FLAGS16 :
4029 value = fields->f_9_3;
4030 break;
4031 case M32C_OPERAND_FLAGS32 :
4032 value = fields->f_13_3;
4033 break;
4034 case M32C_OPERAND_SCCOND32 :
4035 value = fields->f_cond16;
4036 break;
4037 case M32C_OPERAND_SIZE :
4038 value = 0;
4039 break;
4040
4041 default :
4042 /* xgettext:c-format */
4043 fprintf (stderr, _("Unrecognized field %d while getting vma operand.\n"),
4044 opindex);
4045 abort ();
4046 }
4047
4048 return value;
4049 }
4050
4051 void m32c_cgen_set_int_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, int);
4052 void m32c_cgen_set_vma_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, bfd_vma);
4053
4054 /* Stuffing values in cgen_fields is handled by a collection of functions.
4055 They are distinguished by the type of the VALUE argument they accept.
4056 TODO: floating point, inlining support, remove cases where argument type
4057 not appropriate. */
4058
4059 void
4060 m32c_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
4061 int opindex,
4062 CGEN_FIELDS * fields,
4063 int value)
4064 {
4065 switch (opindex)
4066 {
4067 case M32C_OPERAND_A0 :
4068 break;
4069 case M32C_OPERAND_A1 :
4070 break;
4071 case M32C_OPERAND_AN16_PUSH_S :
4072 fields->f_4_1 = value;
4073 break;
4074 case M32C_OPERAND_BIT16AN :
4075 fields->f_dst16_an = value;
4076 break;
4077 case M32C_OPERAND_BIT16RN :
4078 fields->f_dst16_rn = value;
4079 break;
4080 case M32C_OPERAND_BIT3_S :
4081 fields->f_imm3_S = value;
4082 break;
4083 case M32C_OPERAND_BIT32ANPREFIXED :
4084 fields->f_dst32_an_prefixed = value;
4085 break;
4086 case M32C_OPERAND_BIT32ANUNPREFIXED :
4087 fields->f_dst32_an_unprefixed = value;
4088 break;
4089 case M32C_OPERAND_BIT32RNPREFIXED :
4090 fields->f_dst32_rn_prefixed_QI = value;
4091 break;
4092 case M32C_OPERAND_BIT32RNUNPREFIXED :
4093 fields->f_dst32_rn_unprefixed_QI = value;
4094 break;
4095 case M32C_OPERAND_BITBASE16_16_S8 :
4096 fields->f_dsp_16_s8 = value;
4097 break;
4098 case M32C_OPERAND_BITBASE16_16_U16 :
4099 fields->f_dsp_16_u16 = value;
4100 break;
4101 case M32C_OPERAND_BITBASE16_16_U8 :
4102 fields->f_dsp_16_u8 = value;
4103 break;
4104 case M32C_OPERAND_BITBASE16_8_U11_S :
4105 fields->f_bitbase16_u11_S = value;
4106 break;
4107 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
4108 fields->f_bitbase32_16_s11_unprefixed = value;
4109 break;
4110 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
4111 fields->f_bitbase32_16_s19_unprefixed = value;
4112 break;
4113 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
4114 fields->f_bitbase32_16_u11_unprefixed = value;
4115 break;
4116 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
4117 fields->f_bitbase32_16_u19_unprefixed = value;
4118 break;
4119 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
4120 fields->f_bitbase32_16_u27_unprefixed = value;
4121 break;
4122 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
4123 fields->f_bitbase32_24_s11_prefixed = value;
4124 break;
4125 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
4126 fields->f_bitbase32_24_s19_prefixed = value;
4127 break;
4128 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
4129 fields->f_bitbase32_24_u11_prefixed = value;
4130 break;
4131 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
4132 fields->f_bitbase32_24_u19_prefixed = value;
4133 break;
4134 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
4135 fields->f_bitbase32_24_u27_prefixed = value;
4136 break;
4137 case M32C_OPERAND_BITNO16R :
4138 fields->f_dsp_16_u8 = value;
4139 break;
4140 case M32C_OPERAND_BITNO32PREFIXED :
4141 fields->f_bitno32_prefixed = value;
4142 break;
4143 case M32C_OPERAND_BITNO32UNPREFIXED :
4144 fields->f_bitno32_unprefixed = value;
4145 break;
4146 case M32C_OPERAND_DSP_10_U6 :
4147 fields->f_dsp_10_u6 = value;
4148 break;
4149 case M32C_OPERAND_DSP_16_S16 :
4150 fields->f_dsp_16_s16 = value;
4151 break;
4152 case M32C_OPERAND_DSP_16_S8 :
4153 fields->f_dsp_16_s8 = value;
4154 break;
4155 case M32C_OPERAND_DSP_16_U16 :
4156 fields->f_dsp_16_u16 = value;
4157 break;
4158 case M32C_OPERAND_DSP_16_U20 :
4159 fields->f_dsp_16_u24 = value;
4160 break;
4161 case M32C_OPERAND_DSP_16_U24 :
4162 fields->f_dsp_16_u24 = value;
4163 break;
4164 case M32C_OPERAND_DSP_16_U8 :
4165 fields->f_dsp_16_u8 = value;
4166 break;
4167 case M32C_OPERAND_DSP_24_S16 :
4168 fields->f_dsp_24_s16 = value;
4169 break;
4170 case M32C_OPERAND_DSP_24_S8 :
4171 fields->f_dsp_24_s8 = value;
4172 break;
4173 case M32C_OPERAND_DSP_24_U16 :
4174 fields->f_dsp_24_u16 = value;
4175 break;
4176 case M32C_OPERAND_DSP_24_U20 :
4177 fields->f_dsp_24_u24 = value;
4178 break;
4179 case M32C_OPERAND_DSP_24_U24 :
4180 fields->f_dsp_24_u24 = value;
4181 break;
4182 case M32C_OPERAND_DSP_24_U8 :
4183 fields->f_dsp_24_u8 = value;
4184 break;
4185 case M32C_OPERAND_DSP_32_S16 :
4186 fields->f_dsp_32_s16 = value;
4187 break;
4188 case M32C_OPERAND_DSP_32_S8 :
4189 fields->f_dsp_32_s8 = value;
4190 break;
4191 case M32C_OPERAND_DSP_32_U16 :
4192 fields->f_dsp_32_u16 = value;
4193 break;
4194 case M32C_OPERAND_DSP_32_U20 :
4195 fields->f_dsp_32_u24 = value;
4196 break;
4197 case M32C_OPERAND_DSP_32_U24 :
4198 fields->f_dsp_32_u24 = value;
4199 break;
4200 case M32C_OPERAND_DSP_32_U8 :
4201 fields->f_dsp_32_u8 = value;
4202 break;
4203 case M32C_OPERAND_DSP_40_S16 :
4204 fields->f_dsp_40_s16 = value;
4205 break;
4206 case M32C_OPERAND_DSP_40_S8 :
4207 fields->f_dsp_40_s8 = value;
4208 break;
4209 case M32C_OPERAND_DSP_40_U16 :
4210 fields->f_dsp_40_u16 = value;
4211 break;
4212 case M32C_OPERAND_DSP_40_U24 :
4213 fields->f_dsp_40_u24 = value;
4214 break;
4215 case M32C_OPERAND_DSP_40_U8 :
4216 fields->f_dsp_40_u8 = value;
4217 break;
4218 case M32C_OPERAND_DSP_48_S16 :
4219 fields->f_dsp_48_s16 = value;
4220 break;
4221 case M32C_OPERAND_DSP_48_S8 :
4222 fields->f_dsp_48_s8 = value;
4223 break;
4224 case M32C_OPERAND_DSP_48_U16 :
4225 fields->f_dsp_48_u16 = value;
4226 break;
4227 case M32C_OPERAND_DSP_48_U24 :
4228 fields->f_dsp_48_u24 = value;
4229 break;
4230 case M32C_OPERAND_DSP_48_U8 :
4231 fields->f_dsp_48_u8 = value;
4232 break;
4233 case M32C_OPERAND_DSP_8_S24 :
4234 fields->f_dsp_8_s24 = value;
4235 break;
4236 case M32C_OPERAND_DSP_8_S8 :
4237 fields->f_dsp_8_s8 = value;
4238 break;
4239 case M32C_OPERAND_DSP_8_U16 :
4240 fields->f_dsp_8_u16 = value;
4241 break;
4242 case M32C_OPERAND_DSP_8_U24 :
4243 fields->f_dsp_8_u24 = value;
4244 break;
4245 case M32C_OPERAND_DSP_8_U6 :
4246 fields->f_dsp_8_u6 = value;
4247 break;
4248 case M32C_OPERAND_DSP_8_U8 :
4249 fields->f_dsp_8_u8 = value;
4250 break;
4251 case M32C_OPERAND_DST16AN :
4252 fields->f_dst16_an = value;
4253 break;
4254 case M32C_OPERAND_DST16AN_S :
4255 fields->f_dst16_an_s = value;
4256 break;
4257 case M32C_OPERAND_DST16ANHI :
4258 fields->f_dst16_an = value;
4259 break;
4260 case M32C_OPERAND_DST16ANQI :
4261 fields->f_dst16_an = value;
4262 break;
4263 case M32C_OPERAND_DST16ANQI_S :
4264 fields->f_dst16_rn_QI_s = value;
4265 break;
4266 case M32C_OPERAND_DST16ANSI :
4267 fields->f_dst16_an = value;
4268 break;
4269 case M32C_OPERAND_DST16RNEXTQI :
4270 fields->f_dst16_rn_ext = value;
4271 break;
4272 case M32C_OPERAND_DST16RNHI :
4273 fields->f_dst16_rn = value;
4274 break;
4275 case M32C_OPERAND_DST16RNQI :
4276 fields->f_dst16_rn = value;
4277 break;
4278 case M32C_OPERAND_DST16RNQI_S :
4279 fields->f_dst16_rn_QI_s = value;
4280 break;
4281 case M32C_OPERAND_DST16RNSI :
4282 fields->f_dst16_rn = value;
4283 break;
4284 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
4285 fields->f_dst32_an_unprefixed = value;
4286 break;
4287 case M32C_OPERAND_DST32ANPREFIXED :
4288 fields->f_dst32_an_prefixed = value;
4289 break;
4290 case M32C_OPERAND_DST32ANPREFIXEDHI :
4291 fields->f_dst32_an_prefixed = value;
4292 break;
4293 case M32C_OPERAND_DST32ANPREFIXEDQI :
4294 fields->f_dst32_an_prefixed = value;
4295 break;
4296 case M32C_OPERAND_DST32ANPREFIXEDSI :
4297 fields->f_dst32_an_prefixed = value;
4298 break;
4299 case M32C_OPERAND_DST32ANUNPREFIXED :
4300 fields->f_dst32_an_unprefixed = value;
4301 break;
4302 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
4303 fields->f_dst32_an_unprefixed = value;
4304 break;
4305 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
4306 fields->f_dst32_an_unprefixed = value;
4307 break;
4308 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
4309 fields->f_dst32_an_unprefixed = value;
4310 break;
4311 case M32C_OPERAND_DST32R0HI_S :
4312 break;
4313 case M32C_OPERAND_DST32R0QI_S :
4314 break;
4315 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
4316 fields->f_dst32_rn_ext_unprefixed = value;
4317 break;
4318 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
4319 fields->f_dst32_rn_ext_unprefixed = value;
4320 break;
4321 case M32C_OPERAND_DST32RNPREFIXEDHI :
4322 fields->f_dst32_rn_prefixed_HI = value;
4323 break;
4324 case M32C_OPERAND_DST32RNPREFIXEDQI :
4325 fields->f_dst32_rn_prefixed_QI = value;
4326 break;
4327 case M32C_OPERAND_DST32RNPREFIXEDSI :
4328 fields->f_dst32_rn_prefixed_SI = value;
4329 break;
4330 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
4331 fields->f_dst32_rn_unprefixed_HI = value;
4332 break;
4333 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
4334 fields->f_dst32_rn_unprefixed_QI = value;
4335 break;
4336 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
4337 fields->f_dst32_rn_unprefixed_SI = value;
4338 break;
4339 case M32C_OPERAND_G :
4340 break;
4341 case M32C_OPERAND_IMM_12_S4 :
4342 fields->f_imm_12_s4 = value;
4343 break;
4344 case M32C_OPERAND_IMM_12_S4N :
4345 fields->f_imm_12_s4 = value;
4346 break;
4347 case M32C_OPERAND_IMM_13_U3 :
4348 fields->f_imm_13_u3 = value;
4349 break;
4350 case M32C_OPERAND_IMM_16_HI :
4351 fields->f_dsp_16_s16 = value;
4352 break;
4353 case M32C_OPERAND_IMM_16_QI :
4354 fields->f_dsp_16_s8 = value;
4355 break;
4356 case M32C_OPERAND_IMM_16_SI :
4357 fields->f_dsp_16_s32 = value;
4358 break;
4359 case M32C_OPERAND_IMM_20_S4 :
4360 fields->f_imm_20_s4 = value;
4361 break;
4362 case M32C_OPERAND_IMM_24_HI :
4363 fields->f_dsp_24_s16 = value;
4364 break;
4365 case M32C_OPERAND_IMM_24_QI :
4366 fields->f_dsp_24_s8 = value;
4367 break;
4368 case M32C_OPERAND_IMM_24_SI :
4369 fields->f_dsp_24_s32 = value;
4370 break;
4371 case M32C_OPERAND_IMM_32_HI :
4372 fields->f_dsp_32_s16 = value;
4373 break;
4374 case M32C_OPERAND_IMM_32_QI :
4375 fields->f_dsp_32_s8 = value;
4376 break;
4377 case M32C_OPERAND_IMM_32_SI :
4378 fields->f_dsp_32_s32 = value;
4379 break;
4380 case M32C_OPERAND_IMM_40_HI :
4381 fields->f_dsp_40_s16 = value;
4382 break;
4383 case M32C_OPERAND_IMM_40_QI :
4384 fields->f_dsp_40_s8 = value;
4385 break;
4386 case M32C_OPERAND_IMM_40_SI :
4387 fields->f_dsp_40_s32 = value;
4388 break;
4389 case M32C_OPERAND_IMM_48_HI :
4390 fields->f_dsp_48_s16 = value;
4391 break;
4392 case M32C_OPERAND_IMM_48_QI :
4393 fields->f_dsp_48_s8 = value;
4394 break;
4395 case M32C_OPERAND_IMM_48_SI :
4396 fields->f_dsp_48_s32 = value;
4397 break;
4398 case M32C_OPERAND_IMM_56_HI :
4399 fields->f_dsp_56_s16 = value;
4400 break;
4401 case M32C_OPERAND_IMM_56_QI :
4402 fields->f_dsp_56_s8 = value;
4403 break;
4404 case M32C_OPERAND_IMM_64_HI :
4405 fields->f_dsp_64_s16 = value;
4406 break;
4407 case M32C_OPERAND_IMM_8_HI :
4408 fields->f_dsp_8_s16 = value;
4409 break;
4410 case M32C_OPERAND_IMM_8_QI :
4411 fields->f_dsp_8_s8 = value;
4412 break;
4413 case M32C_OPERAND_IMM_8_S4 :
4414 fields->f_imm_8_s4 = value;
4415 break;
4416 case M32C_OPERAND_IMM_8_S4N :
4417 fields->f_imm_8_s4 = value;
4418 break;
4419 case M32C_OPERAND_IMM_SH_12_S4 :
4420 fields->f_imm_12_s4 = value;
4421 break;
4422 case M32C_OPERAND_IMM_SH_20_S4 :
4423 fields->f_imm_20_s4 = value;
4424 break;
4425 case M32C_OPERAND_IMM_SH_8_S4 :
4426 fields->f_imm_8_s4 = value;
4427 break;
4428 case M32C_OPERAND_IMM1_S :
4429 fields->f_imm1_S = value;
4430 break;
4431 case M32C_OPERAND_IMM3_S :
4432 fields->f_imm3_S = value;
4433 break;
4434 case M32C_OPERAND_LAB_16_8 :
4435 fields->f_lab_16_8 = value;
4436 break;
4437 case M32C_OPERAND_LAB_24_8 :
4438 fields->f_lab_24_8 = value;
4439 break;
4440 case M32C_OPERAND_LAB_32_8 :
4441 fields->f_lab_32_8 = value;
4442 break;
4443 case M32C_OPERAND_LAB_40_8 :
4444 fields->f_lab_40_8 = value;
4445 break;
4446 case M32C_OPERAND_LAB_5_3 :
4447 fields->f_lab_5_3 = value;
4448 break;
4449 case M32C_OPERAND_LAB_8_16 :
4450 fields->f_lab_8_16 = value;
4451 break;
4452 case M32C_OPERAND_LAB_8_24 :
4453 fields->f_lab_8_24 = value;
4454 break;
4455 case M32C_OPERAND_LAB_8_8 :
4456 fields->f_lab_8_8 = value;
4457 break;
4458 case M32C_OPERAND_LAB32_JMP_S :
4459 fields->f_lab32_jmp_s = value;
4460 break;
4461 case M32C_OPERAND_Q :
4462 break;
4463 case M32C_OPERAND_R0 :
4464 break;
4465 case M32C_OPERAND_R0H :
4466 break;
4467 case M32C_OPERAND_R0L :
4468 break;
4469 case M32C_OPERAND_R1 :
4470 break;
4471 case M32C_OPERAND_R1R2R0 :
4472 break;
4473 case M32C_OPERAND_R2 :
4474 break;
4475 case M32C_OPERAND_R2R0 :
4476 break;
4477 case M32C_OPERAND_R3 :
4478 break;
4479 case M32C_OPERAND_R3R1 :
4480 break;
4481 case M32C_OPERAND_REGSETPOP :
4482 fields->f_8_8 = value;
4483 break;
4484 case M32C_OPERAND_REGSETPUSH :
4485 fields->f_8_8 = value;
4486 break;
4487 case M32C_OPERAND_RN16_PUSH_S :
4488 fields->f_4_1 = value;
4489 break;
4490 case M32C_OPERAND_S :
4491 break;
4492 case M32C_OPERAND_SRC16AN :
4493 fields->f_src16_an = value;
4494 break;
4495 case M32C_OPERAND_SRC16ANHI :
4496 fields->f_src16_an = value;
4497 break;
4498 case M32C_OPERAND_SRC16ANQI :
4499 fields->f_src16_an = value;
4500 break;
4501 case M32C_OPERAND_SRC16RNHI :
4502 fields->f_src16_rn = value;
4503 break;
4504 case M32C_OPERAND_SRC16RNQI :
4505 fields->f_src16_rn = value;
4506 break;
4507 case M32C_OPERAND_SRC32ANPREFIXED :
4508 fields->f_src32_an_prefixed = value;
4509 break;
4510 case M32C_OPERAND_SRC32ANPREFIXEDHI :
4511 fields->f_src32_an_prefixed = value;
4512 break;
4513 case M32C_OPERAND_SRC32ANPREFIXEDQI :
4514 fields->f_src32_an_prefixed = value;
4515 break;
4516 case M32C_OPERAND_SRC32ANPREFIXEDSI :
4517 fields->f_src32_an_prefixed = value;
4518 break;
4519 case M32C_OPERAND_SRC32ANUNPREFIXED :
4520 fields->f_src32_an_unprefixed = value;
4521 break;
4522 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
4523 fields->f_src32_an_unprefixed = value;
4524 break;
4525 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
4526 fields->f_src32_an_unprefixed = value;
4527 break;
4528 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
4529 fields->f_src32_an_unprefixed = value;
4530 break;
4531 case M32C_OPERAND_SRC32RNPREFIXEDHI :
4532 fields->f_src32_rn_prefixed_HI = value;
4533 break;
4534 case M32C_OPERAND_SRC32RNPREFIXEDQI :
4535 fields->f_src32_rn_prefixed_QI = value;
4536 break;
4537 case M32C_OPERAND_SRC32RNPREFIXEDSI :
4538 fields->f_src32_rn_prefixed_SI = value;
4539 break;
4540 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
4541 fields->f_src32_rn_unprefixed_HI = value;
4542 break;
4543 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
4544 fields->f_src32_rn_unprefixed_QI = value;
4545 break;
4546 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
4547 fields->f_src32_rn_unprefixed_SI = value;
4548 break;
4549 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
4550 fields->f_5_1 = value;
4551 break;
4552 case M32C_OPERAND_X :
4553 break;
4554 case M32C_OPERAND_Z :
4555 break;
4556 case M32C_OPERAND_COND16_16 :
4557 fields->f_dsp_16_u8 = value;
4558 break;
4559 case M32C_OPERAND_COND16_24 :
4560 fields->f_dsp_24_u8 = value;
4561 break;
4562 case M32C_OPERAND_COND16_32 :
4563 fields->f_dsp_32_u8 = value;
4564 break;
4565 case M32C_OPERAND_COND16C :
4566 fields->f_cond16 = value;
4567 break;
4568 case M32C_OPERAND_COND16J :
4569 fields->f_cond16 = value;
4570 break;
4571 case M32C_OPERAND_COND16J5 :
4572 fields->f_cond16j_5 = value;
4573 break;
4574 case M32C_OPERAND_COND32 :
4575 fields->f_cond32 = value;
4576 break;
4577 case M32C_OPERAND_COND32_16 :
4578 fields->f_dsp_16_u8 = value;
4579 break;
4580 case M32C_OPERAND_COND32_24 :
4581 fields->f_dsp_24_u8 = value;
4582 break;
4583 case M32C_OPERAND_COND32_32 :
4584 fields->f_dsp_32_u8 = value;
4585 break;
4586 case M32C_OPERAND_COND32_40 :
4587 fields->f_dsp_40_u8 = value;
4588 break;
4589 case M32C_OPERAND_COND32J :
4590 fields->f_cond32j = value;
4591 break;
4592 case M32C_OPERAND_CR1_PREFIXED_32 :
4593 fields->f_21_3 = value;
4594 break;
4595 case M32C_OPERAND_CR1_UNPREFIXED_32 :
4596 fields->f_13_3 = value;
4597 break;
4598 case M32C_OPERAND_CR16 :
4599 fields->f_9_3 = value;
4600 break;
4601 case M32C_OPERAND_CR2_32 :
4602 fields->f_13_3 = value;
4603 break;
4604 case M32C_OPERAND_CR3_PREFIXED_32 :
4605 fields->f_21_3 = value;
4606 break;
4607 case M32C_OPERAND_CR3_UNPREFIXED_32 :
4608 fields->f_13_3 = value;
4609 break;
4610 case M32C_OPERAND_FLAGS16 :
4611 fields->f_9_3 = value;
4612 break;
4613 case M32C_OPERAND_FLAGS32 :
4614 fields->f_13_3 = value;
4615 break;
4616 case M32C_OPERAND_SCCOND32 :
4617 fields->f_cond16 = value;
4618 break;
4619 case M32C_OPERAND_SIZE :
4620 break;
4621
4622 default :
4623 /* xgettext:c-format */
4624 fprintf (stderr, _("Unrecognized field %d while setting int operand.\n"),
4625 opindex);
4626 abort ();
4627 }
4628 }
4629
4630 void
4631 m32c_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
4632 int opindex,
4633 CGEN_FIELDS * fields,
4634 bfd_vma value)
4635 {
4636 switch (opindex)
4637 {
4638 case M32C_OPERAND_A0 :
4639 break;
4640 case M32C_OPERAND_A1 :
4641 break;
4642 case M32C_OPERAND_AN16_PUSH_S :
4643 fields->f_4_1 = value;
4644 break;
4645 case M32C_OPERAND_BIT16AN :
4646 fields->f_dst16_an = value;
4647 break;
4648 case M32C_OPERAND_BIT16RN :
4649 fields->f_dst16_rn = value;
4650 break;
4651 case M32C_OPERAND_BIT3_S :
4652 fields->f_imm3_S = value;
4653 break;
4654 case M32C_OPERAND_BIT32ANPREFIXED :
4655 fields->f_dst32_an_prefixed = value;
4656 break;
4657 case M32C_OPERAND_BIT32ANUNPREFIXED :
4658 fields->f_dst32_an_unprefixed = value;
4659 break;
4660 case M32C_OPERAND_BIT32RNPREFIXED :
4661 fields->f_dst32_rn_prefixed_QI = value;
4662 break;
4663 case M32C_OPERAND_BIT32RNUNPREFIXED :
4664 fields->f_dst32_rn_unprefixed_QI = value;
4665 break;
4666 case M32C_OPERAND_BITBASE16_16_S8 :
4667 fields->f_dsp_16_s8 = value;
4668 break;
4669 case M32C_OPERAND_BITBASE16_16_U16 :
4670 fields->f_dsp_16_u16 = value;
4671 break;
4672 case M32C_OPERAND_BITBASE16_16_U8 :
4673 fields->f_dsp_16_u8 = value;
4674 break;
4675 case M32C_OPERAND_BITBASE16_8_U11_S :
4676 fields->f_bitbase16_u11_S = value;
4677 break;
4678 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
4679 fields->f_bitbase32_16_s11_unprefixed = value;
4680 break;
4681 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
4682 fields->f_bitbase32_16_s19_unprefixed = value;
4683 break;
4684 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
4685 fields->f_bitbase32_16_u11_unprefixed = value;
4686 break;
4687 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
4688 fields->f_bitbase32_16_u19_unprefixed = value;
4689 break;
4690 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
4691 fields->f_bitbase32_16_u27_unprefixed = value;
4692 break;
4693 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
4694 fields->f_bitbase32_24_s11_prefixed = value;
4695 break;
4696 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
4697 fields->f_bitbase32_24_s19_prefixed = value;
4698 break;
4699 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
4700 fields->f_bitbase32_24_u11_prefixed = value;
4701 break;
4702 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
4703 fields->f_bitbase32_24_u19_prefixed = value;
4704 break;
4705 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
4706 fields->f_bitbase32_24_u27_prefixed = value;
4707 break;
4708 case M32C_OPERAND_BITNO16R :
4709 fields->f_dsp_16_u8 = value;
4710 break;
4711 case M32C_OPERAND_BITNO32PREFIXED :
4712 fields->f_bitno32_prefixed = value;
4713 break;
4714 case M32C_OPERAND_BITNO32UNPREFIXED :
4715 fields->f_bitno32_unprefixed = value;
4716 break;
4717 case M32C_OPERAND_DSP_10_U6 :
4718 fields->f_dsp_10_u6 = value;
4719 break;
4720 case M32C_OPERAND_DSP_16_S16 :
4721 fields->f_dsp_16_s16 = value;
4722 break;
4723 case M32C_OPERAND_DSP_16_S8 :
4724 fields->f_dsp_16_s8 = value;
4725 break;
4726 case M32C_OPERAND_DSP_16_U16 :
4727 fields->f_dsp_16_u16 = value;
4728 break;
4729 case M32C_OPERAND_DSP_16_U20 :
4730 fields->f_dsp_16_u24 = value;
4731 break;
4732 case M32C_OPERAND_DSP_16_U24 :
4733 fields->f_dsp_16_u24 = value;
4734 break;
4735 case M32C_OPERAND_DSP_16_U8 :
4736 fields->f_dsp_16_u8 = value;
4737 break;
4738 case M32C_OPERAND_DSP_24_S16 :
4739 fields->f_dsp_24_s16 = value;
4740 break;
4741 case M32C_OPERAND_DSP_24_S8 :
4742 fields->f_dsp_24_s8 = value;
4743 break;
4744 case M32C_OPERAND_DSP_24_U16 :
4745 fields->f_dsp_24_u16 = value;
4746 break;
4747 case M32C_OPERAND_DSP_24_U20 :
4748 fields->f_dsp_24_u24 = value;
4749 break;
4750 case M32C_OPERAND_DSP_24_U24 :
4751 fields->f_dsp_24_u24 = value;
4752 break;
4753 case M32C_OPERAND_DSP_24_U8 :
4754 fields->f_dsp_24_u8 = value;
4755 break;
4756 case M32C_OPERAND_DSP_32_S16 :
4757 fields->f_dsp_32_s16 = value;
4758 break;
4759 case M32C_OPERAND_DSP_32_S8 :
4760 fields->f_dsp_32_s8 = value;
4761 break;
4762 case M32C_OPERAND_DSP_32_U16 :
4763 fields->f_dsp_32_u16 = value;
4764 break;
4765 case M32C_OPERAND_DSP_32_U20 :
4766 fields->f_dsp_32_u24 = value;
4767 break;
4768 case M32C_OPERAND_DSP_32_U24 :
4769 fields->f_dsp_32_u24 = value;
4770 break;
4771 case M32C_OPERAND_DSP_32_U8 :
4772 fields->f_dsp_32_u8 = value;
4773 break;
4774 case M32C_OPERAND_DSP_40_S16 :
4775 fields->f_dsp_40_s16 = value;
4776 break;
4777 case M32C_OPERAND_DSP_40_S8 :
4778 fields->f_dsp_40_s8 = value;
4779 break;
4780 case M32C_OPERAND_DSP_40_U16 :
4781 fields->f_dsp_40_u16 = value;
4782 break;
4783 case M32C_OPERAND_DSP_40_U24 :
4784 fields->f_dsp_40_u24 = value;
4785 break;
4786 case M32C_OPERAND_DSP_40_U8 :
4787 fields->f_dsp_40_u8 = value;
4788 break;
4789 case M32C_OPERAND_DSP_48_S16 :
4790 fields->f_dsp_48_s16 = value;
4791 break;
4792 case M32C_OPERAND_DSP_48_S8 :
4793 fields->f_dsp_48_s8 = value;
4794 break;
4795 case M32C_OPERAND_DSP_48_U16 :
4796 fields->f_dsp_48_u16 = value;
4797 break;
4798 case M32C_OPERAND_DSP_48_U24 :
4799 fields->f_dsp_48_u24 = value;
4800 break;
4801 case M32C_OPERAND_DSP_48_U8 :
4802 fields->f_dsp_48_u8 = value;
4803 break;
4804 case M32C_OPERAND_DSP_8_S24 :
4805 fields->f_dsp_8_s24 = value;
4806 break;
4807 case M32C_OPERAND_DSP_8_S8 :
4808 fields->f_dsp_8_s8 = value;
4809 break;
4810 case M32C_OPERAND_DSP_8_U16 :
4811 fields->f_dsp_8_u16 = value;
4812 break;
4813 case M32C_OPERAND_DSP_8_U24 :
4814 fields->f_dsp_8_u24 = value;
4815 break;
4816 case M32C_OPERAND_DSP_8_U6 :
4817 fields->f_dsp_8_u6 = value;
4818 break;
4819 case M32C_OPERAND_DSP_8_U8 :
4820 fields->f_dsp_8_u8 = value;
4821 break;
4822 case M32C_OPERAND_DST16AN :
4823 fields->f_dst16_an = value;
4824 break;
4825 case M32C_OPERAND_DST16AN_S :
4826 fields->f_dst16_an_s = value;
4827 break;
4828 case M32C_OPERAND_DST16ANHI :
4829 fields->f_dst16_an = value;
4830 break;
4831 case M32C_OPERAND_DST16ANQI :
4832 fields->f_dst16_an = value;
4833 break;
4834 case M32C_OPERAND_DST16ANQI_S :
4835 fields->f_dst16_rn_QI_s = value;
4836 break;
4837 case M32C_OPERAND_DST16ANSI :
4838 fields->f_dst16_an = value;
4839 break;
4840 case M32C_OPERAND_DST16RNEXTQI :
4841 fields->f_dst16_rn_ext = value;
4842 break;
4843 case M32C_OPERAND_DST16RNHI :
4844 fields->f_dst16_rn = value;
4845 break;
4846 case M32C_OPERAND_DST16RNQI :
4847 fields->f_dst16_rn = value;
4848 break;
4849 case M32C_OPERAND_DST16RNQI_S :
4850 fields->f_dst16_rn_QI_s = value;
4851 break;
4852 case M32C_OPERAND_DST16RNSI :
4853 fields->f_dst16_rn = value;
4854 break;
4855 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
4856 fields->f_dst32_an_unprefixed = value;
4857 break;
4858 case M32C_OPERAND_DST32ANPREFIXED :
4859 fields->f_dst32_an_prefixed = value;
4860 break;
4861 case M32C_OPERAND_DST32ANPREFIXEDHI :
4862 fields->f_dst32_an_prefixed = value;
4863 break;
4864 case M32C_OPERAND_DST32ANPREFIXEDQI :
4865 fields->f_dst32_an_prefixed = value;
4866 break;
4867 case M32C_OPERAND_DST32ANPREFIXEDSI :
4868 fields->f_dst32_an_prefixed = value;
4869 break;
4870 case M32C_OPERAND_DST32ANUNPREFIXED :
4871 fields->f_dst32_an_unprefixed = value;
4872 break;
4873 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
4874 fields->f_dst32_an_unprefixed = value;
4875 break;
4876 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
4877 fields->f_dst32_an_unprefixed = value;
4878 break;
4879 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
4880 fields->f_dst32_an_unprefixed = value;
4881 break;
4882 case M32C_OPERAND_DST32R0HI_S :
4883 break;
4884 case M32C_OPERAND_DST32R0QI_S :
4885 break;
4886 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
4887 fields->f_dst32_rn_ext_unprefixed = value;
4888 break;
4889 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
4890 fields->f_dst32_rn_ext_unprefixed = value;
4891 break;
4892 case M32C_OPERAND_DST32RNPREFIXEDHI :
4893 fields->f_dst32_rn_prefixed_HI = value;
4894 break;
4895 case M32C_OPERAND_DST32RNPREFIXEDQI :
4896 fields->f_dst32_rn_prefixed_QI = value;
4897 break;
4898 case M32C_OPERAND_DST32RNPREFIXEDSI :
4899 fields->f_dst32_rn_prefixed_SI = value;
4900 break;
4901 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
4902 fields->f_dst32_rn_unprefixed_HI = value;
4903 break;
4904 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
4905 fields->f_dst32_rn_unprefixed_QI = value;
4906 break;
4907 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
4908 fields->f_dst32_rn_unprefixed_SI = value;
4909 break;
4910 case M32C_OPERAND_G :
4911 break;
4912 case M32C_OPERAND_IMM_12_S4 :
4913 fields->f_imm_12_s4 = value;
4914 break;
4915 case M32C_OPERAND_IMM_12_S4N :
4916 fields->f_imm_12_s4 = value;
4917 break;
4918 case M32C_OPERAND_IMM_13_U3 :
4919 fields->f_imm_13_u3 = value;
4920 break;
4921 case M32C_OPERAND_IMM_16_HI :
4922 fields->f_dsp_16_s16 = value;
4923 break;
4924 case M32C_OPERAND_IMM_16_QI :
4925 fields->f_dsp_16_s8 = value;
4926 break;
4927 case M32C_OPERAND_IMM_16_SI :
4928 fields->f_dsp_16_s32 = value;
4929 break;
4930 case M32C_OPERAND_IMM_20_S4 :
4931 fields->f_imm_20_s4 = value;
4932 break;
4933 case M32C_OPERAND_IMM_24_HI :
4934 fields->f_dsp_24_s16 = value;
4935 break;
4936 case M32C_OPERAND_IMM_24_QI :
4937 fields->f_dsp_24_s8 = value;
4938 break;
4939 case M32C_OPERAND_IMM_24_SI :
4940 fields->f_dsp_24_s32 = value;
4941 break;
4942 case M32C_OPERAND_IMM_32_HI :
4943 fields->f_dsp_32_s16 = value;
4944 break;
4945 case M32C_OPERAND_IMM_32_QI :
4946 fields->f_dsp_32_s8 = value;
4947 break;
4948 case M32C_OPERAND_IMM_32_SI :
4949 fields->f_dsp_32_s32 = value;
4950 break;
4951 case M32C_OPERAND_IMM_40_HI :
4952 fields->f_dsp_40_s16 = value;
4953 break;
4954 case M32C_OPERAND_IMM_40_QI :
4955 fields->f_dsp_40_s8 = value;
4956 break;
4957 case M32C_OPERAND_IMM_40_SI :
4958 fields->f_dsp_40_s32 = value;
4959 break;
4960 case M32C_OPERAND_IMM_48_HI :
4961 fields->f_dsp_48_s16 = value;
4962 break;
4963 case M32C_OPERAND_IMM_48_QI :
4964 fields->f_dsp_48_s8 = value;
4965 break;
4966 case M32C_OPERAND_IMM_48_SI :
4967 fields->f_dsp_48_s32 = value;
4968 break;
4969 case M32C_OPERAND_IMM_56_HI :
4970 fields->f_dsp_56_s16 = value;
4971 break;
4972 case M32C_OPERAND_IMM_56_QI :
4973 fields->f_dsp_56_s8 = value;
4974 break;
4975 case M32C_OPERAND_IMM_64_HI :
4976 fields->f_dsp_64_s16 = value;
4977 break;
4978 case M32C_OPERAND_IMM_8_HI :
4979 fields->f_dsp_8_s16 = value;
4980 break;
4981 case M32C_OPERAND_IMM_8_QI :
4982 fields->f_dsp_8_s8 = value;
4983 break;
4984 case M32C_OPERAND_IMM_8_S4 :
4985 fields->f_imm_8_s4 = value;
4986 break;
4987 case M32C_OPERAND_IMM_8_S4N :
4988 fields->f_imm_8_s4 = value;
4989 break;
4990 case M32C_OPERAND_IMM_SH_12_S4 :
4991 fields->f_imm_12_s4 = value;
4992 break;
4993 case M32C_OPERAND_IMM_SH_20_S4 :
4994 fields->f_imm_20_s4 = value;
4995 break;
4996 case M32C_OPERAND_IMM_SH_8_S4 :
4997 fields->f_imm_8_s4 = value;
4998 break;
4999 case M32C_OPERAND_IMM1_S :
5000 fields->f_imm1_S = value;
5001 break;
5002 case M32C_OPERAND_IMM3_S :
5003 fields->f_imm3_S = value;
5004 break;
5005 case M32C_OPERAND_LAB_16_8 :
5006 fields->f_lab_16_8 = value;
5007 break;
5008 case M32C_OPERAND_LAB_24_8 :
5009 fields->f_lab_24_8 = value;
5010 break;
5011 case M32C_OPERAND_LAB_32_8 :
5012 fields->f_lab_32_8 = value;
5013 break;
5014 case M32C_OPERAND_LAB_40_8 :
5015 fields->f_lab_40_8 = value;
5016 break;
5017 case M32C_OPERAND_LAB_5_3 :
5018 fields->f_lab_5_3 = value;
5019 break;
5020 case M32C_OPERAND_LAB_8_16 :
5021 fields->f_lab_8_16 = value;
5022 break;
5023 case M32C_OPERAND_LAB_8_24 :
5024 fields->f_lab_8_24 = value;
5025 break;
5026 case M32C_OPERAND_LAB_8_8 :
5027 fields->f_lab_8_8 = value;
5028 break;
5029 case M32C_OPERAND_LAB32_JMP_S :
5030 fields->f_lab32_jmp_s = value;
5031 break;
5032 case M32C_OPERAND_Q :
5033 break;
5034 case M32C_OPERAND_R0 :
5035 break;
5036 case M32C_OPERAND_R0H :
5037 break;
5038 case M32C_OPERAND_R0L :
5039 break;
5040 case M32C_OPERAND_R1 :
5041 break;
5042 case M32C_OPERAND_R1R2R0 :
5043 break;
5044 case M32C_OPERAND_R2 :
5045 break;
5046 case M32C_OPERAND_R2R0 :
5047 break;
5048 case M32C_OPERAND_R3 :
5049 break;
5050 case M32C_OPERAND_R3R1 :
5051 break;
5052 case M32C_OPERAND_REGSETPOP :
5053 fields->f_8_8 = value;
5054 break;
5055 case M32C_OPERAND_REGSETPUSH :
5056 fields->f_8_8 = value;
5057 break;
5058 case M32C_OPERAND_RN16_PUSH_S :
5059 fields->f_4_1 = value;
5060 break;
5061 case M32C_OPERAND_S :
5062 break;
5063 case M32C_OPERAND_SRC16AN :
5064 fields->f_src16_an = value;
5065 break;
5066 case M32C_OPERAND_SRC16ANHI :
5067 fields->f_src16_an = value;
5068 break;
5069 case M32C_OPERAND_SRC16ANQI :
5070 fields->f_src16_an = value;
5071 break;
5072 case M32C_OPERAND_SRC16RNHI :
5073 fields->f_src16_rn = value;
5074 break;
5075 case M32C_OPERAND_SRC16RNQI :
5076 fields->f_src16_rn = value;
5077 break;
5078 case M32C_OPERAND_SRC32ANPREFIXED :
5079 fields->f_src32_an_prefixed = value;
5080 break;
5081 case M32C_OPERAND_SRC32ANPREFIXEDHI :
5082 fields->f_src32_an_prefixed = value;
5083 break;
5084 case M32C_OPERAND_SRC32ANPREFIXEDQI :
5085 fields->f_src32_an_prefixed = value;
5086 break;
5087 case M32C_OPERAND_SRC32ANPREFIXEDSI :
5088 fields->f_src32_an_prefixed = value;
5089 break;
5090 case M32C_OPERAND_SRC32ANUNPREFIXED :
5091 fields->f_src32_an_unprefixed = value;
5092 break;
5093 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
5094 fields->f_src32_an_unprefixed = value;
5095 break;
5096 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
5097 fields->f_src32_an_unprefixed = value;
5098 break;
5099 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
5100 fields->f_src32_an_unprefixed = value;
5101 break;
5102 case M32C_OPERAND_SRC32RNPREFIXEDHI :
5103 fields->f_src32_rn_prefixed_HI = value;
5104 break;
5105 case M32C_OPERAND_SRC32RNPREFIXEDQI :
5106 fields->f_src32_rn_prefixed_QI = value;
5107 break;
5108 case M32C_OPERAND_SRC32RNPREFIXEDSI :
5109 fields->f_src32_rn_prefixed_SI = value;
5110 break;
5111 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
5112 fields->f_src32_rn_unprefixed_HI = value;
5113 break;
5114 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
5115 fields->f_src32_rn_unprefixed_QI = value;
5116 break;
5117 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
5118 fields->f_src32_rn_unprefixed_SI = value;
5119 break;
5120 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
5121 fields->f_5_1 = value;
5122 break;
5123 case M32C_OPERAND_X :
5124 break;
5125 case M32C_OPERAND_Z :
5126 break;
5127 case M32C_OPERAND_COND16_16 :
5128 fields->f_dsp_16_u8 = value;
5129 break;
5130 case M32C_OPERAND_COND16_24 :
5131 fields->f_dsp_24_u8 = value;
5132 break;
5133 case M32C_OPERAND_COND16_32 :
5134 fields->f_dsp_32_u8 = value;
5135 break;
5136 case M32C_OPERAND_COND16C :
5137 fields->f_cond16 = value;
5138 break;
5139 case M32C_OPERAND_COND16J :
5140 fields->f_cond16 = value;
5141 break;
5142 case M32C_OPERAND_COND16J5 :
5143 fields->f_cond16j_5 = value;
5144 break;
5145 case M32C_OPERAND_COND32 :
5146 fields->f_cond32 = value;
5147 break;
5148 case M32C_OPERAND_COND32_16 :
5149 fields->f_dsp_16_u8 = value;
5150 break;
5151 case M32C_OPERAND_COND32_24 :
5152 fields->f_dsp_24_u8 = value;
5153 break;
5154 case M32C_OPERAND_COND32_32 :
5155 fields->f_dsp_32_u8 = value;
5156 break;
5157 case M32C_OPERAND_COND32_40 :
5158 fields->f_dsp_40_u8 = value;
5159 break;
5160 case M32C_OPERAND_COND32J :
5161 fields->f_cond32j = value;
5162 break;
5163 case M32C_OPERAND_CR1_PREFIXED_32 :
5164 fields->f_21_3 = value;
5165 break;
5166 case M32C_OPERAND_CR1_UNPREFIXED_32 :
5167 fields->f_13_3 = value;
5168 break;
5169 case M32C_OPERAND_CR16 :
5170 fields->f_9_3 = value;
5171 break;
5172 case M32C_OPERAND_CR2_32 :
5173 fields->f_13_3 = value;
5174 break;
5175 case M32C_OPERAND_CR3_PREFIXED_32 :
5176 fields->f_21_3 = value;
5177 break;
5178 case M32C_OPERAND_CR3_UNPREFIXED_32 :
5179 fields->f_13_3 = value;
5180 break;
5181 case M32C_OPERAND_FLAGS16 :
5182 fields->f_9_3 = value;
5183 break;
5184 case M32C_OPERAND_FLAGS32 :
5185 fields->f_13_3 = value;
5186 break;
5187 case M32C_OPERAND_SCCOND32 :
5188 fields->f_cond16 = value;
5189 break;
5190 case M32C_OPERAND_SIZE :
5191 break;
5192
5193 default :
5194 /* xgettext:c-format */
5195 fprintf (stderr, _("Unrecognized field %d while setting vma operand.\n"),
5196 opindex);
5197 abort ();
5198 }
5199 }
5200
5201 /* Function to call before using the instruction builder tables. */
5202
5203 void
5204 m32c_cgen_init_ibld_table (CGEN_CPU_DESC cd)
5205 {
5206 cd->insert_handlers = & m32c_cgen_insert_handlers[0];
5207 cd->extract_handlers = & m32c_cgen_extract_handlers[0];
5208
5209 cd->insert_operand = m32c_cgen_insert_operand;
5210 cd->extract_operand = m32c_cgen_extract_operand;
5211
5212 cd->get_int_operand = m32c_cgen_get_int_operand;
5213 cd->set_int_operand = m32c_cgen_set_int_operand;
5214 cd->get_vma_operand = m32c_cgen_get_vma_operand;
5215 cd->set_vma_operand = m32c_cgen_set_vma_operand;
5216 }
git-cvsimport of binutils cvsroot