1 /* BFD support for handling relocation entries.
2 Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2003, 2004, 2005, 2006
4 Free Software Foundation, Inc.
5 Written by Cygnus Support.
7 This file is part of BFD, the Binary File Descriptor library.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
27 BFD maintains relocations in much the same way it maintains
28 symbols: they are left alone until required, then read in
29 en-masse and translated into an internal form. A common
30 routine <<bfd_perform_relocation>> acts upon the
31 canonical form to do the fixup.
33 Relocations are maintained on a per section basis,
34 while symbols are maintained on a per BFD basis.
36 All that a back end has to do to fit the BFD interface is to create
37 a <<struct reloc_cache_entry>> for each relocation
38 in a particular section, and fill in the right bits of the structures.
47 /* DO compile in the reloc_code name table from libbfd.h. */
48 #define _BFD_MAKE_TABLE_bfd_reloc_code_real
57 typedef arelent, howto manager, Relocations, Relocations
62 This is the structure of a relocation entry:
66 .typedef enum bfd_reloc_status
68 . {* No errors detected. *}
71 . {* The relocation was performed, but there was an overflow. *}
74 . {* The address to relocate was not within the section supplied. *}
75 . bfd_reloc_outofrange,
77 . {* Used by special functions. *}
80 . {* Unsupported relocation size requested. *}
81 . bfd_reloc_notsupported,
86 . {* The symbol to relocate against was undefined. *}
87 . bfd_reloc_undefined,
89 . {* The relocation was performed, but may not be ok - presently
90 . generated only when linking i960 coff files with i960 b.out
91 . symbols. If this type is returned, the error_message argument
92 . to bfd_perform_relocation will be set. *}
95 . bfd_reloc_status_type;
98 .typedef struct reloc_cache_entry
100 . {* A pointer into the canonical table of pointers. *}
101 . struct bfd_symbol **sym_ptr_ptr;
103 . {* offset in section. *}
104 . bfd_size_type address;
106 . {* addend for relocation value. *}
109 . {* Pointer to how to perform the required relocation. *}
110 . reloc_howto_type *howto;
120 Here is a description of each of the fields within an <<arelent>>:
124 The symbol table pointer points to a pointer to the symbol
125 associated with the relocation request. It is the pointer
126 into the table returned by the back end's
127 <<canonicalize_symtab>> action. @xref{Symbols}. The symbol is
128 referenced through a pointer to a pointer so that tools like
129 the linker can fix up all the symbols of the same name by
130 modifying only one pointer. The relocation routine looks in
131 the symbol and uses the base of the section the symbol is
132 attached to and the value of the symbol as the initial
133 relocation offset. If the symbol pointer is zero, then the
134 section provided is looked up.
138 The <<address>> field gives the offset in bytes from the base of
139 the section data which owns the relocation record to the first
140 byte of relocatable information. The actual data relocated
141 will be relative to this point; for example, a relocation
142 type which modifies the bottom two bytes of a four byte word
143 would not touch the first byte pointed to in a big endian
148 The <<addend>> is a value provided by the back end to be added (!)
149 to the relocation offset. Its interpretation is dependent upon
150 the howto. For example, on the 68k the code:
155 | return foo[0x12345678];
158 Could be compiled into:
161 | moveb @@#12345678,d0
166 This could create a reloc pointing to <<foo>>, but leave the
167 offset in the data, something like:
169 |RELOCATION RECORDS FOR [.text]:
173 |00000000 4e56 fffc ; linkw fp,#-4
174 |00000004 1039 1234 5678 ; moveb @@#12345678,d0
175 |0000000a 49c0 ; extbl d0
176 |0000000c 4e5e ; unlk fp
179 Using coff and an 88k, some instructions don't have enough
180 space in them to represent the full address range, and
181 pointers have to be loaded in two parts. So you'd get something like:
183 | or.u r13,r0,hi16(_foo+0x12345678)
184 | ld.b r2,r13,lo16(_foo+0x12345678)
187 This should create two relocs, both pointing to <<_foo>>, and with
188 0x12340000 in their addend field. The data would consist of:
190 |RELOCATION RECORDS FOR [.text]:
192 |00000002 HVRT16 _foo+0x12340000
193 |00000006 LVRT16 _foo+0x12340000
195 |00000000 5da05678 ; or.u r13,r0,0x5678
196 |00000004 1c4d5678 ; ld.b r2,r13,0x5678
197 |00000008 f400c001 ; jmp r1
199 The relocation routine digs out the value from the data, adds
200 it to the addend to get the original offset, and then adds the
201 value of <<_foo>>. Note that all 32 bits have to be kept around
202 somewhere, to cope with carry from bit 15 to bit 16.
204 One further example is the sparc and the a.out format. The
205 sparc has a similar problem to the 88k, in that some
206 instructions don't have room for an entire offset, but on the
207 sparc the parts are created in odd sized lumps. The designers of
208 the a.out format chose to not use the data within the section
209 for storing part of the offset; all the offset is kept within
210 the reloc. Anything in the data should be ignored.
213 | sethi %hi(_foo+0x12345678),%g2
214 | ldsb [%g2+%lo(_foo+0x12345678)],%i0
218 Both relocs contain a pointer to <<foo>>, and the offsets
221 |RELOCATION RECORDS FOR [.text]:
223 |00000004 HI22 _foo+0x12345678
224 |00000008 LO10 _foo+0x12345678
226 |00000000 9de3bf90 ; save %sp,-112,%sp
227 |00000004 05000000 ; sethi %hi(_foo+0),%g2
228 |00000008 f048a000 ; ldsb [%g2+%lo(_foo+0)],%i0
229 |0000000c 81c7e008 ; ret
230 |00000010 81e80000 ; restore
234 The <<howto>> field can be imagined as a
235 relocation instruction. It is a pointer to a structure which
236 contains information on what to do with all of the other
237 information in the reloc record and data section. A back end
238 would normally have a relocation instruction set and turn
239 relocations into pointers to the correct structure on input -
240 but it would be possible to create each howto field on demand.
246 <<enum complain_overflow>>
248 Indicates what sort of overflow checking should be done when
249 performing a relocation.
253 .enum complain_overflow
255 . {* Do not complain on overflow. *}
256 . complain_overflow_dont,
258 . {* Complain if the value overflows when considered as a signed
259 . number one bit larger than the field. ie. A bitfield of N bits
260 . is allowed to represent -2**n to 2**n-1. *}
261 . complain_overflow_bitfield,
263 . {* Complain if the value overflows when considered as a signed
265 . complain_overflow_signed,
267 . {* Complain if the value overflows when considered as an
268 . unsigned number. *}
269 . complain_overflow_unsigned
278 The <<reloc_howto_type>> is a structure which contains all the
279 information that libbfd needs to know to tie up a back end's data.
282 .struct bfd_symbol; {* Forward declaration. *}
284 .struct reloc_howto_struct
286 . {* The type field has mainly a documentary use - the back end can
287 . do what it wants with it, though normally the back end's
288 . external idea of what a reloc number is stored
289 . in this field. For example, a PC relative word relocation
290 . in a coff environment has the type 023 - because that's
291 . what the outside world calls a R_PCRWORD reloc. *}
294 . {* The value the final relocation is shifted right by. This drops
295 . unwanted data from the relocation. *}
296 . unsigned int rightshift;
298 . {* The size of the item to be relocated. This is *not* a
299 . power-of-two measure. To get the number of bytes operated
300 . on by a type of relocation, use bfd_get_reloc_size. *}
303 . {* The number of bits in the item to be relocated. This is used
304 . when doing overflow checking. *}
305 . unsigned int bitsize;
307 . {* Notes that the relocation is relative to the location in the
308 . data section of the addend. The relocation function will
309 . subtract from the relocation value the address of the location
310 . being relocated. *}
311 . bfd_boolean pc_relative;
313 . {* The bit position of the reloc value in the destination.
314 . The relocated value is left shifted by this amount. *}
315 . unsigned int bitpos;
317 . {* What type of overflow error should be checked for when
319 . enum complain_overflow complain_on_overflow;
321 . {* If this field is non null, then the supplied function is
322 . called rather than the normal function. This allows really
323 . strange relocation methods to be accommodated (e.g., i960 callj
325 . bfd_reloc_status_type (*special_function)
326 . (bfd *, arelent *, struct bfd_symbol *, void *, asection *,
329 . {* The textual name of the relocation type. *}
332 . {* Some formats record a relocation addend in the section contents
333 . rather than with the relocation. For ELF formats this is the
334 . distinction between USE_REL and USE_RELA (though the code checks
335 . for USE_REL == 1/0). The value of this field is TRUE if the
336 . addend is recorded with the section contents; when performing a
337 . partial link (ld -r) the section contents (the data) will be
338 . modified. The value of this field is FALSE if addends are
339 . recorded with the relocation (in arelent.addend); when performing
340 . a partial link the relocation will be modified.
341 . All relocations for all ELF USE_RELA targets should set this field
342 . to FALSE (values of TRUE should be looked on with suspicion).
343 . However, the converse is not true: not all relocations of all ELF
344 . USE_REL targets set this field to TRUE. Why this is so is peculiar
345 . to each particular target. For relocs that aren't used in partial
346 . links (e.g. GOT stuff) it doesn't matter what this is set to. *}
347 . bfd_boolean partial_inplace;
349 . {* src_mask selects the part of the instruction (or data) to be used
350 . in the relocation sum. If the target relocations don't have an
351 . addend in the reloc, eg. ELF USE_REL, src_mask will normally equal
352 . dst_mask to extract the addend from the section contents. If
353 . relocations do have an addend in the reloc, eg. ELF USE_RELA, this
354 . field should be zero. Non-zero values for ELF USE_RELA targets are
355 . bogus as in those cases the value in the dst_mask part of the
356 . section contents should be treated as garbage. *}
359 . {* dst_mask selects which parts of the instruction (or data) are
360 . replaced with a relocated value. *}
363 . {* When some formats create PC relative instructions, they leave
364 . the value of the pc of the place being relocated in the offset
365 . slot of the instruction, so that a PC relative relocation can
366 . be made just by adding in an ordinary offset (e.g., sun3 a.out).
367 . Some formats leave the displacement part of an instruction
368 . empty (e.g., m88k bcs); this flag signals the fact. *}
369 . bfd_boolean pcrel_offset;
379 The HOWTO define is horrible and will go away.
381 .#define HOWTO(C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC) \
382 . { (unsigned) C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC }
385 And will be replaced with the totally magic way. But for the
386 moment, we are compatible, so do it this way.
388 .#define NEWHOWTO(FUNCTION, NAME, SIZE, REL, IN) \
389 . HOWTO (0, 0, SIZE, 0, REL, 0, complain_overflow_dont, FUNCTION, \
390 . NAME, FALSE, 0, 0, IN)
394 This is used to fill in an empty howto entry in an array.
396 .#define EMPTY_HOWTO(C) \
397 . HOWTO ((C), 0, 0, 0, FALSE, 0, complain_overflow_dont, NULL, \
398 . NULL, FALSE, 0, 0, FALSE)
402 Helper routine to turn a symbol into a relocation value.
404 .#define HOWTO_PREPARE(relocation, symbol) \
406 . if (symbol != NULL) \
408 . if (bfd_is_com_section (symbol->section)) \
414 . relocation = symbol->value; \
426 unsigned int bfd_get_reloc_size (reloc_howto_type *);
429 For a reloc_howto_type that operates on a fixed number of bytes,
430 this returns the number of bytes operated on.
434 bfd_get_reloc_size (reloc_howto_type
*howto
)
455 How relocs are tied together in an <<asection>>:
457 .typedef struct relent_chain
460 . struct relent_chain *next;
466 /* N_ONES produces N one bits, without overflowing machine arithmetic. */
467 #define N_ONES(n) (((((bfd_vma) 1 << ((n) - 1)) - 1) << 1) | 1)
474 bfd_reloc_status_type bfd_check_overflow
475 (enum complain_overflow how,
476 unsigned int bitsize,
477 unsigned int rightshift,
478 unsigned int addrsize,
482 Perform overflow checking on @var{relocation} which has
483 @var{bitsize} significant bits and will be shifted right by
484 @var{rightshift} bits, on a machine with addresses containing
485 @var{addrsize} significant bits. The result is either of
486 @code{bfd_reloc_ok} or @code{bfd_reloc_overflow}.
490 bfd_reloc_status_type
491 bfd_check_overflow (enum complain_overflow how
,
492 unsigned int bitsize
,
493 unsigned int rightshift
,
494 unsigned int addrsize
,
497 bfd_vma fieldmask
, addrmask
, signmask
, ss
, a
;
498 bfd_reloc_status_type flag
= bfd_reloc_ok
;
500 /* Note: BITSIZE should always be <= ADDRSIZE, but in case it's not,
501 we'll be permissive: extra bits in the field mask will
502 automatically extend the address mask for purposes of the
504 fieldmask
= N_ONES (bitsize
);
505 signmask
= ~fieldmask
;
506 addrmask
= N_ONES (addrsize
) | fieldmask
;
507 a
= (relocation
& addrmask
) >> rightshift
;;
511 case complain_overflow_dont
:
514 case complain_overflow_signed
:
515 /* If any sign bits are set, all sign bits must be set. That
516 is, A must be a valid negative address after shifting. */
517 signmask
= ~ (fieldmask
>> 1);
520 case complain_overflow_bitfield
:
521 /* Bitfields are sometimes signed, sometimes unsigned. We
522 explicitly allow an address wrap too, which means a bitfield
523 of n bits is allowed to store -2**n to 2**n-1. Thus overflow
524 if the value has some, but not all, bits set outside the
527 if (ss
!= 0 && ss
!= ((addrmask
>> rightshift
) & signmask
))
528 flag
= bfd_reloc_overflow
;
531 case complain_overflow_unsigned
:
532 /* We have an overflow if the address does not fit in the field. */
533 if ((a
& signmask
) != 0)
534 flag
= bfd_reloc_overflow
;
546 bfd_perform_relocation
549 bfd_reloc_status_type bfd_perform_relocation
551 arelent *reloc_entry,
553 asection *input_section,
555 char **error_message);
558 If @var{output_bfd} is supplied to this function, the
559 generated image will be relocatable; the relocations are
560 copied to the output file after they have been changed to
561 reflect the new state of the world. There are two ways of
562 reflecting the results of partial linkage in an output file:
563 by modifying the output data in place, and by modifying the
564 relocation record. Some native formats (e.g., basic a.out and
565 basic coff) have no way of specifying an addend in the
566 relocation type, so the addend has to go in the output data.
567 This is no big deal since in these formats the output data
568 slot will always be big enough for the addend. Complex reloc
569 types with addends were invented to solve just this problem.
570 The @var{error_message} argument is set to an error message if
571 this return @code{bfd_reloc_dangerous}.
575 bfd_reloc_status_type
576 bfd_perform_relocation (bfd
*abfd
,
577 arelent
*reloc_entry
,
579 asection
*input_section
,
581 char **error_message
)
584 bfd_reloc_status_type flag
= bfd_reloc_ok
;
585 bfd_size_type octets
= reloc_entry
->address
* bfd_octets_per_byte (abfd
);
586 bfd_vma output_base
= 0;
587 reloc_howto_type
*howto
= reloc_entry
->howto
;
588 asection
*reloc_target_output_section
;
591 symbol
= *(reloc_entry
->sym_ptr_ptr
);
592 if (bfd_is_abs_section (symbol
->section
)
593 && output_bfd
!= NULL
)
595 reloc_entry
->address
+= input_section
->output_offset
;
599 /* If we are not producing relocatable output, return an error if
600 the symbol is not defined. An undefined weak symbol is
601 considered to have a value of zero (SVR4 ABI, p. 4-27). */
602 if (bfd_is_und_section (symbol
->section
)
603 && (symbol
->flags
& BSF_WEAK
) == 0
604 && output_bfd
== NULL
)
605 flag
= bfd_reloc_undefined
;
607 /* If there is a function supplied to handle this relocation type,
608 call it. It'll return `bfd_reloc_continue' if further processing
610 if (howto
->special_function
)
612 bfd_reloc_status_type cont
;
613 cont
= howto
->special_function (abfd
, reloc_entry
, symbol
, data
,
614 input_section
, output_bfd
,
616 if (cont
!= bfd_reloc_continue
)
620 /* Is the address of the relocation really within the section? */
621 if (reloc_entry
->address
> bfd_get_section_limit (abfd
, input_section
))
622 return bfd_reloc_outofrange
;
624 /* Work out which section the relocation is targeted at and the
625 initial relocation command value. */
627 /* Get symbol value. (Common symbols are special.) */
628 if (bfd_is_com_section (symbol
->section
))
631 relocation
= symbol
->value
;
633 reloc_target_output_section
= symbol
->section
->output_section
;
635 /* Convert input-section-relative symbol value to absolute. */
636 if ((output_bfd
&& ! howto
->partial_inplace
)
637 || reloc_target_output_section
== NULL
)
640 output_base
= reloc_target_output_section
->vma
;
642 relocation
+= output_base
+ symbol
->section
->output_offset
;
644 /* Add in supplied addend. */
645 relocation
+= reloc_entry
->addend
;
647 /* Here the variable relocation holds the final address of the
648 symbol we are relocating against, plus any addend. */
650 if (howto
->pc_relative
)
652 /* This is a PC relative relocation. We want to set RELOCATION
653 to the distance between the address of the symbol and the
654 location. RELOCATION is already the address of the symbol.
656 We start by subtracting the address of the section containing
659 If pcrel_offset is set, we must further subtract the position
660 of the location within the section. Some targets arrange for
661 the addend to be the negative of the position of the location
662 within the section; for example, i386-aout does this. For
663 i386-aout, pcrel_offset is FALSE. Some other targets do not
664 include the position of the location; for example, m88kbcs,
665 or ELF. For those targets, pcrel_offset is TRUE.
667 If we are producing relocatable output, then we must ensure
668 that this reloc will be correctly computed when the final
669 relocation is done. If pcrel_offset is FALSE we want to wind
670 up with the negative of the location within the section,
671 which means we must adjust the existing addend by the change
672 in the location within the section. If pcrel_offset is TRUE
673 we do not want to adjust the existing addend at all.
675 FIXME: This seems logical to me, but for the case of
676 producing relocatable output it is not what the code
677 actually does. I don't want to change it, because it seems
678 far too likely that something will break. */
681 input_section
->output_section
->vma
+ input_section
->output_offset
;
683 if (howto
->pcrel_offset
)
684 relocation
-= reloc_entry
->address
;
687 if (output_bfd
!= NULL
)
689 if (! howto
->partial_inplace
)
691 /* This is a partial relocation, and we want to apply the relocation
692 to the reloc entry rather than the raw data. Modify the reloc
693 inplace to reflect what we now know. */
694 reloc_entry
->addend
= relocation
;
695 reloc_entry
->address
+= input_section
->output_offset
;
700 /* This is a partial relocation, but inplace, so modify the
703 If we've relocated with a symbol with a section, change
704 into a ref to the section belonging to the symbol. */
706 reloc_entry
->address
+= input_section
->output_offset
;
709 if (abfd
->xvec
->flavour
== bfd_target_coff_flavour
710 && strcmp (abfd
->xvec
->name
, "coff-Intel-little") != 0
711 && strcmp (abfd
->xvec
->name
, "coff-Intel-big") != 0)
713 /* For m68k-coff, the addend was being subtracted twice during
714 relocation with -r. Removing the line below this comment
715 fixes that problem; see PR 2953.
717 However, Ian wrote the following, regarding removing the line below,
718 which explains why it is still enabled: --djm
720 If you put a patch like that into BFD you need to check all the COFF
721 linkers. I am fairly certain that patch will break coff-i386 (e.g.,
722 SCO); see coff_i386_reloc in coff-i386.c where I worked around the
723 problem in a different way. There may very well be a reason that the
724 code works as it does.
726 Hmmm. The first obvious point is that bfd_perform_relocation should
727 not have any tests that depend upon the flavour. It's seem like
728 entirely the wrong place for such a thing. The second obvious point
729 is that the current code ignores the reloc addend when producing
730 relocatable output for COFF. That's peculiar. In fact, I really
731 have no idea what the point of the line you want to remove is.
733 A typical COFF reloc subtracts the old value of the symbol and adds in
734 the new value to the location in the object file (if it's a pc
735 relative reloc it adds the difference between the symbol value and the
736 location). When relocating we need to preserve that property.
738 BFD handles this by setting the addend to the negative of the old
739 value of the symbol. Unfortunately it handles common symbols in a
740 non-standard way (it doesn't subtract the old value) but that's a
741 different story (we can't change it without losing backward
742 compatibility with old object files) (coff-i386 does subtract the old
743 value, to be compatible with existing coff-i386 targets, like SCO).
745 So everything works fine when not producing relocatable output. When
746 we are producing relocatable output, logically we should do exactly
747 what we do when not producing relocatable output. Therefore, your
748 patch is correct. In fact, it should probably always just set
749 reloc_entry->addend to 0 for all cases, since it is, in fact, going to
750 add the value into the object file. This won't hurt the COFF code,
751 which doesn't use the addend; I'm not sure what it will do to other
752 formats (the thing to check for would be whether any formats both use
753 the addend and set partial_inplace).
755 When I wanted to make coff-i386 produce relocatable output, I ran
756 into the problem that you are running into: I wanted to remove that
757 line. Rather than risk it, I made the coff-i386 relocs use a special
758 function; it's coff_i386_reloc in coff-i386.c. The function
759 specifically adds the addend field into the object file, knowing that
760 bfd_perform_relocation is not going to. If you remove that line, then
761 coff-i386.c will wind up adding the addend field in twice. It's
762 trivial to fix; it just needs to be done.
764 The problem with removing the line is just that it may break some
765 working code. With BFD it's hard to be sure of anything. The right
766 way to deal with this is simply to build and test at least all the
767 supported COFF targets. It should be straightforward if time and disk
768 space consuming. For each target:
770 2) generate some executable, and link it using -r (I would
771 probably use paranoia.o and link against newlib/libc.a, which
772 for all the supported targets would be available in
773 /usr/cygnus/progressive/H-host/target/lib/libc.a).
774 3) make the change to reloc.c
775 4) rebuild the linker
777 6) if the resulting object files are the same, you have at least
779 7) if they are different you have to figure out which version is
782 relocation
-= reloc_entry
->addend
;
783 reloc_entry
->addend
= 0;
787 reloc_entry
->addend
= relocation
;
793 reloc_entry
->addend
= 0;
796 /* FIXME: This overflow checking is incomplete, because the value
797 might have overflowed before we get here. For a correct check we
798 need to compute the value in a size larger than bitsize, but we
799 can't reasonably do that for a reloc the same size as a host
801 FIXME: We should also do overflow checking on the result after
802 adding in the value contained in the object file. */
803 if (howto
->complain_on_overflow
!= complain_overflow_dont
804 && flag
== bfd_reloc_ok
)
805 flag
= bfd_check_overflow (howto
->complain_on_overflow
,
808 bfd_arch_bits_per_address (abfd
),
811 /* Either we are relocating all the way, or we don't want to apply
812 the relocation to the reloc entry (probably because there isn't
813 any room in the output format to describe addends to relocs). */
815 /* The cast to bfd_vma avoids a bug in the Alpha OSF/1 C compiler
816 (OSF version 1.3, compiler version 3.11). It miscompiles the
830 x <<= (unsigned long) s.i0;
834 printf ("succeeded (%lx)\n", x);
838 relocation
>>= (bfd_vma
) howto
->rightshift
;
840 /* Shift everything up to where it's going to be used. */
841 relocation
<<= (bfd_vma
) howto
->bitpos
;
843 /* Wait for the day when all have the mask in them. */
846 i instruction to be left alone
847 o offset within instruction
848 r relocation offset to apply
857 (( i i i i i o o o o o from bfd_get<size>
858 and S S S S S) to get the size offset we want
859 + r r r r r r r r r r) to get the final value to place
860 and D D D D D to chop to right size
861 -----------------------
864 ( i i i i i o o o o o from bfd_get<size>
865 and N N N N N ) get instruction
866 -----------------------
872 -----------------------
873 = R R R R R R R R R R put into bfd_put<size>
877 x = ( (x & ~howto->dst_mask) | (((x & howto->src_mask) + relocation) & howto->dst_mask))
883 char x
= bfd_get_8 (abfd
, (char *) data
+ octets
);
885 bfd_put_8 (abfd
, x
, (unsigned char *) data
+ octets
);
891 short x
= bfd_get_16 (abfd
, (bfd_byte
*) data
+ octets
);
893 bfd_put_16 (abfd
, (bfd_vma
) x
, (unsigned char *) data
+ octets
);
898 long x
= bfd_get_32 (abfd
, (bfd_byte
*) data
+ octets
);
900 bfd_put_32 (abfd
, (bfd_vma
) x
, (bfd_byte
*) data
+ octets
);
905 long x
= bfd_get_32 (abfd
, (bfd_byte
*) data
+ octets
);
906 relocation
= -relocation
;
908 bfd_put_32 (abfd
, (bfd_vma
) x
, (bfd_byte
*) data
+ octets
);
914 long x
= bfd_get_16 (abfd
, (bfd_byte
*) data
+ octets
);
915 relocation
= -relocation
;
917 bfd_put_16 (abfd
, (bfd_vma
) x
, (bfd_byte
*) data
+ octets
);
928 bfd_vma x
= bfd_get_64 (abfd
, (bfd_byte
*) data
+ octets
);
930 bfd_put_64 (abfd
, x
, (bfd_byte
*) data
+ octets
);
937 return bfd_reloc_other
;
945 bfd_install_relocation
948 bfd_reloc_status_type bfd_install_relocation
950 arelent *reloc_entry,
951 void *data, bfd_vma data_start,
952 asection *input_section,
953 char **error_message);
956 This looks remarkably like <<bfd_perform_relocation>>, except it
957 does not expect that the section contents have been filled in.
958 I.e., it's suitable for use when creating, rather than applying
961 For now, this function should be considered reserved for the
965 bfd_reloc_status_type
966 bfd_install_relocation (bfd
*abfd
,
967 arelent
*reloc_entry
,
969 bfd_vma data_start_offset
,
970 asection
*input_section
,
971 char **error_message
)
974 bfd_reloc_status_type flag
= bfd_reloc_ok
;
975 bfd_size_type octets
= reloc_entry
->address
* bfd_octets_per_byte (abfd
);
976 bfd_vma output_base
= 0;
977 reloc_howto_type
*howto
= reloc_entry
->howto
;
978 asection
*reloc_target_output_section
;
982 symbol
= *(reloc_entry
->sym_ptr_ptr
);
983 if (bfd_is_abs_section (symbol
->section
))
985 reloc_entry
->address
+= input_section
->output_offset
;
989 /* If there is a function supplied to handle this relocation type,
990 call it. It'll return `bfd_reloc_continue' if further processing
992 if (howto
->special_function
)
994 bfd_reloc_status_type cont
;
996 /* XXX - The special_function calls haven't been fixed up to deal
997 with creating new relocations and section contents. */
998 cont
= howto
->special_function (abfd
, reloc_entry
, symbol
,
999 /* XXX - Non-portable! */
1000 ((bfd_byte
*) data_start
1001 - data_start_offset
),
1002 input_section
, abfd
, error_message
);
1003 if (cont
!= bfd_reloc_continue
)
1007 /* Is the address of the relocation really within the section? */
1008 if (reloc_entry
->address
> bfd_get_section_limit (abfd
, input_section
))
1009 return bfd_reloc_outofrange
;
1011 /* Work out which section the relocation is targeted at and the
1012 initial relocation command value. */
1014 /* Get symbol value. (Common symbols are special.) */
1015 if (bfd_is_com_section (symbol
->section
))
1018 relocation
= symbol
->value
;
1020 reloc_target_output_section
= symbol
->section
->output_section
;
1022 /* Convert input-section-relative symbol value to absolute. */
1023 if (! howto
->partial_inplace
)
1026 output_base
= reloc_target_output_section
->vma
;
1028 relocation
+= output_base
+ symbol
->section
->output_offset
;
1030 /* Add in supplied addend. */
1031 relocation
+= reloc_entry
->addend
;
1033 /* Here the variable relocation holds the final address of the
1034 symbol we are relocating against, plus any addend. */
1036 if (howto
->pc_relative
)
1038 /* This is a PC relative relocation. We want to set RELOCATION
1039 to the distance between the address of the symbol and the
1040 location. RELOCATION is already the address of the symbol.
1042 We start by subtracting the address of the section containing
1045 If pcrel_offset is set, we must further subtract the position
1046 of the location within the section. Some targets arrange for
1047 the addend to be the negative of the position of the location
1048 within the section; for example, i386-aout does this. For
1049 i386-aout, pcrel_offset is FALSE. Some other targets do not
1050 include the position of the location; for example, m88kbcs,
1051 or ELF. For those targets, pcrel_offset is TRUE.
1053 If we are producing relocatable output, then we must ensure
1054 that this reloc will be correctly computed when the final
1055 relocation is done. If pcrel_offset is FALSE we want to wind
1056 up with the negative of the location within the section,
1057 which means we must adjust the existing addend by the change
1058 in the location within the section. If pcrel_offset is TRUE
1059 we do not want to adjust the existing addend at all.
1061 FIXME: This seems logical to me, but for the case of
1062 producing relocatable output it is not what the code
1063 actually does. I don't want to change it, because it seems
1064 far too likely that something will break. */
1067 input_section
->output_section
->vma
+ input_section
->output_offset
;
1069 if (howto
->pcrel_offset
&& howto
->partial_inplace
)
1070 relocation
-= reloc_entry
->address
;
1073 if (! howto
->partial_inplace
)
1075 /* This is a partial relocation, and we want to apply the relocation
1076 to the reloc entry rather than the raw data. Modify the reloc
1077 inplace to reflect what we now know. */
1078 reloc_entry
->addend
= relocation
;
1079 reloc_entry
->address
+= input_section
->output_offset
;
1084 /* This is a partial relocation, but inplace, so modify the
1087 If we've relocated with a symbol with a section, change
1088 into a ref to the section belonging to the symbol. */
1089 reloc_entry
->address
+= input_section
->output_offset
;
1092 if (abfd
->xvec
->flavour
== bfd_target_coff_flavour
1093 && strcmp (abfd
->xvec
->name
, "coff-Intel-little") != 0
1094 && strcmp (abfd
->xvec
->name
, "coff-Intel-big") != 0)
1097 /* For m68k-coff, the addend was being subtracted twice during
1098 relocation with -r. Removing the line below this comment
1099 fixes that problem; see PR 2953.
1101 However, Ian wrote the following, regarding removing the line below,
1102 which explains why it is still enabled: --djm
1104 If you put a patch like that into BFD you need to check all the COFF
1105 linkers. I am fairly certain that patch will break coff-i386 (e.g.,
1106 SCO); see coff_i386_reloc in coff-i386.c where I worked around the
1107 problem in a different way. There may very well be a reason that the
1108 code works as it does.
1110 Hmmm. The first obvious point is that bfd_install_relocation should
1111 not have any tests that depend upon the flavour. It's seem like
1112 entirely the wrong place for such a thing. The second obvious point
1113 is that the current code ignores the reloc addend when producing
1114 relocatable output for COFF. That's peculiar. In fact, I really
1115 have no idea what the point of the line you want to remove is.
1117 A typical COFF reloc subtracts the old value of the symbol and adds in
1118 the new value to the location in the object file (if it's a pc
1119 relative reloc it adds the difference between the symbol value and the
1120 location). When relocating we need to preserve that property.
1122 BFD handles this by setting the addend to the negative of the old
1123 value of the symbol. Unfortunately it handles common symbols in a
1124 non-standard way (it doesn't subtract the old value) but that's a
1125 different story (we can't change it without losing backward
1126 compatibility with old object files) (coff-i386 does subtract the old
1127 value, to be compatible with existing coff-i386 targets, like SCO).
1129 So everything works fine when not producing relocatable output. When
1130 we are producing relocatable output, logically we should do exactly
1131 what we do when not producing relocatable output. Therefore, your
1132 patch is correct. In fact, it should probably always just set
1133 reloc_entry->addend to 0 for all cases, since it is, in fact, going to
1134 add the value into the object file. This won't hurt the COFF code,
1135 which doesn't use the addend; I'm not sure what it will do to other
1136 formats (the thing to check for would be whether any formats both use
1137 the addend and set partial_inplace).
1139 When I wanted to make coff-i386 produce relocatable output, I ran
1140 into the problem that you are running into: I wanted to remove that
1141 line. Rather than risk it, I made the coff-i386 relocs use a special
1142 function; it's coff_i386_reloc in coff-i386.c. The function
1143 specifically adds the addend field into the object file, knowing that
1144 bfd_install_relocation is not going to. If you remove that line, then
1145 coff-i386.c will wind up adding the addend field in twice. It's
1146 trivial to fix; it just needs to be done.
1148 The problem with removing the line is just that it may break some
1149 working code. With BFD it's hard to be sure of anything. The right
1150 way to deal with this is simply to build and test at least all the
1151 supported COFF targets. It should be straightforward if time and disk
1152 space consuming. For each target:
1154 2) generate some executable, and link it using -r (I would
1155 probably use paranoia.o and link against newlib/libc.a, which
1156 for all the supported targets would be available in
1157 /usr/cygnus/progressive/H-host/target/lib/libc.a).
1158 3) make the change to reloc.c
1159 4) rebuild the linker
1161 6) if the resulting object files are the same, you have at least
1163 7) if they are different you have to figure out which version is
1165 relocation
-= reloc_entry
->addend
;
1166 /* FIXME: There should be no target specific code here... */
1167 if (strcmp (abfd
->xvec
->name
, "coff-z8k") != 0)
1168 reloc_entry
->addend
= 0;
1172 reloc_entry
->addend
= relocation
;
1176 /* FIXME: This overflow checking is incomplete, because the value
1177 might have overflowed before we get here. For a correct check we
1178 need to compute the value in a size larger than bitsize, but we
1179 can't reasonably do that for a reloc the same size as a host
1181 FIXME: We should also do overflow checking on the result after
1182 adding in the value contained in the object file. */
1183 if (howto
->complain_on_overflow
!= complain_overflow_dont
)
1184 flag
= bfd_check_overflow (howto
->complain_on_overflow
,
1187 bfd_arch_bits_per_address (abfd
),
1190 /* Either we are relocating all the way, or we don't want to apply
1191 the relocation to the reloc entry (probably because there isn't
1192 any room in the output format to describe addends to relocs). */
1194 /* The cast to bfd_vma avoids a bug in the Alpha OSF/1 C compiler
1195 (OSF version 1.3, compiler version 3.11). It miscompiles the
1209 x <<= (unsigned long) s.i0;
1211 printf ("failed\n");
1213 printf ("succeeded (%lx)\n", x);
1217 relocation
>>= (bfd_vma
) howto
->rightshift
;
1219 /* Shift everything up to where it's going to be used. */
1220 relocation
<<= (bfd_vma
) howto
->bitpos
;
1222 /* Wait for the day when all have the mask in them. */
1225 i instruction to be left alone
1226 o offset within instruction
1227 r relocation offset to apply
1236 (( i i i i i o o o o o from bfd_get<size>
1237 and S S S S S) to get the size offset we want
1238 + r r r r r r r r r r) to get the final value to place
1239 and D D D D D to chop to right size
1240 -----------------------
1243 ( i i i i i o o o o o from bfd_get<size>
1244 and N N N N N ) get instruction
1245 -----------------------
1251 -----------------------
1252 = R R R R R R R R R R put into bfd_put<size>
1256 x = ( (x & ~howto->dst_mask) | (((x & howto->src_mask) + relocation) & howto->dst_mask))
1258 data
= (bfd_byte
*) data_start
+ (octets
- data_start_offset
);
1260 switch (howto
->size
)
1264 char x
= bfd_get_8 (abfd
, data
);
1266 bfd_put_8 (abfd
, x
, data
);
1272 short x
= bfd_get_16 (abfd
, data
);
1274 bfd_put_16 (abfd
, (bfd_vma
) x
, data
);
1279 long x
= bfd_get_32 (abfd
, data
);
1281 bfd_put_32 (abfd
, (bfd_vma
) x
, data
);
1286 long x
= bfd_get_32 (abfd
, data
);
1287 relocation
= -relocation
;
1289 bfd_put_32 (abfd
, (bfd_vma
) x
, data
);
1299 bfd_vma x
= bfd_get_64 (abfd
, data
);
1301 bfd_put_64 (abfd
, x
, data
);
1305 return bfd_reloc_other
;
1311 /* This relocation routine is used by some of the backend linkers.
1312 They do not construct asymbol or arelent structures, so there is no
1313 reason for them to use bfd_perform_relocation. Also,
1314 bfd_perform_relocation is so hacked up it is easier to write a new
1315 function than to try to deal with it.
1317 This routine does a final relocation. Whether it is useful for a
1318 relocatable link depends upon how the object format defines
1321 FIXME: This routine ignores any special_function in the HOWTO,
1322 since the existing special_function values have been written for
1323 bfd_perform_relocation.
1325 HOWTO is the reloc howto information.
1326 INPUT_BFD is the BFD which the reloc applies to.
1327 INPUT_SECTION is the section which the reloc applies to.
1328 CONTENTS is the contents of the section.
1329 ADDRESS is the address of the reloc within INPUT_SECTION.
1330 VALUE is the value of the symbol the reloc refers to.
1331 ADDEND is the addend of the reloc. */
1333 bfd_reloc_status_type
1334 _bfd_final_link_relocate (reloc_howto_type
*howto
,
1336 asection
*input_section
,
1344 /* Sanity check the address. */
1345 if (address
> bfd_get_section_limit (input_bfd
, input_section
))
1346 return bfd_reloc_outofrange
;
1348 /* This function assumes that we are dealing with a basic relocation
1349 against a symbol. We want to compute the value of the symbol to
1350 relocate to. This is just VALUE, the value of the symbol, plus
1351 ADDEND, any addend associated with the reloc. */
1352 relocation
= value
+ addend
;
1354 /* If the relocation is PC relative, we want to set RELOCATION to
1355 the distance between the symbol (currently in RELOCATION) and the
1356 location we are relocating. Some targets (e.g., i386-aout)
1357 arrange for the contents of the section to be the negative of the
1358 offset of the location within the section; for such targets
1359 pcrel_offset is FALSE. Other targets (e.g., m88kbcs or ELF)
1360 simply leave the contents of the section as zero; for such
1361 targets pcrel_offset is TRUE. If pcrel_offset is FALSE we do not
1362 need to subtract out the offset of the location within the
1363 section (which is just ADDRESS). */
1364 if (howto
->pc_relative
)
1366 relocation
-= (input_section
->output_section
->vma
1367 + input_section
->output_offset
);
1368 if (howto
->pcrel_offset
)
1369 relocation
-= address
;
1372 return _bfd_relocate_contents (howto
, input_bfd
, relocation
,
1373 contents
+ address
);
1376 /* Relocate a given location using a given value and howto. */
1378 bfd_reloc_status_type
1379 _bfd_relocate_contents (reloc_howto_type
*howto
,
1386 bfd_reloc_status_type flag
;
1387 unsigned int rightshift
= howto
->rightshift
;
1388 unsigned int bitpos
= howto
->bitpos
;
1390 /* If the size is negative, negate RELOCATION. This isn't very
1392 if (howto
->size
< 0)
1393 relocation
= -relocation
;
1395 /* Get the value we are going to relocate. */
1396 size
= bfd_get_reloc_size (howto
);
1403 x
= bfd_get_8 (input_bfd
, location
);
1406 x
= bfd_get_16 (input_bfd
, location
);
1409 x
= bfd_get_32 (input_bfd
, location
);
1413 x
= bfd_get_64 (input_bfd
, location
);
1420 /* Check for overflow. FIXME: We may drop bits during the addition
1421 which we don't check for. We must either check at every single
1422 operation, which would be tedious, or we must do the computations
1423 in a type larger than bfd_vma, which would be inefficient. */
1424 flag
= bfd_reloc_ok
;
1425 if (howto
->complain_on_overflow
!= complain_overflow_dont
)
1427 bfd_vma addrmask
, fieldmask
, signmask
, ss
;
1430 /* Get the values to be added together. For signed and unsigned
1431 relocations, we assume that all values should be truncated to
1432 the size of an address. For bitfields, all the bits matter.
1433 See also bfd_check_overflow. */
1434 fieldmask
= N_ONES (howto
->bitsize
);
1435 signmask
= ~fieldmask
;
1436 addrmask
= N_ONES (bfd_arch_bits_per_address (input_bfd
)) | fieldmask
;
1437 a
= (relocation
& addrmask
) >> rightshift
;
1438 b
= (x
& howto
->src_mask
& addrmask
) >> bitpos
;
1440 switch (howto
->complain_on_overflow
)
1442 case complain_overflow_signed
:
1443 /* If any sign bits are set, all sign bits must be set.
1444 That is, A must be a valid negative address after
1446 signmask
= ~(fieldmask
>> 1);
1449 case complain_overflow_bitfield
:
1450 /* Much like the signed check, but for a field one bit
1451 wider. We allow a bitfield to represent numbers in the
1452 range -2**n to 2**n-1, where n is the number of bits in the
1453 field. Note that when bfd_vma is 32 bits, a 32-bit reloc
1454 can't overflow, which is exactly what we want. */
1456 if (ss
!= 0 && ss
!= ((addrmask
>> rightshift
) & signmask
))
1457 flag
= bfd_reloc_overflow
;
1459 /* We only need this next bit of code if the sign bit of B
1460 is below the sign bit of A. This would only happen if
1461 SRC_MASK had fewer bits than BITSIZE. Note that if
1462 SRC_MASK has more bits than BITSIZE, we can get into
1463 trouble; we would need to verify that B is in range, as
1464 we do for A above. */
1465 ss
= ((~howto
->src_mask
) >> 1) & howto
->src_mask
;
1468 /* Set all the bits above the sign bit. */
1471 /* Now we can do the addition. */
1474 /* See if the result has the correct sign. Bits above the
1475 sign bit are junk now; ignore them. If the sum is
1476 positive, make sure we did not have all negative inputs;
1477 if the sum is negative, make sure we did not have all
1478 positive inputs. The test below looks only at the sign
1479 bits, and it really just
1480 SIGN (A) == SIGN (B) && SIGN (A) != SIGN (SUM)
1482 We mask with addrmask here to explicitly allow an address
1483 wrap-around. The Linux kernel relies on it, and it is
1484 the only way to write assembler code which can run when
1485 loaded at a location 0x80000000 away from the location at
1486 which it is linked. */
1487 if (((~(a
^ b
)) & (a
^ sum
)) & signmask
& addrmask
)
1488 flag
= bfd_reloc_overflow
;
1491 case complain_overflow_unsigned
:
1492 /* Checking for an unsigned overflow is relatively easy:
1493 trim the addresses and add, and trim the result as well.
1494 Overflow is normally indicated when the result does not
1495 fit in the field. However, we also need to consider the
1496 case when, e.g., fieldmask is 0x7fffffff or smaller, an
1497 input is 0x80000000, and bfd_vma is only 32 bits; then we
1498 will get sum == 0, but there is an overflow, since the
1499 inputs did not fit in the field. Instead of doing a
1500 separate test, we can check for this by or-ing in the
1501 operands when testing for the sum overflowing its final
1503 sum
= (a
+ b
) & addrmask
;
1504 if ((a
| b
| sum
) & signmask
)
1505 flag
= bfd_reloc_overflow
;
1513 /* Put RELOCATION in the right bits. */
1514 relocation
>>= (bfd_vma
) rightshift
;
1515 relocation
<<= (bfd_vma
) bitpos
;
1517 /* Add RELOCATION to the right bits of X. */
1518 x
= ((x
& ~howto
->dst_mask
)
1519 | (((x
& howto
->src_mask
) + relocation
) & howto
->dst_mask
));
1521 /* Put the relocated value back in the object file. */
1528 bfd_put_8 (input_bfd
, x
, location
);
1531 bfd_put_16 (input_bfd
, x
, location
);
1534 bfd_put_32 (input_bfd
, x
, location
);
1538 bfd_put_64 (input_bfd
, x
, location
);
1551 howto manager, , typedef arelent, Relocations
1556 When an application wants to create a relocation, but doesn't
1557 know what the target machine might call it, it can find out by
1558 using this bit of code.
1567 The insides of a reloc code. The idea is that, eventually, there
1568 will be one enumerator for every type of relocation we ever do.
1569 Pass one of these values to <<bfd_reloc_type_lookup>>, and it'll
1570 return a howto pointer.
1572 This does mean that the application must determine the correct
1573 enumerator value; you can't get a howto pointer from a random set
1594 Basic absolute relocations of N bits.
1609 PC-relative relocations. Sometimes these are relative to the address
1610 of the relocation itself; sometimes they are relative to the start of
1611 the section containing the relocation. It depends on the specific target.
1613 The 24-bit relocation is used in some Intel 960 configurations.
1618 Section relative relocations. Some targets need this for DWARF2.
1621 BFD_RELOC_32_GOT_PCREL
1623 BFD_RELOC_16_GOT_PCREL
1625 BFD_RELOC_8_GOT_PCREL
1631 BFD_RELOC_LO16_GOTOFF
1633 BFD_RELOC_HI16_GOTOFF
1635 BFD_RELOC_HI16_S_GOTOFF
1639 BFD_RELOC_64_PLT_PCREL
1641 BFD_RELOC_32_PLT_PCREL
1643 BFD_RELOC_24_PLT_PCREL
1645 BFD_RELOC_16_PLT_PCREL
1647 BFD_RELOC_8_PLT_PCREL
1655 BFD_RELOC_LO16_PLTOFF
1657 BFD_RELOC_HI16_PLTOFF
1659 BFD_RELOC_HI16_S_PLTOFF
1666 BFD_RELOC_68K_GLOB_DAT
1668 BFD_RELOC_68K_JMP_SLOT
1670 BFD_RELOC_68K_RELATIVE
1672 Relocations used by 68K ELF.
1675 BFD_RELOC_32_BASEREL
1677 BFD_RELOC_16_BASEREL
1679 BFD_RELOC_LO16_BASEREL
1681 BFD_RELOC_HI16_BASEREL
1683 BFD_RELOC_HI16_S_BASEREL
1689 Linkage-table relative.
1694 Absolute 8-bit relocation, but used to form an address like 0xFFnn.
1697 BFD_RELOC_32_PCREL_S2
1699 BFD_RELOC_16_PCREL_S2
1701 BFD_RELOC_23_PCREL_S2
1703 These PC-relative relocations are stored as word displacements --
1704 i.e., byte displacements shifted right two bits. The 30-bit word
1705 displacement (<<32_PCREL_S2>> -- 32 bits, shifted 2) is used on the
1706 SPARC. (SPARC tools generally refer to this as <<WDISP30>>.) The
1707 signed 16-bit displacement is used on the MIPS, and the 23-bit
1708 displacement is used on the Alpha.
1715 High 22 bits and low 10 bits of 32-bit value, placed into lower bits of
1716 the target word. These are used on the SPARC.
1723 For systems that allocate a Global Pointer register, these are
1724 displacements off that register. These relocation types are
1725 handled specially, because the value the register will have is
1726 decided relatively late.
1729 BFD_RELOC_I960_CALLJ
1731 Reloc types used for i960/b.out.
1736 BFD_RELOC_SPARC_WDISP22
1742 BFD_RELOC_SPARC_GOT10
1744 BFD_RELOC_SPARC_GOT13
1746 BFD_RELOC_SPARC_GOT22
1748 BFD_RELOC_SPARC_PC10
1750 BFD_RELOC_SPARC_PC22
1752 BFD_RELOC_SPARC_WPLT30
1754 BFD_RELOC_SPARC_COPY
1756 BFD_RELOC_SPARC_GLOB_DAT
1758 BFD_RELOC_SPARC_JMP_SLOT
1760 BFD_RELOC_SPARC_RELATIVE
1762 BFD_RELOC_SPARC_UA16
1764 BFD_RELOC_SPARC_UA32
1766 BFD_RELOC_SPARC_UA64
1768 SPARC ELF relocations. There is probably some overlap with other
1769 relocation types already defined.
1772 BFD_RELOC_SPARC_BASE13
1774 BFD_RELOC_SPARC_BASE22
1776 I think these are specific to SPARC a.out (e.g., Sun 4).
1786 BFD_RELOC_SPARC_OLO10
1788 BFD_RELOC_SPARC_HH22
1790 BFD_RELOC_SPARC_HM10
1792 BFD_RELOC_SPARC_LM22
1794 BFD_RELOC_SPARC_PC_HH22
1796 BFD_RELOC_SPARC_PC_HM10
1798 BFD_RELOC_SPARC_PC_LM22
1800 BFD_RELOC_SPARC_WDISP16
1802 BFD_RELOC_SPARC_WDISP19
1810 BFD_RELOC_SPARC_DISP64
1813 BFD_RELOC_SPARC_PLT32
1815 BFD_RELOC_SPARC_PLT64
1817 BFD_RELOC_SPARC_HIX22
1819 BFD_RELOC_SPARC_LOX10
1827 BFD_RELOC_SPARC_REGISTER
1832 BFD_RELOC_SPARC_REV32
1834 SPARC little endian relocation
1836 BFD_RELOC_SPARC_TLS_GD_HI22
1838 BFD_RELOC_SPARC_TLS_GD_LO10
1840 BFD_RELOC_SPARC_TLS_GD_ADD
1842 BFD_RELOC_SPARC_TLS_GD_CALL
1844 BFD_RELOC_SPARC_TLS_LDM_HI22
1846 BFD_RELOC_SPARC_TLS_LDM_LO10
1848 BFD_RELOC_SPARC_TLS_LDM_ADD
1850 BFD_RELOC_SPARC_TLS_LDM_CALL
1852 BFD_RELOC_SPARC_TLS_LDO_HIX22
1854 BFD_RELOC_SPARC_TLS_LDO_LOX10
1856 BFD_RELOC_SPARC_TLS_LDO_ADD
1858 BFD_RELOC_SPARC_TLS_IE_HI22
1860 BFD_RELOC_SPARC_TLS_IE_LO10
1862 BFD_RELOC_SPARC_TLS_IE_LD
1864 BFD_RELOC_SPARC_TLS_IE_LDX
1866 BFD_RELOC_SPARC_TLS_IE_ADD
1868 BFD_RELOC_SPARC_TLS_LE_HIX22
1870 BFD_RELOC_SPARC_TLS_LE_LOX10
1872 BFD_RELOC_SPARC_TLS_DTPMOD32
1874 BFD_RELOC_SPARC_TLS_DTPMOD64
1876 BFD_RELOC_SPARC_TLS_DTPOFF32
1878 BFD_RELOC_SPARC_TLS_DTPOFF64
1880 BFD_RELOC_SPARC_TLS_TPOFF32
1882 BFD_RELOC_SPARC_TLS_TPOFF64
1884 SPARC TLS relocations
1887 BFD_RELOC_ALPHA_GPDISP_HI16
1889 Alpha ECOFF and ELF relocations. Some of these treat the symbol or
1890 "addend" in some special way.
1891 For GPDISP_HI16 ("gpdisp") relocations, the symbol is ignored when
1892 writing; when reading, it will be the absolute section symbol. The
1893 addend is the displacement in bytes of the "lda" instruction from
1894 the "ldah" instruction (which is at the address of this reloc).
1896 BFD_RELOC_ALPHA_GPDISP_LO16
1898 For GPDISP_LO16 ("ignore") relocations, the symbol is handled as
1899 with GPDISP_HI16 relocs. The addend is ignored when writing the
1900 relocations out, and is filled in with the file's GP value on
1901 reading, for convenience.
1904 BFD_RELOC_ALPHA_GPDISP
1906 The ELF GPDISP relocation is exactly the same as the GPDISP_HI16
1907 relocation except that there is no accompanying GPDISP_LO16
1911 BFD_RELOC_ALPHA_LITERAL
1913 BFD_RELOC_ALPHA_ELF_LITERAL
1915 BFD_RELOC_ALPHA_LITUSE
1917 The Alpha LITERAL/LITUSE relocs are produced by a symbol reference;
1918 the assembler turns it into a LDQ instruction to load the address of
1919 the symbol, and then fills in a register in the real instruction.
1921 The LITERAL reloc, at the LDQ instruction, refers to the .lita
1922 section symbol. The addend is ignored when writing, but is filled
1923 in with the file's GP value on reading, for convenience, as with the
1926 The ELF_LITERAL reloc is somewhere between 16_GOTOFF and GPDISP_LO16.
1927 It should refer to the symbol to be referenced, as with 16_GOTOFF,
1928 but it generates output not based on the position within the .got
1929 section, but relative to the GP value chosen for the file during the
1932 The LITUSE reloc, on the instruction using the loaded address, gives
1933 information to the linker that it might be able to use to optimize
1934 away some literal section references. The symbol is ignored (read
1935 as the absolute section symbol), and the "addend" indicates the type
1936 of instruction using the register:
1937 1 - "memory" fmt insn
1938 2 - byte-manipulation (byte offset reg)
1939 3 - jsr (target of branch)
1942 BFD_RELOC_ALPHA_HINT
1944 The HINT relocation indicates a value that should be filled into the
1945 "hint" field of a jmp/jsr/ret instruction, for possible branch-
1946 prediction logic which may be provided on some processors.
1949 BFD_RELOC_ALPHA_LINKAGE
1951 The LINKAGE relocation outputs a linkage pair in the object file,
1952 which is filled by the linker.
1955 BFD_RELOC_ALPHA_CODEADDR
1957 The CODEADDR relocation outputs a STO_CA in the object file,
1958 which is filled by the linker.
1961 BFD_RELOC_ALPHA_GPREL_HI16
1963 BFD_RELOC_ALPHA_GPREL_LO16
1965 The GPREL_HI/LO relocations together form a 32-bit offset from the
1969 BFD_RELOC_ALPHA_BRSGP
1971 Like BFD_RELOC_23_PCREL_S2, except that the source and target must
1972 share a common GP, and the target address is adjusted for
1973 STO_ALPHA_STD_GPLOAD.
1976 BFD_RELOC_ALPHA_TLSGD
1978 BFD_RELOC_ALPHA_TLSLDM
1980 BFD_RELOC_ALPHA_DTPMOD64
1982 BFD_RELOC_ALPHA_GOTDTPREL16
1984 BFD_RELOC_ALPHA_DTPREL64
1986 BFD_RELOC_ALPHA_DTPREL_HI16
1988 BFD_RELOC_ALPHA_DTPREL_LO16
1990 BFD_RELOC_ALPHA_DTPREL16
1992 BFD_RELOC_ALPHA_GOTTPREL16
1994 BFD_RELOC_ALPHA_TPREL64
1996 BFD_RELOC_ALPHA_TPREL_HI16
1998 BFD_RELOC_ALPHA_TPREL_LO16
2000 BFD_RELOC_ALPHA_TPREL16
2002 Alpha thread-local storage relocations.
2007 Bits 27..2 of the relocation address shifted right 2 bits;
2008 simple reloc otherwise.
2011 BFD_RELOC_MIPS16_JMP
2013 The MIPS16 jump instruction.
2016 BFD_RELOC_MIPS16_GPREL
2018 MIPS16 GP relative reloc.
2023 High 16 bits of 32-bit value; simple reloc.
2027 High 16 bits of 32-bit value but the low 16 bits will be sign
2028 extended and added to form the final result. If the low 16
2029 bits form a negative number, we need to add one to the high value
2030 to compensate for the borrow when the low bits are added.
2037 BFD_RELOC_HI16_PCREL
2039 High 16 bits of 32-bit pc-relative value
2041 BFD_RELOC_HI16_S_PCREL
2043 High 16 bits of 32-bit pc-relative value, adjusted
2045 BFD_RELOC_LO16_PCREL
2047 Low 16 bits of pc-relative value
2050 BFD_RELOC_MIPS16_HI16
2052 MIPS16 high 16 bits of 32-bit value.
2054 BFD_RELOC_MIPS16_HI16_S
2056 MIPS16 high 16 bits of 32-bit value but the low 16 bits will be sign
2057 extended and added to form the final result. If the low 16
2058 bits form a negative number, we need to add one to the high value
2059 to compensate for the borrow when the low bits are added.
2061 BFD_RELOC_MIPS16_LO16
2066 BFD_RELOC_MIPS_LITERAL
2068 Relocation against a MIPS literal section.
2071 BFD_RELOC_MIPS_GOT16
2073 BFD_RELOC_MIPS_CALL16
2075 BFD_RELOC_MIPS_GOT_HI16
2077 BFD_RELOC_MIPS_GOT_LO16
2079 BFD_RELOC_MIPS_CALL_HI16
2081 BFD_RELOC_MIPS_CALL_LO16
2085 BFD_RELOC_MIPS_GOT_PAGE
2087 BFD_RELOC_MIPS_GOT_OFST
2089 BFD_RELOC_MIPS_GOT_DISP
2091 BFD_RELOC_MIPS_SHIFT5
2093 BFD_RELOC_MIPS_SHIFT6
2095 BFD_RELOC_MIPS_INSERT_A
2097 BFD_RELOC_MIPS_INSERT_B
2099 BFD_RELOC_MIPS_DELETE
2101 BFD_RELOC_MIPS_HIGHEST
2103 BFD_RELOC_MIPS_HIGHER
2105 BFD_RELOC_MIPS_SCN_DISP
2107 BFD_RELOC_MIPS_REL16
2109 BFD_RELOC_MIPS_RELGOT
2113 BFD_RELOC_MIPS_TLS_DTPMOD32
2115 BFD_RELOC_MIPS_TLS_DTPREL32
2117 BFD_RELOC_MIPS_TLS_DTPMOD64
2119 BFD_RELOC_MIPS_TLS_DTPREL64
2121 BFD_RELOC_MIPS_TLS_GD
2123 BFD_RELOC_MIPS_TLS_LDM
2125 BFD_RELOC_MIPS_TLS_DTPREL_HI16
2127 BFD_RELOC_MIPS_TLS_DTPREL_LO16
2129 BFD_RELOC_MIPS_TLS_GOTTPREL
2131 BFD_RELOC_MIPS_TLS_TPREL32
2133 BFD_RELOC_MIPS_TLS_TPREL64
2135 BFD_RELOC_MIPS_TLS_TPREL_HI16
2137 BFD_RELOC_MIPS_TLS_TPREL_LO16
2139 MIPS ELF relocations.
2143 BFD_RELOC_FRV_LABEL16
2145 BFD_RELOC_FRV_LABEL24
2151 BFD_RELOC_FRV_GPREL12
2153 BFD_RELOC_FRV_GPRELU12
2155 BFD_RELOC_FRV_GPREL32
2157 BFD_RELOC_FRV_GPRELHI
2159 BFD_RELOC_FRV_GPRELLO
2167 BFD_RELOC_FRV_FUNCDESC
2169 BFD_RELOC_FRV_FUNCDESC_GOT12
2171 BFD_RELOC_FRV_FUNCDESC_GOTHI
2173 BFD_RELOC_FRV_FUNCDESC_GOTLO
2175 BFD_RELOC_FRV_FUNCDESC_VALUE
2177 BFD_RELOC_FRV_FUNCDESC_GOTOFF12
2179 BFD_RELOC_FRV_FUNCDESC_GOTOFFHI
2181 BFD_RELOC_FRV_FUNCDESC_GOTOFFLO
2183 BFD_RELOC_FRV_GOTOFF12
2185 BFD_RELOC_FRV_GOTOFFHI
2187 BFD_RELOC_FRV_GOTOFFLO
2189 BFD_RELOC_FRV_GETTLSOFF
2191 BFD_RELOC_FRV_TLSDESC_VALUE
2193 BFD_RELOC_FRV_GOTTLSDESC12
2195 BFD_RELOC_FRV_GOTTLSDESCHI
2197 BFD_RELOC_FRV_GOTTLSDESCLO
2199 BFD_RELOC_FRV_TLSMOFF12
2201 BFD_RELOC_FRV_TLSMOFFHI
2203 BFD_RELOC_FRV_TLSMOFFLO
2205 BFD_RELOC_FRV_GOTTLSOFF12
2207 BFD_RELOC_FRV_GOTTLSOFFHI
2209 BFD_RELOC_FRV_GOTTLSOFFLO
2211 BFD_RELOC_FRV_TLSOFF
2213 BFD_RELOC_FRV_TLSDESC_RELAX
2215 BFD_RELOC_FRV_GETTLSOFF_RELAX
2217 BFD_RELOC_FRV_TLSOFF_RELAX
2219 BFD_RELOC_FRV_TLSMOFF
2221 Fujitsu Frv Relocations.
2225 BFD_RELOC_MN10300_GOTOFF24
2227 This is a 24bit GOT-relative reloc for the mn10300.
2229 BFD_RELOC_MN10300_GOT32
2231 This is a 32bit GOT-relative reloc for the mn10300, offset by two bytes
2234 BFD_RELOC_MN10300_GOT24
2236 This is a 24bit GOT-relative reloc for the mn10300, offset by two bytes
2239 BFD_RELOC_MN10300_GOT16
2241 This is a 16bit GOT-relative reloc for the mn10300, offset by two bytes
2244 BFD_RELOC_MN10300_COPY
2246 Copy symbol at runtime.
2248 BFD_RELOC_MN10300_GLOB_DAT
2252 BFD_RELOC_MN10300_JMP_SLOT
2256 BFD_RELOC_MN10300_RELATIVE
2258 Adjust by program base.
2268 BFD_RELOC_386_GLOB_DAT
2270 BFD_RELOC_386_JUMP_SLOT
2272 BFD_RELOC_386_RELATIVE
2274 BFD_RELOC_386_GOTOFF
2278 BFD_RELOC_386_TLS_TPOFF
2280 BFD_RELOC_386_TLS_IE
2282 BFD_RELOC_386_TLS_GOTIE
2284 BFD_RELOC_386_TLS_LE
2286 BFD_RELOC_386_TLS_GD
2288 BFD_RELOC_386_TLS_LDM
2290 BFD_RELOC_386_TLS_LDO_32
2292 BFD_RELOC_386_TLS_IE_32
2294 BFD_RELOC_386_TLS_LE_32
2296 BFD_RELOC_386_TLS_DTPMOD32
2298 BFD_RELOC_386_TLS_DTPOFF32
2300 BFD_RELOC_386_TLS_TPOFF32
2302 BFD_RELOC_386_TLS_GOTDESC
2304 BFD_RELOC_386_TLS_DESC_CALL
2306 BFD_RELOC_386_TLS_DESC
2308 i386/elf relocations
2311 BFD_RELOC_X86_64_GOT32
2313 BFD_RELOC_X86_64_PLT32
2315 BFD_RELOC_X86_64_COPY
2317 BFD_RELOC_X86_64_GLOB_DAT
2319 BFD_RELOC_X86_64_JUMP_SLOT
2321 BFD_RELOC_X86_64_RELATIVE
2323 BFD_RELOC_X86_64_GOTPCREL
2325 BFD_RELOC_X86_64_32S
2327 BFD_RELOC_X86_64_DTPMOD64
2329 BFD_RELOC_X86_64_DTPOFF64
2331 BFD_RELOC_X86_64_TPOFF64
2333 BFD_RELOC_X86_64_TLSGD
2335 BFD_RELOC_X86_64_TLSLD
2337 BFD_RELOC_X86_64_DTPOFF32
2339 BFD_RELOC_X86_64_GOTTPOFF
2341 BFD_RELOC_X86_64_TPOFF32
2343 BFD_RELOC_X86_64_GOTOFF64
2345 BFD_RELOC_X86_64_GOTPC32
2347 BFD_RELOC_X86_64_GOTPC32_TLSDESC
2349 BFD_RELOC_X86_64_TLSDESC_CALL
2351 BFD_RELOC_X86_64_TLSDESC
2353 x86-64/elf relocations
2356 BFD_RELOC_NS32K_IMM_8
2358 BFD_RELOC_NS32K_IMM_16
2360 BFD_RELOC_NS32K_IMM_32
2362 BFD_RELOC_NS32K_IMM_8_PCREL
2364 BFD_RELOC_NS32K_IMM_16_PCREL
2366 BFD_RELOC_NS32K_IMM_32_PCREL
2368 BFD_RELOC_NS32K_DISP_8
2370 BFD_RELOC_NS32K_DISP_16
2372 BFD_RELOC_NS32K_DISP_32
2374 BFD_RELOC_NS32K_DISP_8_PCREL
2376 BFD_RELOC_NS32K_DISP_16_PCREL
2378 BFD_RELOC_NS32K_DISP_32_PCREL
2383 BFD_RELOC_PDP11_DISP_8_PCREL
2385 BFD_RELOC_PDP11_DISP_6_PCREL
2390 BFD_RELOC_PJ_CODE_HI16
2392 BFD_RELOC_PJ_CODE_LO16
2394 BFD_RELOC_PJ_CODE_DIR16
2396 BFD_RELOC_PJ_CODE_DIR32
2398 BFD_RELOC_PJ_CODE_REL16
2400 BFD_RELOC_PJ_CODE_REL32
2402 Picojava relocs. Not all of these appear in object files.
2413 BFD_RELOC_PPC_B16_BRTAKEN
2415 BFD_RELOC_PPC_B16_BRNTAKEN
2419 BFD_RELOC_PPC_BA16_BRTAKEN
2421 BFD_RELOC_PPC_BA16_BRNTAKEN
2425 BFD_RELOC_PPC_GLOB_DAT
2427 BFD_RELOC_PPC_JMP_SLOT
2429 BFD_RELOC_PPC_RELATIVE
2431 BFD_RELOC_PPC_LOCAL24PC
2433 BFD_RELOC_PPC_EMB_NADDR32
2435 BFD_RELOC_PPC_EMB_NADDR16
2437 BFD_RELOC_PPC_EMB_NADDR16_LO
2439 BFD_RELOC_PPC_EMB_NADDR16_HI
2441 BFD_RELOC_PPC_EMB_NADDR16_HA
2443 BFD_RELOC_PPC_EMB_SDAI16
2445 BFD_RELOC_PPC_EMB_SDA2I16
2447 BFD_RELOC_PPC_EMB_SDA2REL
2449 BFD_RELOC_PPC_EMB_SDA21
2451 BFD_RELOC_PPC_EMB_MRKREF
2453 BFD_RELOC_PPC_EMB_RELSEC16
2455 BFD_RELOC_PPC_EMB_RELST_LO
2457 BFD_RELOC_PPC_EMB_RELST_HI
2459 BFD_RELOC_PPC_EMB_RELST_HA
2461 BFD_RELOC_PPC_EMB_BIT_FLD
2463 BFD_RELOC_PPC_EMB_RELSDA
2465 BFD_RELOC_PPC64_HIGHER
2467 BFD_RELOC_PPC64_HIGHER_S
2469 BFD_RELOC_PPC64_HIGHEST
2471 BFD_RELOC_PPC64_HIGHEST_S
2473 BFD_RELOC_PPC64_TOC16_LO
2475 BFD_RELOC_PPC64_TOC16_HI
2477 BFD_RELOC_PPC64_TOC16_HA
2481 BFD_RELOC_PPC64_PLTGOT16
2483 BFD_RELOC_PPC64_PLTGOT16_LO
2485 BFD_RELOC_PPC64_PLTGOT16_HI
2487 BFD_RELOC_PPC64_PLTGOT16_HA
2489 BFD_RELOC_PPC64_ADDR16_DS
2491 BFD_RELOC_PPC64_ADDR16_LO_DS
2493 BFD_RELOC_PPC64_GOT16_DS
2495 BFD_RELOC_PPC64_GOT16_LO_DS
2497 BFD_RELOC_PPC64_PLT16_LO_DS
2499 BFD_RELOC_PPC64_SECTOFF_DS
2501 BFD_RELOC_PPC64_SECTOFF_LO_DS
2503 BFD_RELOC_PPC64_TOC16_DS
2505 BFD_RELOC_PPC64_TOC16_LO_DS
2507 BFD_RELOC_PPC64_PLTGOT16_DS
2509 BFD_RELOC_PPC64_PLTGOT16_LO_DS
2511 Power(rs6000) and PowerPC relocations.
2516 BFD_RELOC_PPC_DTPMOD
2518 BFD_RELOC_PPC_TPREL16
2520 BFD_RELOC_PPC_TPREL16_LO
2522 BFD_RELOC_PPC_TPREL16_HI
2524 BFD_RELOC_PPC_TPREL16_HA
2528 BFD_RELOC_PPC_DTPREL16
2530 BFD_RELOC_PPC_DTPREL16_LO
2532 BFD_RELOC_PPC_DTPREL16_HI
2534 BFD_RELOC_PPC_DTPREL16_HA
2536 BFD_RELOC_PPC_DTPREL
2538 BFD_RELOC_PPC_GOT_TLSGD16
2540 BFD_RELOC_PPC_GOT_TLSGD16_LO
2542 BFD_RELOC_PPC_GOT_TLSGD16_HI
2544 BFD_RELOC_PPC_GOT_TLSGD16_HA
2546 BFD_RELOC_PPC_GOT_TLSLD16
2548 BFD_RELOC_PPC_GOT_TLSLD16_LO
2550 BFD_RELOC_PPC_GOT_TLSLD16_HI
2552 BFD_RELOC_PPC_GOT_TLSLD16_HA
2554 BFD_RELOC_PPC_GOT_TPREL16
2556 BFD_RELOC_PPC_GOT_TPREL16_LO
2558 BFD_RELOC_PPC_GOT_TPREL16_HI
2560 BFD_RELOC_PPC_GOT_TPREL16_HA
2562 BFD_RELOC_PPC_GOT_DTPREL16
2564 BFD_RELOC_PPC_GOT_DTPREL16_LO
2566 BFD_RELOC_PPC_GOT_DTPREL16_HI
2568 BFD_RELOC_PPC_GOT_DTPREL16_HA
2570 BFD_RELOC_PPC64_TPREL16_DS
2572 BFD_RELOC_PPC64_TPREL16_LO_DS
2574 BFD_RELOC_PPC64_TPREL16_HIGHER
2576 BFD_RELOC_PPC64_TPREL16_HIGHERA
2578 BFD_RELOC_PPC64_TPREL16_HIGHEST
2580 BFD_RELOC_PPC64_TPREL16_HIGHESTA
2582 BFD_RELOC_PPC64_DTPREL16_DS
2584 BFD_RELOC_PPC64_DTPREL16_LO_DS
2586 BFD_RELOC_PPC64_DTPREL16_HIGHER
2588 BFD_RELOC_PPC64_DTPREL16_HIGHERA
2590 BFD_RELOC_PPC64_DTPREL16_HIGHEST
2592 BFD_RELOC_PPC64_DTPREL16_HIGHESTA
2594 PowerPC and PowerPC64 thread-local storage relocations.
2599 IBM 370/390 relocations
2604 The type of reloc used to build a constructor table - at the moment
2605 probably a 32 bit wide absolute relocation, but the target can choose.
2606 It generally does map to one of the other relocation types.
2609 BFD_RELOC_ARM_PCREL_BRANCH
2611 ARM 26 bit pc-relative branch. The lowest two bits must be zero and are
2612 not stored in the instruction.
2614 BFD_RELOC_ARM_PCREL_BLX
2616 ARM 26 bit pc-relative branch. The lowest bit must be zero and is
2617 not stored in the instruction. The 2nd lowest bit comes from a 1 bit
2618 field in the instruction.
2620 BFD_RELOC_THUMB_PCREL_BLX
2622 Thumb 22 bit pc-relative branch. The lowest bit must be zero and is
2623 not stored in the instruction. The 2nd lowest bit comes from a 1 bit
2624 field in the instruction.
2626 BFD_RELOC_ARM_PCREL_CALL
2628 ARM 26-bit pc-relative branch for an unconditional BL or BLX instruction.
2630 BFD_RELOC_ARM_PCREL_JUMP
2632 ARM 26-bit pc-relative branch for B or conditional BL instruction.
2635 BFD_RELOC_THUMB_PCREL_BRANCH7
2637 BFD_RELOC_THUMB_PCREL_BRANCH9
2639 BFD_RELOC_THUMB_PCREL_BRANCH12
2641 BFD_RELOC_THUMB_PCREL_BRANCH20
2643 BFD_RELOC_THUMB_PCREL_BRANCH23
2645 BFD_RELOC_THUMB_PCREL_BRANCH25
2647 Thumb 7-, 9-, 12-, 20-, 23-, and 25-bit pc-relative branches.
2648 The lowest bit must be zero and is not stored in the instruction.
2649 Note that the corresponding ELF R_ARM_THM_JUMPnn constant has an
2650 "nn" one smaller in all cases. Note further that BRANCH23
2651 corresponds to R_ARM_THM_CALL.
2654 BFD_RELOC_ARM_OFFSET_IMM
2656 12-bit immediate offset, used in ARM-format ldr and str instructions.
2659 BFD_RELOC_ARM_THUMB_OFFSET
2661 5-bit immediate offset, used in Thumb-format ldr and str instructions.
2664 BFD_RELOC_ARM_TARGET1
2666 Pc-relative or absolute relocation depending on target. Used for
2667 entries in .init_array sections.
2669 BFD_RELOC_ARM_ROSEGREL32
2671 Read-only segment base relative address.
2673 BFD_RELOC_ARM_SBREL32
2675 Data segment base relative address.
2677 BFD_RELOC_ARM_TARGET2
2679 This reloc is used for references to RTTI data from exception handling
2680 tables. The actual definition depends on the target. It may be a
2681 pc-relative or some form of GOT-indirect relocation.
2683 BFD_RELOC_ARM_PREL31
2685 31-bit PC relative address.
2688 BFD_RELOC_ARM_JUMP_SLOT
2690 BFD_RELOC_ARM_GLOB_DAT
2696 BFD_RELOC_ARM_RELATIVE
2698 BFD_RELOC_ARM_GOTOFF
2702 Relocations for setting up GOTs and PLTs for shared libraries.
2705 BFD_RELOC_ARM_TLS_GD32
2707 BFD_RELOC_ARM_TLS_LDO32
2709 BFD_RELOC_ARM_TLS_LDM32
2711 BFD_RELOC_ARM_TLS_DTPOFF32
2713 BFD_RELOC_ARM_TLS_DTPMOD32
2715 BFD_RELOC_ARM_TLS_TPOFF32
2717 BFD_RELOC_ARM_TLS_IE32
2719 BFD_RELOC_ARM_TLS_LE32
2721 ARM thread-local storage relocations.
2724 BFD_RELOC_ARM_IMMEDIATE
2726 BFD_RELOC_ARM_ADRL_IMMEDIATE
2728 BFD_RELOC_ARM_T32_IMMEDIATE
2730 BFD_RELOC_ARM_T32_IMM12
2732 BFD_RELOC_ARM_T32_ADD_PC12
2734 BFD_RELOC_ARM_SHIFT_IMM
2742 BFD_RELOC_ARM_CP_OFF_IMM
2744 BFD_RELOC_ARM_CP_OFF_IMM_S2
2746 BFD_RELOC_ARM_T32_CP_OFF_IMM
2748 BFD_RELOC_ARM_T32_CP_OFF_IMM_S2
2750 BFD_RELOC_ARM_ADR_IMM
2752 BFD_RELOC_ARM_LDR_IMM
2754 BFD_RELOC_ARM_LITERAL
2756 BFD_RELOC_ARM_IN_POOL
2758 BFD_RELOC_ARM_OFFSET_IMM8
2760 BFD_RELOC_ARM_T32_OFFSET_U8
2762 BFD_RELOC_ARM_T32_OFFSET_IMM
2764 BFD_RELOC_ARM_HWLITERAL
2766 BFD_RELOC_ARM_THUMB_ADD
2768 BFD_RELOC_ARM_THUMB_IMM
2770 BFD_RELOC_ARM_THUMB_SHIFT
2772 These relocs are only used within the ARM assembler. They are not
2773 (at present) written to any object files.
2776 BFD_RELOC_SH_PCDISP8BY2
2778 BFD_RELOC_SH_PCDISP12BY2
2786 BFD_RELOC_SH_DISP12BY2
2788 BFD_RELOC_SH_DISP12BY4
2790 BFD_RELOC_SH_DISP12BY8
2794 BFD_RELOC_SH_DISP20BY8
2798 BFD_RELOC_SH_IMM4BY2
2800 BFD_RELOC_SH_IMM4BY4
2804 BFD_RELOC_SH_IMM8BY2
2806 BFD_RELOC_SH_IMM8BY4
2808 BFD_RELOC_SH_PCRELIMM8BY2
2810 BFD_RELOC_SH_PCRELIMM8BY4
2812 BFD_RELOC_SH_SWITCH16
2814 BFD_RELOC_SH_SWITCH32
2828 BFD_RELOC_SH_LOOP_START
2830 BFD_RELOC_SH_LOOP_END
2834 BFD_RELOC_SH_GLOB_DAT
2836 BFD_RELOC_SH_JMP_SLOT
2838 BFD_RELOC_SH_RELATIVE
2842 BFD_RELOC_SH_GOT_LOW16
2844 BFD_RELOC_SH_GOT_MEDLOW16
2846 BFD_RELOC_SH_GOT_MEDHI16
2848 BFD_RELOC_SH_GOT_HI16
2850 BFD_RELOC_SH_GOTPLT_LOW16
2852 BFD_RELOC_SH_GOTPLT_MEDLOW16
2854 BFD_RELOC_SH_GOTPLT_MEDHI16
2856 BFD_RELOC_SH_GOTPLT_HI16
2858 BFD_RELOC_SH_PLT_LOW16
2860 BFD_RELOC_SH_PLT_MEDLOW16
2862 BFD_RELOC_SH_PLT_MEDHI16
2864 BFD_RELOC_SH_PLT_HI16
2866 BFD_RELOC_SH_GOTOFF_LOW16
2868 BFD_RELOC_SH_GOTOFF_MEDLOW16
2870 BFD_RELOC_SH_GOTOFF_MEDHI16
2872 BFD_RELOC_SH_GOTOFF_HI16
2874 BFD_RELOC_SH_GOTPC_LOW16
2876 BFD_RELOC_SH_GOTPC_MEDLOW16
2878 BFD_RELOC_SH_GOTPC_MEDHI16
2880 BFD_RELOC_SH_GOTPC_HI16
2884 BFD_RELOC_SH_GLOB_DAT64
2886 BFD_RELOC_SH_JMP_SLOT64
2888 BFD_RELOC_SH_RELATIVE64
2890 BFD_RELOC_SH_GOT10BY4
2892 BFD_RELOC_SH_GOT10BY8
2894 BFD_RELOC_SH_GOTPLT10BY4
2896 BFD_RELOC_SH_GOTPLT10BY8
2898 BFD_RELOC_SH_GOTPLT32
2900 BFD_RELOC_SH_SHMEDIA_CODE
2906 BFD_RELOC_SH_IMMS6BY32
2912 BFD_RELOC_SH_IMMS10BY2
2914 BFD_RELOC_SH_IMMS10BY4
2916 BFD_RELOC_SH_IMMS10BY8
2922 BFD_RELOC_SH_IMM_LOW16
2924 BFD_RELOC_SH_IMM_LOW16_PCREL
2926 BFD_RELOC_SH_IMM_MEDLOW16
2928 BFD_RELOC_SH_IMM_MEDLOW16_PCREL
2930 BFD_RELOC_SH_IMM_MEDHI16
2932 BFD_RELOC_SH_IMM_MEDHI16_PCREL
2934 BFD_RELOC_SH_IMM_HI16
2936 BFD_RELOC_SH_IMM_HI16_PCREL
2940 BFD_RELOC_SH_TLS_GD_32
2942 BFD_RELOC_SH_TLS_LD_32
2944 BFD_RELOC_SH_TLS_LDO_32
2946 BFD_RELOC_SH_TLS_IE_32
2948 BFD_RELOC_SH_TLS_LE_32
2950 BFD_RELOC_SH_TLS_DTPMOD32
2952 BFD_RELOC_SH_TLS_DTPOFF32
2954 BFD_RELOC_SH_TLS_TPOFF32
2956 Renesas / SuperH SH relocs. Not all of these appear in object files.
2959 BFD_RELOC_ARC_B22_PCREL
2962 ARC 22 bit pc-relative branch. The lowest two bits must be zero and are
2963 not stored in the instruction. The high 20 bits are installed in bits 26
2964 through 7 of the instruction.
2968 ARC 26 bit absolute branch. The lowest two bits must be zero and are not
2969 stored in the instruction. The high 24 bits are installed in bits 23
2973 BFD_RELOC_BFIN_16_IMM
2975 ADI Blackfin 16 bit immediate absolute reloc.
2977 BFD_RELOC_BFIN_16_HIGH
2979 ADI Blackfin 16 bit immediate absolute reloc higher 16 bits.
2981 BFD_RELOC_BFIN_4_PCREL
2983 ADI Blackfin 'a' part of LSETUP.
2985 BFD_RELOC_BFIN_5_PCREL
2989 BFD_RELOC_BFIN_16_LOW
2991 ADI Blackfin 16 bit immediate absolute reloc lower 16 bits.
2993 BFD_RELOC_BFIN_10_PCREL
2997 BFD_RELOC_BFIN_11_PCREL
2999 ADI Blackfin 'b' part of LSETUP.
3001 BFD_RELOC_BFIN_12_PCREL_JUMP
3005 BFD_RELOC_BFIN_12_PCREL_JUMP_S
3007 ADI Blackfin Short jump, pcrel.
3009 BFD_RELOC_BFIN_24_PCREL_CALL_X
3011 ADI Blackfin Call.x not implemented.
3013 BFD_RELOC_BFIN_24_PCREL_JUMP_L
3015 ADI Blackfin Long Jump pcrel.
3019 ADI Blackfin GOT relocation.
3021 BFD_RELOC_BFIN_PLTPC
3023 ADI Blackfin PLTPC relocation.
3025 BFD_ARELOC_BFIN_PUSH
3027 ADI Blackfin arithmetic relocation.
3029 BFD_ARELOC_BFIN_CONST
3031 ADI Blackfin arithmetic relocation.
3035 ADI Blackfin arithmetic relocation.
3039 ADI Blackfin arithmetic relocation.
3041 BFD_ARELOC_BFIN_MULT
3043 ADI Blackfin arithmetic relocation.
3047 ADI Blackfin arithmetic relocation.
3051 ADI Blackfin arithmetic relocation.
3053 BFD_ARELOC_BFIN_LSHIFT
3055 ADI Blackfin arithmetic relocation.
3057 BFD_ARELOC_BFIN_RSHIFT
3059 ADI Blackfin arithmetic relocation.
3063 ADI Blackfin arithmetic relocation.
3067 ADI Blackfin arithmetic relocation.
3071 ADI Blackfin arithmetic relocation.
3073 BFD_ARELOC_BFIN_LAND
3075 ADI Blackfin arithmetic relocation.
3079 ADI Blackfin arithmetic relocation.
3083 ADI Blackfin arithmetic relocation.
3087 ADI Blackfin arithmetic relocation.
3089 BFD_ARELOC_BFIN_COMP
3091 ADI Blackfin arithmetic relocation.
3093 BFD_ARELOC_BFIN_PAGE
3095 ADI Blackfin arithmetic relocation.
3097 BFD_ARELOC_BFIN_HWPAGE
3099 ADI Blackfin arithmetic relocation.
3101 BFD_ARELOC_BFIN_ADDR
3103 ADI Blackfin arithmetic relocation.
3106 BFD_RELOC_D10V_10_PCREL_R
3108 Mitsubishi D10V relocs.
3109 This is a 10-bit reloc with the right 2 bits
3112 BFD_RELOC_D10V_10_PCREL_L
3114 Mitsubishi D10V relocs.
3115 This is a 10-bit reloc with the right 2 bits
3116 assumed to be 0. This is the same as the previous reloc
3117 except it is in the left container, i.e.,
3118 shifted left 15 bits.
3122 This is an 18-bit reloc with the right 2 bits
3125 BFD_RELOC_D10V_18_PCREL
3127 This is an 18-bit reloc with the right 2 bits
3133 Mitsubishi D30V relocs.
3134 This is a 6-bit absolute reloc.
3136 BFD_RELOC_D30V_9_PCREL
3138 This is a 6-bit pc-relative reloc with
3139 the right 3 bits assumed to be 0.
3141 BFD_RELOC_D30V_9_PCREL_R
3143 This is a 6-bit pc-relative reloc with
3144 the right 3 bits assumed to be 0. Same
3145 as the previous reloc but on the right side
3150 This is a 12-bit absolute reloc with the
3151 right 3 bitsassumed to be 0.
3153 BFD_RELOC_D30V_15_PCREL
3155 This is a 12-bit pc-relative reloc with
3156 the right 3 bits assumed to be 0.
3158 BFD_RELOC_D30V_15_PCREL_R
3160 This is a 12-bit pc-relative reloc with
3161 the right 3 bits assumed to be 0. Same
3162 as the previous reloc but on the right side
3167 This is an 18-bit absolute reloc with
3168 the right 3 bits assumed to be 0.
3170 BFD_RELOC_D30V_21_PCREL
3172 This is an 18-bit pc-relative reloc with
3173 the right 3 bits assumed to be 0.
3175 BFD_RELOC_D30V_21_PCREL_R
3177 This is an 18-bit pc-relative reloc with
3178 the right 3 bits assumed to be 0. Same
3179 as the previous reloc but on the right side
3184 This is a 32-bit absolute reloc.
3186 BFD_RELOC_D30V_32_PCREL
3188 This is a 32-bit pc-relative reloc.
3191 BFD_RELOC_DLX_HI16_S
3206 Renesas M16C/M32C Relocations.
3211 Renesas M32R (formerly Mitsubishi M32R) relocs.
3212 This is a 24 bit absolute address.
3214 BFD_RELOC_M32R_10_PCREL
3216 This is a 10-bit pc-relative reloc with the right 2 bits assumed to be 0.
3218 BFD_RELOC_M32R_18_PCREL
3220 This is an 18-bit reloc with the right 2 bits assumed to be 0.
3222 BFD_RELOC_M32R_26_PCREL
3224 This is a 26-bit reloc with the right 2 bits assumed to be 0.
3226 BFD_RELOC_M32R_HI16_ULO
3228 This is a 16-bit reloc containing the high 16 bits of an address
3229 used when the lower 16 bits are treated as unsigned.
3231 BFD_RELOC_M32R_HI16_SLO
3233 This is a 16-bit reloc containing the high 16 bits of an address
3234 used when the lower 16 bits are treated as signed.
3238 This is a 16-bit reloc containing the lower 16 bits of an address.
3240 BFD_RELOC_M32R_SDA16
3242 This is a 16-bit reloc containing the small data area offset for use in
3243 add3, load, and store instructions.
3245 BFD_RELOC_M32R_GOT24
3247 BFD_RELOC_M32R_26_PLTREL
3251 BFD_RELOC_M32R_GLOB_DAT
3253 BFD_RELOC_M32R_JMP_SLOT
3255 BFD_RELOC_M32R_RELATIVE
3257 BFD_RELOC_M32R_GOTOFF
3259 BFD_RELOC_M32R_GOTOFF_HI_ULO
3261 BFD_RELOC_M32R_GOTOFF_HI_SLO
3263 BFD_RELOC_M32R_GOTOFF_LO
3265 BFD_RELOC_M32R_GOTPC24
3267 BFD_RELOC_M32R_GOT16_HI_ULO
3269 BFD_RELOC_M32R_GOT16_HI_SLO
3271 BFD_RELOC_M32R_GOT16_LO
3273 BFD_RELOC_M32R_GOTPC_HI_ULO
3275 BFD_RELOC_M32R_GOTPC_HI_SLO
3277 BFD_RELOC_M32R_GOTPC_LO
3283 BFD_RELOC_V850_9_PCREL
3285 This is a 9-bit reloc
3287 BFD_RELOC_V850_22_PCREL
3289 This is a 22-bit reloc
3292 BFD_RELOC_V850_SDA_16_16_OFFSET
3294 This is a 16 bit offset from the short data area pointer.
3296 BFD_RELOC_V850_SDA_15_16_OFFSET
3298 This is a 16 bit offset (of which only 15 bits are used) from the
3299 short data area pointer.
3301 BFD_RELOC_V850_ZDA_16_16_OFFSET
3303 This is a 16 bit offset from the zero data area pointer.
3305 BFD_RELOC_V850_ZDA_15_16_OFFSET
3307 This is a 16 bit offset (of which only 15 bits are used) from the
3308 zero data area pointer.
3310 BFD_RELOC_V850_TDA_6_8_OFFSET
3312 This is an 8 bit offset (of which only 6 bits are used) from the
3313 tiny data area pointer.
3315 BFD_RELOC_V850_TDA_7_8_OFFSET
3317 This is an 8bit offset (of which only 7 bits are used) from the tiny
3320 BFD_RELOC_V850_TDA_7_7_OFFSET
3322 This is a 7 bit offset from the tiny data area pointer.
3324 BFD_RELOC_V850_TDA_16_16_OFFSET
3326 This is a 16 bit offset from the tiny data area pointer.
3329 BFD_RELOC_V850_TDA_4_5_OFFSET
3331 This is a 5 bit offset (of which only 4 bits are used) from the tiny
3334 BFD_RELOC_V850_TDA_4_4_OFFSET
3336 This is a 4 bit offset from the tiny data area pointer.
3338 BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET
3340 This is a 16 bit offset from the short data area pointer, with the
3341 bits placed non-contiguously in the instruction.
3343 BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET
3345 This is a 16 bit offset from the zero data area pointer, with the
3346 bits placed non-contiguously in the instruction.
3348 BFD_RELOC_V850_CALLT_6_7_OFFSET
3350 This is a 6 bit offset from the call table base pointer.
3352 BFD_RELOC_V850_CALLT_16_16_OFFSET
3354 This is a 16 bit offset from the call table base pointer.
3356 BFD_RELOC_V850_LONGCALL
3358 Used for relaxing indirect function calls.
3360 BFD_RELOC_V850_LONGJUMP
3362 Used for relaxing indirect jumps.
3364 BFD_RELOC_V850_ALIGN
3366 Used to maintain alignment whilst relaxing.
3368 BFD_RELOC_V850_LO16_SPLIT_OFFSET
3370 This is a variation of BFD_RELOC_LO16 that can be used in v850e ld.bu
3373 BFD_RELOC_MN10300_32_PCREL
3375 This is a 32bit pcrel reloc for the mn10300, offset by two bytes in the
3378 BFD_RELOC_MN10300_16_PCREL
3380 This is a 16bit pcrel reloc for the mn10300, offset by two bytes in the
3386 This is a 8bit DP reloc for the tms320c30, where the most
3387 significant 8 bits of a 24 bit word are placed into the least
3388 significant 8 bits of the opcode.
3391 BFD_RELOC_TIC54X_PARTLS7
3393 This is a 7bit reloc for the tms320c54x, where the least
3394 significant 7 bits of a 16 bit word are placed into the least
3395 significant 7 bits of the opcode.
3398 BFD_RELOC_TIC54X_PARTMS9
3400 This is a 9bit DP reloc for the tms320c54x, where the most
3401 significant 9 bits of a 16 bit word are placed into the least
3402 significant 9 bits of the opcode.
3407 This is an extended address 23-bit reloc for the tms320c54x.
3410 BFD_RELOC_TIC54X_16_OF_23
3412 This is a 16-bit reloc for the tms320c54x, where the least
3413 significant 16 bits of a 23-bit extended address are placed into
3417 BFD_RELOC_TIC54X_MS7_OF_23
3419 This is a reloc for the tms320c54x, where the most
3420 significant 7 bits of a 23-bit extended address are placed into
3426 This is a 48 bit reloc for the FR30 that stores 32 bits.
3430 This is a 32 bit reloc for the FR30 that stores 20 bits split up into
3433 BFD_RELOC_FR30_6_IN_4
3435 This is a 16 bit reloc for the FR30 that stores a 6 bit word offset in
3438 BFD_RELOC_FR30_8_IN_8
3440 This is a 16 bit reloc for the FR30 that stores an 8 bit byte offset
3443 BFD_RELOC_FR30_9_IN_8
3445 This is a 16 bit reloc for the FR30 that stores a 9 bit short offset
3448 BFD_RELOC_FR30_10_IN_8
3450 This is a 16 bit reloc for the FR30 that stores a 10 bit word offset
3453 BFD_RELOC_FR30_9_PCREL
3455 This is a 16 bit reloc for the FR30 that stores a 9 bit pc relative
3456 short offset into 8 bits.
3458 BFD_RELOC_FR30_12_PCREL
3460 This is a 16 bit reloc for the FR30 that stores a 12 bit pc relative
3461 short offset into 11 bits.
3464 BFD_RELOC_MCORE_PCREL_IMM8BY4
3466 BFD_RELOC_MCORE_PCREL_IMM11BY2
3468 BFD_RELOC_MCORE_PCREL_IMM4BY2
3470 BFD_RELOC_MCORE_PCREL_32
3472 BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2
3476 Motorola Mcore relocations.
3481 BFD_RELOC_MMIX_GETA_1
3483 BFD_RELOC_MMIX_GETA_2
3485 BFD_RELOC_MMIX_GETA_3
3487 These are relocations for the GETA instruction.
3489 BFD_RELOC_MMIX_CBRANCH
3491 BFD_RELOC_MMIX_CBRANCH_J
3493 BFD_RELOC_MMIX_CBRANCH_1
3495 BFD_RELOC_MMIX_CBRANCH_2
3497 BFD_RELOC_MMIX_CBRANCH_3
3499 These are relocations for a conditional branch instruction.
3501 BFD_RELOC_MMIX_PUSHJ
3503 BFD_RELOC_MMIX_PUSHJ_1
3505 BFD_RELOC_MMIX_PUSHJ_2
3507 BFD_RELOC_MMIX_PUSHJ_3
3509 BFD_RELOC_MMIX_PUSHJ_STUBBABLE
3511 These are relocations for the PUSHJ instruction.
3515 BFD_RELOC_MMIX_JMP_1
3517 BFD_RELOC_MMIX_JMP_2
3519 BFD_RELOC_MMIX_JMP_3
3521 These are relocations for the JMP instruction.
3523 BFD_RELOC_MMIX_ADDR19
3525 This is a relocation for a relative address as in a GETA instruction or
3528 BFD_RELOC_MMIX_ADDR27
3530 This is a relocation for a relative address as in a JMP instruction.
3532 BFD_RELOC_MMIX_REG_OR_BYTE
3534 This is a relocation for an instruction field that may be a general
3535 register or a value 0..255.
3539 This is a relocation for an instruction field that may be a general
3542 BFD_RELOC_MMIX_BASE_PLUS_OFFSET
3544 This is a relocation for two instruction fields holding a register and
3545 an offset, the equivalent of the relocation.
3547 BFD_RELOC_MMIX_LOCAL
3549 This relocation is an assertion that the expression is not allocated as
3550 a global register. It does not modify contents.
3553 BFD_RELOC_AVR_7_PCREL
3555 This is a 16 bit reloc for the AVR that stores 8 bit pc relative
3556 short offset into 7 bits.
3558 BFD_RELOC_AVR_13_PCREL
3560 This is a 16 bit reloc for the AVR that stores 13 bit pc relative
3561 short offset into 12 bits.
3565 This is a 16 bit reloc for the AVR that stores 17 bit value (usually
3566 program memory address) into 16 bits.
3568 BFD_RELOC_AVR_LO8_LDI
3570 This is a 16 bit reloc for the AVR that stores 8 bit value (usually
3571 data memory address) into 8 bit immediate value of LDI insn.
3573 BFD_RELOC_AVR_HI8_LDI
3575 This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
3576 of data memory address) into 8 bit immediate value of LDI insn.
3578 BFD_RELOC_AVR_HH8_LDI
3580 This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
3581 of program memory address) into 8 bit immediate value of LDI insn.
3583 BFD_RELOC_AVR_LO8_LDI_NEG
3585 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3586 (usually data memory address) into 8 bit immediate value of SUBI insn.
3588 BFD_RELOC_AVR_HI8_LDI_NEG
3590 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3591 (high 8 bit of data memory address) into 8 bit immediate value of
3594 BFD_RELOC_AVR_HH8_LDI_NEG
3596 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3597 (most high 8 bit of program memory address) into 8 bit immediate value
3598 of LDI or SUBI insn.
3600 BFD_RELOC_AVR_LO8_LDI_PM
3602 This is a 16 bit reloc for the AVR that stores 8 bit value (usually
3603 command address) into 8 bit immediate value of LDI insn.
3605 BFD_RELOC_AVR_HI8_LDI_PM
3607 This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
3608 of command address) into 8 bit immediate value of LDI insn.
3610 BFD_RELOC_AVR_HH8_LDI_PM
3612 This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
3613 of command address) into 8 bit immediate value of LDI insn.
3615 BFD_RELOC_AVR_LO8_LDI_PM_NEG
3617 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3618 (usually command address) into 8 bit immediate value of SUBI insn.
3620 BFD_RELOC_AVR_HI8_LDI_PM_NEG
3622 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3623 (high 8 bit of 16 bit command address) into 8 bit immediate value
3626 BFD_RELOC_AVR_HH8_LDI_PM_NEG
3628 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3629 (high 6 bit of 22 bit command address) into 8 bit immediate
3634 This is a 32 bit reloc for the AVR that stores 23 bit value
3639 This is a 16 bit reloc for the AVR that stores all needed bits
3640 for absolute addressing with ldi with overflow check to linktime
3644 This is a 6 bit reloc for the AVR that stores offset for ldd/std
3647 BFD_RELOC_AVR_6_ADIW
3649 This is a 6 bit reloc for the AVR that stores offset for adiw/sbiw
3663 32 bit PC relative PLT address.
3667 Copy symbol at runtime.
3669 BFD_RELOC_390_GLOB_DAT
3673 BFD_RELOC_390_JMP_SLOT
3677 BFD_RELOC_390_RELATIVE
3679 Adjust by program base.
3683 32 bit PC relative offset to GOT.
3689 BFD_RELOC_390_PC16DBL
3691 PC relative 16 bit shifted by 1.
3693 BFD_RELOC_390_PLT16DBL
3695 16 bit PC rel. PLT shifted by 1.
3697 BFD_RELOC_390_PC32DBL
3699 PC relative 32 bit shifted by 1.
3701 BFD_RELOC_390_PLT32DBL
3703 32 bit PC rel. PLT shifted by 1.
3705 BFD_RELOC_390_GOTPCDBL
3707 32 bit PC rel. GOT shifted by 1.
3715 64 bit PC relative PLT address.
3717 BFD_RELOC_390_GOTENT
3719 32 bit rel. offset to GOT entry.
3721 BFD_RELOC_390_GOTOFF64
3723 64 bit offset to GOT.
3725 BFD_RELOC_390_GOTPLT12
3727 12-bit offset to symbol-entry within GOT, with PLT handling.
3729 BFD_RELOC_390_GOTPLT16
3731 16-bit offset to symbol-entry within GOT, with PLT handling.
3733 BFD_RELOC_390_GOTPLT32
3735 32-bit offset to symbol-entry within GOT, with PLT handling.
3737 BFD_RELOC_390_GOTPLT64
3739 64-bit offset to symbol-entry within GOT, with PLT handling.
3741 BFD_RELOC_390_GOTPLTENT
3743 32-bit rel. offset to symbol-entry within GOT, with PLT handling.
3745 BFD_RELOC_390_PLTOFF16
3747 16-bit rel. offset from the GOT to a PLT entry.
3749 BFD_RELOC_390_PLTOFF32
3751 32-bit rel. offset from the GOT to a PLT entry.
3753 BFD_RELOC_390_PLTOFF64
3755 64-bit rel. offset from the GOT to a PLT entry.
3758 BFD_RELOC_390_TLS_LOAD
3760 BFD_RELOC_390_TLS_GDCALL
3762 BFD_RELOC_390_TLS_LDCALL
3764 BFD_RELOC_390_TLS_GD32
3766 BFD_RELOC_390_TLS_GD64
3768 BFD_RELOC_390_TLS_GOTIE12
3770 BFD_RELOC_390_TLS_GOTIE32
3772 BFD_RELOC_390_TLS_GOTIE64
3774 BFD_RELOC_390_TLS_LDM32
3776 BFD_RELOC_390_TLS_LDM64
3778 BFD_RELOC_390_TLS_IE32
3780 BFD_RELOC_390_TLS_IE64
3782 BFD_RELOC_390_TLS_IEENT
3784 BFD_RELOC_390_TLS_LE32
3786 BFD_RELOC_390_TLS_LE64
3788 BFD_RELOC_390_TLS_LDO32
3790 BFD_RELOC_390_TLS_LDO64
3792 BFD_RELOC_390_TLS_DTPMOD
3794 BFD_RELOC_390_TLS_DTPOFF
3796 BFD_RELOC_390_TLS_TPOFF
3798 s390 tls relocations.
3805 BFD_RELOC_390_GOTPLT20
3807 BFD_RELOC_390_TLS_GOTIE20
3809 Long displacement extension.
3814 Scenix IP2K - 9-bit register number / data address
3818 Scenix IP2K - 4-bit register/data bank number
3820 BFD_RELOC_IP2K_ADDR16CJP
3822 Scenix IP2K - low 13 bits of instruction word address
3824 BFD_RELOC_IP2K_PAGE3
3826 Scenix IP2K - high 3 bits of instruction word address
3828 BFD_RELOC_IP2K_LO8DATA
3830 BFD_RELOC_IP2K_HI8DATA
3832 BFD_RELOC_IP2K_EX8DATA
3834 Scenix IP2K - ext/low/high 8 bits of data address
3836 BFD_RELOC_IP2K_LO8INSN
3838 BFD_RELOC_IP2K_HI8INSN
3840 Scenix IP2K - low/high 8 bits of instruction word address
3842 BFD_RELOC_IP2K_PC_SKIP
3844 Scenix IP2K - even/odd PC modifier to modify snb pcl.0
3848 Scenix IP2K - 16 bit word address in text section.
3850 BFD_RELOC_IP2K_FR_OFFSET
3852 Scenix IP2K - 7-bit sp or dp offset
3854 BFD_RELOC_VPE4KMATH_DATA
3856 BFD_RELOC_VPE4KMATH_INSN
3858 Scenix VPE4K coprocessor - data/insn-space addressing
3861 BFD_RELOC_VTABLE_INHERIT
3863 BFD_RELOC_VTABLE_ENTRY
3865 These two relocations are used by the linker to determine which of
3866 the entries in a C++ virtual function table are actually used. When
3867 the --gc-sections option is given, the linker will zero out the entries
3868 that are not used, so that the code for those functions need not be
3869 included in the output.
3871 VTABLE_INHERIT is a zero-space relocation used to describe to the
3872 linker the inheritance tree of a C++ virtual function table. The
3873 relocation's symbol should be the parent class' vtable, and the
3874 relocation should be located at the child vtable.
3876 VTABLE_ENTRY is a zero-space relocation that describes the use of a
3877 virtual function table entry. The reloc's symbol should refer to the
3878 table of the class mentioned in the code. Off of that base, an offset
3879 describes the entry that is being used. For Rela hosts, this offset
3880 is stored in the reloc's addend. For Rel hosts, we are forced to put
3881 this offset in the reloc's section offset.
3884 BFD_RELOC_IA64_IMM14
3886 BFD_RELOC_IA64_IMM22
3888 BFD_RELOC_IA64_IMM64
3890 BFD_RELOC_IA64_DIR32MSB
3892 BFD_RELOC_IA64_DIR32LSB
3894 BFD_RELOC_IA64_DIR64MSB
3896 BFD_RELOC_IA64_DIR64LSB
3898 BFD_RELOC_IA64_GPREL22
3900 BFD_RELOC_IA64_GPREL64I
3902 BFD_RELOC_IA64_GPREL32MSB
3904 BFD_RELOC_IA64_GPREL32LSB
3906 BFD_RELOC_IA64_GPREL64MSB
3908 BFD_RELOC_IA64_GPREL64LSB
3910 BFD_RELOC_IA64_LTOFF22
3912 BFD_RELOC_IA64_LTOFF64I
3914 BFD_RELOC_IA64_PLTOFF22
3916 BFD_RELOC_IA64_PLTOFF64I
3918 BFD_RELOC_IA64_PLTOFF64MSB
3920 BFD_RELOC_IA64_PLTOFF64LSB
3922 BFD_RELOC_IA64_FPTR64I
3924 BFD_RELOC_IA64_FPTR32MSB
3926 BFD_RELOC_IA64_FPTR32LSB
3928 BFD_RELOC_IA64_FPTR64MSB
3930 BFD_RELOC_IA64_FPTR64LSB
3932 BFD_RELOC_IA64_PCREL21B
3934 BFD_RELOC_IA64_PCREL21BI
3936 BFD_RELOC_IA64_PCREL21M
3938 BFD_RELOC_IA64_PCREL21F
3940 BFD_RELOC_IA64_PCREL22
3942 BFD_RELOC_IA64_PCREL60B
3944 BFD_RELOC_IA64_PCREL64I
3946 BFD_RELOC_IA64_PCREL32MSB
3948 BFD_RELOC_IA64_PCREL32LSB
3950 BFD_RELOC_IA64_PCREL64MSB
3952 BFD_RELOC_IA64_PCREL64LSB
3954 BFD_RELOC_IA64_LTOFF_FPTR22
3956 BFD_RELOC_IA64_LTOFF_FPTR64I
3958 BFD_RELOC_IA64_LTOFF_FPTR32MSB
3960 BFD_RELOC_IA64_LTOFF_FPTR32LSB
3962 BFD_RELOC_IA64_LTOFF_FPTR64MSB
3964 BFD_RELOC_IA64_LTOFF_FPTR64LSB
3966 BFD_RELOC_IA64_SEGREL32MSB
3968 BFD_RELOC_IA64_SEGREL32LSB
3970 BFD_RELOC_IA64_SEGREL64MSB
3972 BFD_RELOC_IA64_SEGREL64LSB
3974 BFD_RELOC_IA64_SECREL32MSB
3976 BFD_RELOC_IA64_SECREL32LSB
3978 BFD_RELOC_IA64_SECREL64MSB
3980 BFD_RELOC_IA64_SECREL64LSB
3982 BFD_RELOC_IA64_REL32MSB
3984 BFD_RELOC_IA64_REL32LSB
3986 BFD_RELOC_IA64_REL64MSB
3988 BFD_RELOC_IA64_REL64LSB
3990 BFD_RELOC_IA64_LTV32MSB
3992 BFD_RELOC_IA64_LTV32LSB
3994 BFD_RELOC_IA64_LTV64MSB
3996 BFD_RELOC_IA64_LTV64LSB
3998 BFD_RELOC_IA64_IPLTMSB
4000 BFD_RELOC_IA64_IPLTLSB
4004 BFD_RELOC_IA64_LTOFF22X
4006 BFD_RELOC_IA64_LDXMOV
4008 BFD_RELOC_IA64_TPREL14
4010 BFD_RELOC_IA64_TPREL22
4012 BFD_RELOC_IA64_TPREL64I
4014 BFD_RELOC_IA64_TPREL64MSB
4016 BFD_RELOC_IA64_TPREL64LSB
4018 BFD_RELOC_IA64_LTOFF_TPREL22
4020 BFD_RELOC_IA64_DTPMOD64MSB
4022 BFD_RELOC_IA64_DTPMOD64LSB
4024 BFD_RELOC_IA64_LTOFF_DTPMOD22
4026 BFD_RELOC_IA64_DTPREL14
4028 BFD_RELOC_IA64_DTPREL22
4030 BFD_RELOC_IA64_DTPREL64I
4032 BFD_RELOC_IA64_DTPREL32MSB
4034 BFD_RELOC_IA64_DTPREL32LSB
4036 BFD_RELOC_IA64_DTPREL64MSB
4038 BFD_RELOC_IA64_DTPREL64LSB
4040 BFD_RELOC_IA64_LTOFF_DTPREL22
4042 Intel IA64 Relocations.
4045 BFD_RELOC_M68HC11_HI8
4047 Motorola 68HC11 reloc.
4048 This is the 8 bit high part of an absolute address.
4050 BFD_RELOC_M68HC11_LO8
4052 Motorola 68HC11 reloc.
4053 This is the 8 bit low part of an absolute address.
4055 BFD_RELOC_M68HC11_3B
4057 Motorola 68HC11 reloc.
4058 This is the 3 bit of a value.
4060 BFD_RELOC_M68HC11_RL_JUMP
4062 Motorola 68HC11 reloc.
4063 This reloc marks the beginning of a jump/call instruction.
4064 It is used for linker relaxation to correctly identify beginning
4065 of instruction and change some branches to use PC-relative
4068 BFD_RELOC_M68HC11_RL_GROUP
4070 Motorola 68HC11 reloc.
4071 This reloc marks a group of several instructions that gcc generates
4072 and for which the linker relaxation pass can modify and/or remove
4075 BFD_RELOC_M68HC11_LO16
4077 Motorola 68HC11 reloc.
4078 This is the 16-bit lower part of an address. It is used for 'call'
4079 instruction to specify the symbol address without any special
4080 transformation (due to memory bank window).
4082 BFD_RELOC_M68HC11_PAGE
4084 Motorola 68HC11 reloc.
4085 This is a 8-bit reloc that specifies the page number of an address.
4086 It is used by 'call' instruction to specify the page number of
4089 BFD_RELOC_M68HC11_24
4091 Motorola 68HC11 reloc.
4092 This is a 24-bit reloc that represents the address with a 16-bit
4093 value and a 8-bit page number. The symbol address is transformed
4094 to follow the 16K memory bank of 68HC12 (seen as mapped in the window).
4096 BFD_RELOC_M68HC12_5B
4098 Motorola 68HC12 reloc.
4099 This is the 5 bits of a value.
4104 BFD_RELOC_16C_NUM08_C
4108 BFD_RELOC_16C_NUM16_C
4112 BFD_RELOC_16C_NUM32_C
4114 BFD_RELOC_16C_DISP04
4116 BFD_RELOC_16C_DISP04_C
4118 BFD_RELOC_16C_DISP08
4120 BFD_RELOC_16C_DISP08_C
4122 BFD_RELOC_16C_DISP16
4124 BFD_RELOC_16C_DISP16_C
4126 BFD_RELOC_16C_DISP24
4128 BFD_RELOC_16C_DISP24_C
4130 BFD_RELOC_16C_DISP24a
4132 BFD_RELOC_16C_DISP24a_C
4136 BFD_RELOC_16C_REG04_C
4138 BFD_RELOC_16C_REG04a
4140 BFD_RELOC_16C_REG04a_C
4144 BFD_RELOC_16C_REG14_C
4148 BFD_RELOC_16C_REG16_C
4152 BFD_RELOC_16C_REG20_C
4156 BFD_RELOC_16C_ABS20_C
4160 BFD_RELOC_16C_ABS24_C
4164 BFD_RELOC_16C_IMM04_C
4168 BFD_RELOC_16C_IMM16_C
4172 BFD_RELOC_16C_IMM20_C
4176 BFD_RELOC_16C_IMM24_C
4180 BFD_RELOC_16C_IMM32_C
4182 NS CR16C Relocations.
4189 BFD_RELOC_CRX_REL8_CMP
4197 BFD_RELOC_CRX_REGREL12
4199 BFD_RELOC_CRX_REGREL22
4201 BFD_RELOC_CRX_REGREL28
4203 BFD_RELOC_CRX_REGREL32
4219 BFD_RELOC_CRX_SWITCH8
4221 BFD_RELOC_CRX_SWITCH16
4223 BFD_RELOC_CRX_SWITCH32
4228 BFD_RELOC_CRIS_BDISP8
4230 BFD_RELOC_CRIS_UNSIGNED_5
4232 BFD_RELOC_CRIS_SIGNED_6
4234 BFD_RELOC_CRIS_UNSIGNED_6
4236 BFD_RELOC_CRIS_SIGNED_8
4238 BFD_RELOC_CRIS_UNSIGNED_8
4240 BFD_RELOC_CRIS_SIGNED_16
4242 BFD_RELOC_CRIS_UNSIGNED_16
4244 BFD_RELOC_CRIS_LAPCQ_OFFSET
4246 BFD_RELOC_CRIS_UNSIGNED_4
4248 These relocs are only used within the CRIS assembler. They are not
4249 (at present) written to any object files.
4253 BFD_RELOC_CRIS_GLOB_DAT
4255 BFD_RELOC_CRIS_JUMP_SLOT
4257 BFD_RELOC_CRIS_RELATIVE
4259 Relocs used in ELF shared libraries for CRIS.
4261 BFD_RELOC_CRIS_32_GOT
4263 32-bit offset to symbol-entry within GOT.
4265 BFD_RELOC_CRIS_16_GOT
4267 16-bit offset to symbol-entry within GOT.
4269 BFD_RELOC_CRIS_32_GOTPLT
4271 32-bit offset to symbol-entry within GOT, with PLT handling.
4273 BFD_RELOC_CRIS_16_GOTPLT
4275 16-bit offset to symbol-entry within GOT, with PLT handling.
4277 BFD_RELOC_CRIS_32_GOTREL
4279 32-bit offset to symbol, relative to GOT.
4281 BFD_RELOC_CRIS_32_PLT_GOTREL
4283 32-bit offset to symbol with PLT entry, relative to GOT.
4285 BFD_RELOC_CRIS_32_PLT_PCREL
4287 32-bit offset to symbol with PLT entry, relative to this relocation.
4292 BFD_RELOC_860_GLOB_DAT
4294 BFD_RELOC_860_JUMP_SLOT
4296 BFD_RELOC_860_RELATIVE
4306 BFD_RELOC_860_SPLIT0
4310 BFD_RELOC_860_SPLIT1
4314 BFD_RELOC_860_SPLIT2
4318 BFD_RELOC_860_LOGOT0
4320 BFD_RELOC_860_SPGOT0
4322 BFD_RELOC_860_LOGOT1
4324 BFD_RELOC_860_SPGOT1
4326 BFD_RELOC_860_LOGOTOFF0
4328 BFD_RELOC_860_SPGOTOFF0
4330 BFD_RELOC_860_LOGOTOFF1
4332 BFD_RELOC_860_SPGOTOFF1
4334 BFD_RELOC_860_LOGOTOFF2
4336 BFD_RELOC_860_LOGOTOFF3
4340 BFD_RELOC_860_HIGHADJ
4344 BFD_RELOC_860_HAGOTOFF
4352 BFD_RELOC_860_HIGOTOFF
4354 Intel i860 Relocations.
4357 BFD_RELOC_OPENRISC_ABS_26
4359 BFD_RELOC_OPENRISC_REL_26
4361 OpenRISC Relocations.
4364 BFD_RELOC_H8_DIR16A8
4366 BFD_RELOC_H8_DIR16R8
4368 BFD_RELOC_H8_DIR24A8
4370 BFD_RELOC_H8_DIR24R8
4372 BFD_RELOC_H8_DIR32A16
4377 BFD_RELOC_XSTORMY16_REL_12
4379 BFD_RELOC_XSTORMY16_12
4381 BFD_RELOC_XSTORMY16_24
4383 BFD_RELOC_XSTORMY16_FPTR16
4385 Sony Xstormy16 Relocations.
4396 Infineon Relocations.
4399 BFD_RELOC_VAX_GLOB_DAT
4401 BFD_RELOC_VAX_JMP_SLOT
4403 BFD_RELOC_VAX_RELATIVE
4405 Relocations used by VAX ELF.
4410 Morpho MT - 16 bit immediate relocation.
4414 Morpho MT - Hi 16 bits of an address.
4418 Morpho MT - Low 16 bits of an address.
4420 BFD_RELOC_MT_GNU_VTINHERIT
4422 Morpho MT - Used to tell the linker which vtable entries are used.
4424 BFD_RELOC_MT_GNU_VTENTRY
4426 Morpho MT - Used to tell the linker which vtable entries are used.
4428 BFD_RELOC_MT_PCINSN8
4430 Morpho MT - 8 bit immediate relocation.
4433 BFD_RELOC_MSP430_10_PCREL
4435 BFD_RELOC_MSP430_16_PCREL
4439 BFD_RELOC_MSP430_16_PCREL_BYTE
4441 BFD_RELOC_MSP430_16_BYTE
4443 BFD_RELOC_MSP430_2X_PCREL
4445 BFD_RELOC_MSP430_RL_PCREL
4447 msp430 specific relocation codes
4450 BFD_RELOC_IQ2000_OFFSET_16
4452 BFD_RELOC_IQ2000_OFFSET_21
4454 BFD_RELOC_IQ2000_UHI16
4459 BFD_RELOC_XTENSA_RTLD
4461 Special Xtensa relocation used only by PLT entries in ELF shared
4462 objects to indicate that the runtime linker should set the value
4463 to one of its own internal functions or data structures.
4465 BFD_RELOC_XTENSA_GLOB_DAT
4467 BFD_RELOC_XTENSA_JMP_SLOT
4469 BFD_RELOC_XTENSA_RELATIVE
4471 Xtensa relocations for ELF shared objects.
4473 BFD_RELOC_XTENSA_PLT
4475 Xtensa relocation used in ELF object files for symbols that may require
4476 PLT entries. Otherwise, this is just a generic 32-bit relocation.
4478 BFD_RELOC_XTENSA_DIFF8
4480 BFD_RELOC_XTENSA_DIFF16
4482 BFD_RELOC_XTENSA_DIFF32
4484 Xtensa relocations to mark the difference of two local symbols.
4485 These are only needed to support linker relaxation and can be ignored
4486 when not relaxing. The field is set to the value of the difference
4487 assuming no relaxation. The relocation encodes the position of the
4488 first symbol so the linker can determine whether to adjust the field
4491 BFD_RELOC_XTENSA_SLOT0_OP
4493 BFD_RELOC_XTENSA_SLOT1_OP
4495 BFD_RELOC_XTENSA_SLOT2_OP
4497 BFD_RELOC_XTENSA_SLOT3_OP
4499 BFD_RELOC_XTENSA_SLOT4_OP
4501 BFD_RELOC_XTENSA_SLOT5_OP
4503 BFD_RELOC_XTENSA_SLOT6_OP
4505 BFD_RELOC_XTENSA_SLOT7_OP
4507 BFD_RELOC_XTENSA_SLOT8_OP
4509 BFD_RELOC_XTENSA_SLOT9_OP
4511 BFD_RELOC_XTENSA_SLOT10_OP
4513 BFD_RELOC_XTENSA_SLOT11_OP
4515 BFD_RELOC_XTENSA_SLOT12_OP
4517 BFD_RELOC_XTENSA_SLOT13_OP
4519 BFD_RELOC_XTENSA_SLOT14_OP
4521 Generic Xtensa relocations for instruction operands. Only the slot
4522 number is encoded in the relocation. The relocation applies to the
4523 last PC-relative immediate operand, or if there are no PC-relative
4524 immediates, to the last immediate operand.
4526 BFD_RELOC_XTENSA_SLOT0_ALT
4528 BFD_RELOC_XTENSA_SLOT1_ALT
4530 BFD_RELOC_XTENSA_SLOT2_ALT
4532 BFD_RELOC_XTENSA_SLOT3_ALT
4534 BFD_RELOC_XTENSA_SLOT4_ALT
4536 BFD_RELOC_XTENSA_SLOT5_ALT
4538 BFD_RELOC_XTENSA_SLOT6_ALT
4540 BFD_RELOC_XTENSA_SLOT7_ALT
4542 BFD_RELOC_XTENSA_SLOT8_ALT
4544 BFD_RELOC_XTENSA_SLOT9_ALT
4546 BFD_RELOC_XTENSA_SLOT10_ALT
4548 BFD_RELOC_XTENSA_SLOT11_ALT
4550 BFD_RELOC_XTENSA_SLOT12_ALT
4552 BFD_RELOC_XTENSA_SLOT13_ALT
4554 BFD_RELOC_XTENSA_SLOT14_ALT
4556 Alternate Xtensa relocations. Only the slot is encoded in the
4557 relocation. The meaning of these relocations is opcode-specific.
4559 BFD_RELOC_XTENSA_OP0
4561 BFD_RELOC_XTENSA_OP1
4563 BFD_RELOC_XTENSA_OP2
4565 Xtensa relocations for backward compatibility. These have all been
4566 replaced by BFD_RELOC_XTENSA_SLOT0_OP.
4568 BFD_RELOC_XTENSA_ASM_EXPAND
4570 Xtensa relocation to mark that the assembler expanded the
4571 instructions from an original target. The expansion size is
4572 encoded in the reloc size.
4574 BFD_RELOC_XTENSA_ASM_SIMPLIFY
4576 Xtensa relocation to mark that the linker should simplify
4577 assembler-expanded instructions. This is commonly used
4578 internally by the linker after analysis of a
4579 BFD_RELOC_XTENSA_ASM_EXPAND.
4584 8 bit signed offset in (ix+d) or (iy+d).
4603 .typedef enum bfd_reloc_code_real bfd_reloc_code_real_type;
4608 bfd_reloc_type_lookup
4611 reloc_howto_type *bfd_reloc_type_lookup
4612 (bfd *abfd, bfd_reloc_code_real_type code);
4615 Return a pointer to a howto structure which, when
4616 invoked, will perform the relocation @var{code} on data from the
4622 bfd_reloc_type_lookup (bfd
*abfd
, bfd_reloc_code_real_type code
)
4624 return BFD_SEND (abfd
, reloc_type_lookup
, (abfd
, code
));
4627 static reloc_howto_type bfd_howto_32
=
4628 HOWTO (0, 00, 2, 32, FALSE
, 0, complain_overflow_dont
, 0, "VRT32", FALSE
, 0xffffffff, 0xffffffff, TRUE
);
4632 bfd_default_reloc_type_lookup
4635 reloc_howto_type *bfd_default_reloc_type_lookup
4636 (bfd *abfd, bfd_reloc_code_real_type code);
4639 Provides a default relocation lookup routine for any architecture.
4644 bfd_default_reloc_type_lookup (bfd
*abfd
, bfd_reloc_code_real_type code
)
4648 case BFD_RELOC_CTOR
:
4649 /* The type of reloc used in a ctor, which will be as wide as the
4650 address - so either a 64, 32, or 16 bitter. */
4651 switch (bfd_get_arch_info (abfd
)->bits_per_address
)
4656 return &bfd_howto_32
;
4670 bfd_get_reloc_code_name
4673 const char *bfd_get_reloc_code_name (bfd_reloc_code_real_type code);
4676 Provides a printable name for the supplied relocation code.
4677 Useful mainly for printing error messages.
4681 bfd_get_reloc_code_name (bfd_reloc_code_real_type code
)
4683 if (code
> BFD_RELOC_UNUSED
)
4685 return bfd_reloc_code_real_names
[code
];
4690 bfd_generic_relax_section
4693 bfd_boolean bfd_generic_relax_section
4696 struct bfd_link_info *,
4700 Provides default handling for relaxing for back ends which
4705 bfd_generic_relax_section (bfd
*abfd ATTRIBUTE_UNUSED
,
4706 asection
*section ATTRIBUTE_UNUSED
,
4707 struct bfd_link_info
*link_info ATTRIBUTE_UNUSED
,
4716 bfd_generic_gc_sections
4719 bfd_boolean bfd_generic_gc_sections
4720 (bfd *, struct bfd_link_info *);
4723 Provides default handling for relaxing for back ends which
4724 don't do section gc -- i.e., does nothing.
4728 bfd_generic_gc_sections (bfd
*abfd ATTRIBUTE_UNUSED
,
4729 struct bfd_link_info
*info ATTRIBUTE_UNUSED
)
4736 bfd_generic_merge_sections
4739 bfd_boolean bfd_generic_merge_sections
4740 (bfd *, struct bfd_link_info *);
4743 Provides default handling for SEC_MERGE section merging for back ends
4744 which don't have SEC_MERGE support -- i.e., does nothing.
4748 bfd_generic_merge_sections (bfd
*abfd ATTRIBUTE_UNUSED
,
4749 struct bfd_link_info
*link_info ATTRIBUTE_UNUSED
)
4756 bfd_generic_get_relocated_section_contents
4759 bfd_byte *bfd_generic_get_relocated_section_contents
4761 struct bfd_link_info *link_info,
4762 struct bfd_link_order *link_order,
4764 bfd_boolean relocatable,
4768 Provides default handling of relocation effort for back ends
4769 which can't be bothered to do it efficiently.
4774 bfd_generic_get_relocated_section_contents (bfd
*abfd
,
4775 struct bfd_link_info
*link_info
,
4776 struct bfd_link_order
*link_order
,
4778 bfd_boolean relocatable
,
4781 /* Get enough memory to hold the stuff. */
4782 bfd
*input_bfd
= link_order
->u
.indirect
.section
->owner
;
4783 asection
*input_section
= link_order
->u
.indirect
.section
;
4785 long reloc_size
= bfd_get_reloc_upper_bound (input_bfd
, input_section
);
4786 arelent
**reloc_vector
= NULL
;
4793 reloc_vector
= bfd_malloc (reloc_size
);
4794 if (reloc_vector
== NULL
&& reloc_size
!= 0)
4797 /* Read in the section. */
4798 sz
= input_section
->rawsize
? input_section
->rawsize
: input_section
->size
;
4799 if (!bfd_get_section_contents (input_bfd
, input_section
, data
, 0, sz
))
4802 reloc_count
= bfd_canonicalize_reloc (input_bfd
,
4806 if (reloc_count
< 0)
4809 if (reloc_count
> 0)
4812 for (parent
= reloc_vector
; *parent
!= NULL
; parent
++)
4814 char *error_message
= NULL
;
4815 bfd_reloc_status_type r
=
4816 bfd_perform_relocation (input_bfd
,
4820 relocatable
? abfd
: NULL
,
4825 asection
*os
= input_section
->output_section
;
4827 /* A partial link, so keep the relocs. */
4828 os
->orelocation
[os
->reloc_count
] = *parent
;
4832 if (r
!= bfd_reloc_ok
)
4836 case bfd_reloc_undefined
:
4837 if (!((*link_info
->callbacks
->undefined_symbol
)
4838 (link_info
, bfd_asymbol_name (*(*parent
)->sym_ptr_ptr
),
4839 input_bfd
, input_section
, (*parent
)->address
,
4843 case bfd_reloc_dangerous
:
4844 BFD_ASSERT (error_message
!= NULL
);
4845 if (!((*link_info
->callbacks
->reloc_dangerous
)
4846 (link_info
, error_message
, input_bfd
, input_section
,
4847 (*parent
)->address
)))
4850 case bfd_reloc_overflow
:
4851 if (!((*link_info
->callbacks
->reloc_overflow
)
4853 bfd_asymbol_name (*(*parent
)->sym_ptr_ptr
),
4854 (*parent
)->howto
->name
, (*parent
)->addend
,
4855 input_bfd
, input_section
, (*parent
)->address
)))
4858 case bfd_reloc_outofrange
:
4867 if (reloc_vector
!= NULL
)
4868 free (reloc_vector
);
4872 if (reloc_vector
!= NULL
)
4873 free (reloc_vector
);