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Regenerate translation files.
[binutils.git] / bfd / elf32-msp430.c
blob879edf042db74a98ff884de6fd43043cf3536cdd
1 /* MSP430-specific support for 32-bit ELF
2 Copyright (C) 2002, 2003, 2004, 2005, 2006, 2007
3 Free Software Foundation, Inc.
4 Contributed by Dmitry Diky <diwil@mail.ru>
5
6 This file is part of BFD, the Binary File Descriptor library.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
21 MA 02110-1301, USA. */
22
23 #include "sysdep.h"
24 #include "bfd.h"
25 #include "libiberty.h"
26 #include "libbfd.h"
27 #include "elf-bfd.h"
28 #include "elf/msp430.h"
29
30 /* Use RELA instead of REL. */
31 #undef USE_REL
32
33 static reloc_howto_type elf_msp430_howto_table[] =
34 {
35 HOWTO (R_MSP430_NONE, /* type */
36 0, /* rightshift */
37 2, /* size (0 = byte, 1 = short, 2 = long) */
38 32, /* bitsize */
39 FALSE, /* pc_relative */
40 0, /* bitpos */
41 complain_overflow_bitfield,/* complain_on_overflow */
42 bfd_elf_generic_reloc, /* special_function */
43 "R_MSP430_NONE", /* name */
44 FALSE, /* partial_inplace */
45 0, /* src_mask */
46 0, /* dst_mask */
47 FALSE), /* pcrel_offset */
48
49 HOWTO (R_MSP430_32, /* type */
50 0, /* rightshift */
51 2, /* size (0 = byte, 1 = short, 2 = long) */
52 32, /* bitsize */
53 FALSE, /* pc_relative */
54 0, /* bitpos */
55 complain_overflow_bitfield,/* complain_on_overflow */
56 bfd_elf_generic_reloc, /* special_function */
57 "R_MSP430_32", /* name */
58 FALSE, /* partial_inplace */
59 0xffffffff, /* src_mask */
60 0xffffffff, /* dst_mask */
61 FALSE), /* pcrel_offset */
62
63 /* A 13 bit PC relative relocation. */
64 HOWTO (R_MSP430_10_PCREL, /* type */
65 1, /* rightshift */
66 1, /* size (0 = byte, 1 = short, 2 = long) */
67 10, /* bitsize */
68 TRUE, /* pc_relative */
69 0, /* bitpos */
70 complain_overflow_bitfield,/* complain_on_overflow */
71 bfd_elf_generic_reloc, /* special_function */
72 "R_MSP430_13_PCREL", /* name */
73 FALSE, /* partial_inplace */
74 0xfff, /* src_mask */
75 0xfff, /* dst_mask */
76 TRUE), /* pcrel_offset */
77
78 /* A 16 bit absolute relocation. */
79 HOWTO (R_MSP430_16, /* type */
80 0, /* rightshift */
81 1, /* size (0 = byte, 1 = short, 2 = long) */
82 16, /* bitsize */
83 FALSE, /* pc_relative */
84 0, /* bitpos */
85 complain_overflow_dont,/* complain_on_overflow */
86 bfd_elf_generic_reloc, /* special_function */
87 "R_MSP430_16", /* name */
88 FALSE, /* partial_inplace */
89 0, /* src_mask */
90 0xffff, /* dst_mask */
91 FALSE), /* pcrel_offset */
92
93 /* A 16 bit absolute relocation for command address. */
94 HOWTO (R_MSP430_16_PCREL, /* type */
95 1, /* rightshift */
96 1, /* size (0 = byte, 1 = short, 2 = long) */
97 16, /* bitsize */
98 TRUE, /* pc_relative */
99 0, /* bitpos */
100 complain_overflow_dont,/* complain_on_overflow */
101 bfd_elf_generic_reloc, /* special_function */
102 "R_MSP430_16_PCREL", /* name */
103 FALSE, /* partial_inplace */
104 0, /* src_mask */
105 0xffff, /* dst_mask */
106 TRUE), /* pcrel_offset */
107
108 /* A 16 bit absolute relocation, byte operations. */
109 HOWTO (R_MSP430_16_BYTE, /* type */
110 0, /* rightshift */
111 1, /* size (0 = byte, 1 = short, 2 = long) */
112 16, /* bitsize */
113 FALSE, /* pc_relative */
114 0, /* bitpos */
115 complain_overflow_dont,/* complain_on_overflow */
116 bfd_elf_generic_reloc, /* special_function */
117 "R_MSP430_16_BYTE", /* name */
118 FALSE, /* partial_inplace */
119 0xffff, /* src_mask */
120 0xffff, /* dst_mask */
121 FALSE), /* pcrel_offset */
122
123 /* A 16 bit absolute relocation for command address. */
124 HOWTO (R_MSP430_16_PCREL_BYTE,/* type */
125 1, /* rightshift */
126 1, /* size (0 = byte, 1 = short, 2 = long) */
127 16, /* bitsize */
128 TRUE, /* pc_relative */
129 0, /* bitpos */
130 complain_overflow_dont,/* complain_on_overflow */
131 bfd_elf_generic_reloc, /* special_function */
132 "R_MSP430_16_PCREL_BYTE",/* name */
133 FALSE, /* partial_inplace */
134 0xffff, /* src_mask */
135 0xffff, /* dst_mask */
136 TRUE), /* pcrel_offset */
137
138 /* A 13 bit PC relative relocation for complicated polymorphs. */
139 HOWTO (R_MSP430_2X_PCREL, /* type */
140 1, /* rightshift */
141 2, /* size (0 = byte, 1 = short, 2 = long) */
142 10, /* bitsize */
143 TRUE, /* pc_relative */
144 0, /* bitpos */
145 complain_overflow_bitfield,/* complain_on_overflow */
146 bfd_elf_generic_reloc, /* special_function */
147 "R_MSP430_2X_PCREL", /* name */
148 FALSE, /* partial_inplace */
149 0xfff, /* src_mask */
150 0xfff, /* dst_mask */
151 TRUE), /* pcrel_offset */
152
153 /* A 16 bit relaxable relocation for command address. */
154 HOWTO (R_MSP430_RL_PCREL, /* type */
155 1, /* rightshift */
156 1, /* size (0 = byte, 1 = short, 2 = long) */
157 16, /* bitsize */
158 TRUE, /* pc_relative */
159 0, /* bitpos */
160 complain_overflow_dont,/* complain_on_overflow */
161 bfd_elf_generic_reloc, /* special_function */
162 "R_MSP430_RL_PCREL", /* name */
163 FALSE, /* partial_inplace */
164 0, /* src_mask */
165 0xffff, /* dst_mask */
166 TRUE) /* pcrel_offset */
167 };
168
169 /* Map BFD reloc types to MSP430 ELF reloc types. */
170
171 struct msp430_reloc_map
172 {
173 bfd_reloc_code_real_type bfd_reloc_val;
174 unsigned int elf_reloc_val;
175 };
176
177 static const struct msp430_reloc_map msp430_reloc_map[] =
178 {
179 {BFD_RELOC_NONE, R_MSP430_NONE},
180 {BFD_RELOC_32, R_MSP430_32},
181 {BFD_RELOC_MSP430_10_PCREL, R_MSP430_10_PCREL},
182 {BFD_RELOC_16, R_MSP430_16_BYTE},
183 {BFD_RELOC_MSP430_16_PCREL, R_MSP430_16_PCREL},
184 {BFD_RELOC_MSP430_16, R_MSP430_16},
185 {BFD_RELOC_MSP430_16_PCREL_BYTE, R_MSP430_16_PCREL_BYTE},
186 {BFD_RELOC_MSP430_16_BYTE, R_MSP430_16_BYTE},
187 {BFD_RELOC_MSP430_2X_PCREL, R_MSP430_2X_PCREL},
188 {BFD_RELOC_MSP430_RL_PCREL, R_MSP430_RL_PCREL}
189 };
190
191 static reloc_howto_type *
192 bfd_elf32_bfd_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
193 bfd_reloc_code_real_type code)
194 {
195 unsigned int i;
196
197 for (i = 0; i < ARRAY_SIZE (msp430_reloc_map); i++)
198 if (msp430_reloc_map[i].bfd_reloc_val == code)
199 return &elf_msp430_howto_table[msp430_reloc_map[i].elf_reloc_val];
200
201 return NULL;
202 }
203
204 static reloc_howto_type *
205 bfd_elf32_bfd_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
206 const char *r_name)
207 {
208 unsigned int i;
209
210 for (i = 0;
211 i < (sizeof (elf_msp430_howto_table)
212 / sizeof (elf_msp430_howto_table[0]));
213 i++)
214 if (elf_msp430_howto_table[i].name != NULL
215 && strcasecmp (elf_msp430_howto_table[i].name, r_name) == 0)
216 return &elf_msp430_howto_table[i];
217
218 return NULL;
219 }
220
221 /* Set the howto pointer for an MSP430 ELF reloc. */
222
223 static void
224 msp430_info_to_howto_rela (bfd * abfd ATTRIBUTE_UNUSED,
225 arelent * cache_ptr,
226 Elf_Internal_Rela * dst)
227 {
228 unsigned int r_type;
229
230 r_type = ELF32_R_TYPE (dst->r_info);
231 BFD_ASSERT (r_type < (unsigned int) R_MSP430_max);
232 cache_ptr->howto = &elf_msp430_howto_table[r_type];
233 }
234
235 /* Look through the relocs for a section during the first phase.
236 Since we don't do .gots or .plts, we just need to consider the
237 virtual table relocs for gc. */
238
239 static bfd_boolean
240 elf32_msp430_check_relocs (bfd * abfd, struct bfd_link_info * info,
241 asection * sec, const Elf_Internal_Rela * relocs)
242 {
243 Elf_Internal_Shdr *symtab_hdr;
244 struct elf_link_hash_entry **sym_hashes, **sym_hashes_end;
245 const Elf_Internal_Rela *rel;
246 const Elf_Internal_Rela *rel_end;
247
248 if (info->relocatable)
249 return TRUE;
250
251 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
252 sym_hashes = elf_sym_hashes (abfd);
253 sym_hashes_end =
254 sym_hashes + symtab_hdr->sh_size / sizeof (Elf32_External_Sym);
255 if (!elf_bad_symtab (abfd))
256 sym_hashes_end -= symtab_hdr->sh_info;
257
258 rel_end = relocs + sec->reloc_count;
259 for (rel = relocs; rel < rel_end; rel++)
260 {
261 struct elf_link_hash_entry *h;
262 unsigned long r_symndx;
263
264 r_symndx = ELF32_R_SYM (rel->r_info);
265 if (r_symndx < symtab_hdr->sh_info)
266 h = NULL;
267 else
268 {
269 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
270 while (h->root.type == bfd_link_hash_indirect
271 || h->root.type == bfd_link_hash_warning)
272 h = (struct elf_link_hash_entry *) h->root.u.i.link;
273 }
274 }
275
276 return TRUE;
277 }
278
279 /* Perform a single relocation. By default we use the standard BFD
280 routines, but a few relocs, we have to do them ourselves. */
281
282 static bfd_reloc_status_type
283 msp430_final_link_relocate (reloc_howto_type * howto, bfd * input_bfd,
284 asection * input_section, bfd_byte * contents,
285 Elf_Internal_Rela * rel, bfd_vma relocation)
286 {
287 bfd_reloc_status_type r = bfd_reloc_ok;
288 bfd_vma x;
289 bfd_signed_vma srel;
290
291 switch (howto->type)
292 {
293 case R_MSP430_10_PCREL:
294 contents += rel->r_offset;
295 srel = (bfd_signed_vma) relocation;
296 srel += rel->r_addend;
297 srel -= rel->r_offset;
298 srel -= 2; /* Branch instructions add 2 to the PC... */
299 srel -= (input_section->output_section->vma +
300 input_section->output_offset);
301
302 if (srel & 1)
303 return bfd_reloc_outofrange;
304
305 /* MSP430 addresses commands as words. */
306 srel >>= 1;
307
308 /* Check for an overflow. */
309 if (srel < -512 || srel > 511)
310 return bfd_reloc_overflow;
311
312 x = bfd_get_16 (input_bfd, contents);
313 x = (x & 0xfc00) | (srel & 0x3ff);
314 bfd_put_16 (input_bfd, x, contents);
315 break;
316
317 case R_MSP430_2X_PCREL:
318 contents += rel->r_offset;
319 srel = (bfd_signed_vma) relocation;
320 srel += rel->r_addend;
321 srel -= rel->r_offset;
322 srel -= 2; /* Branch instructions add 2 to the PC... */
323 srel -= (input_section->output_section->vma +
324 input_section->output_offset);
325
326 if (srel & 1)
327 return bfd_reloc_outofrange;
328
329 /* MSP430 addresses commands as words. */
330 srel >>= 1;
331
332 /* Check for an overflow. */
333 if (srel < -512 || srel > 511)
334 return bfd_reloc_overflow;
335
336 x = bfd_get_16 (input_bfd, contents);
337 x = (x & 0xfc00) | (srel & 0x3ff);
338 bfd_put_16 (input_bfd, x, contents);
339 /* Handle second jump instruction. */
340 x = bfd_get_16 (input_bfd, contents - 2);
341 srel += 1;
342 x = (x & 0xfc00) | (srel & 0x3ff);
343 bfd_put_16 (input_bfd, x, contents - 2);
344 break;
345
346 case R_MSP430_16_PCREL:
347 case R_MSP430_RL_PCREL:
348 contents += rel->r_offset;
349 srel = (bfd_signed_vma) relocation;
350 srel += rel->r_addend;
351 srel -= rel->r_offset;
352 /* Only branch instructions add 2 to the PC... */
353 srel -= (input_section->output_section->vma +
354 input_section->output_offset);
355
356 if (srel & 1)
357 return bfd_reloc_outofrange;
358
359 bfd_put_16 (input_bfd, srel & 0xffff, contents);
360 break;
361
362 case R_MSP430_16_PCREL_BYTE:
363 contents += rel->r_offset;
364 srel = (bfd_signed_vma) relocation;
365 srel += rel->r_addend;
366 srel -= rel->r_offset;
367 /* Only branch instructions add 2 to the PC... */
368 srel -= (input_section->output_section->vma +
369 input_section->output_offset);
370
371 bfd_put_16 (input_bfd, srel & 0xffff, contents);
372 break;
373
374 case R_MSP430_16_BYTE:
375 contents += rel->r_offset;
376 srel = (bfd_signed_vma) relocation;
377 srel += rel->r_addend;
378 bfd_put_16 (input_bfd, srel & 0xffff, contents);
379 break;
380
381 case R_MSP430_16:
382 contents += rel->r_offset;
383 srel = (bfd_signed_vma) relocation;
384 srel += rel->r_addend;
385
386 if (srel & 1)
387 return bfd_reloc_notsupported;
388
389 bfd_put_16 (input_bfd, srel & 0xffff, contents);
390 break;
391
392 default:
393 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
394 contents, rel->r_offset,
395 relocation, rel->r_addend);
396 }
397
398 return r;
399 }
400
401 /* Relocate an MSP430 ELF section. */
402
403 static bfd_boolean
404 elf32_msp430_relocate_section (bfd * output_bfd ATTRIBUTE_UNUSED,
405 struct bfd_link_info * info,
406 bfd * input_bfd,
407 asection * input_section,
408 bfd_byte * contents,
409 Elf_Internal_Rela * relocs,
410 Elf_Internal_Sym * local_syms,
411 asection ** local_sections)
412 {
413 Elf_Internal_Shdr *symtab_hdr;
414 struct elf_link_hash_entry **sym_hashes;
415 Elf_Internal_Rela *rel;
416 Elf_Internal_Rela *relend;
417
418 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
419 sym_hashes = elf_sym_hashes (input_bfd);
420 relend = relocs + input_section->reloc_count;
421
422 for (rel = relocs; rel < relend; rel++)
423 {
424 reloc_howto_type *howto;
425 unsigned long r_symndx;
426 Elf_Internal_Sym *sym;
427 asection *sec;
428 struct elf_link_hash_entry *h;
429 bfd_vma relocation;
430 bfd_reloc_status_type r;
431 const char *name = NULL;
432 int r_type;
433
434 r_type = ELF32_R_TYPE (rel->r_info);
435 r_symndx = ELF32_R_SYM (rel->r_info);
436 howto = elf_msp430_howto_table + ELF32_R_TYPE (rel->r_info);
437 h = NULL;
438 sym = NULL;
439 sec = NULL;
440
441 if (r_symndx < symtab_hdr->sh_info)
442 {
443 sym = local_syms + r_symndx;
444 sec = local_sections[r_symndx];
445 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
446
447 name = bfd_elf_string_from_elf_section
448 (input_bfd, symtab_hdr->sh_link, sym->st_name);
449 name = (name == NULL) ? bfd_section_name (input_bfd, sec) : name;
450 }
451 else
452 {
453 bfd_boolean unresolved_reloc, warned;
454
455 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
456 r_symndx, symtab_hdr, sym_hashes,
457 h, sec, relocation,
458 unresolved_reloc, warned);
459 }
460
461 if (sec != NULL && elf_discarded_section (sec))
462 {
463 /* For relocs against symbols from removed linkonce sections,
464 or sections discarded by a linker script, we just want the
465 section contents zeroed. Avoid any special processing. */
466 _bfd_clear_contents (howto, input_bfd, contents + rel->r_offset);
467 rel->r_info = 0;
468 rel->r_addend = 0;
469 continue;
470 }
471
472 if (info->relocatable)
473 continue;
474
475 r = msp430_final_link_relocate (howto, input_bfd, input_section,
476 contents, rel, relocation);
477
478 if (r != bfd_reloc_ok)
479 {
480 const char *msg = (const char *) NULL;
481
482 switch (r)
483 {
484 case bfd_reloc_overflow:
485 r = info->callbacks->reloc_overflow
486 (info, (h ? &h->root : NULL), name, howto->name,
487 (bfd_vma) 0, input_bfd, input_section,
488 rel->r_offset);
489 break;
490
491 case bfd_reloc_undefined:
492 r = info->callbacks->undefined_symbol
493 (info, name, input_bfd, input_section, rel->r_offset, TRUE);
494 break;
495
496 case bfd_reloc_outofrange:
497 msg = _("internal error: out of range error");
498 break;
499
500 case bfd_reloc_notsupported:
501 msg = _("internal error: unsupported relocation error");
502 break;
503
504 case bfd_reloc_dangerous:
505 msg = _("internal error: dangerous relocation");
506 break;
507
508 default:
509 msg = _("internal error: unknown error");
510 break;
511 }
512
513 if (msg)
514 r = info->callbacks->warning
515 (info, msg, name, input_bfd, input_section, rel->r_offset);
516
517 if (!r)
518 return FALSE;
519 }
520
521 }
522
523 return TRUE;
524 }
525
526 /* The final processing done just before writing out a MSP430 ELF object
527 file. This gets the MSP430 architecture right based on the machine
528 number. */
529
530 static void
531 bfd_elf_msp430_final_write_processing (bfd * abfd,
532 bfd_boolean linker ATTRIBUTE_UNUSED)
533 {
534 unsigned long val;
535
536 switch (bfd_get_mach (abfd))
537 {
538 default:
539 case bfd_mach_msp110:
540 val = E_MSP430_MACH_MSP430x11x1;
541 break;
542
543 case bfd_mach_msp11:
544 val = E_MSP430_MACH_MSP430x11;
545 break;
546
547 case bfd_mach_msp12:
548 val = E_MSP430_MACH_MSP430x12;
549 break;
550
551 case bfd_mach_msp13:
552 val = E_MSP430_MACH_MSP430x13;
553 break;
554
555 case bfd_mach_msp14:
556 val = E_MSP430_MACH_MSP430x14;
557 break;
558
559 case bfd_mach_msp15:
560 val = E_MSP430_MACH_MSP430x15;
561 break;
562
563 case bfd_mach_msp16:
564 val = E_MSP430_MACH_MSP430x16;
565 break;
566
567 case bfd_mach_msp31:
568 val = E_MSP430_MACH_MSP430x31;
569 break;
570
571 case bfd_mach_msp32:
572 val = E_MSP430_MACH_MSP430x32;
573 break;
574
575 case bfd_mach_msp33:
576 val = E_MSP430_MACH_MSP430x33;
577 break;
578
579 case bfd_mach_msp41:
580 val = E_MSP430_MACH_MSP430x41;
581 break;
582
583 case bfd_mach_msp42:
584 val = E_MSP430_MACH_MSP430x42;
585 break;
586
587 case bfd_mach_msp43:
588 val = E_MSP430_MACH_MSP430x43;
589 break;
590
591 case bfd_mach_msp44:
592 val = E_MSP430_MACH_MSP430x44;
593 break;
594 }
595
596 elf_elfheader (abfd)->e_machine = EM_MSP430;
597 elf_elfheader (abfd)->e_flags &= ~EF_MSP430_MACH;
598 elf_elfheader (abfd)->e_flags |= val;
599 }
600
601 /* Set the right machine number. */
602
603 static bfd_boolean
604 elf32_msp430_object_p (bfd * abfd)
605 {
606 int e_set = bfd_mach_msp14;
607
608 if (elf_elfheader (abfd)->e_machine == EM_MSP430
609 || elf_elfheader (abfd)->e_machine == EM_MSP430_OLD)
610 {
611 int e_mach = elf_elfheader (abfd)->e_flags & EF_MSP430_MACH;
612
613 switch (e_mach)
614 {
615 default:
616 case E_MSP430_MACH_MSP430x11:
617 e_set = bfd_mach_msp11;
618 break;
619
620 case E_MSP430_MACH_MSP430x11x1:
621 e_set = bfd_mach_msp110;
622 break;
623
624 case E_MSP430_MACH_MSP430x12:
625 e_set = bfd_mach_msp12;
626 break;
627
628 case E_MSP430_MACH_MSP430x13:
629 e_set = bfd_mach_msp13;
630 break;
631
632 case E_MSP430_MACH_MSP430x14:
633 e_set = bfd_mach_msp14;
634 break;
635
636 case E_MSP430_MACH_MSP430x15:
637 e_set = bfd_mach_msp15;
638 break;
639
640 case E_MSP430_MACH_MSP430x16:
641 e_set = bfd_mach_msp16;
642 break;
643
644 case E_MSP430_MACH_MSP430x31:
645 e_set = bfd_mach_msp31;
646 break;
647
648 case E_MSP430_MACH_MSP430x32:
649 e_set = bfd_mach_msp32;
650 break;
651
652 case E_MSP430_MACH_MSP430x33:
653 e_set = bfd_mach_msp33;
654 break;
655
656 case E_MSP430_MACH_MSP430x41:
657 e_set = bfd_mach_msp41;
658 break;
659
660 case E_MSP430_MACH_MSP430x42:
661 e_set = bfd_mach_msp42;
662 break;
663
664 case E_MSP430_MACH_MSP430x43:
665 e_set = bfd_mach_msp43;
666 break;
667
668 case E_MSP430_MACH_MSP430x44:
669 e_set = bfd_mach_msp44;
670 break;
671 }
672 }
673
674 return bfd_default_set_arch_mach (abfd, bfd_arch_msp430, e_set);
675 }
676
677 /* These functions handle relaxing for the msp430.
678 Relaxation required only in two cases:
679 - Bad hand coding like jumps from one section to another or
680 from file to file.
681 - Sibling calls. This will affect onlu 'jump label' polymorph. Without
682 relaxing this enlarges code by 2 bytes. Sibcalls implemented but
683 do not work in gcc's port by the reason I do not know.
684 Anyway, if a relaxation required, user should pass -relax option to the
685 linker.
686
687 There are quite a few relaxing opportunities available on the msp430:
688
689 ================================================================
690
691 1. 3 words -> 1 word
692
693 eq == jeq label jne +4; br lab
694 ne != jne label jeq +4; br lab
695 lt < jl label jge +4; br lab
696 ltu < jlo label lhs +4; br lab
697 ge >= jge label jl +4; br lab
698 geu >= jhs label jlo +4; br lab
699
700 2. 4 words -> 1 word
701
702 ltn < jn jn +2; jmp +4; br lab
703
704 3. 4 words -> 2 words
705
706 gt > jeq +2; jge label jeq +6; jl +4; br label
707 gtu > jeq +2; jhs label jeq +6; jlo +4; br label
708
709 4. 4 words -> 2 words and 2 labels
710
711 leu <= jeq label; jlo label jeq +2; jhs +4; br label
712 le <= jeq label; jl label jeq +2; jge +4; br label
713 =================================================================
714
715 codemap for first cases is (labels masked ):
716 eq: 0x2002,0x4010,0x0000 -> 0x2400
717 ne: 0x2402,0x4010,0x0000 -> 0x2000
718 lt: 0x3402,0x4010,0x0000 -> 0x3800
719 ltu: 0x2c02,0x4010,0x0000 -> 0x2800
720 ge: 0x3802,0x4010,0x0000 -> 0x3400
721 geu: 0x2802,0x4010,0x0000 -> 0x2c00
722
723 second case:
724 ltn: 0x3001,0x3c02,0x4010,0x0000 -> 0x3000
725
726 third case:
727 gt: 0x2403,0x3802,0x4010,0x0000 -> 0x2401,0x3400
728 gtu: 0x2403,0x2802,0x4010,0x0000 -> 0x2401,0x2c00
729
730 fourth case:
731 leu: 0x2401,0x2c02,0x4010,0x0000 -> 0x2400,0x2800
732 le: 0x2401,0x3402,0x4010,0x0000 -> 0x2400,0x3800
733
734 Unspecified case :)
735 jump: 0x4010,0x0000 -> 0x3c00. */
736
737 #define NUMB_RELAX_CODES 12
738 static struct rcodes_s
739 {
740 int f0, f1; /* From code. */
741 int t0, t1; /* To code. */
742 int labels; /* Position of labels: 1 - one label at first
743 word, 2 - one at second word, 3 - two
744 labels at both. */
745 int cdx; /* Words to match. */
746 int bs; /* Shrink bytes. */
747 int off; /* Offset from old label for new code. */
748 int ncl; /* New code length. */
749 } rcode[] =
750 {/* lab,cdx,bs,off,ncl */
751 { 0x0000, 0x0000, 0x3c00, 0x0000, 1, 0, 2, 2, 2}, /* jump */
752 { 0x0000, 0x2002, 0x2400, 0x0000, 1, 1, 4, 4, 2}, /* eq */
753 { 0x0000, 0x2402, 0x2000, 0x0000, 1, 1, 4, 4, 2}, /* ne */
754 { 0x0000, 0x3402, 0x3800, 0x0000, 1, 1, 4, 4, 2}, /* lt */
755 { 0x0000, 0x2c02, 0x2800, 0x0000, 1, 1, 4, 4, 2}, /* ltu */
756 { 0x0000, 0x3802, 0x3400, 0x0000, 1, 1, 4, 4, 2}, /* ge */
757 { 0x0000, 0x2802, 0x2c00, 0x0000, 1, 1, 4, 4, 2}, /* geu */
758 { 0x3001, 0x3c02, 0x3000, 0x0000, 1, 2, 6, 6, 2}, /* ltn */
759 { 0x2403, 0x3802, 0x2401, 0x3400, 2, 2, 4, 6, 4}, /* gt */
760 { 0x2403, 0x2802, 0x2401, 0x2c00, 2, 2, 4, 6, 4}, /* gtu */
761 { 0x2401, 0x2c02, 0x2400, 0x2800, 3, 2, 4, 6, 4}, /* leu , 2 labels */
762 { 0x2401, 0x2c02, 0x2400, 0x2800, 3, 2, 4, 6, 4}, /* le , 2 labels */
763 { 0, 0, 0, 0, 0, 0, 0, 0, 0}
764 };
765
766 /* Return TRUE if a symbol exists at the given address. */
767
768 static bfd_boolean
769 msp430_elf_symbol_address_p (bfd * abfd,
770 asection * sec,
771 Elf_Internal_Sym * isym,
772 bfd_vma addr)
773 {
774 Elf_Internal_Shdr *symtab_hdr;
775 unsigned int sec_shndx;
776 Elf_Internal_Sym *isymend;
777 struct elf_link_hash_entry **sym_hashes;
778 struct elf_link_hash_entry **end_hashes;
779 unsigned int symcount;
780
781 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
782
783 /* Examine all the local symbols. */
784 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
785 for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
786 if (isym->st_shndx == sec_shndx && isym->st_value == addr)
787 return TRUE;
788
789 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
790 - symtab_hdr->sh_info);
791 sym_hashes = elf_sym_hashes (abfd);
792 end_hashes = sym_hashes + symcount;
793 for (; sym_hashes < end_hashes; sym_hashes++)
794 {
795 struct elf_link_hash_entry *sym_hash = *sym_hashes;
796
797 if ((sym_hash->root.type == bfd_link_hash_defined
798 || sym_hash->root.type == bfd_link_hash_defweak)
799 && sym_hash->root.u.def.section == sec
800 && sym_hash->root.u.def.value == addr)
801 return TRUE;
802 }
803
804 return FALSE;
805 }
806
807 /* Adjust all local symbols defined as '.section + 0xXXXX' (.section has sec_shndx)
808 referenced from current and other sections */
809 static bfd_boolean
810 msp430_elf_relax_adjust_locals(bfd * abfd, asection * sec, bfd_vma addr,
811 int count, unsigned int sec_shndx, bfd_vma toaddr)
812 {
813 Elf_Internal_Shdr *symtab_hdr;
814 Elf_Internal_Rela *irel;
815 Elf_Internal_Rela *irelend;
816 Elf_Internal_Sym *isym;
817
818 irel = elf_section_data (sec)->relocs;
819 irelend = irel + sec->reloc_count;
820 symtab_hdr = & elf_tdata (abfd)->symtab_hdr;
821 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
822
823 for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
824 {
825 int sidx = ELF32_R_SYM(irel->r_info);
826 Elf_Internal_Sym *lsym = isym + sidx;
827
828 /* Adjust symbols referenced by .sec+0xXX */
829 if (irel->r_addend > addr && irel->r_addend < toaddr
830 && lsym->st_shndx == sec_shndx)
831 irel->r_addend -= count;
832 }
833
834 return TRUE;
835 }
836
837 /* Delete some bytes from a section while relaxing. */
838
839 static bfd_boolean
840 msp430_elf_relax_delete_bytes (bfd * abfd, asection * sec, bfd_vma addr,
841 int count)
842 {
843 Elf_Internal_Shdr *symtab_hdr;
844 unsigned int sec_shndx;
845 bfd_byte *contents;
846 Elf_Internal_Rela *irel;
847 Elf_Internal_Rela *irelend;
848 Elf_Internal_Rela *irelalign;
849 bfd_vma toaddr;
850 Elf_Internal_Sym *isym;
851 Elf_Internal_Sym *isymend;
852 struct elf_link_hash_entry **sym_hashes;
853 struct elf_link_hash_entry **end_hashes;
854 unsigned int symcount;
855 asection *p;
856
857 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
858
859 contents = elf_section_data (sec)->this_hdr.contents;
860
861 /* The deletion must stop at the next ALIGN reloc for an aligment
862 power larger than the number of bytes we are deleting. */
863
864 irelalign = NULL;
865 toaddr = sec->size;
866
867 irel = elf_section_data (sec)->relocs;
868 irelend = irel + sec->reloc_count;
869
870 /* Actually delete the bytes. */
871 memmove (contents + addr, contents + addr + count,
872 (size_t) (toaddr - addr - count));
873 sec->size -= count;
874
875 /* Adjust all the relocs. */
876 symtab_hdr = & elf_tdata (abfd)->symtab_hdr;
877 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
878 for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
879 {
880 /* Get the new reloc address. */
881 if ((irel->r_offset > addr && irel->r_offset < toaddr))
882 irel->r_offset -= count;
883 }
884
885 for (p = abfd->sections; p != NULL; p = p->next)
886 msp430_elf_relax_adjust_locals(abfd,p,addr,count,sec_shndx,toaddr);
887
888 /* Adjust the local symbols defined in this section. */
889 symtab_hdr = & elf_tdata (abfd)->symtab_hdr;
890 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
891 for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
892 if (isym->st_shndx == sec_shndx
893 && isym->st_value > addr && isym->st_value < toaddr)
894 isym->st_value -= count;
895
896 /* Now adjust the global symbols defined in this section. */
897 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
898 - symtab_hdr->sh_info);
899 sym_hashes = elf_sym_hashes (abfd);
900 end_hashes = sym_hashes + symcount;
901 for (; sym_hashes < end_hashes; sym_hashes++)
902 {
903 struct elf_link_hash_entry *sym_hash = *sym_hashes;
904
905 if ((sym_hash->root.type == bfd_link_hash_defined
906 || sym_hash->root.type == bfd_link_hash_defweak)
907 && sym_hash->root.u.def.section == sec
908 && sym_hash->root.u.def.value > addr
909 && sym_hash->root.u.def.value < toaddr)
910 sym_hash->root.u.def.value -= count;
911 }
912
913 return TRUE;
914 }
915
916
917 static bfd_boolean
918 msp430_elf_relax_section (bfd * abfd, asection * sec,
919 struct bfd_link_info * link_info,
920 bfd_boolean * again)
921 {
922 Elf_Internal_Shdr * symtab_hdr;
923 Elf_Internal_Rela * internal_relocs;
924 Elf_Internal_Rela * irel;
925 Elf_Internal_Rela * irelend;
926 bfd_byte * contents = NULL;
927 Elf_Internal_Sym * isymbuf = NULL;
928
929 /* Assume nothing changes. */
930 *again = FALSE;
931
932 /* We don't have to do anything for a relocatable link, if
933 this section does not have relocs, or if this is not a
934 code section. */
935 if (link_info->relocatable
936 || (sec->flags & SEC_RELOC) == 0
937 || sec->reloc_count == 0 || (sec->flags & SEC_CODE) == 0)
938 return TRUE;
939
940 symtab_hdr = & elf_tdata (abfd)->symtab_hdr;
941
942 /* Get a copy of the native relocations. */
943 internal_relocs =
944 _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, link_info->keep_memory);
945 if (internal_relocs == NULL)
946 goto error_return;
947
948 /* Walk through them looking for relaxing opportunities. */
949 irelend = internal_relocs + sec->reloc_count;
950 for (irel = internal_relocs; irel < irelend; irel++)
951 {
952 bfd_vma symval;
953
954 /* If this isn't something that can be relaxed, then ignore
955 this reloc. */
956 if (ELF32_R_TYPE (irel->r_info) != (int) R_MSP430_RL_PCREL)
957 continue;
958
959 /* Get the section contents if we haven't done so already. */
960 if (contents == NULL)
961 {
962 /* Get cached copy if it exists. */
963 if (elf_section_data (sec)->this_hdr.contents != NULL)
964 contents = elf_section_data (sec)->this_hdr.contents;
965 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
966 goto error_return;
967 }
968
969 /* Read this BFD's local symbols if we haven't done so already. */
970 if (isymbuf == NULL && symtab_hdr->sh_info != 0)
971 {
972 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
973 if (isymbuf == NULL)
974 isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
975 symtab_hdr->sh_info, 0,
976 NULL, NULL, NULL);
977 if (isymbuf == NULL)
978 goto error_return;
979 }
980
981 /* Get the value of the symbol referred to by the reloc. */
982 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
983 {
984 /* A local symbol. */
985 Elf_Internal_Sym *isym;
986 asection *sym_sec;
987
988 isym = isymbuf + ELF32_R_SYM (irel->r_info);
989 if (isym->st_shndx == SHN_UNDEF)
990 sym_sec = bfd_und_section_ptr;
991 else if (isym->st_shndx == SHN_ABS)
992 sym_sec = bfd_abs_section_ptr;
993 else if (isym->st_shndx == SHN_COMMON)
994 sym_sec = bfd_com_section_ptr;
995 else
996 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
997 symval = (isym->st_value
998 + sym_sec->output_section->vma + sym_sec->output_offset);
999 }
1000 else
1001 {
1002 unsigned long indx;
1003 struct elf_link_hash_entry *h;
1004
1005 /* An external symbol. */
1006 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
1007 h = elf_sym_hashes (abfd)[indx];
1008 BFD_ASSERT (h != NULL);
1009
1010 if (h->root.type != bfd_link_hash_defined
1011 && h->root.type != bfd_link_hash_defweak)
1012 /* This appears to be a reference to an undefined
1013 symbol. Just ignore it--it will be caught by the
1014 regular reloc processing. */
1015 continue;
1016
1017 symval = (h->root.u.def.value
1018 + h->root.u.def.section->output_section->vma
1019 + h->root.u.def.section->output_offset);
1020 }
1021
1022 /* For simplicity of coding, we are going to modify the section
1023 contents, the section relocs, and the BFD symbol table. We
1024 must tell the rest of the code not to free up this
1025 information. It would be possible to instead create a table
1026 of changes which have to be made, as is done in coff-mips.c;
1027 that would be more work, but would require less memory when
1028 the linker is run. */
1029
1030 /* Try to turn a 16bit pc-relative branch into a 10bit pc-relative
1031 branch. */
1032 /* Paranoia? paranoia... */
1033 if (ELF32_R_TYPE (irel->r_info) == (int) R_MSP430_RL_PCREL)
1034 {
1035 bfd_vma value = symval;
1036
1037 /* Deal with pc-relative gunk. */
1038 value -= (sec->output_section->vma + sec->output_offset);
1039 value -= irel->r_offset;
1040 value += irel->r_addend;
1041
1042 /* See if the value will fit in 10 bits, note the high value is
1043 1016 as the target will be two bytes closer if we are
1044 able to relax. */
1045 if ((long) value < 1016 && (long) value > -1016)
1046 {
1047 int code0 = 0, code1 = 0, code2 = 0;
1048 int i;
1049 struct rcodes_s *rx;
1050
1051 /* Get the opcode. */
1052 if (irel->r_offset >= 6)
1053 code0 = bfd_get_16 (abfd, contents + irel->r_offset - 6);
1054
1055 if (irel->r_offset >= 4)
1056 code1 = bfd_get_16 (abfd, contents + irel->r_offset - 4);
1057
1058 code2 = bfd_get_16 (abfd, contents + irel->r_offset - 2);
1059
1060 if (code2 != 0x4010)
1061 continue;
1062
1063 /* Check r4 and r3. */
1064 for (i = NUMB_RELAX_CODES - 1; i >= 0; i--)
1065 {
1066 rx = &rcode[i];
1067 if (rx->cdx == 2 && rx->f0 == code0 && rx->f1 == code1)
1068 break;
1069 else if (rx->cdx == 1 && rx->f1 == code1)
1070 break;
1071 else if (rx->cdx == 0) /* This is an unconditional jump. */
1072 break;
1073 }
1074
1075 /* Check labels:
1076 .Label0: ; we do not care about this label
1077 jeq +6
1078 .Label1: ; make sure there is no label here
1079 jl +4
1080 .Label2: ; make sure there is no label here
1081 br .Label_dst
1082
1083 So, if there is .Label1 or .Label2 we cannot relax this code.
1084 This actually should not happen, cause for relaxable
1085 instructions we use RL_PCREL reloc instead of 16_PCREL.
1086 Will change this in the future. */
1087
1088 if (rx->cdx > 0
1089 && msp430_elf_symbol_address_p (abfd, sec, isymbuf,
1090 irel->r_offset - 2))
1091 continue;
1092 if (rx->cdx > 1
1093 && msp430_elf_symbol_address_p (abfd, sec, isymbuf,
1094 irel->r_offset - 4))
1095 continue;
1096
1097 /* Note that we've changed the relocs, section contents, etc. */
1098 elf_section_data (sec)->relocs = internal_relocs;
1099 elf_section_data (sec)->this_hdr.contents = contents;
1100 symtab_hdr->contents = (unsigned char *) isymbuf;
1101
1102 /* Fix the relocation's type. */
1103 if (rx->labels == 3) /* Handle special cases. */
1104 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
1105 R_MSP430_2X_PCREL);
1106 else
1107 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
1108 R_MSP430_10_PCREL);
1109
1110 /* Fix the opcode right way. */
1111 bfd_put_16 (abfd, rx->t0, contents + irel->r_offset - rx->off);
1112 if (rx->t1)
1113 bfd_put_16 (abfd, rx->t1,
1114 contents + irel->r_offset - rx->off + 2);
1115
1116 /* Delete bytes. */
1117 if (!msp430_elf_relax_delete_bytes (abfd, sec,
1118 irel->r_offset - rx->off +
1119 rx->ncl, rx->bs))
1120 goto error_return;
1121
1122 /* Handle unconditional jumps. */
1123 if (rx->cdx == 0)
1124 irel->r_offset -= 2;
1125
1126 /* That will change things, so, we should relax again.
1127 Note that this is not required, and it may be slow. */
1128 *again = TRUE;
1129 }
1130 }
1131 }
1132
1133 if (isymbuf != NULL && symtab_hdr->contents != (unsigned char *) isymbuf)
1134 {
1135 if (!link_info->keep_memory)
1136 free (isymbuf);
1137 else
1138 {
1139 /* Cache the symbols for elf_link_input_bfd. */
1140 symtab_hdr->contents = (unsigned char *) isymbuf;
1141 }
1142 }
1143
1144 if (contents != NULL
1145 && elf_section_data (sec)->this_hdr.contents != contents)
1146 {
1147 if (!link_info->keep_memory)
1148 free (contents);
1149 else
1150 {
1151 /* Cache the section contents for elf_link_input_bfd. */
1152 elf_section_data (sec)->this_hdr.contents = contents;
1153 }
1154 }
1155
1156 if (internal_relocs != NULL
1157 && elf_section_data (sec)->relocs != internal_relocs)
1158 free (internal_relocs);
1159
1160 return TRUE;
1161
1162 error_return:
1163 if (isymbuf != NULL && symtab_hdr->contents != (unsigned char *) isymbuf)
1164 free (isymbuf);
1165 if (contents != NULL
1166 && elf_section_data (sec)->this_hdr.contents != contents)
1167 free (contents);
1168 if (internal_relocs != NULL
1169 && elf_section_data (sec)->relocs != internal_relocs)
1170 free (internal_relocs);
1171
1172 return FALSE;
1173 }
1174
1175
1176 #define ELF_ARCH bfd_arch_msp430
1177 #define ELF_MACHINE_CODE EM_MSP430
1178 #define ELF_MACHINE_ALT1 EM_MSP430_OLD
1179 #define ELF_MAXPAGESIZE 1
1180 #define ELF_OSABI ELFOSABI_STANDALONE
1181
1182 #define TARGET_LITTLE_SYM bfd_elf32_msp430_vec
1183 #define TARGET_LITTLE_NAME "elf32-msp430"
1184
1185 #define elf_info_to_howto msp430_info_to_howto_rela
1186 #define elf_info_to_howto_rel NULL
1187 #define elf_backend_relocate_section elf32_msp430_relocate_section
1188 #define elf_backend_check_relocs elf32_msp430_check_relocs
1189 #define elf_backend_can_gc_sections 1
1190 #define elf_backend_final_write_processing bfd_elf_msp430_final_write_processing
1191 #define elf_backend_object_p elf32_msp430_object_p
1192 #define elf_backend_post_process_headers _bfd_elf_set_osabi
1193 #define bfd_elf32_bfd_relax_section msp430_elf_relax_section
1194
1195 #include "elf32-target.h"
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