| blob | 1e318c4fd26b963d5c6888d3c46ed747971a460e |
1 2006-05-03 Julian Brown <julian@codesourcery.com>
3 * gas/doc/c-arm.texi: Add documentation for .dn/.qn directives.
5 2006-05-03 Paul Brook <paul@codesourcery.com>
7 * bfd/elf32-arm.c (elf32_arm_reloc_map): Add MOVW and MOVT relocs.
8 (elf32_arm_final_link_relocate): Handle MOVW and MOVT relocs.
9 (elf32_arm_gc_sweep_hook, elf32_arm_check_relocs): Ditto.
10 * bfd/reloc.c: Ditto.
11 * bfd/bfd-in2.h: Regenerate.
12 * bfd/libbfd.h: Regenerate.
13 * bfd/libcoff.h: Regenerate.
14 * gas/config/tc-arm.c (parse_half): New function.
15 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
16 (parse_operands): Ditto.
17 (do_mov16): Reject invalid relocations.
18 (do_t_mov16): Ditto. Use Thumb reloc numbers.
19 (insns): Replace Iffff with HALF.
20 (md_apply_fix): Add MOVW and MOVT relocs.
21 (tc_gen_reloc): Ditto.
22 * gas/doc/c-arm.texi: Document relocation operators
23 * ld/testsuite/ld-arm/arm-elf.exp: Add arm-movwt.
24 * ld/testsuite/ld-arm/arm-movwt.d: New test.
25 * ld/testsuite/ld-arm/arm-movwt.s: New test.
26 * ld/testsuite/ld-arm/arm.ld: Add .far.
28 2006-05-02 Joseph Myers <joseph@codesourcery.com>
30 * gas/config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset
31 by 4 here.
32 (md_apply_fix3): Multiply offset by 4 here for
33 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
34 * gas/testsuite/gas/arm/iwmmxt.s: Increase offsets for wstrb and
35 wstrh.
36 * gas/testsuite/gas/arm/iwmmxt.d: Update expected results.
37 * gas/testsuite/gas/arm/iwmmxt-bad2.s: Test wstrb, wstrh, wldrb
38 and wldrh.
39 * gas/testsuite/gas/arm/iwmmxt-bad2.l: Update expected error
40 messages.
42 2006-05-01 Paul Brook <paul@codesourcery.com>
44 * bfd/elf32-arm.c (elf32_arm_final_link_relocate): Set thumb funciton
45 bit for R_ARM_REL32.
46 * gas/config/tc-arm.c (arm_optimize_expr): New function.
47 * gas/config/tc-arm.h (md_optimize_expr): Define
48 (arm_optimize_expr): Add prototype.
49 (TC_FORCE_RELOCATION_SUB_SAME): Define.
50 * ld/testsuite/ld-arm/arm-elf.exp: Add thumb-rel32.
51 * ld/testsuite/ld-arm/thumb-rel32.d: New test.
52 * ld/testsuite/ld-arm/thumb-rel32.s: New test.
54 2006-04-29 Paul Brook <paul@codesourcery.com>
56 * opcodes/arm-dis.c (coprocessor_opcodes): Add %c to unconditional
57 arm instructions.
58 (neon_opcodes): Add conditional execution specifiers.
59 (thumb_opcodes): Ditto.
60 (thumb32_opcodes): Ditto.
61 (arm_conditional): Change 0xe to "al" and add "" to end.
62 (ifthen_state, ifthen_next_state, ifthen_address): New.
63 (IFTHEN_COND): Define.
64 (print_insn_coprocessor, print_insn_neon): Print thumb conditions.
65 (print_insn_arm): Change %c to use new values of arm_conditional.
66 (print_insn_thumb16): Print thumb conditions. Add %I.
67 (print_insn_thumb32): Print thumb conditions.
68 (find_ifthen_state): New function.
69 (print_insn): Track IT block state.
70 * gas/testsuite/gas/arm/thumb2_bcond.d: Update expected output.
71 * gas/testsuite/gas/arm/thumb32.d: Ditto.
72 * gas/testsuite/gas/arm/vfp1_t2.d: Ditto.
73 * gas/testsuite/gas/arm/vfp1xD_t2.d: Ditto.
74 * binutils/testsuite/binutils-all/arm/objdump.exp: New file.
75 * binutils/testsuite/binutils-all/arm/thumb2-cond.s: New test.
77 2006-04-28 Mark Mitchell <mark@codesourcery.com>
79 * doc/as.texinfo: Mention that some .type syntaxes are not
80 supported on all architectures.
82 2006-04-27 Richard Sandiford <richard@codesourcery.com>
84 include/opcodes/
85 * m68k.h (mcf_mask): Define.
87 opcodes/
88 * m68k-opc.c (m68k_opcodes): Fix the masks of the Coldfire fmovemd
89 and fmovem entries. Put register list entries before immediate
90 mask entries. Use "l" rather than "L" in the fmovem entries.
91 * m68k-dis.c (match_insn_m68k): Remove the PRIV argument and work it
92 out from INFO.
93 (m68k_scan_mask): New function, split out from...
94 (print_insn_m68k): ...here. If no architecture has been set,
95 first try printing an m680x0 instruction, then try a Coldfire one.
97 2006-04-27 Richard Sandiford <richard@codesourcery.com>
99 bfd/
100 * elf32-m68k.c (elf_m68k_pcrel_insn): New structure.
101 (elf_m68k_plt_info): Likewise.
102 (elf_m68k_plt_info): New table.
103 (CFV4E_PLT_ENTRY_SIZE): Rename to...
104 (ISAB_PLT_ENTRY_SIZE): ...this.
105 (CFV4E_FLAG): Delete.
106 (elf_cfv4e_plt0_entry): Rename to...
107 (elf_isab_plt0_entry): ...this. Adjust comments. Use (-6,%pc,%d0)
108 for the second instruction too.
109 (elf_cfv4e_plt_entry): Rename to...
110 (elf_isab_plt_entry): ...this. Adjust comments and use (-6,%pc,%d0).
111 (elf_isab_plt_info): New table.
112 (CPU32_FLAG): Delete.
113 (PLT_CPU32_ENTRY_SIZE): Rename to...
114 (CPU32_PLT_ENTRY_SIZE): ...this.
115 (elf_cpu32_plt0_entry): Update bounds accordingly.
116 (elf_cpu32_plt_entry): Likewise.
117 (elf_cpu32_plt_info): New table.
118 (elf_m68k_link_hash_table): Add a plt_info field.
119 (elf_m68k_link_hash_table_create): Initialize it.
120 (elf_m68k_get_plt_info): New function.
121 (elf_m68k_always_size_sections): Likewise.
122 (elf_m68k_adjust_dynamic_symbol): Use the plt_info hash table field.
123 (elf_m68k_install_pcrel_field): New function.
124 (elf_m68k_finish_dynamic_symbol): Factor code using plt_info and
125 elf_m68k_install_pcrel_field.
126 (elf_m68k_finish_dynamic_sections): Likewise.
127 (elf_m68k_plt_sym_val): Use elf_m68k_get_plt_info.
128 (elf_backend_always_size_sections): Define.
130 2006-04-26 Julian Brown <julian@codesourcery.com>
132 * gas/config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
133 checking.
134 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
135 architecture version checks.
136 (insns): Allow overlapping instructions to be used in VFP mode.
138 * gas/testsuite/gas/arm/vfp-neon-overlap.s: New test. Overlapping
139 VFP/Neon instructions.
140 * gas/testsuite/gas/arm/vfp-neon-overlap.d: Expected output of above.
141 * gas/testsuite/gas/arm/vfp1xD.d: Test for fldmx/fstmx.
142 * gas/testsuite/gas/arm/vfp1xD_t2.d: Likewise.
143 * gas/testsuite/gas/arm/vfpv3-32drs.d: Likewise.
145 * opcodes/arm-dis.c (coprocessor_opcodes): Don't interpret fldmx/fstmx
146 as vldm/vstm.
148 2006-04-26 Julian Brown <julian@codesourcery.com>
150 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
151 (is_quarter_float): Rename from above. Simplify slightly.
152 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
153 number.
154 (parse_neon_mov): Parse floating-point constants.
155 (neon_qfloat_bits): Fix encoding.
156 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
157 preference to integer encoding when using the F32 type.
159 * gas/testsuite/gas/arm/neon-const.s: New testcase. Neon floating-point
160 constants.
161 * gas/testsuite/gas/arm/neon-const.d: Expected output of above.
162 * gas/testsuite/gas/arm/neon-cov.d: Expect floating-point disassembly
163 for VMOV.F32.
165 * opcodes/arm-dis.c (print_insn_neon): Disassemble floating-point
166 constant VMOV.
168 2006-04-24 Julian Brown <julian@codesourcery.com>
170 * libiberty/floatformat.c (floatformat_to_double): Fix (biased)
171 exponent=0 case.
173 2006-04-12 Carlos O'Donell <carlos@codesourcery.com>
175 * Makefile.tpl: Add install-html to install target deps.
176 * Makefile.in: Regenerate.
178 2006-04-07 Julian Brown <julian@codesourcery.com>
180 * gas/config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
181 zero-initialising structures containing it will lead to invalid
182 types).
183 (arm_it): Add vectype to each operand.
184 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
185 defined field.
186 (neon_typed_alias): New structure. Extra information for typed
187 register aliases.
188 (reg_entry): Add neon type info field.
189 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
190 Break out alternative syntax for coprocessor registers, etc. into...
191 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
192 out from arm_reg_parse.
193 (parse_neon_type): Move. Return SUCCESS/FAIL.
194 (first_error): New function. Call to ensure first error which occurs
195 is reported.
196 (parse_neon_operand_type): Parse exactly one type.
197 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
198 (parse_typed_reg_or_scalar): New function. Handle core of both
199 arm_typed_reg_parse and parse_scalar.
200 (arm_typed_reg_parse): Parse a register with an optional type.
201 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
202 result.
203 (parse_scalar): Parse a Neon scalar with optional type.
204 (parse_reg_list): Use first_error.
205 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
206 (neon_alias_types_same): New function. Return true if two (alias) types
207 are the same.
208 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
209 of elements.
210 (insert_reg_alias): Return new reg_entry not void.
211 (insert_neon_reg_alias): New function. Insert type/index information as
212 well as register for alias.
213 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
214 make typed register aliases accordingly.
215 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
216 of line.
217 (s_unreq): Delete type information if present.
218 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
219 (s_arm_unwind_save_mmxwcg): Likewise.
220 (s_arm_unwind_movsp): Likewise.
221 (s_arm_unwind_setfp): Likewise.
222 (parse_shift): Likewise.
223 (parse_shifter_operand): Likewise.
224 (parse_address): Likewise.
225 (parse_tb): Likewise.
226 (tc_arm_regname_to_dw2regnum): Likewise.
227 (md_pseudo_table): Add dn, qn.
228 (parse_neon_mov): Handle typed operands.
229 (parse_operands): Likewise.
230 (neon_type_mask): Add N_SIZ.
231 (N_ALLMODS): New macro.
232 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
233 (el_type_of_type_chk): Add some safeguards.
234 (modify_types_allowed): Fix logic bug.
235 (neon_check_type): Handle operands with types.
236 (neon_three_same): Remove redundant optional arg handling.
237 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
238 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
239 (do_neon_step): Adjust accordingly.
240 (neon_cmode_for_logic_imm): Use first_error.
241 (do_neon_bitfield): Call neon_check_type.
242 (neon_dyadic): Rename to...
243 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield to
244 allow modification of type of the destination.
245 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
246 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
247 (do_neon_compare): Make destination be an untyped bitfield.
248 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
249 (neon_mul_mac): Return early in case of errors.
250 (neon_move_immediate): Use first_error.
251 (neon_mac_reg_scalar_long): Fix type to include scalar.
252 (do_neon_dup): Likewise.
253 (do_neon_mov): Likewise (in several places).
254 (do_neon_tbl_tbx): Fix type.
255 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
256 (do_neon_ld_dup): Exit early in case of errors and/or use first_error.
257 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
258 Handle .dn/.qn directives.
259 (REGDEF): Add zero for reg_entry neon field.
261 * gas/testsuite/gas/arm/neon-psyn.s: Basic test of programmers syntax.
262 * gas/testsuite/gas/arm/neon-psyn.d: Expected output of above.
264 2006-04-03 Carlos O'Donell <carlos@codesourcery.com>
266 * Makefile.tpl: Add install-html target.
267 * Makefile.def: Add install-html target.
268 * Makefile.in: Regenerate.
269 * configure.in: Add --with-datarootdir, --with-docdir,
270 and --with-htmldir options.
271 * configure: Regenerate.
272 * opcodes/Makefile.am: Add install-html target.
273 * opcodes/Makefile.in: Regenerate.
274 * libiberty/Makefile.in: Add install-html, install-html-am, and
275 install-html-recursive targets. Define mkdir_p and
276 NORMAL_INSTALL.
277 * libiberty/configure.ac: AC_SUBST datarootdir, docdir, htmldir.
278 * libiberty/configure: Regenerate.
279 * libiberty/testsuite/Makefile.in: Add install-html and html targets.
280 * ld/Makefile.am: Add install-html, install-html-am, and
281 install-html-recursive targets.
282 * ld/Makefile.in: Regenerate.
283 * ld/configure.in: AC_SUBST datarootdir, docdir, htmldir.
284 * ld/configure: Regenerate.
285 * ld/po/Make-in: Add install-html target.
286 * intl/Makefile.in: Add html info and dvi and install-html to .PHONY
287 Add install-html target.
288 * gprof/po/Make-in: Add install-html target.
289 * gprof/Makefile.am: Add install-html, install-html-am and
290 install-html-recursive targets.
291 * gprof/Makefile.in: Regenerate.
292 * gprof/configure.in: AC_SUBST datarootdir, docdir, htmldir.
293 * gprof/configure: Regenerate.
294 * gas/po/Make-in: Add install-html target.
295 * gas/Makefile.am: Add install-html and install-html-recursive targets.
296 * gas/Makefile.in: Regenerate.
297 * gas/configure.in: AC_SUBST datarootdir, docdir, htmldir.
298 * gas/configure: Regenerate.
299 * gas/doc/Makefile.am: Add install-html and install-html-am targets.
300 * gas/doc/Makefile.in: Regenerate.
301 * binutils/po/Make-in: Add install-html target.
302 * binutils/Makefile.am: Add install-html and install-html-recursive targets.
303 * binutils/Makefile.in: Regenerate.
304 * binutils/configure.in: AC_SUBST datarootdir, docdir and htmldir.
305 * binutils/configure: Regenerate.
306 * binutils/doc/Makefile.am: Add install-html and install-html-am targets.
307 * binutils/doc/Makefile.in: Regenerate.
308 * bfd/po/Make-in: Add install-html target.
309 * bfd/Makefile.am: Rename docdir to bfddocdir. Add datarootdir, docdir
310 htmldir. Add install-html and install-html-recursive targets.
311 * bfd/Makefile.in: Regenerate.
312 * bfd/configure.in: AC_SUBST for datarootdir, docdir and htmldir.
313 * bfd/configure: Regenerate.
314 * bfd/doc/Makefile.am: Add install-html and install-html-am targets.
315 Define datarootdir, docdir and htmldir.
316 * bfd/doc/Makefile.in: Regenerate.
317 * etc/Makefile.in: Add install-html target. Add htmldir,
318 docdir and datarootdir.
319 * etc/configure.texi: Document install-html target.
320 * etc/configure.in: AC_SUBST datarootdir, docdir, htmldir.
321 * etc/configure: Regenerate.
323 2005-04-03 Julian Brown <julian@codesourcery.com>
324 Nathan Sidwell <nathan@codesourcery.com>
326 * binutils/readelf.c (arm_attr_tag_VFP_arch): Add VFPv3.
328 * gas/config/tc-arm.c (limits.h): Include.
329 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
330 (fpu_vfp_v3_or_neon_ext): Declare constants.
331 (neon_el_type): New enumeration of types for Neon vector elements.
332 (neon_type_el): New struct. Define type and size of a vector element.
333 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
334 instruction.
335 (neon_type): Define struct. The type of an instruction.
336 (arm_it): Add 'vectype' for the current instruction.
337 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
338 (vfp_sp_reg_pos): Rename to...
339 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
340 tags.
341 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
342 (Neon D or Q register).
343 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon
344 D register.
345 (GE_OPT_PREFIX_BIG): Define constant, for use in...
346 (my_get_expression): Allow above constant as argument to accept
347 64-bit constants with optional prefix.
348 (arm_reg_parse): Add extra argument to return the specific type of
349 register in when either a D or Q register (REG_TYPE_NDQ) is requested.
350 Can be NULL.
351 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
352 (parse_reg_list): Update for new arm_reg_parse args.
353 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
354 (parse_neon_el_struct_list): New function. Parse element/structure
355 register lists for VLD<n>/VST<n> instructions.
356 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
357 (s_arm_unwind_save_mmxwr): Likewise.
358 (s_arm_unwind_save_mmxwcg): Likewise.
359 (s_arm_unwind_movsp): Likewise.
360 (s_arm_unwind_setfp): Likewise.
361 (parse_big_immediate): New function. Parse an immediate, which may
362 be 64 bits wide. Put results in inst.operands[i].
363 (parse_shift): Update for new arm_reg_parse args.
364 (parse_address): Likewise. Add parsing of alignment specifiers.
365 (parse_neon_mov): Parse the operands of a VMOV instruction.
366 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC,
367 OP_NRDLST, OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC,
368 OP_RNDQ_RNSC, OP_RND_RNSC, OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b,
369 OP_I0, OP_I16z, OP_I32z, OP_I64, OP_I64z, OP_oI32b, OP_oRND,
370 OP_oRNQ, OP_oRNDQ.
371 (parse_operands): Handle new codes above.
372 (encode_arm_vfp_sp_reg): Rename to...
373 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
374 selected VFP version only supports D0-D15.
375 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
376 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
377 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
378 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
379 encode_arm_vfp_reg name, and allow 32 D regs.
380 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn)
381 (do_vfp_dp_rd_rn_rm, do_vfp_rm_rd_rn): New functions to encode VFP
382 insns allowing 32 D regs.
383 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
384 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
385 constant-load and conversion insns introduced with VFPv3.
386 (neon_tab_entry): New struct.
387 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
388 those which are the targets of pseudo-instructions.
389 (neon_opc): Enumerate opcodes, use as indices into...
390 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
391 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
392 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
393 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
394 neon_enc_tab.
395 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
396 Neon instructions.
397 (neon_type_mask): New. Compact type representation for type
398 checking.
399 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
400 permitted type combinations.
401 (N_IGNORE_TYPE): New macro.
402 (neon_check_shape): New function. Check an instruction shape for
403 multiple alternatives. Return the specific shape for the current
404 instruction.
405 (neon_modify_type_size): New function. Modify a vector type and
406 size, depending on the bit mask in argument 1.
407 (neon_type_promote): New function. Convert a given "key" type (of an
408 operand) into the correct type for a different operand, based on a bit
409 mask.
410 (type_chk_of_el_type): New function. Convert a type and size into the
411 compact representation used for type checking.
412 (el_type_of_type_ckh): New function. Reverse of above (only when a
413 single bit is set in the bit mask).
414 (modify_types_allowed): New function. Alter a mask of allowed types
415 based on a bit mask of modifications.
416 (neon_check_type): New function. Check the type of the current
417 instruction against the variable argument list. The "key" type of the
418 instruction is returned.
419 (neon_dp_fixup): New function. Fill in and modify instruction bits for
420 a Neon data-processing instruction depending on whether we're in ARM
421 mode or Thumb-2 mode.
422 (neon_logbits): New function.
423 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
424 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
425 (do_neon_qshl_imm, neon_cmode_for_logic_imm)
426 (neon_bits_same_in_bytes, neon_squash_bits, neon_is_quarter_float)
427 (neon_qfloat_bits, neon_cmode_for_move_imm, neon_write_immbits)
428 (neon_invert_size, do_neon_logic, do_neon_bitfield, neon_dyadic)
429 (do_neon_dyadic_if_su, do_neon_dyadic_if_su_d, do_neon_dyadic_if_i)
430 (do_neon_dyadic_if_i_d, do_neon_addsub_if_i, neon_exchange_operands)
431 (neon_compare, do_neon_cmp, do_neon_cmp_inv, do_neon_ceq)
432 (neon_scalar_for_mul, neon_mul_mac, do_neon_mac_maybe_scalar)
433 (do_neon_tst, do_neon_mul, do_neon_qdmulh, do_neon_fcmp_absolute)
434 (do_neon_fcmp_absolute_inv, do_neon_step, do_neon_abs_neg)
435 (do_neon_sli, do_neon_sri, do_neon_qshlu_imm, do_neon_qmovn)
436 (do_neon_qmovun, do_neon_rshift_sat_narrow)
437 (do_neon_rshift_sat_narrow_u, do_neon_movn, do_neon_rshift_narrow)
438 (do_neon_shll, neon_cvt_flavour, do_neon_cvt, neon_move_immediate)
439 (do_neon_mvn, neon_mixed_length, do_neon_dyadic_long, do_neon_abal)
440 (neon_mac_reg_scalar_long, do_neon_mac_maybe_scalar_long)
441 (do_neon_dyadic_wide, do_neon_vmull, do_neon_ext, do_neon_rev)
442 (do_neon_dup, do_neon_mov, do_neon_rshift_round_imm, do_neon_movl)
443 (do_neon_trn, do_neon_zip_uzp, do_neon_sat_abs_neg)
444 (do_neon_pair_long, do_neon_recip_est, do_neon_cls, do_neon_clz)
445 (do_neon_cnt, do_neon_swp, do_neon_tbl_tbx, do_neon_ldm_stm)
446 (do_neon_ldr_str, do_neon_ld_st_interleave, neon_alignment_bit)
447 (do_neon_ld_st_lane, do_neon_ld_dup, do_neon_ldx_stx): New
448 functions. Neon bit encoding and encoding helpers.
449 (parse_neon_type): New function. Parse Neon type specifier.
450 (opcode_lookup): Allow parsing of Neon type specifiers.
451 (REGNUM2, REGSETH, REGSET2): New macros.
452 (reg_names): Add new VFPv3 and Neon registers.
453 (NUF, nUF, NCE, nCE): New macros for opcode table.
454 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
455 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd,
456 fmscd, fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd,
457 fmdrr, fmrrd. Add Neon instructions vaba, vhadd, vrhadd, vhsub,
458 vqadd, vqsub, vrshl, vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn,
459 veor, vbsl, vbit, vbif, vabd, vmax, vmin, vcge, vcgt, vclt, vcle,
460 vceq, vpmax, vpmin, vmla, vmls, vpadd, vadd, vsub, vtst, vmul,
461 vqdmulh, vqrdmulh, vacge, vacgt, vaclt, vacle, vrecps, vrsqrts,
462 vabs, vneg, v{r}shr, v{r}sra, vsli, vsri, vqshrn, vq{r}shr{u}n,
463 v{r}shrn, vshll, vcvt, vmov, vmvn, vabal, vabdl, vaddl, vsubl,
464 vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn, vqdmlal, vqdmlsl,
465 vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup, vmovl, v{q}movn,
466 vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe, vrsqrte, vcls,
467 vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr, vstr,
468 vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd], fto[us][lh][sd].
469 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
470 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
471 (arm_option_cpu_value): Add vfp3 and neon.
472 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes.
473 Fix VFPv1 attribute.
475 * gas/testsuite/gas/arm/copro.s: Avoid ldcl which encodes as a bad Neon
476 instruction.
477 * gas/testsuite/gas/arm/copro.d: Update accordingly.
478 * gas/testsuite/gas/arm/neon-cond.s: New test. Conditional Neon opcodes
479 in ARM mode.
480 * gas/testsuite/gas/arm/neon-cond.d: Expected results of above.
481 * gas/testsuite/gas/arm/neon-cov.s: New test. Coverage of Neon
482 instructions.
483 * gas/testsuite/gas/arm/neon-cov.d: Expected results of above.
484 * gas/testsuite/gas/arm/neon-ldst-es.s: New test. Element and structure
485 loads and stores.
486 * gas/testsuite/gas/arm/neon-ldst-es.d: Expected results of above.
487 * gas/testsuite/gas/arm/neon-ldst-rm.s: New test. Single and multiple
488 register loads and stores.
489 * gas/testsuite/gas/arm/neon-ldst-rm.d: Expected results of above.
490 * gas/testsuite/gas/arm/neon-omit.s: New test. Omission of optional
491 operands.
492 * gas/testsuite/gas/arm/neon-omit.d: Expected results of above.
493 * gas/testsuite/gas/arm/vfp1.d: Expect Neon syntax for some VFP
494 instructions.
495 * gas/testsuite/gas/arm/vfp1_t2.d: Likewise.
496 * gas/testsuite/gas/arm/vfp1xD.d: Likewise.
497 * gas/testsuite/gas/arm/vfp1xD_t2.d: Likewise.
498 * gas/testsuite/gas/arm/vfp2.d: Likewise.
499 * gas/testsuite/gas/arm/vfp2_t2.d: Likewise.
500 * gas/testsuite/gas/arm/vfp3-32drs.s: New test. Extended D register
501 range for VFP instructions.
502 * gas/testsuite/gas/arm/vfp3-32drs.d: Expected results of above.
503 * gas/testsuite/gas/arm/vfp3-const-conv.s: New test. VFPv3
504 constant-load and conversion instructions.
505 * gas/testsuite/gas/arm/vfp3-const-conv.d: Expected results of above.
507 * include/opcode/arm.h (FPU_VFP_EXT_V3): Define constant.
508 (FPU_NEON_EXT_V1): Likewise.
509 (FPU_VFP_HARD): Update.
510 (FPU_VFP_V3): Define macro.
511 (FPU_ARCH_VFP_V3, FPU_ARCH_VFP_V3_PLUS_NEON_V1): Define macros.
513 * opcodes/arm-dis.c (coprocessor_opcodes): Add %A, %B, %k,
514 convert %<code>[zy] into %[zy]<code>. Expand meaning of
515 %<bitfield>['`?].
516 Add unified load/store instruction names.
517 (neon_opcode_table): New.
518 (arm_opcodes): Expand meaning of %<bitfield>['`?].
519 (arm_decode_bitfield): New.
520 (print_insn_coprocessor): Add pc argument. Add %A & %B specifiers.
521 Use arm_decode_bitfield and adjust numeric specifiers.
522 Adjust %z & %y.
523 (print_insn_neon): New.
524 (print_insn_arm): Adjust print_insn_coprocessor call. Call
525 print_insn_neon. Use arm_decode_bitfield and adjust numeric specifiers.
526 (print_insn_thumb32): Likewise.
528 2005-04-01 Paul Brook <paul@codesourcery.com>
530 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
532 2006-03-30 Mark Mitchell <mark@codesourcery.com>
534 * libiberty/configure.ac: Add cygpath for mingw hosts.
535 * libiberty.configure: Rebuilt.
536 * libiberty/Makefile.in: Add cygpath.
537 * libiberty/cygpath.c: New.
539 2006-03-30 Jim Blandy <jimb@codesourcery.com>
541 * include/libiberty.h (pex_write_input): New declaration.
543 * libiberty/pex-common.c (pex_write_input): New function.
544 * libiberty/pexecute.txh (pex_write_input): Document it.
545 * libiberty/pex-common.h (struct pex_funcs): New function ptr fdopenw.
546 * libiberty/pex-unix.c (pex_unix_fdopenw): New function.
547 (funcs): List it as our fdopenw function.
548 * libiberty/pex-win32.c (pex_win32_fdopenw): New function.
549 (funcs): List it as our fdopenw function.
550 * libiberty/pex-djgpp.c (funcs): Leave fdopenw null.
551 * libiberty/pex-msdos (funcs): Same.
552 * libiberty/functions.texi: Regenerated.
554 * libiberty/pex-common.h (struct pex_obj): Doc fixes.
556 * libiberty/functions.texi: Regenerate.
558 2006-03-27 Mark Mitchell <mark@codesourcery.com>
560 * libiberty/pex-win32.c (pex_win32_exec_child): Close stdout/stderr
561 in parent.
563 2006-03-26 Nathan Sidwell <nathan@codesourcery.com>
565 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
566 cfloat/m68881 to correct architecture before using it.
568 2006-03-21 Paul Brook <paul@codesourcery.com>
570 * gas/config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
572 2006-03-21 Nathan Sidwell <nathan@codesourcery.com>
574 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
575 (m68k_ip): ... here. Use for all chips. Protect against buffer
576 overrun and avoid excessive copying.
578 * gcc/config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
579 m68020_control_regs, m68040_control_regs, m68060_control_regs,
580 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
581 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
582 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
583 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
584 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
585 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
586 mcf5282_ctrl, mcfv4e_ctrl): ... these.
587 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
588 (struct m68k_cpu): Change chip field to control_regs.
589 (current_chip): Remove.
590 (control_regs): New.
591 (m68k_archs, m68k_extensions): Adjust.
592 (m68k_cpus): Reorder to be in cpu number order. Adjust.
593 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
594 (find_cf_chip): Reimplement for new organization of cpu table.
595 (select_control_regs): Remove.
596 (mri_chip): Adjust.
597 (struct save_opts): Save control regs, not chip.
598 (s_save, s_restore): Adjust.
599 (m68k_lookup_cpu): Give deprecated warning when necessary.
600 (m68k_init_arch): Adjust.
601 (md_show_usage): Adjust for new cpu table organization.
602 * include/opcode/m68k.h (cpu_m68k, cpu_cf, cpu_m68000, cpu_m68008,
603 cpu_m68010, cpu_m68020, cpu_m68ec030, cpu_m68040, cpu_m68060,
604 cpu_m68851, cpu_m68881, cpu_m68882, cpu_cpu32, cpu_cf5200, cpu_cf5206e,
605 cpu_cf5208, cpu_cf521x, cpu_cf5213, cpu_cf5249, cpu_cf528x,
606 cpu_cf5307, cpu_cf5329, cpu_cf5407, cpu_cf547x, cpu_cf548x): Remove.
608 2006-03-20 Mark Mitchell <mark@codesourcery.com>
610 * libiberty/pex-win32.c (<errno.h>): Include.
611 (fix_argv): Remove.
612 (argv_to_cmdline): New function.
613 (std_suffixes): New variable.
614 (no_suffixes): Likewise.
615 (find_executable): New function.
616 (win32_spawn): Likewise.
617 (spawn_script): Use win32_spawn instead of _spawnv[p].
618 (pex_win32_exec_child): Replace MSVCRT calls with Win32 API calls.
619 (pex_win32_wait): Likewise.
621 2006-03-21 Richard Sandiford <richard@codesourcery.com>
623 * bfd/cpu-m68k.c (bfd_m68k_compatible): Treat ISA A+ and ISA B code as
624 incompatible. Likewise MAC and EMAC code.
625 * bfd/elf32-m68k.c (elf32_m68k_merge_private_bfd_data): Use
626 bfd_get_compatible to set the new bfd architecture. Rely on it
627 to detect incompatibilities.
628 * gas/config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
629 mcfemac instead of mcfmac.
630 * ld/testsuite/ld-m68k/merge-error-1a.s,
631 * ld/testsuite/ld-m68k/merge-error-1b.s,
632 * ld/testsuite/ld-m68k/merge-error-1a.d,
633 * ld/testsuite/ld-m68k/merge-error-1b.d,
634 * ld/testsuite/ld-m68k/merge-error-1c.d,
635 * ld/testsuite/ld-m68k/merge-error-1d.d,
636 * ld/testsuite/ld-m68k/merge-error-1e.d,
637 * ld/testsuite/ld-m68k/merge-ok-1a.d,
638 * ld/testsuite/ld-m68k/merge-ok-1b.d: New tests.
639 * ld/testsuite/ld-m68k/m68k.exp: Run them.
641 2006-03-20 Paul Brook <paul@codesourcery.com>
643 * gas/config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
644 * gas/testsuite/gas/arm/thumb32.d: Correct expected output.
646 2006-03-20 Paul Brook <paul@codesourcery.com>
648 * gas/config/tc-arm.c (parse_operands): Set default error message.
650 2006-03-20 Paul Brook <paul@codesourcery.com>
652 * gas/config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
654 2006-03-20 Paul Brook <paul@codesourcery.com>
656 * gas/config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
658 * gas/testsuite/gas/arm/blx-local.d: New test.
659 * gas/testsuite/gas/arm/blx-local.d: New test.
661 2006-03-20 Paul Brook <paul@codesourcery.com>
663 * gas/config/tc-arm.c (THUMB2_LOAD_BIT): Define.
664 (move_or_literal_pool): Handle Thumb-2 instructions.
665 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
667 * gas/testsuite/gas/arm/thumb2_pool.d: New test.
668 * gas/testsuite/gas/arm/thumb2_pool.s: New test.