2001-02-17 Philip Blundell <philb@gnu.org>
[binutils.git] / opcodes / fr30-opc.c
blob3b37dcb8a67fc2420937b098c0b4a7d26414643a
1 /* Instruction opcode table for fr30.
3 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
7 This file is part of the GNU Binutils and/or GDB, the GNU debugger.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2, or (at your option)
12 any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License along
20 with this program; if not, write to the Free Software Foundation, Inc.,
21 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
25 #include "sysdep.h"
26 #include "ansidecl.h"
27 #include "bfd.h"
28 #include "symcat.h"
29 #include "fr30-desc.h"
30 #include "fr30-opc.h"
31 #include "libiberty.h"
33 /* The hash functions are recorded here to help keep assembler code out of
34 the disassembler and vice versa. */
36 static int asm_hash_insn_p PARAMS ((const CGEN_INSN *));
37 static unsigned int asm_hash_insn PARAMS ((const char *));
38 static int dis_hash_insn_p PARAMS ((const CGEN_INSN *));
39 static unsigned int dis_hash_insn PARAMS ((const char *, CGEN_INSN_INT));
41 /* Instruction formats. */
43 #define F(f) & fr30_cgen_ifld_table[CONCAT2 (FR30_,f)]
45 static const CGEN_IFMT ifmt_empty = {
46 0, 0, 0x0, { { 0 } }
49 static const CGEN_IFMT ifmt_add = {
50 16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_RJ) }, { F (F_RI) }, { 0 } }
53 static const CGEN_IFMT ifmt_addi = {
54 16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_U4) }, { F (F_RI) }, { 0 } }
57 static const CGEN_IFMT ifmt_add2 = {
58 16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_M4) }, { F (F_RI) }, { 0 } }
61 static const CGEN_IFMT ifmt_div0s = {
62 16, 16, 0xfff0, { { F (F_OP1) }, { F (F_OP2) }, { F (F_OP3) }, { F (F_RI) }, { 0 } }
65 static const CGEN_IFMT ifmt_div3 = {
66 16, 16, 0xffff, { { F (F_OP1) }, { F (F_OP2) }, { F (F_OP3) }, { F (F_OP4) }, { 0 } }
69 static const CGEN_IFMT ifmt_ldi8 = {
70 16, 16, 0xf000, { { F (F_OP1) }, { F (F_I8) }, { F (F_RI) }, { 0 } }
73 static const CGEN_IFMT ifmt_ldi20 = {
74 16, 32, 0xff00, { { F (F_OP1) }, { F (F_I20) }, { F (F_OP2) }, { F (F_RI) }, { 0 } }
77 static const CGEN_IFMT ifmt_ldi32 = {
78 16, 48, 0xfff0, { { F (F_OP1) }, { F (F_I32) }, { F (F_OP2) }, { F (F_OP3) }, { F (F_RI) }, { 0 } }
81 static const CGEN_IFMT ifmt_ldr14 = {
82 16, 16, 0xf000, { { F (F_OP1) }, { F (F_DISP10) }, { F (F_RI) }, { 0 } }
85 static const CGEN_IFMT ifmt_ldr14uh = {
86 16, 16, 0xf000, { { F (F_OP1) }, { F (F_DISP9) }, { F (F_RI) }, { 0 } }
89 static const CGEN_IFMT ifmt_ldr14ub = {
90 16, 16, 0xf000, { { F (F_OP1) }, { F (F_DISP8) }, { F (F_RI) }, { 0 } }
93 static const CGEN_IFMT ifmt_ldr15 = {
94 16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_UDISP6) }, { F (F_RI) }, { 0 } }
97 static const CGEN_IFMT ifmt_ldr15dr = {
98 16, 16, 0xfff0, { { F (F_OP1) }, { F (F_OP2) }, { F (F_OP3) }, { F (F_RS2) }, { 0 } }
101 static const CGEN_IFMT ifmt_movdr = {
102 16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_RS1) }, { F (F_RI) }, { 0 } }
105 static const CGEN_IFMT ifmt_call = {
106 16, 16, 0xf800, { { F (F_OP1) }, { F (F_OP5) }, { F (F_REL12) }, { 0 } }
109 static const CGEN_IFMT ifmt_int = {
110 16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_U8) }, { 0 } }
113 static const CGEN_IFMT ifmt_brad = {
114 16, 16, 0xff00, { { F (F_OP1) }, { F (F_CC) }, { F (F_REL9) }, { 0 } }
117 static const CGEN_IFMT ifmt_dmovr13 = {
118 16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_DIR10) }, { 0 } }
121 static const CGEN_IFMT ifmt_dmovr13h = {
122 16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_DIR9) }, { 0 } }
125 static const CGEN_IFMT ifmt_dmovr13b = {
126 16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_DIR8) }, { 0 } }
129 static const CGEN_IFMT ifmt_copop = {
130 16, 32, 0xfff0, { { F (F_OP1) }, { F (F_CCC) }, { F (F_OP2) }, { F (F_OP3) }, { F (F_CRJ) }, { F (F_U4C) }, { F (F_CRI) }, { 0 } }
133 static const CGEN_IFMT ifmt_copld = {
134 16, 32, 0xfff0, { { F (F_OP1) }, { F (F_CCC) }, { F (F_OP2) }, { F (F_OP3) }, { F (F_RJC) }, { F (F_U4C) }, { F (F_CRI) }, { 0 } }
137 static const CGEN_IFMT ifmt_copst = {
138 16, 32, 0xfff0, { { F (F_OP1) }, { F (F_CCC) }, { F (F_OP2) }, { F (F_OP3) }, { F (F_CRJ) }, { F (F_U4C) }, { F (F_RIC) }, { 0 } }
141 static const CGEN_IFMT ifmt_addsp = {
142 16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_S10) }, { 0 } }
145 static const CGEN_IFMT ifmt_ldm0 = {
146 16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_REGLIST_LOW_LD) }, { 0 } }
149 static const CGEN_IFMT ifmt_ldm1 = {
150 16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_REGLIST_HI_LD) }, { 0 } }
153 static const CGEN_IFMT ifmt_stm0 = {
154 16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_REGLIST_LOW_ST) }, { 0 } }
157 static const CGEN_IFMT ifmt_stm1 = {
158 16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_REGLIST_HI_ST) }, { 0 } }
161 static const CGEN_IFMT ifmt_enter = {
162 16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_U10) }, { 0 } }
165 #undef F
167 #define A(a) (1 << CONCAT2 (CGEN_INSN_,a))
168 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
169 #define OPERAND(op) CONCAT2 (FR30_OPERAND_,op)
170 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
172 /* The instruction table. */
174 static const CGEN_OPCODE fr30_cgen_insn_opcode_table[MAX_INSNS] =
176 /* Special null first entry.
177 A `num' value of zero is thus invalid.
178 Also, the special `invalid' insn resides here. */
179 { { 0, 0, 0, 0 }, {{0}}, 0, {0}},
180 /* add $Rj,$Ri */
182 { 0, 0, 0, 0 },
183 { { MNEM, ' ', OP (RJ), ',', OP (RI), 0 } },
184 & ifmt_add, { 0xa600 }
186 /* add $u4,$Ri */
188 { 0, 0, 0, 0 },
189 { { MNEM, ' ', OP (U4), ',', OP (RI), 0 } },
190 & ifmt_addi, { 0xa400 }
192 /* add2 $m4,$Ri */
194 { 0, 0, 0, 0 },
195 { { MNEM, ' ', OP (M4), ',', OP (RI), 0 } },
196 & ifmt_add2, { 0xa500 }
198 /* addc $Rj,$Ri */
200 { 0, 0, 0, 0 },
201 { { MNEM, ' ', OP (RJ), ',', OP (RI), 0 } },
202 & ifmt_add, { 0xa700 }
204 /* addn $Rj,$Ri */
206 { 0, 0, 0, 0 },
207 { { MNEM, ' ', OP (RJ), ',', OP (RI), 0 } },
208 & ifmt_add, { 0xa200 }
210 /* addn $u4,$Ri */
212 { 0, 0, 0, 0 },
213 { { MNEM, ' ', OP (U4), ',', OP (RI), 0 } },
214 & ifmt_addi, { 0xa000 }
216 /* addn2 $m4,$Ri */
218 { 0, 0, 0, 0 },
219 { { MNEM, ' ', OP (M4), ',', OP (RI), 0 } },
220 & ifmt_add2, { 0xa100 }
222 /* sub $Rj,$Ri */
224 { 0, 0, 0, 0 },
225 { { MNEM, ' ', OP (RJ), ',', OP (RI), 0 } },
226 & ifmt_add, { 0xac00 }
228 /* subc $Rj,$Ri */
230 { 0, 0, 0, 0 },
231 { { MNEM, ' ', OP (RJ), ',', OP (RI), 0 } },
232 & ifmt_add, { 0xad00 }
234 /* subn $Rj,$Ri */
236 { 0, 0, 0, 0 },
237 { { MNEM, ' ', OP (RJ), ',', OP (RI), 0 } },
238 & ifmt_add, { 0xae00 }
240 /* cmp $Rj,$Ri */
242 { 0, 0, 0, 0 },
243 { { MNEM, ' ', OP (RJ), ',', OP (RI), 0 } },
244 & ifmt_add, { 0xaa00 }
246 /* cmp $u4,$Ri */
248 { 0, 0, 0, 0 },
249 { { MNEM, ' ', OP (U4), ',', OP (RI), 0 } },
250 & ifmt_addi, { 0xa800 }
252 /* cmp2 $m4,$Ri */
254 { 0, 0, 0, 0 },
255 { { MNEM, ' ', OP (M4), ',', OP (RI), 0 } },
256 & ifmt_add2, { 0xa900 }
258 /* and $Rj,$Ri */
260 { 0, 0, 0, 0 },
261 { { MNEM, ' ', OP (RJ), ',', OP (RI), 0 } },
262 & ifmt_add, { 0x8200 }
264 /* or $Rj,$Ri */
266 { 0, 0, 0, 0 },
267 { { MNEM, ' ', OP (RJ), ',', OP (RI), 0 } },
268 & ifmt_add, { 0x9200 }
270 /* eor $Rj,$Ri */
272 { 0, 0, 0, 0 },
273 { { MNEM, ' ', OP (RJ), ',', OP (RI), 0 } },
274 & ifmt_add, { 0x9a00 }
276 /* and $Rj,@$Ri */
278 { 0, 0, 0, 0 },
279 { { MNEM, ' ', OP (RJ), ',', '@', OP (RI), 0 } },
280 & ifmt_add, { 0x8400 }
282 /* andh $Rj,@$Ri */
284 { 0, 0, 0, 0 },
285 { { MNEM, ' ', OP (RJ), ',', '@', OP (RI), 0 } },
286 & ifmt_add, { 0x8500 }
288 /* andb $Rj,@$Ri */
290 { 0, 0, 0, 0 },
291 { { MNEM, ' ', OP (RJ), ',', '@', OP (RI), 0 } },
292 & ifmt_add, { 0x8600 }
294 /* or $Rj,@$Ri */
296 { 0, 0, 0, 0 },
297 { { MNEM, ' ', OP (RJ), ',', '@', OP (RI), 0 } },
298 & ifmt_add, { 0x9400 }
300 /* orh $Rj,@$Ri */
302 { 0, 0, 0, 0 },
303 { { MNEM, ' ', OP (RJ), ',', '@', OP (RI), 0 } },
304 & ifmt_add, { 0x9500 }
306 /* orb $Rj,@$Ri */
308 { 0, 0, 0, 0 },
309 { { MNEM, ' ', OP (RJ), ',', '@', OP (RI), 0 } },
310 & ifmt_add, { 0x9600 }
312 /* eor $Rj,@$Ri */
314 { 0, 0, 0, 0 },
315 { { MNEM, ' ', OP (RJ), ',', '@', OP (RI), 0 } },
316 & ifmt_add, { 0x9c00 }
318 /* eorh $Rj,@$Ri */
320 { 0, 0, 0, 0 },
321 { { MNEM, ' ', OP (RJ), ',', '@', OP (RI), 0 } },
322 & ifmt_add, { 0x9d00 }
324 /* eorb $Rj,@$Ri */
326 { 0, 0, 0, 0 },
327 { { MNEM, ' ', OP (RJ), ',', '@', OP (RI), 0 } },
328 & ifmt_add, { 0x9e00 }
330 /* bandl $u4,@$Ri */
332 { 0, 0, 0, 0 },
333 { { MNEM, ' ', OP (U4), ',', '@', OP (RI), 0 } },
334 & ifmt_addi, { 0x8000 }
336 /* borl $u4,@$Ri */
338 { 0, 0, 0, 0 },
339 { { MNEM, ' ', OP (U4), ',', '@', OP (RI), 0 } },
340 & ifmt_addi, { 0x9000 }
342 /* beorl $u4,@$Ri */
344 { 0, 0, 0, 0 },
345 { { MNEM, ' ', OP (U4), ',', '@', OP (RI), 0 } },
346 & ifmt_addi, { 0x9800 }
348 /* bandh $u4,@$Ri */
350 { 0, 0, 0, 0 },
351 { { MNEM, ' ', OP (U4), ',', '@', OP (RI), 0 } },
352 & ifmt_addi, { 0x8100 }
354 /* borh $u4,@$Ri */
356 { 0, 0, 0, 0 },
357 { { MNEM, ' ', OP (U4), ',', '@', OP (RI), 0 } },
358 & ifmt_addi, { 0x9100 }
360 /* beorh $u4,@$Ri */
362 { 0, 0, 0, 0 },
363 { { MNEM, ' ', OP (U4), ',', '@', OP (RI), 0 } },
364 & ifmt_addi, { 0x9900 }
366 /* btstl $u4,@$Ri */
368 { 0, 0, 0, 0 },
369 { { MNEM, ' ', OP (U4), ',', '@', OP (RI), 0 } },
370 & ifmt_addi, { 0x8800 }
372 /* btsth $u4,@$Ri */
374 { 0, 0, 0, 0 },
375 { { MNEM, ' ', OP (U4), ',', '@', OP (RI), 0 } },
376 & ifmt_addi, { 0x8900 }
378 /* mul $Rj,$Ri */
380 { 0, 0, 0, 0 },
381 { { MNEM, ' ', OP (RJ), ',', OP (RI), 0 } },
382 & ifmt_add, { 0xaf00 }
384 /* mulu $Rj,$Ri */
386 { 0, 0, 0, 0 },
387 { { MNEM, ' ', OP (RJ), ',', OP (RI), 0 } },
388 & ifmt_add, { 0xab00 }
390 /* mulh $Rj,$Ri */
392 { 0, 0, 0, 0 },
393 { { MNEM, ' ', OP (RJ), ',', OP (RI), 0 } },
394 & ifmt_add, { 0xbf00 }
396 /* muluh $Rj,$Ri */
398 { 0, 0, 0, 0 },
399 { { MNEM, ' ', OP (RJ), ',', OP (RI), 0 } },
400 & ifmt_add, { 0xbb00 }
402 /* div0s $Ri */
404 { 0, 0, 0, 0 },
405 { { MNEM, ' ', OP (RI), 0 } },
406 & ifmt_div0s, { 0x9740 }
408 /* div0u $Ri */
410 { 0, 0, 0, 0 },
411 { { MNEM, ' ', OP (RI), 0 } },
412 & ifmt_div0s, { 0x9750 }
414 /* div1 $Ri */
416 { 0, 0, 0, 0 },
417 { { MNEM, ' ', OP (RI), 0 } },
418 & ifmt_div0s, { 0x9760 }
420 /* div2 $Ri */
422 { 0, 0, 0, 0 },
423 { { MNEM, ' ', OP (RI), 0 } },
424 & ifmt_div0s, { 0x9770 }
426 /* div3 */
428 { 0, 0, 0, 0 },
429 { { MNEM, 0 } },
430 & ifmt_div3, { 0x9f60 }
432 /* div4s */
434 { 0, 0, 0, 0 },
435 { { MNEM, 0 } },
436 & ifmt_div3, { 0x9f70 }
438 /* lsl $Rj,$Ri */
440 { 0, 0, 0, 0 },
441 { { MNEM, ' ', OP (RJ), ',', OP (RI), 0 } },
442 & ifmt_add, { 0xb600 }
444 /* lsl $u4,$Ri */
446 { 0, 0, 0, 0 },
447 { { MNEM, ' ', OP (U4), ',', OP (RI), 0 } },
448 & ifmt_addi, { 0xb400 }
450 /* lsl2 $u4,$Ri */
452 { 0, 0, 0, 0 },
453 { { MNEM, ' ', OP (U4), ',', OP (RI), 0 } },
454 & ifmt_addi, { 0xb500 }
456 /* lsr $Rj,$Ri */
458 { 0, 0, 0, 0 },
459 { { MNEM, ' ', OP (RJ), ',', OP (RI), 0 } },
460 & ifmt_add, { 0xb200 }
462 /* lsr $u4,$Ri */
464 { 0, 0, 0, 0 },
465 { { MNEM, ' ', OP (U4), ',', OP (RI), 0 } },
466 & ifmt_addi, { 0xb000 }
468 /* lsr2 $u4,$Ri */
470 { 0, 0, 0, 0 },
471 { { MNEM, ' ', OP (U4), ',', OP (RI), 0 } },
472 & ifmt_addi, { 0xb100 }
474 /* asr $Rj,$Ri */
476 { 0, 0, 0, 0 },
477 { { MNEM, ' ', OP (RJ), ',', OP (RI), 0 } },
478 & ifmt_add, { 0xba00 }
480 /* asr $u4,$Ri */
482 { 0, 0, 0, 0 },
483 { { MNEM, ' ', OP (U4), ',', OP (RI), 0 } },
484 & ifmt_addi, { 0xb800 }
486 /* asr2 $u4,$Ri */
488 { 0, 0, 0, 0 },
489 { { MNEM, ' ', OP (U4), ',', OP (RI), 0 } },
490 & ifmt_addi, { 0xb900 }
492 /* ldi:8 $i8,$Ri */
494 { 0, 0, 0, 0 },
495 { { MNEM, ' ', OP (I8), ',', OP (RI), 0 } },
496 & ifmt_ldi8, { 0xc000 }
498 /* ldi:20 $i20,$Ri */
500 { 0, 0, 0, 0 },
501 { { MNEM, ' ', OP (I20), ',', OP (RI), 0 } },
502 & ifmt_ldi20, { 0x9b00 }
504 /* ldi:32 $i32,$Ri */
506 { 0, 0, 0, 0 },
507 { { MNEM, ' ', OP (I32), ',', OP (RI), 0 } },
508 & ifmt_ldi32, { 0x9f80 }
510 /* ld @$Rj,$Ri */
512 { 0, 0, 0, 0 },
513 { { MNEM, ' ', '@', OP (RJ), ',', OP (RI), 0 } },
514 & ifmt_add, { 0x400 }
516 /* lduh @$Rj,$Ri */
518 { 0, 0, 0, 0 },
519 { { MNEM, ' ', '@', OP (RJ), ',', OP (RI), 0 } },
520 & ifmt_add, { 0x500 }
522 /* ldub @$Rj,$Ri */
524 { 0, 0, 0, 0 },
525 { { MNEM, ' ', '@', OP (RJ), ',', OP (RI), 0 } },
526 & ifmt_add, { 0x600 }
528 /* ld @($R13,$Rj),$Ri */
530 { 0, 0, 0, 0 },
531 { { MNEM, ' ', '@', '(', OP (R13), ',', OP (RJ), ')', ',', OP (RI), 0 } },
532 & ifmt_add, { 0x0 }
534 /* lduh @($R13,$Rj),$Ri */
536 { 0, 0, 0, 0 },
537 { { MNEM, ' ', '@', '(', OP (R13), ',', OP (RJ), ')', ',', OP (RI), 0 } },
538 & ifmt_add, { 0x100 }
540 /* ldub @($R13,$Rj),$Ri */
542 { 0, 0, 0, 0 },
543 { { MNEM, ' ', '@', '(', OP (R13), ',', OP (RJ), ')', ',', OP (RI), 0 } },
544 & ifmt_add, { 0x200 }
546 /* ld @($R14,$disp10),$Ri */
548 { 0, 0, 0, 0 },
549 { { MNEM, ' ', '@', '(', OP (R14), ',', OP (DISP10), ')', ',', OP (RI), 0 } },
550 & ifmt_ldr14, { 0x2000 }
552 /* lduh @($R14,$disp9),$Ri */
554 { 0, 0, 0, 0 },
555 { { MNEM, ' ', '@', '(', OP (R14), ',', OP (DISP9), ')', ',', OP (RI), 0 } },
556 & ifmt_ldr14uh, { 0x4000 }
558 /* ldub @($R14,$disp8),$Ri */
560 { 0, 0, 0, 0 },
561 { { MNEM, ' ', '@', '(', OP (R14), ',', OP (DISP8), ')', ',', OP (RI), 0 } },
562 & ifmt_ldr14ub, { 0x6000 }
564 /* ld @($R15,$udisp6),$Ri */
566 { 0, 0, 0, 0 },
567 { { MNEM, ' ', '@', '(', OP (R15), ',', OP (UDISP6), ')', ',', OP (RI), 0 } },
568 & ifmt_ldr15, { 0x300 }
570 /* ld @$R15+,$Ri */
572 { 0, 0, 0, 0 },
573 { { MNEM, ' ', '@', OP (R15), '+', ',', OP (RI), 0 } },
574 & ifmt_div0s, { 0x700 }
576 /* ld @$R15+,$Rs2 */
578 { 0, 0, 0, 0 },
579 { { MNEM, ' ', '@', OP (R15), '+', ',', OP (RS2), 0 } },
580 & ifmt_ldr15dr, { 0x780 }
582 /* ld @$R15+,$ps */
584 { 0, 0, 0, 0 },
585 { { MNEM, ' ', '@', OP (R15), '+', ',', OP (PS), 0 } },
586 & ifmt_div3, { 0x790 }
588 /* st $Ri,@$Rj */
590 { 0, 0, 0, 0 },
591 { { MNEM, ' ', OP (RI), ',', '@', OP (RJ), 0 } },
592 & ifmt_add, { 0x1400 }
594 /* sth $Ri,@$Rj */
596 { 0, 0, 0, 0 },
597 { { MNEM, ' ', OP (RI), ',', '@', OP (RJ), 0 } },
598 & ifmt_add, { 0x1500 }
600 /* stb $Ri,@$Rj */
602 { 0, 0, 0, 0 },
603 { { MNEM, ' ', OP (RI), ',', '@', OP (RJ), 0 } },
604 & ifmt_add, { 0x1600 }
606 /* st $Ri,@($R13,$Rj) */
608 { 0, 0, 0, 0 },
609 { { MNEM, ' ', OP (RI), ',', '@', '(', OP (R13), ',', OP (RJ), ')', 0 } },
610 & ifmt_add, { 0x1000 }
612 /* sth $Ri,@($R13,$Rj) */
614 { 0, 0, 0, 0 },
615 { { MNEM, ' ', OP (RI), ',', '@', '(', OP (R13), ',', OP (RJ), ')', 0 } },
616 & ifmt_add, { 0x1100 }
618 /* stb $Ri,@($R13,$Rj) */
620 { 0, 0, 0, 0 },
621 { { MNEM, ' ', OP (RI), ',', '@', '(', OP (R13), ',', OP (RJ), ')', 0 } },
622 & ifmt_add, { 0x1200 }
624 /* st $Ri,@($R14,$disp10) */
626 { 0, 0, 0, 0 },
627 { { MNEM, ' ', OP (RI), ',', '@', '(', OP (R14), ',', OP (DISP10), ')', 0 } },
628 & ifmt_ldr14, { 0x3000 }
630 /* sth $Ri,@($R14,$disp9) */
632 { 0, 0, 0, 0 },
633 { { MNEM, ' ', OP (RI), ',', '@', '(', OP (R14), ',', OP (DISP9), ')', 0 } },
634 & ifmt_ldr14uh, { 0x5000 }
636 /* stb $Ri,@($R14,$disp8) */
638 { 0, 0, 0, 0 },
639 { { MNEM, ' ', OP (RI), ',', '@', '(', OP (R14), ',', OP (DISP8), ')', 0 } },
640 & ifmt_ldr14ub, { 0x7000 }
642 /* st $Ri,@($R15,$udisp6) */
644 { 0, 0, 0, 0 },
645 { { MNEM, ' ', OP (RI), ',', '@', '(', OP (R15), ',', OP (UDISP6), ')', 0 } },
646 & ifmt_ldr15, { 0x1300 }
648 /* st $Ri,@-$R15 */
650 { 0, 0, 0, 0 },
651 { { MNEM, ' ', OP (RI), ',', '@', '-', OP (R15), 0 } },
652 & ifmt_div0s, { 0x1700 }
654 /* st $Rs2,@-$R15 */
656 { 0, 0, 0, 0 },
657 { { MNEM, ' ', OP (RS2), ',', '@', '-', OP (R15), 0 } },
658 & ifmt_ldr15dr, { 0x1780 }
660 /* st $ps,@-$R15 */
662 { 0, 0, 0, 0 },
663 { { MNEM, ' ', OP (PS), ',', '@', '-', OP (R15), 0 } },
664 & ifmt_div3, { 0x1790 }
666 /* mov $Rj,$Ri */
668 { 0, 0, 0, 0 },
669 { { MNEM, ' ', OP (RJ), ',', OP (RI), 0 } },
670 & ifmt_add, { 0x8b00 }
672 /* mov $Rs1,$Ri */
674 { 0, 0, 0, 0 },
675 { { MNEM, ' ', OP (RS1), ',', OP (RI), 0 } },
676 & ifmt_movdr, { 0xb700 }
678 /* mov $ps,$Ri */
680 { 0, 0, 0, 0 },
681 { { MNEM, ' ', OP (PS), ',', OP (RI), 0 } },
682 & ifmt_div0s, { 0x1710 }
684 /* mov $Ri,$Rs1 */
686 { 0, 0, 0, 0 },
687 { { MNEM, ' ', OP (RI), ',', OP (RS1), 0 } },
688 & ifmt_movdr, { 0xb300 }
690 /* mov $Ri,$ps */
692 { 0, 0, 0, 0 },
693 { { MNEM, ' ', OP (RI), ',', OP (PS), 0 } },
694 & ifmt_div0s, { 0x710 }
696 /* jmp @$Ri */
698 { 0, 0, 0, 0 },
699 { { MNEM, ' ', '@', OP (RI), 0 } },
700 & ifmt_div0s, { 0x9700 }
702 /* jmp:d @$Ri */
704 { 0, 0, 0, 0 },
705 { { MNEM, ' ', '@', OP (RI), 0 } },
706 & ifmt_div0s, { 0x9f00 }
708 /* call @$Ri */
710 { 0, 0, 0, 0 },
711 { { MNEM, ' ', '@', OP (RI), 0 } },
712 & ifmt_div0s, { 0x9710 }
714 /* call:d @$Ri */
716 { 0, 0, 0, 0 },
717 { { MNEM, ' ', '@', OP (RI), 0 } },
718 & ifmt_div0s, { 0x9f10 }
720 /* call $label12 */
722 { 0, 0, 0, 0 },
723 { { MNEM, ' ', OP (LABEL12), 0 } },
724 & ifmt_call, { 0xd000 }
726 /* call:d $label12 */
728 { 0, 0, 0, 0 },
729 { { MNEM, ' ', OP (LABEL12), 0 } },
730 & ifmt_call, { 0xd800 }
732 /* ret */
734 { 0, 0, 0, 0 },
735 { { MNEM, 0 } },
736 & ifmt_div3, { 0x9720 }
738 /* ret:d */
740 { 0, 0, 0, 0 },
741 { { MNEM, 0 } },
742 & ifmt_div3, { 0x9f20 }
744 /* int $u8 */
746 { 0, 0, 0, 0 },
747 { { MNEM, ' ', OP (U8), 0 } },
748 & ifmt_int, { 0x1f00 }
750 /* inte */
752 { 0, 0, 0, 0 },
753 { { MNEM, 0 } },
754 & ifmt_div3, { 0x9f30 }
756 /* reti */
758 { 0, 0, 0, 0 },
759 { { MNEM, 0 } },
760 & ifmt_div3, { 0x9730 }
762 /* bra:d $label9 */
764 { 0, 0, 0, 0 },
765 { { MNEM, ' ', OP (LABEL9), 0 } },
766 & ifmt_brad, { 0xf000 }
768 /* bra $label9 */
770 { 0, 0, 0, 0 },
771 { { MNEM, ' ', OP (LABEL9), 0 } },
772 & ifmt_brad, { 0xe000 }
774 /* bno:d $label9 */
776 { 0, 0, 0, 0 },
777 { { MNEM, ' ', OP (LABEL9), 0 } },
778 & ifmt_brad, { 0xf100 }
780 /* bno $label9 */
782 { 0, 0, 0, 0 },
783 { { MNEM, ' ', OP (LABEL9), 0 } },
784 & ifmt_brad, { 0xe100 }
786 /* beq:d $label9 */
788 { 0, 0, 0, 0 },
789 { { MNEM, ' ', OP (LABEL9), 0 } },
790 & ifmt_brad, { 0xf200 }
792 /* beq $label9 */
794 { 0, 0, 0, 0 },
795 { { MNEM, ' ', OP (LABEL9), 0 } },
796 & ifmt_brad, { 0xe200 }
798 /* bne:d $label9 */
800 { 0, 0, 0, 0 },
801 { { MNEM, ' ', OP (LABEL9), 0 } },
802 & ifmt_brad, { 0xf300 }
804 /* bne $label9 */
806 { 0, 0, 0, 0 },
807 { { MNEM, ' ', OP (LABEL9), 0 } },
808 & ifmt_brad, { 0xe300 }
810 /* bc:d $label9 */
812 { 0, 0, 0, 0 },
813 { { MNEM, ' ', OP (LABEL9), 0 } },
814 & ifmt_brad, { 0xf400 }
816 /* bc $label9 */
818 { 0, 0, 0, 0 },
819 { { MNEM, ' ', OP (LABEL9), 0 } },
820 & ifmt_brad, { 0xe400 }
822 /* bnc:d $label9 */
824 { 0, 0, 0, 0 },
825 { { MNEM, ' ', OP (LABEL9), 0 } },
826 & ifmt_brad, { 0xf500 }
828 /* bnc $label9 */
830 { 0, 0, 0, 0 },
831 { { MNEM, ' ', OP (LABEL9), 0 } },
832 & ifmt_brad, { 0xe500 }
834 /* bn:d $label9 */
836 { 0, 0, 0, 0 },
837 { { MNEM, ' ', OP (LABEL9), 0 } },
838 & ifmt_brad, { 0xf600 }
840 /* bn $label9 */
842 { 0, 0, 0, 0 },
843 { { MNEM, ' ', OP (LABEL9), 0 } },
844 & ifmt_brad, { 0xe600 }
846 /* bp:d $label9 */
848 { 0, 0, 0, 0 },
849 { { MNEM, ' ', OP (LABEL9), 0 } },
850 & ifmt_brad, { 0xf700 }
852 /* bp $label9 */
854 { 0, 0, 0, 0 },
855 { { MNEM, ' ', OP (LABEL9), 0 } },
856 & ifmt_brad, { 0xe700 }
858 /* bv:d $label9 */
860 { 0, 0, 0, 0 },
861 { { MNEM, ' ', OP (LABEL9), 0 } },
862 & ifmt_brad, { 0xf800 }
864 /* bv $label9 */
866 { 0, 0, 0, 0 },
867 { { MNEM, ' ', OP (LABEL9), 0 } },
868 & ifmt_brad, { 0xe800 }
870 /* bnv:d $label9 */
872 { 0, 0, 0, 0 },
873 { { MNEM, ' ', OP (LABEL9), 0 } },
874 & ifmt_brad, { 0xf900 }
876 /* bnv $label9 */
878 { 0, 0, 0, 0 },
879 { { MNEM, ' ', OP (LABEL9), 0 } },
880 & ifmt_brad, { 0xe900 }
882 /* blt:d $label9 */
884 { 0, 0, 0, 0 },
885 { { MNEM, ' ', OP (LABEL9), 0 } },
886 & ifmt_brad, { 0xfa00 }
888 /* blt $label9 */
890 { 0, 0, 0, 0 },
891 { { MNEM, ' ', OP (LABEL9), 0 } },
892 & ifmt_brad, { 0xea00 }
894 /* bge:d $label9 */
896 { 0, 0, 0, 0 },
897 { { MNEM, ' ', OP (LABEL9), 0 } },
898 & ifmt_brad, { 0xfb00 }
900 /* bge $label9 */
902 { 0, 0, 0, 0 },
903 { { MNEM, ' ', OP (LABEL9), 0 } },
904 & ifmt_brad, { 0xeb00 }
906 /* ble:d $label9 */
908 { 0, 0, 0, 0 },
909 { { MNEM, ' ', OP (LABEL9), 0 } },
910 & ifmt_brad, { 0xfc00 }
912 /* ble $label9 */
914 { 0, 0, 0, 0 },
915 { { MNEM, ' ', OP (LABEL9), 0 } },
916 & ifmt_brad, { 0xec00 }
918 /* bgt:d $label9 */
920 { 0, 0, 0, 0 },
921 { { MNEM, ' ', OP (LABEL9), 0 } },
922 & ifmt_brad, { 0xfd00 }
924 /* bgt $label9 */
926 { 0, 0, 0, 0 },
927 { { MNEM, ' ', OP (LABEL9), 0 } },
928 & ifmt_brad, { 0xed00 }
930 /* bls:d $label9 */
932 { 0, 0, 0, 0 },
933 { { MNEM, ' ', OP (LABEL9), 0 } },
934 & ifmt_brad, { 0xfe00 }
936 /* bls $label9 */
938 { 0, 0, 0, 0 },
939 { { MNEM, ' ', OP (LABEL9), 0 } },
940 & ifmt_brad, { 0xee00 }
942 /* bhi:d $label9 */
944 { 0, 0, 0, 0 },
945 { { MNEM, ' ', OP (LABEL9), 0 } },
946 & ifmt_brad, { 0xff00 }
948 /* bhi $label9 */
950 { 0, 0, 0, 0 },
951 { { MNEM, ' ', OP (LABEL9), 0 } },
952 & ifmt_brad, { 0xef00 }
954 /* dmov $R13,@$dir10 */
956 { 0, 0, 0, 0 },
957 { { MNEM, ' ', OP (R13), ',', '@', OP (DIR10), 0 } },
958 & ifmt_dmovr13, { 0x1800 }
960 /* dmovh $R13,@$dir9 */
962 { 0, 0, 0, 0 },
963 { { MNEM, ' ', OP (R13), ',', '@', OP (DIR9), 0 } },
964 & ifmt_dmovr13h, { 0x1900 }
966 /* dmovb $R13,@$dir8 */
968 { 0, 0, 0, 0 },
969 { { MNEM, ' ', OP (R13), ',', '@', OP (DIR8), 0 } },
970 & ifmt_dmovr13b, { 0x1a00 }
972 /* dmov @$R13+,@$dir10 */
974 { 0, 0, 0, 0 },
975 { { MNEM, ' ', '@', OP (R13), '+', ',', '@', OP (DIR10), 0 } },
976 & ifmt_dmovr13, { 0x1c00 }
978 /* dmovh @$R13+,@$dir9 */
980 { 0, 0, 0, 0 },
981 { { MNEM, ' ', '@', OP (R13), '+', ',', '@', OP (DIR9), 0 } },
982 & ifmt_dmovr13h, { 0x1d00 }
984 /* dmovb @$R13+,@$dir8 */
986 { 0, 0, 0, 0 },
987 { { MNEM, ' ', '@', OP (R13), '+', ',', '@', OP (DIR8), 0 } },
988 & ifmt_dmovr13b, { 0x1e00 }
990 /* dmov @$R15+,@$dir10 */
992 { 0, 0, 0, 0 },
993 { { MNEM, ' ', '@', OP (R15), '+', ',', '@', OP (DIR10), 0 } },
994 & ifmt_dmovr13, { 0x1b00 }
996 /* dmov @$dir10,$R13 */
998 { 0, 0, 0, 0 },
999 { { MNEM, ' ', '@', OP (DIR10), ',', OP (R13), 0 } },
1000 & ifmt_dmovr13, { 0x800 }
1002 /* dmovh @$dir9,$R13 */
1004 { 0, 0, 0, 0 },
1005 { { MNEM, ' ', '@', OP (DIR9), ',', OP (R13), 0 } },
1006 & ifmt_dmovr13h, { 0x900 }
1008 /* dmovb @$dir8,$R13 */
1010 { 0, 0, 0, 0 },
1011 { { MNEM, ' ', '@', OP (DIR8), ',', OP (R13), 0 } },
1012 & ifmt_dmovr13b, { 0xa00 }
1014 /* dmov @$dir10,@$R13+ */
1016 { 0, 0, 0, 0 },
1017 { { MNEM, ' ', '@', OP (DIR10), ',', '@', OP (R13), '+', 0 } },
1018 & ifmt_dmovr13, { 0xc00 }
1020 /* dmovh @$dir9,@$R13+ */
1022 { 0, 0, 0, 0 },
1023 { { MNEM, ' ', '@', OP (DIR9), ',', '@', OP (R13), '+', 0 } },
1024 & ifmt_dmovr13h, { 0xd00 }
1026 /* dmovb @$dir8,@$R13+ */
1028 { 0, 0, 0, 0 },
1029 { { MNEM, ' ', '@', OP (DIR8), ',', '@', OP (R13), '+', 0 } },
1030 & ifmt_dmovr13b, { 0xe00 }
1032 /* dmov @$dir10,@-$R15 */
1034 { 0, 0, 0, 0 },
1035 { { MNEM, ' ', '@', OP (DIR10), ',', '@', '-', OP (R15), 0 } },
1036 & ifmt_dmovr13, { 0xb00 }
1038 /* ldres @$Ri+,$u4 */
1040 { 0, 0, 0, 0 },
1041 { { MNEM, ' ', '@', OP (RI), '+', ',', OP (U4), 0 } },
1042 & ifmt_addi, { 0xbc00 }
1044 /* stres $u4,@$Ri+ */
1046 { 0, 0, 0, 0 },
1047 { { MNEM, ' ', OP (U4), ',', '@', OP (RI), '+', 0 } },
1048 & ifmt_addi, { 0xbd00 }
1050 /* copop $u4c,$ccc,$CRj,$CRi */
1052 { 0, 0, 0, 0 },
1053 { { MNEM, ' ', OP (U4C), ',', OP (CCC), ',', OP (CRJ), ',', OP (CRI), 0 } },
1054 & ifmt_copop, { 0x9fc0 }
1056 /* copld $u4c,$ccc,$Rjc,$CRi */
1058 { 0, 0, 0, 0 },
1059 { { MNEM, ' ', OP (U4C), ',', OP (CCC), ',', OP (RJC), ',', OP (CRI), 0 } },
1060 & ifmt_copld, { 0x9fd0 }
1062 /* copst $u4c,$ccc,$CRj,$Ric */
1064 { 0, 0, 0, 0 },
1065 { { MNEM, ' ', OP (U4C), ',', OP (CCC), ',', OP (CRJ), ',', OP (RIC), 0 } },
1066 & ifmt_copst, { 0x9fe0 }
1068 /* copsv $u4c,$ccc,$CRj,$Ric */
1070 { 0, 0, 0, 0 },
1071 { { MNEM, ' ', OP (U4C), ',', OP (CCC), ',', OP (CRJ), ',', OP (RIC), 0 } },
1072 & ifmt_copst, { 0x9ff0 }
1074 /* nop */
1076 { 0, 0, 0, 0 },
1077 { { MNEM, 0 } },
1078 & ifmt_div3, { 0x9fa0 }
1080 /* andccr $u8 */
1082 { 0, 0, 0, 0 },
1083 { { MNEM, ' ', OP (U8), 0 } },
1084 & ifmt_int, { 0x8300 }
1086 /* orccr $u8 */
1088 { 0, 0, 0, 0 },
1089 { { MNEM, ' ', OP (U8), 0 } },
1090 & ifmt_int, { 0x9300 }
1092 /* stilm $u8 */
1094 { 0, 0, 0, 0 },
1095 { { MNEM, ' ', OP (U8), 0 } },
1096 & ifmt_int, { 0x8700 }
1098 /* addsp $s10 */
1100 { 0, 0, 0, 0 },
1101 { { MNEM, ' ', OP (S10), 0 } },
1102 & ifmt_addsp, { 0xa300 }
1104 /* extsb $Ri */
1106 { 0, 0, 0, 0 },
1107 { { MNEM, ' ', OP (RI), 0 } },
1108 & ifmt_div0s, { 0x9780 }
1110 /* extub $Ri */
1112 { 0, 0, 0, 0 },
1113 { { MNEM, ' ', OP (RI), 0 } },
1114 & ifmt_div0s, { 0x9790 }
1116 /* extsh $Ri */
1118 { 0, 0, 0, 0 },
1119 { { MNEM, ' ', OP (RI), 0 } },
1120 & ifmt_div0s, { 0x97a0 }
1122 /* extuh $Ri */
1124 { 0, 0, 0, 0 },
1125 { { MNEM, ' ', OP (RI), 0 } },
1126 & ifmt_div0s, { 0x97b0 }
1128 /* ldm0 ($reglist_low_ld) */
1130 { 0, 0, 0, 0 },
1131 { { MNEM, ' ', '(', OP (REGLIST_LOW_LD), ')', 0 } },
1132 & ifmt_ldm0, { 0x8c00 }
1134 /* ldm1 ($reglist_hi_ld) */
1136 { 0, 0, 0, 0 },
1137 { { MNEM, ' ', '(', OP (REGLIST_HI_LD), ')', 0 } },
1138 & ifmt_ldm1, { 0x8d00 }
1140 /* stm0 ($reglist_low_st) */
1142 { 0, 0, 0, 0 },
1143 { { MNEM, ' ', '(', OP (REGLIST_LOW_ST), ')', 0 } },
1144 & ifmt_stm0, { 0x8e00 }
1146 /* stm1 ($reglist_hi_st) */
1148 { 0, 0, 0, 0 },
1149 { { MNEM, ' ', '(', OP (REGLIST_HI_ST), ')', 0 } },
1150 & ifmt_stm1, { 0x8f00 }
1152 /* enter $u10 */
1154 { 0, 0, 0, 0 },
1155 { { MNEM, ' ', OP (U10), 0 } },
1156 & ifmt_enter, { 0xf00 }
1158 /* leave */
1160 { 0, 0, 0, 0 },
1161 { { MNEM, 0 } },
1162 & ifmt_div3, { 0x9f90 }
1164 /* xchb @$Rj,$Ri */
1166 { 0, 0, 0, 0 },
1167 { { MNEM, ' ', '@', OP (RJ), ',', OP (RI), 0 } },
1168 & ifmt_add, { 0x8a00 }
1172 #undef A
1173 #undef MNEM
1174 #undef OPERAND
1175 #undef OP
1177 /* Formats for ALIAS macro-insns. */
1179 #define F(f) & fr30_cgen_ifld_table[CONCAT2 (FR30_,f)]
1181 static const CGEN_IFMT ifmt_ldi8m = {
1182 16, 16, 0xf000, { { F (F_OP1) }, { F (F_I8) }, { F (F_RI) }, { 0 } }
1185 static const CGEN_IFMT ifmt_ldi20m = {
1186 16, 32, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_RI) }, { F (F_I20) }, { 0 } }
1189 static const CGEN_IFMT ifmt_ldi32m = {
1190 16, 48, 0xfff0, { { F (F_OP1) }, { F (F_OP2) }, { F (F_OP3) }, { F (F_RI) }, { F (F_I32) }, { 0 } }
1193 #undef F
1195 /* Each non-simple macro entry points to an array of expansion possibilities. */
1197 #define A(a) (1 << CONCAT2 (CGEN_INSN_,a))
1198 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
1199 #define OPERAND(op) CONCAT2 (FR30_OPERAND_,op)
1200 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
1202 /* The macro instruction table. */
1204 static const CGEN_IBASE fr30_cgen_macro_insn_table[] =
1206 /* ldi8 $i8,$Ri */
1208 -1, "ldi8m", "ldi8", 16,
1209 { 0|A(NO_DIS)|A(ALIAS), { (1<<MACH_BASE) } }
1211 /* ldi20 $i20,$Ri */
1213 -1, "ldi20m", "ldi20", 32,
1214 { 0|A(NO_DIS)|A(ALIAS), { (1<<MACH_BASE) } }
1216 /* ldi32 $i32,$Ri */
1218 -1, "ldi32m", "ldi32", 48,
1219 { 0|A(NO_DIS)|A(ALIAS), { (1<<MACH_BASE) } }
1223 /* The macro instruction opcode table. */
1225 static const CGEN_OPCODE fr30_cgen_macro_insn_opcode_table[] =
1227 /* ldi8 $i8,$Ri */
1229 { 0, 0, 0, 0 },
1230 { { MNEM, ' ', OP (I8), ',', OP (RI), 0 } },
1231 & ifmt_ldi8m, { 0xc000 }
1233 /* ldi20 $i20,$Ri */
1235 { 0, 0, 0, 0 },
1236 { { MNEM, ' ', OP (I20), ',', OP (RI), 0 } },
1237 & ifmt_ldi20m, { 0x9b00 }
1239 /* ldi32 $i32,$Ri */
1241 { 0, 0, 0, 0 },
1242 { { MNEM, ' ', OP (I32), ',', OP (RI), 0 } },
1243 & ifmt_ldi32m, { 0x9f80 }
1247 #undef A
1248 #undef MNEM
1249 #undef OPERAND
1250 #undef OP
1252 #ifndef CGEN_ASM_HASH_P
1253 #define CGEN_ASM_HASH_P(insn) 1
1254 #endif
1256 #ifndef CGEN_DIS_HASH_P
1257 #define CGEN_DIS_HASH_P(insn) 1
1258 #endif
1260 /* Return non-zero if INSN is to be added to the hash table.
1261 Targets are free to override CGEN_{ASM,DIS}_HASH_P in the .opc file. */
1263 static int
1264 asm_hash_insn_p (insn)
1265 const CGEN_INSN *insn;
1267 return CGEN_ASM_HASH_P (insn);
1270 static int
1271 dis_hash_insn_p (insn)
1272 const CGEN_INSN *insn;
1274 /* If building the hash table and the NO-DIS attribute is present,
1275 ignore. */
1276 if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_NO_DIS))
1277 return 0;
1278 return CGEN_DIS_HASH_P (insn);
1281 #ifndef CGEN_ASM_HASH
1282 #define CGEN_ASM_HASH_SIZE 127
1283 #ifdef CGEN_MNEMONIC_OPERANDS
1284 #define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE)
1285 #else
1286 #define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE) /*FIXME*/
1287 #endif
1288 #endif
1290 /* It doesn't make much sense to provide a default here,
1291 but while this is under development we do.
1292 BUFFER is a pointer to the bytes of the insn, target order.
1293 VALUE is the first base_insn_bitsize bits as an int in host order. */
1295 #ifndef CGEN_DIS_HASH
1296 #define CGEN_DIS_HASH_SIZE 256
1297 #define CGEN_DIS_HASH(buf, value) (*(unsigned char *) (buf))
1298 #endif
1300 /* The result is the hash value of the insn.
1301 Targets are free to override CGEN_{ASM,DIS}_HASH in the .opc file. */
1303 static unsigned int
1304 asm_hash_insn (mnem)
1305 const char * mnem;
1307 return CGEN_ASM_HASH (mnem);
1310 /* BUF is a pointer to the bytes of the insn, target order.
1311 VALUE is the first base_insn_bitsize bits as an int in host order. */
1313 static unsigned int
1314 dis_hash_insn (buf, value)
1315 const char * buf;
1316 CGEN_INSN_INT value;
1318 return CGEN_DIS_HASH (buf, value);
1321 /* Set the recorded length of the insn in the CGEN_FIELDS struct. */
1323 static void
1324 set_fields_bitsize (fields, size)
1325 CGEN_FIELDS *fields;
1326 int size;
1328 CGEN_FIELDS_BITSIZE (fields) = size;
1331 /* Function to call before using the operand instance table.
1332 This plugs the opcode entries and macro instructions into the cpu table. */
1334 void
1335 fr30_cgen_init_opcode_table (cd)
1336 CGEN_CPU_DESC cd;
1338 int i;
1339 int num_macros = (sizeof (fr30_cgen_macro_insn_table) /
1340 sizeof (fr30_cgen_macro_insn_table[0]));
1341 const CGEN_IBASE *ib = & fr30_cgen_macro_insn_table[0];
1342 const CGEN_OPCODE *oc = & fr30_cgen_macro_insn_opcode_table[0];
1343 CGEN_INSN *insns = (CGEN_INSN *) xmalloc (num_macros * sizeof (CGEN_INSN));
1344 memset (insns, 0, num_macros * sizeof (CGEN_INSN));
1345 for (i = 0; i < num_macros; ++i)
1347 insns[i].base = &ib[i];
1348 insns[i].opcode = &oc[i];
1350 cd->macro_insn_table.init_entries = insns;
1351 cd->macro_insn_table.entry_size = sizeof (CGEN_IBASE);
1352 cd->macro_insn_table.num_init_entries = num_macros;
1354 oc = & fr30_cgen_insn_opcode_table[0];
1355 insns = (CGEN_INSN *) cd->insn_table.init_entries;
1356 for (i = 0; i < MAX_INSNS; ++i)
1357 insns[i].opcode = &oc[i];
1359 cd->sizeof_fields = sizeof (CGEN_FIELDS);
1360 cd->set_fields_bitsize = set_fields_bitsize;
1362 cd->asm_hash_p = asm_hash_insn_p;
1363 cd->asm_hash = asm_hash_insn;
1364 cd->asm_hash_size = CGEN_ASM_HASH_SIZE;
1366 cd->dis_hash_p = dis_hash_insn_p;
1367 cd->dis_hash = dis_hash_insn;
1368 cd->dis_hash_size = CGEN_DIS_HASH_SIZE;