ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64.dd

   1 # GOT layout:
   2 #
   3 # -32752: lazy resolution function
   4 # -32744: reserved for module pointer
   5 # -32736: extf2's GOT entry (undefined 0)
   6 # -32728: extf3's GOT entry (PLT entry)
   7 # -32720: extd2's GOT entry (copy reloc)
   8 # -32712: extf1's GOT entry (.MIPS.stubs entry)
   9 # -32704: extd1's GOT entry (undefined 0)
  10 # -32696: extf4's GOT entry (PLT entry)
  11 # -32688: extd4's GOT entry (undefined 0, reloc only)
  12
  13 .*
  14
  15 Disassembly of section \.plt:
  16
  17 0+43080 <.*>:
  18 .*:     3c0e0008        lui     t2,0x8
  19 .*:     ddd91000        ld      t9,4096\(t2\)
  20 .*:     25ce1000        addiu   t2,t2,4096
  21 .*:     030ec023        subu    t8,t8,t2
  22 .*:     03e07821        move    t3,ra
  23 .*:     0018c0c2        srl     t8,t8,0x3
  24 .*:     0320f809        jalr    t9
  25 .*:     2718fffe        addiu   t8,t8,-2
  26
  27 0+430a0 <extf4@plt>:
  28 .*:     3c0f0008        lui     t3,0x8
  29 .*:     ddf91010        ld      t9,4112\(t3\)
  30 .*:     03200008        jr      t9
  31 .*:     25f81010        addiu   t8,t3,4112
  32
  33 0+430b0 <extf5@plt>:
  34 .*:     3c0f0008        lui     t3,0x8
  35 .*:     ddf91018        ld      t9,4120\(t3\)
  36 .*:     03200008        jr      t9
  37 .*:     25f81018        addiu   t8,t3,4120
  38
  39 0+430c0 <extf3@plt>:
  40 .*:     3c0f0008        lui     t3,0x8
  41 .*:     ddf91020        ld      t9,4128\(t3\)
  42 .*:     03200008        jr      t9
  43 .*:     25f81020        addiu   t8,t3,4128
  44
  45 Disassembly of section \.text:
  46
  47 0+44000 <.*>:
  48         \.\.\.
  49
  50 0+44008 <\.pic\.f1>:
  51    44008:       3c190004        lui     t9,0x4
  52    4400c:       27394010        addiu   t9,t9,16400
  53
  54 0+44010 <f1>:
  55    44010:       0c011013        jal     4404c <f3>
  56    44014:       3c020004        lui     v0,0x4
  57    44018:       03e00008        jr      ra
  58    4401c:       24424020        addiu   v0,v0,16416
  59
  60 0+44020 <f2>:
  61    44020:       3c1c0006        lui     gp,0x6
  62    44024:       0399e021        addu    gp,gp,t9
  63    44028:       279c3fd0        addiu   gp,gp,16336
  64    4402c:       df998038        ld      t9,-32712\(gp\)
  65    44030:       df848020        ld      a0,-32736\(gp\)
  66    44034:       df858040        ld      a1,-32704\(gp\)
  67    44038:       0320f809        jalr    t9
  68    4403c:       df868030        ld      a2,-32720\(gp\)
  69    44040:       df998028        ld      t9,-32728\(gp\)
  70    44044:       03200008        jr      t9
  71    44048:       df848048        ld      a0,-32696\(gp\)
  72
  73 0+4404c <f3>:
  74    4404c:       03e00008        jr      ra
  75    44050:       00000000        nop
  76         \.\.\.
  77
  78 0+44060 <__start>:
  79    44060:       0c011002        jal     44008 <\.pic\.f1>
  80    44064:       00000000        nop
  81    44068:       3c020004        lui     v0,0x4
  82    4406c:       24424020        addiu   v0,v0,16416
  83    44070:       0c010c30        jal     430c0 <extf3@plt>
  84    44074:       00000000        nop
  85    44078:       0c010c28        jal     430a0 <extf4@plt>
  86    4407c:       00000000        nop
  87    44080:       0c010c2c        jal     430b0 <extf5@plt>
  88    44084:       00000000        nop
  89    44088:       3c02000a        lui     v0,0xa
  90    4408c:       24422000        addiu   v0,v0,8192
  91    44090:       3c02000a        lui     v0,0xa
  92    44094:       24422018        addiu   v0,v0,8216
  93         \.\.\.
  94 Disassembly of section \.MIPS\.stubs:
  95
  96 0+440a0 <\.MIPS\.stubs>:
  97    440a0:       df998010        ld      t9,-32752\(gp\)
  98    440a4:       03e0782d        move    t3,ra
  99    440a8:       0320f809        jalr    t9
 100    440ac:       6418000a        daddiu  t8,zero,10
 101         \.\.\.