3 Free Software Foundation, Inc.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
23 #include "dwarf2dbg.h"
24 #include "safe-ctype.h"
26 #include "opcode/tic6x.h"
27 #include "elf32-tic6x.h"
29 /* Truncate and sign-extend at 32 bits, so that building on a 64-bit
30 host gives identical results to a 32-bit host. */
31 #define TRUNC(X) ((valueT) (X) & 0xffffffffU)
32 #define SEXT(X) ((TRUNC (X) ^ 0x80000000U) - 0x80000000U)
34 const char comment_chars
[] = ";";
35 const char line_comment_chars
[] = "#*;";
36 const char line_separator_chars
[] = "@";
38 const char EXP_CHARS
[] = "eE";
39 const char FLT_CHARS
[] = "dDfF";
41 const char *md_shortopts
= "";
45 OPTION_MARCH
= OPTION_MD_BASE
,
49 OPTION_MLITTLE_ENDIAN
,
53 struct option md_longopts
[] =
55 { "march", required_argument
, NULL
, OPTION_MARCH
},
56 { "matomic", no_argument
, NULL
, OPTION_MATOMIC
},
57 { "mno-atomic", no_argument
, NULL
, OPTION_MNO_ATOMIC
},
58 { "mbig-endian", no_argument
, NULL
, OPTION_MBIG_ENDIAN
},
59 { "mlittle-endian", no_argument
, NULL
, OPTION_MLITTLE_ENDIAN
},
60 { "mgenerate-rel", no_argument
, NULL
, OPTION_MGENERATE_REL
},
61 { NULL
, no_argument
, NULL
, 0 }
63 size_t md_longopts_size
= sizeof (md_longopts
);
65 /* Whether to enable atomic instructions. 1 to enable them, 0 to
66 disable, -1 to default from architecture. */
67 static int tic6x_atomic
= -1;
69 /* The instructions enabled based only on the selected architecture
70 (all instructions, if no architecture specified). Atomic
71 instructions may be enabled or disabled separately. */
72 static unsigned short tic6x_arch_enable
= (TIC6X_INSN_C62X
80 /* The instructions enabled based on the current set of features
81 (architecture, as modified by other options). */
82 static unsigned short tic6x_features
;
84 /* The number of registers in each register file supported by the
85 current architecture. */
86 static unsigned int tic6x_num_registers
;
88 /* Whether predication on A0 is possible. */
89 static bfd_boolean tic6x_predicate_a0
;
91 /* Whether execute packets can cross fetch packet boundaries. */
92 static bfd_boolean tic6x_can_cross_fp_boundary
;
94 /* Whether there are constraints on simultaneous reads and writes of
96 static bfd_boolean tic6x_long_data_constraints
;
98 /* Whether compact instructions are available. */
99 static bfd_boolean tic6x_compact_insns
;
101 /* Whether to generate RELA relocations. */
102 static bfd_boolean tic6x_generate_rela
= TRUE
;
104 /* Table of supported architecture variants. */
108 unsigned short features
;
110 static const tic6x_arch_table tic6x_arches
[] =
112 { "c62x", TIC6X_INSN_C62X
},
113 { "c64x", TIC6X_INSN_C62X
| TIC6X_INSN_C64X
},
114 { "c64x+", TIC6X_INSN_C62X
| TIC6X_INSN_C64X
| TIC6X_INSN_C64XP
},
115 { "c67x", TIC6X_INSN_C62X
| TIC6X_INSN_C67X
},
116 { "c67x+", TIC6X_INSN_C62X
| TIC6X_INSN_C67X
| TIC6X_INSN_C67XP
},
117 { "c674x", (TIC6X_INSN_C62X
122 | TIC6X_INSN_C674X
) }
125 /* Update the selected architecture based on ARCH, giving an error if
126 ARCH is an invalid value. Does not call tic6x_update_features; the
127 caller must do that if necessary. */
130 tic6x_use_arch (const char *arch
)
134 for (i
= 0; i
< ARRAY_SIZE (tic6x_arches
); i
++)
135 if (strcmp (arch
, tic6x_arches
[i
].arch
) == 0)
137 tic6x_arch_enable
= tic6x_arches
[i
].features
;
141 as_bad (_("unknown architecture '%s'"), arch
);
144 /* Parse a target-specific option. */
147 md_parse_option (int c
, char *arg
)
152 tic6x_use_arch (arg
);
159 case OPTION_MNO_ATOMIC
:
163 case OPTION_MBIG_ENDIAN
:
164 target_big_endian
= 1;
167 case OPTION_MLITTLE_ENDIAN
:
168 target_big_endian
= 0;
171 case OPTION_MGENERATE_REL
:
172 tic6x_generate_rela
= FALSE
;
182 md_show_usage (FILE *stream ATTRIBUTE_UNUSED
)
186 fputc ('\n', stream
);
187 fprintf (stream
, _("TMS320C6000 options:\n"));
188 fprintf (stream
, _(" -march=ARCH enable instructions from architecture ARCH\n"));
189 fprintf (stream
, _(" -matomic enable atomic operation instructions\n"));
190 fprintf (stream
, _(" -mno-atomic disable atomic operation instructions\n"));
191 fprintf (stream
, _(" -mbig-endian generate big-endian code\n"));
192 fprintf (stream
, _(" -mlittle-endian generate little-endian code\n"));
193 /* -mgenerate-rel is only for testsuite use and is deliberately
196 fputc ('\n', stream
);
197 fprintf (stream
, _("Supported ARCH values are:"));
198 for (i
= 0; i
< ARRAY_SIZE (tic6x_arches
); i
++)
199 fprintf (stream
, " %s", tic6x_arches
[i
].arch
);
200 fputc ('\n', stream
);
203 /* Update enabled features based on the current architecture and
206 tic6x_update_features (void)
208 switch (tic6x_atomic
)
211 tic6x_features
= tic6x_arch_enable
;
215 tic6x_features
= tic6x_arch_enable
& ~TIC6X_INSN_ATOMIC
;
219 tic6x_features
= tic6x_arch_enable
| TIC6X_INSN_ATOMIC
;
227 = (tic6x_arch_enable
& (TIC6X_INSN_C64X
| TIC6X_INSN_C67XP
)) ? 32 : 16;
229 tic6x_predicate_a0
= (tic6x_arch_enable
& TIC6X_INSN_C64X
) ? TRUE
: FALSE
;
231 tic6x_can_cross_fp_boundary
233 & (TIC6X_INSN_C64X
| TIC6X_INSN_C67XP
)) ? TRUE
: FALSE
;
235 tic6x_long_data_constraints
236 = (tic6x_arch_enable
& TIC6X_INSN_C64X
) ? FALSE
: TRUE
;
238 tic6x_compact_insns
= (tic6x_arch_enable
& TIC6X_INSN_C64XP
) ? TRUE
: FALSE
;
241 /* Do configuration after all options have been parsed. */
244 tic6x_after_parse_args (void)
246 tic6x_update_features ();
249 /* Parse a .arch directive. */
252 s_tic6x_arch (int ignored ATTRIBUTE_UNUSED
)
257 arch
= input_line_pointer
;
258 while (*input_line_pointer
&& !ISSPACE (*input_line_pointer
))
259 input_line_pointer
++;
260 c
= *input_line_pointer
;
261 *input_line_pointer
= 0;
263 tic6x_use_arch (arch
);
264 tic6x_update_features ();
265 *input_line_pointer
= c
;
266 demand_empty_rest_of_line ();
269 /* Parse a .atomic directive. */
272 s_tic6x_atomic (int ignored ATTRIBUTE_UNUSED
)
275 tic6x_update_features ();
276 demand_empty_rest_of_line ();
279 /* Parse a .noatomic directive. */
282 s_tic6x_noatomic (int ignored ATTRIBUTE_UNUSED
)
285 tic6x_update_features ();
286 demand_empty_rest_of_line ();
289 /* Parse a .nocmp directive. */
292 s_tic6x_nocmp (int ignored ATTRIBUTE_UNUSED
)
294 seg_info (now_seg
)->tc_segment_info_data
.nocmp
= TRUE
;
295 demand_empty_rest_of_line ();
298 const pseudo_typeS md_pseudo_table
[] =
300 { "arch", s_tic6x_arch
, 0 },
301 { "atomic", s_tic6x_atomic
, 0 },
302 { "noatomic", s_tic6x_noatomic
, 0 },
303 { "nocmp", s_tic6x_nocmp
, 0 },
308 /* Hash table of opcodes. For each opcode name, this stores a pointer
309 to a tic6x_opcode_list listing (in an arbitrary order) all opcode
310 table entries with that name. */
311 static struct hash_control
*opcode_hash
;
313 /* Initialize the assembler (called once at assembler startup). */
320 bfd_set_arch_mach (stdoutput
, TARGET_ARCH
, 0);
322 /* Insert opcodes into the hash table. */
323 opcode_hash
= hash_new ();
324 for (id
= 0; id
< tic6x_opcode_max
; id
++)
327 tic6x_opcode_list
*opc
= xmalloc (sizeof (tic6x_opcode_list
));
330 opc
->next
= hash_find (opcode_hash
, tic6x_opcode_table
[id
].name
);
331 if ((errmsg
= hash_jam (opcode_hash
, tic6x_opcode_table
[id
].name
, opc
))
333 as_fatal ("%s", _(errmsg
));
337 /* Whether the current line being parsed had the "||" parallel bars. */
338 static bfd_boolean tic6x_line_parallel
;
340 /* Whether the current line being parsed started "||^" to indicate an
341 SPMASKed parallel instruction. */
342 static bfd_boolean tic6x_line_spmask
;
344 /* If the current line being parsed had an instruction predicate, the
345 creg value for that predicate (which must be nonzero); otherwise
347 static unsigned int tic6x_line_creg
;
349 /* If the current line being parsed had an instruction predicate, the
350 z value for that predicate; otherwise 0. */
351 static unsigned int tic6x_line_z
;
353 /* Return 1 (updating input_line_pointer as appropriate) if the line
354 starting with C (immediately before input_line_pointer) starts with
355 pre-opcode text appropriate for this target, 0 otherwise. */
358 tic6x_unrecognized_line (int c
)
363 bfd_boolean bad_predicate
;
368 if (input_line_pointer
[0] == '|')
370 if (input_line_pointer
[1] == '^')
372 tic6x_line_spmask
= TRUE
;
373 input_line_pointer
+= 2;
376 input_line_pointer
+= 1;
377 if (tic6x_line_parallel
)
378 as_bad (_("multiple '||' on same line"));
379 tic6x_line_parallel
= TRUE
;
381 as_bad (_("'||' after predicate"));
387 /* If it doesn't look like a predicate at all, just return 0.
388 If it looks like one but not a valid one, give a better
390 p
= input_line_pointer
;
391 while (*p
!= ']' && !is_end_of_line
[(unsigned char) *p
])
396 p
= input_line_pointer
;
398 bad_predicate
= FALSE
;
404 if (*p
== 'A' || *p
== 'a')
406 else if (*p
== 'B' || *p
== 'b')
410 areg
= TRUE
; /* Avoid uninitialized warning. */
411 bad_predicate
= TRUE
;
416 if (*p
!= '0' && *p
!= '1' && *p
!= '2')
417 bad_predicate
= TRUE
;
418 else if (p
[1] != ']')
419 bad_predicate
= TRUE
;
421 input_line_pointer
= p
+ 2;
425 as_bad (_("multiple predicates on same line"));
431 as_bad (_("bad predicate '%s'"), input_line_pointer
- 1);
433 input_line_pointer
= endp
;
440 tic6x_line_creg
= (areg
? 6 : 1);
441 if (areg
&& !tic6x_predicate_a0
)
442 as_bad (_("predication on A0 not supported on this architecture"));
446 tic6x_line_creg
= (areg
? 4 : 2);
450 tic6x_line_creg
= (areg
? 5 : 3);
465 /* Do any target-specific handling of a label required. */
468 tic6x_frob_label (symbolS
*sym ATTRIBUTE_UNUSED
)
470 if (tic6x_line_parallel
)
472 as_bad (_("label after '||'"));
473 tic6x_line_parallel
= FALSE
;
474 tic6x_line_spmask
= FALSE
;
478 as_bad (_("label after predicate"));
483 seg_info (now_seg
)->tc_segment_info_data
.seen_label
= TRUE
;
485 /* Defining tc_frob_label overrides the ELF definition of
486 obj_frob_label, so we need to apply its effects here. */
487 dwarf2_emit_label (sym
);
490 /* At end-of-line, give errors for start-of-line decorations that
491 needed an instruction but were not followed by one. */
494 tic6x_end_of_line (void)
496 if (tic6x_line_parallel
)
498 as_bad (_("'||' not followed by instruction"));
499 tic6x_line_parallel
= FALSE
;
500 tic6x_line_spmask
= FALSE
;
504 as_bad (_("predicate not followed by instruction"));
510 /* Do any target-specific handling of the start of a logical line. */
513 tic6x_start_line_hook (void)
515 tic6x_end_of_line ();
518 /* Do target-specific handling immediately after all input files have
524 tic6x_end_of_line ();
527 /* Do target-specific initialization after arguments have been
528 processed and the output file created. */
531 tic6x_init_after_args (void)
533 elf32_tic6x_set_use_rela_p (stdoutput
, tic6x_generate_rela
);
536 /* Handle a data alignment of N bytes. */
539 tic6x_cons_align (int n ATTRIBUTE_UNUSED
)
541 segment_info_type
*seginfo
= seg_info (now_seg
);
543 /* Data means there is no current execute packet, and that any label
544 applies to that data rather than a subsequent instruction. */
545 seginfo
->tc_segment_info_data
.num_execute_packet_insns
= 0;
546 seginfo
->tc_segment_info_data
.seen_label
= FALSE
;
547 seginfo
->tc_segment_info_data
.last_insn_lsb
= NULL
;
548 seginfo
->tc_segment_info_data
.spmask_addr
= NULL
;
551 /* Types of operand for parsing purposes. These are used as bit-masks
552 to tell tic6x_parse_operand what forms of operand are
554 #define TIC6X_OP_EXP 0x0001u
555 #define TIC6X_OP_REG 0x0002u
556 #define TIC6X_OP_REGPAIR 0x0004u
557 #define TIC6X_OP_IRP 0x0008u
558 #define TIC6X_OP_NRP 0x0010u
559 /* With TIC6X_OP_MEM_NOUNREG, the contents of a () offset are always
560 interpreted as an expression, which may be a symbol with the same
561 name as a register that ends up being implicitly DP-relative. With
562 TIC6X_OP_MEM_UNREG, the contents of a () offset are interpreted as
563 a register if they match one, and failing that as an expression,
564 which must be constant. */
565 #define TIC6X_OP_MEM_NOUNREG 0x0020u
566 #define TIC6X_OP_MEM_UNREG 0x0040u
567 #define TIC6X_OP_CTRL 0x0080u
568 #define TIC6X_OP_FUNC_UNIT 0x0100u
570 /* A register or register pair read by the assembler. */
573 /* The side the register is on (1 or 2). */
575 /* The register number (0 to 31). */
579 /* Types of modification of a base address. */
585 tic6x_mem_mod_preinc
,
586 tic6x_mem_mod_predec
,
587 tic6x_mem_mod_postinc
,
588 tic6x_mem_mod_postdec
591 /* Scaled [] or unscaled () nature of an offset. */
596 tic6x_offset_unscaled
599 /* A memory operand read by the assembler. */
602 /* The base register. */
603 tic6x_register base_reg
;
604 /* How the base register is modified. */
606 /* Whether there is an offset (required with plain "+" and "-"), and
607 whether it is scaled or unscaled if so. */
608 tic6x_mem_scaling scaled
;
609 /* Whether the offset is a register (TRUE) or an expression
611 bfd_boolean offset_is_reg
;
620 /* A functional unit in SPMASK operands read by the assembler. */
623 /* The basic unit. */
624 tic6x_func_unit_base base
;
625 /* The side (1 or 2). */
627 } tic6x_func_unit_operand
;
629 /* An operand read by the assembler. */
632 /* The syntactic form of the operand, as one of the bit-masks
635 /* The operand value. */
638 /* An expression: TIC6X_OP_EXP. */
640 /* A register: TIC6X_OP_REG, TIC6X_OP_REGPAIR. */
642 /* A memory reference: TIC6X_OP_MEM_NOUNREG,
643 TIC6X_OP_MEM_UNREG. */
645 /* A control register: TIC6X_OP_CTRL. */
647 /* A functional unit: TIC6X_OP_FUNC_UNIT. */
648 tic6x_func_unit_operand func_unit
;
652 #define skip_whitespace(str) do { if (*(str) == ' ') ++(str); } while (0)
654 /* Parse a register operand, or part of an operand, starting at *P.
655 If syntactically OK (including that the number is in the range 0 to
656 31, but not necessarily in range for this architecture), return
657 TRUE, putting the register side and number in *REG and update *P to
658 point immediately after the register number; otherwise return FALSE
659 without changing *P (but possibly changing *REG). Do not print any
663 tic6x_parse_register (char **p
, tic6x_register
*reg
)
684 if (*r
>= '0' && *r
<= '9')
692 if (reg
->num
> 0 && *r
>= '0' && *r
<= '9')
694 reg
->num
= reg
->num
* 10 + (*r
- '0');
698 if (*r
>= '0' && *r
<= '9')
707 /* Parse the initial two characters of a functional unit name starting
708 at *P. If OK, set *BASE and *SIDE and return TRUE; otherwise,
712 tic6x_parse_func_unit_base (char *p
, tic6x_func_unit_base
*base
,
715 bfd_boolean good_func_unit
= TRUE
;
716 tic6x_func_unit_base maybe_base
= tic6x_func_unit_nfu
;
717 unsigned int maybe_side
= 0;
723 maybe_base
= tic6x_func_unit_d
;
728 maybe_base
= tic6x_func_unit_l
;
733 maybe_base
= tic6x_func_unit_m
;
738 maybe_base
= tic6x_func_unit_s
;
742 good_func_unit
= FALSE
;
758 good_func_unit
= FALSE
;
768 return good_func_unit
;
771 /* Parse an operand starting at *P. If the operand parses OK, return
772 TRUE and store the value in *OP; otherwise return FALSE (possibly
773 changing *OP). In any case, update *P to point to the following
774 comma or end of line. The possible operand forms are given by
775 OP_FORMS. For diagnostics, this is operand OPNO of an opcode
776 starting at STR, length OPC_LEN. */
779 tic6x_parse_operand (char **p
, tic6x_operand
*op
, unsigned int op_forms
,
780 char *str
, int opc_len
, unsigned int opno
)
782 bfd_boolean operand_parsed
= FALSE
;
785 if ((op_forms
& (TIC6X_OP_MEM_NOUNREG
| TIC6X_OP_MEM_UNREG
))
786 == (TIC6X_OP_MEM_NOUNREG
| TIC6X_OP_MEM_UNREG
))
789 /* Check for functional unit names for SPMASK and SPMASKR. */
790 if (!operand_parsed
&& (op_forms
& TIC6X_OP_FUNC_UNIT
))
792 tic6x_func_unit_base base
= tic6x_func_unit_nfu
;
793 unsigned int side
= 0;
795 if (tic6x_parse_func_unit_base (q
, &base
, &side
))
799 skip_whitespace (rq
);
800 if (is_end_of_line
[(unsigned char) *rq
] || *rq
== ',')
802 op
->form
= TIC6X_OP_FUNC_UNIT
;
803 op
->value
.func_unit
.base
= base
;
804 op
->value
.func_unit
.side
= side
;
805 operand_parsed
= TRUE
;
811 /* Check for literal "irp". */
812 if (!operand_parsed
&& (op_forms
& TIC6X_OP_IRP
))
814 if ((q
[0] == 'i' || q
[0] == 'I')
815 && (q
[1] == 'r' || q
[1] == 'R')
816 && (q
[2] == 'p' || q
[2] == 'P'))
820 skip_whitespace (rq
);
821 if (is_end_of_line
[(unsigned char) *rq
] || *rq
== ',')
823 op
->form
= TIC6X_OP_IRP
;
824 operand_parsed
= TRUE
;
830 /* Check for literal "nrp". */
831 if (!operand_parsed
&& (op_forms
& TIC6X_OP_NRP
))
833 if ((q
[0] == 'n' || q
[0] == 'N')
834 && (q
[1] == 'r' || q
[1] == 'R')
835 && (q
[2] == 'p' || q
[2] == 'P'))
839 skip_whitespace (rq
);
840 if (is_end_of_line
[(unsigned char) *rq
] || *rq
== ',')
842 op
->form
= TIC6X_OP_NRP
;
843 operand_parsed
= TRUE
;
849 /* Check for control register names. */
850 if (!operand_parsed
&& (op_forms
& TIC6X_OP_CTRL
))
854 for (crid
= 0; crid
< tic6x_ctrl_max
; crid
++)
856 size_t len
= strlen (tic6x_ctrl_table
[crid
].name
);
858 if (strncasecmp (tic6x_ctrl_table
[crid
].name
, q
, len
) == 0)
862 skip_whitespace (rq
);
863 if (is_end_of_line
[(unsigned char) *rq
] || *rq
== ',')
865 op
->form
= TIC6X_OP_CTRL
;
866 op
->value
.ctrl
= crid
;
867 operand_parsed
= TRUE
;
869 if (!(tic6x_ctrl_table
[crid
].isa_variants
& tic6x_features
))
870 as_bad (_("control register '%s' not supported "
871 "on this architecture"),
872 tic6x_ctrl_table
[crid
].name
);
878 /* See if this looks like a memory reference. */
880 && (op_forms
& (TIC6X_OP_MEM_NOUNREG
| TIC6X_OP_MEM_UNREG
)))
882 bfd_boolean mem_ok
= TRUE
;
884 tic6x_mem_mod mem_mod
= tic6x_mem_mod_none
;
885 tic6x_register base_reg
;
886 bfd_boolean require_offset
, permit_offset
;
887 tic6x_mem_scaling scaled
;
888 bfd_boolean offset_is_reg
;
889 expressionS offset_exp
;
890 tic6x_register offset_reg
;
899 skip_whitespace (mq
);
905 mem_mod
= tic6x_mem_mod_preinc
;
910 mem_mod
= tic6x_mem_mod_plus
;
918 mem_mod
= tic6x_mem_mod_predec
;
923 mem_mod
= tic6x_mem_mod_minus
;
935 skip_whitespace (mq
);
936 mem_ok
= tic6x_parse_register (&mq
, &base_reg
);
939 if (mem_ok
&& mem_mod
== tic6x_mem_mod_none
)
941 skip_whitespace (mq
);
942 if (mq
[0] == '+' && mq
[1] == '+')
944 mem_mod
= tic6x_mem_mod_postinc
;
947 else if (mq
[0] == '-' && mq
[1] == '-')
949 mem_mod
= tic6x_mem_mod_postdec
;
954 if (mem_mod
== tic6x_mem_mod_none
)
955 permit_offset
= FALSE
;
957 permit_offset
= TRUE
;
958 if (mem_mod
== tic6x_mem_mod_plus
|| mem_mod
== tic6x_mem_mod_minus
)
959 require_offset
= TRUE
;
961 require_offset
= FALSE
;
962 scaled
= tic6x_offset_none
;
963 offset_is_reg
= FALSE
;
965 if (mem_ok
&& permit_offset
)
969 skip_whitespace (mq
);
973 scaled
= tic6x_offset_scaled
;
979 scaled
= tic6x_offset_unscaled
;
987 if (scaled
!= tic6x_offset_none
)
989 skip_whitespace (mq
);
990 if (scaled
== tic6x_offset_scaled
991 || (op_forms
& TIC6X_OP_MEM_UNREG
))
996 reg_ok
= tic6x_parse_register (&rq
, &offset_reg
);
999 skip_whitespace (rq
);
1003 offset_is_reg
= TRUE
;
1009 char *save_input_line_pointer
;
1011 save_input_line_pointer
= input_line_pointer
;
1012 input_line_pointer
= mq
;
1013 expression (&offset_exp
);
1014 mq
= input_line_pointer
;
1015 input_line_pointer
= save_input_line_pointer
;
1017 skip_whitespace (mq
);
1025 if (mem_ok
&& require_offset
&& scaled
== tic6x_offset_none
)
1030 skip_whitespace (mq
);
1031 if (!is_end_of_line
[(unsigned char) *mq
] && *mq
!= ',')
1037 op
->form
= op_forms
& (TIC6X_OP_MEM_NOUNREG
| TIC6X_OP_MEM_UNREG
);
1038 op
->value
.mem
.base_reg
= base_reg
;
1039 op
->value
.mem
.mod
= mem_mod
;
1040 op
->value
.mem
.scaled
= scaled
;
1041 op
->value
.mem
.offset_is_reg
= offset_is_reg
;
1043 op
->value
.mem
.offset
.reg
= offset_reg
;
1045 op
->value
.mem
.offset
.exp
= offset_exp
;
1046 operand_parsed
= TRUE
;
1048 if (base_reg
.num
>= tic6x_num_registers
)
1049 as_bad (_("register number %u not supported on this architecture"),
1051 if (offset_is_reg
&& offset_reg
.num
>= tic6x_num_registers
)
1052 as_bad (_("register number %u not supported on this architecture"),
1057 /* See if this looks like a register or register pair. */
1058 if (!operand_parsed
&& (op_forms
& (TIC6X_OP_REG
| TIC6X_OP_REGPAIR
)))
1060 tic6x_register first_reg
, second_reg
;
1064 reg_ok
= tic6x_parse_register (&rq
, &first_reg
);
1068 if (*rq
== ':' && (op_forms
& TIC6X_OP_REGPAIR
))
1071 reg_ok
= tic6x_parse_register (&rq
, &second_reg
);
1074 skip_whitespace (rq
);
1075 if (is_end_of_line
[(unsigned char) *rq
] || *rq
== ',')
1077 if ((second_reg
.num
& 1)
1078 || (first_reg
.num
!= second_reg
.num
+ 1)
1079 || (first_reg
.side
!= second_reg
.side
))
1080 as_bad (_("register pair for operand %u of '%.*s'"
1081 " not a valid even/odd pair"), opno
,
1083 op
->form
= TIC6X_OP_REGPAIR
;
1084 op
->value
.reg
= second_reg
;
1085 operand_parsed
= TRUE
;
1090 else if (op_forms
& TIC6X_OP_REG
)
1092 skip_whitespace (rq
);
1093 if (is_end_of_line
[(unsigned char) *rq
] || *rq
== ',')
1095 op
->form
= TIC6X_OP_REG
;
1096 op
->value
.reg
= first_reg
;
1097 operand_parsed
= TRUE
;
1104 if (first_reg
.num
>= tic6x_num_registers
)
1105 as_bad (_("register number %u not supported on this architecture"),
1107 if (op
->form
== TIC6X_OP_REGPAIR
1108 && second_reg
.num
>= tic6x_num_registers
)
1109 as_bad (_("register number %u not supported on this architecture"),
1114 /* Otherwise, parse it as an expression. */
1115 if (!operand_parsed
&& (op_forms
& TIC6X_OP_EXP
))
1117 char *save_input_line_pointer
;
1119 save_input_line_pointer
= input_line_pointer
;
1120 input_line_pointer
= q
;
1121 op
->form
= TIC6X_OP_EXP
;
1122 expression (&op
->value
.exp
);
1123 q
= input_line_pointer
;
1124 input_line_pointer
= save_input_line_pointer
;
1125 operand_parsed
= TRUE
;
1130 /* Now the operand has been parsed, there must be nothing more
1131 before the comma or end of line. */
1132 skip_whitespace (q
);
1133 if (!is_end_of_line
[(unsigned char) *q
] && *q
!= ',')
1135 operand_parsed
= FALSE
;
1136 as_bad (_("junk after operand %u of '%.*s'"), opno
,
1138 while (!is_end_of_line
[(unsigned char) *q
] && *q
!= ',')
1144 /* This could not be parsed as any acceptable form of
1148 case TIC6X_OP_REG
| TIC6X_OP_REGPAIR
:
1149 as_bad (_("bad register or register pair for operand %u of '%.*s'"),
1150 opno
, opc_len
, str
);
1153 case TIC6X_OP_REG
| TIC6X_OP_CTRL
:
1155 as_bad (_("bad register for operand %u of '%.*s'"),
1156 opno
, opc_len
, str
);
1159 case TIC6X_OP_REGPAIR
:
1160 as_bad (_("bad register pair for operand %u of '%.*s'"),
1161 opno
, opc_len
, str
);
1164 case TIC6X_OP_FUNC_UNIT
:
1165 as_bad (_("bad functional unit for operand %u of '%.*s'"),
1166 opno
, opc_len
, str
);
1170 as_bad (_("bad operand %u of '%.*s'"),
1171 opno
, opc_len
, str
);
1175 while (!is_end_of_line
[(unsigned char) *q
] && *q
!= ',')
1179 return operand_parsed
;
1182 /* Table of assembler operators and associated O_* values. */
1187 } tic6x_operator_table
;
1188 static const tic6x_operator_table tic6x_operators
[] = {
1189 #define O_dsbt_index O_md1
1190 { "dsbt_index", O_dsbt_index
},
1193 #define O_dpr_got O_md3
1194 { "dpr_got", O_dpr_got
},
1195 #define O_dpr_byte O_md4
1196 { "dpr_byte", O_dpr_byte
},
1197 #define O_dpr_hword O_md5
1198 { "dpr_hword", O_dpr_hword
},
1199 #define O_dpr_word O_md6
1200 { "dpr_word", O_dpr_word
},
1203 /* Parse a name in some machine-specific way. Used on C6X to handle
1204 assembler operators. */
1207 tic6x_parse_name (const char *name
, expressionS
*exprP
,
1208 enum expr_mode mode ATTRIBUTE_UNUSED
, char *nextchar
)
1210 char *p
= input_line_pointer
;
1211 char c
, *name_start
, *name_end
;
1212 const char *inner_name
;
1214 operatorT op
= O_illegal
;
1220 for (i
= 0; i
< ARRAY_SIZE (tic6x_operators
); i
++)
1221 if (strcasecmp (name
+ 1, tic6x_operators
[i
].name
) == 0)
1223 op
= tic6x_operators
[i
].op
;
1227 if (op
== O_illegal
)
1230 *input_line_pointer
= *nextchar
;
1231 skip_whitespace (p
);
1235 *input_line_pointer
= 0;
1239 skip_whitespace (p
);
1241 if (!is_name_beginner (*p
))
1243 *input_line_pointer
= 0;
1249 while (is_part_of_name (*p
))
1252 skip_whitespace (p
);
1256 *input_line_pointer
= 0;
1260 input_line_pointer
= p
+ 1;
1261 *nextchar
= *input_line_pointer
;
1262 *input_line_pointer
= 0;
1266 inner_name
= name_start
;
1267 if (op
== O_dsbt_index
&& strcmp (inner_name
, "__c6xabi_DSBT_BASE") != 0)
1269 as_bad (_("$DSBT_INDEX must be used with __c6xabi_DSBT_BASE"));
1270 inner_name
= "__c6xabi_DSBT_BASE";
1272 sym
= symbol_find_or_make (inner_name
);
1276 exprP
->X_add_symbol
= sym
;
1277 exprP
->X_add_number
= 0;
1278 exprP
->X_op_symbol
= NULL
;
1284 /* Create a fixup for an expression. Same arguments as fix_new_exp,
1285 plus FIX_ADDA which is TRUE for ADDA instructions (to indicate that
1286 fixes resolving to constants should have those constants implicitly
1287 shifted) and FALSE otherwise, but look for C6X-specific expression
1288 types and adjust the relocations or give errors accordingly. */
1291 tic6x_fix_new_exp (fragS
*frag
, int where
, int size
, expressionS
*exp
,
1292 int pcrel
, bfd_reloc_code_real_type r_type
,
1293 bfd_boolean fix_adda
)
1295 bfd_reloc_code_real_type new_reloc
= BFD_RELOC_UNUSED
;
1303 case BFD_RELOC_C6000_SBR_U15_W
:
1304 new_reloc
= BFD_RELOC_C6000_DSBT_INDEX
;
1308 as_bad (_("$DSBT_INDEX not supported in this context"));
1316 case BFD_RELOC_C6000_SBR_U15_W
:
1317 new_reloc
= BFD_RELOC_C6000_SBR_GOT_U15_W
;
1321 as_bad (_("$GOT not supported in this context"));
1329 case BFD_RELOC_C6000_ABS_L16
:
1330 new_reloc
= BFD_RELOC_C6000_SBR_GOT_L16_W
;
1333 case BFD_RELOC_C6000_ABS_H16
:
1334 new_reloc
= BFD_RELOC_C6000_SBR_GOT_H16_W
;
1338 as_bad (_("$DPR_GOT not supported in this context"));
1346 case BFD_RELOC_C6000_ABS_S16
:
1347 new_reloc
= BFD_RELOC_C6000_SBR_S16
;
1350 case BFD_RELOC_C6000_ABS_L16
:
1351 new_reloc
= BFD_RELOC_C6000_SBR_L16_B
;
1354 case BFD_RELOC_C6000_ABS_H16
:
1355 new_reloc
= BFD_RELOC_C6000_SBR_H16_B
;
1359 as_bad (_("$DPR_BYTE not supported in this context"));
1367 case BFD_RELOC_C6000_ABS_L16
:
1368 new_reloc
= BFD_RELOC_C6000_SBR_L16_H
;
1371 case BFD_RELOC_C6000_ABS_H16
:
1372 new_reloc
= BFD_RELOC_C6000_SBR_H16_H
;
1376 as_bad (_("$DPR_HWORD not supported in this context"));
1384 case BFD_RELOC_C6000_ABS_L16
:
1385 new_reloc
= BFD_RELOC_C6000_SBR_L16_W
;
1388 case BFD_RELOC_C6000_ABS_H16
:
1389 new_reloc
= BFD_RELOC_C6000_SBR_H16_W
;
1393 as_bad (_("$DPR_WORD not supported in this context"));
1404 as_bad (_("invalid PC-relative operand"));
1410 if (new_reloc
== BFD_RELOC_UNUSED
)
1411 fix
= fix_new_exp (frag
, where
, size
, exp
, pcrel
, r_type
);
1413 fix
= fix_new (frag
, where
, size
, exp
->X_add_symbol
, exp
->X_add_number
,
1415 fix
->tc_fix_data
.fix_adda
= fix_adda
;
1418 /* Generate a fix for a constant (.word etc.). Needed to ensure these
1419 go through the error checking in tic6x_fix_new_exp. */
1422 tic6x_cons_fix_new (fragS
*frag
, int where
, int size
, expressionS
*exp
)
1424 bfd_reloc_code_real_type r_type
;
1429 r_type
= BFD_RELOC_8
;
1433 r_type
= BFD_RELOC_16
;
1437 r_type
= BFD_RELOC_32
;
1441 as_bad (_("no %d-byte relocations available"), size
);
1445 tic6x_fix_new_exp (frag
, where
, size
, exp
, 0, r_type
, FALSE
);
1448 /* Initialize target-specific fix data. */
1451 tic6x_init_fix_data (fixS
*fixP
)
1453 fixP
->tc_fix_data
.fix_adda
= FALSE
;
1456 /* Given the fine-grained form of an operand, return the coarse
1460 tic6x_coarse_operand_form (tic6x_operand_form form
)
1464 case tic6x_operand_asm_const
:
1465 case tic6x_operand_link_const
:
1466 return TIC6X_OP_EXP
;
1468 case tic6x_operand_reg
:
1469 case tic6x_operand_xreg
:
1470 case tic6x_operand_dreg
:
1471 case tic6x_operand_areg
:
1472 case tic6x_operand_retreg
:
1473 return TIC6X_OP_REG
;
1475 case tic6x_operand_regpair
:
1476 case tic6x_operand_xregpair
:
1477 case tic6x_operand_dregpair
:
1478 return TIC6X_OP_REGPAIR
;
1480 case tic6x_operand_irp
:
1481 return TIC6X_OP_IRP
;
1483 case tic6x_operand_nrp
:
1484 return TIC6X_OP_NRP
;
1486 case tic6x_operand_ctrl
:
1487 return TIC6X_OP_CTRL
;
1489 case tic6x_operand_mem_short
:
1490 case tic6x_operand_mem_long
:
1491 case tic6x_operand_mem_deref
:
1492 return TIC6X_OP_MEM_NOUNREG
;
1494 case tic6x_operand_mem_ndw
:
1495 return TIC6X_OP_MEM_UNREG
;
1497 case tic6x_operand_func_unit
:
1498 return TIC6X_OP_FUNC_UNIT
;
1505 /* How an operand may match or not match a desired form. If different
1506 instruction alternatives fail in different ways, the first failure
1507 in this list determines the diagnostic. */
1511 tic6x_match_matches
,
1512 /* Bad coarse form. */
1515 tic6x_match_non_const
,
1516 /* Register on wrong side. */
1517 tic6x_match_wrong_side
,
1518 /* Not a valid address register. */
1519 tic6x_match_bad_address
,
1520 /* Not a valid return address register. */
1521 tic6x_match_bad_return
,
1522 /* Control register not readable. */
1523 tic6x_match_ctrl_write_only
,
1524 /* Control register not writable. */
1525 tic6x_match_ctrl_read_only
,
1526 /* Not a valid memory reference for this instruction. */
1528 } tic6x_operand_match
;
1530 /* Return whether an operand matches the given fine-grained form and
1531 read/write usage, and, if it does not match, how it fails to match.
1532 The main functional unit side is SIDE; the cross-path side is CROSS
1533 (the same as SIDE if a cross path not used); the data side is
1535 static tic6x_operand_match
1536 tic6x_operand_matches_form (const tic6x_operand
*op
, tic6x_operand_form form
,
1537 tic6x_rw rw
, unsigned int side
, unsigned int cross
,
1538 unsigned int data_side
)
1540 unsigned int coarse
= tic6x_coarse_operand_form (form
);
1542 if (coarse
!= op
->form
)
1543 return tic6x_match_coarse
;
1547 case tic6x_operand_asm_const
:
1548 if (op
->value
.exp
.X_op
== O_constant
)
1549 return tic6x_match_matches
;
1551 return tic6x_match_non_const
;
1553 case tic6x_operand_link_const
:
1554 case tic6x_operand_irp
:
1555 case tic6x_operand_nrp
:
1556 case tic6x_operand_func_unit
:
1557 /* All expressions are link-time constants, although there may
1558 not be relocations to express them in the output file. "irp"
1559 and "nrp" are unique operand values. All parsed functional
1560 unit names are valid. */
1561 return tic6x_match_matches
;
1563 case tic6x_operand_reg
:
1564 case tic6x_operand_regpair
:
1565 if (op
->value
.reg
.side
== side
)
1566 return tic6x_match_matches
;
1568 return tic6x_match_wrong_side
;
1570 case tic6x_operand_xreg
:
1571 case tic6x_operand_xregpair
:
1572 if (op
->value
.reg
.side
== cross
)
1573 return tic6x_match_matches
;
1575 return tic6x_match_wrong_side
;
1577 case tic6x_operand_dreg
:
1578 case tic6x_operand_dregpair
:
1579 if (op
->value
.reg
.side
== data_side
)
1580 return tic6x_match_matches
;
1582 return tic6x_match_wrong_side
;
1584 case tic6x_operand_areg
:
1585 if (op
->value
.reg
.side
!= cross
)
1586 return tic6x_match_wrong_side
;
1587 else if (op
->value
.reg
.side
== 2
1588 && (op
->value
.reg
.num
== 14 || op
->value
.reg
.num
== 15))
1589 return tic6x_match_matches
;
1591 return tic6x_match_bad_address
;
1593 case tic6x_operand_retreg
:
1594 if (op
->value
.reg
.side
!= side
)
1595 return tic6x_match_wrong_side
;
1596 else if (op
->value
.reg
.num
!= 3)
1597 return tic6x_match_bad_return
;
1599 return tic6x_match_matches
;
1601 case tic6x_operand_ctrl
:
1605 if (tic6x_ctrl_table
[op
->value
.ctrl
].rw
== tic6x_rw_read
1606 || tic6x_ctrl_table
[op
->value
.ctrl
].rw
== tic6x_rw_read_write
)
1607 return tic6x_match_matches
;
1609 return tic6x_match_ctrl_write_only
;
1611 case tic6x_rw_write
:
1612 if (tic6x_ctrl_table
[op
->value
.ctrl
].rw
== tic6x_rw_write
1613 || tic6x_ctrl_table
[op
->value
.ctrl
].rw
== tic6x_rw_read_write
)
1614 return tic6x_match_matches
;
1616 return tic6x_match_ctrl_read_only
;
1622 case tic6x_operand_mem_deref
:
1623 if (op
->value
.mem
.mod
!= tic6x_mem_mod_none
)
1624 return tic6x_match_bad_mem
;
1625 else if (op
->value
.mem
.scaled
!= tic6x_offset_none
)
1627 else if (op
->value
.mem
.base_reg
.side
!= side
)
1628 return tic6x_match_bad_mem
;
1630 return tic6x_match_matches
;
1632 case tic6x_operand_mem_short
:
1633 case tic6x_operand_mem_ndw
:
1634 if (op
->value
.mem
.base_reg
.side
!= side
)
1635 return tic6x_match_bad_mem
;
1636 if (op
->value
.mem
.mod
== tic6x_mem_mod_none
)
1638 if (op
->value
.mem
.scaled
!= tic6x_offset_none
)
1640 return tic6x_match_matches
;
1642 if (op
->value
.mem
.scaled
== tic6x_offset_none
)
1644 if (op
->value
.mem
.mod
== tic6x_mem_mod_plus
1645 || op
->value
.mem
.mod
== tic6x_mem_mod_minus
)
1647 return tic6x_match_matches
;
1649 if (op
->value
.mem
.offset_is_reg
)
1651 if (op
->value
.mem
.scaled
== tic6x_offset_unscaled
1652 && form
!= tic6x_operand_mem_ndw
)
1654 if (op
->value
.mem
.offset
.reg
.side
== side
)
1655 return tic6x_match_matches
;
1657 return tic6x_match_bad_mem
;
1661 if (op
->value
.mem
.offset
.exp
.X_op
== O_constant
)
1662 return tic6x_match_matches
;
1664 return tic6x_match_bad_mem
;
1667 case tic6x_operand_mem_long
:
1668 if (op
->value
.mem
.base_reg
.side
== 2
1669 && (op
->value
.mem
.base_reg
.num
== 14
1670 || op
->value
.mem
.base_reg
.num
== 15))
1672 switch (op
->value
.mem
.mod
)
1674 case tic6x_mem_mod_none
:
1675 if (op
->value
.mem
.scaled
!= tic6x_offset_none
)
1677 return tic6x_match_matches
;
1679 case tic6x_mem_mod_plus
:
1680 if (op
->value
.mem
.scaled
== tic6x_offset_none
)
1682 if (op
->value
.mem
.offset_is_reg
)
1683 return tic6x_match_bad_mem
;
1684 else if (op
->value
.mem
.scaled
== tic6x_offset_scaled
1685 && op
->value
.mem
.offset
.exp
.X_op
!= O_constant
)
1686 return tic6x_match_bad_mem
;
1688 return tic6x_match_matches
;
1690 case tic6x_mem_mod_minus
:
1691 case tic6x_mem_mod_preinc
:
1692 case tic6x_mem_mod_predec
:
1693 case tic6x_mem_mod_postinc
:
1694 case tic6x_mem_mod_postdec
:
1695 return tic6x_match_bad_mem
;
1703 return tic6x_match_bad_mem
;
1710 /* Return the number of bits shift used with DP-relative coding method
1714 tic6x_dpr_shift (tic6x_coding_method coding
)
1718 case tic6x_coding_ulcst_dpr_byte
:
1721 case tic6x_coding_ulcst_dpr_half
:
1724 case tic6x_coding_ulcst_dpr_word
:
1732 /* Return the relocation used with DP-relative coding method
1735 static bfd_reloc_code_real_type
1736 tic6x_dpr_reloc (tic6x_coding_method coding
)
1740 case tic6x_coding_ulcst_dpr_byte
:
1741 return BFD_RELOC_C6000_SBR_U15_B
;
1743 case tic6x_coding_ulcst_dpr_half
:
1744 return BFD_RELOC_C6000_SBR_U15_H
;
1746 case tic6x_coding_ulcst_dpr_word
:
1747 return BFD_RELOC_C6000_SBR_U15_W
;
1754 /* Given a memory reference *MEM_REF as originally parsed, fill in
1755 defaults for missing offsets. */
1758 tic6x_default_mem_ref (tic6x_mem_ref
*mem_ref
)
1760 switch (mem_ref
->mod
)
1762 case tic6x_mem_mod_none
:
1763 if (mem_ref
->scaled
!= tic6x_offset_none
)
1765 mem_ref
->mod
= tic6x_mem_mod_plus
;
1766 mem_ref
->scaled
= tic6x_offset_unscaled
;
1767 mem_ref
->offset_is_reg
= FALSE
;
1768 memset (&mem_ref
->offset
.exp
, 0, sizeof mem_ref
->offset
.exp
);
1769 mem_ref
->offset
.exp
.X_op
= O_constant
;
1770 mem_ref
->offset
.exp
.X_add_number
= 0;
1771 mem_ref
->offset
.exp
.X_unsigned
= 0;
1774 case tic6x_mem_mod_plus
:
1775 case tic6x_mem_mod_minus
:
1776 if (mem_ref
->scaled
== tic6x_offset_none
)
1780 case tic6x_mem_mod_preinc
:
1781 case tic6x_mem_mod_predec
:
1782 case tic6x_mem_mod_postinc
:
1783 case tic6x_mem_mod_postdec
:
1784 if (mem_ref
->scaled
!= tic6x_offset_none
)
1786 mem_ref
->scaled
= tic6x_offset_scaled
;
1787 mem_ref
->offset_is_reg
= FALSE
;
1788 memset (&mem_ref
->offset
.exp
, 0, sizeof mem_ref
->offset
.exp
);
1789 mem_ref
->offset
.exp
.X_op
= O_constant
;
1790 mem_ref
->offset
.exp
.X_add_number
= 1;
1791 mem_ref
->offset
.exp
.X_unsigned
= 0;
1799 /* Return the encoding in the 8-bit field of an SPMASK or SPMASKR
1800 instruction of the specified UNIT, side SIDE. */
1803 tic6x_encode_spmask (tic6x_func_unit_base unit
, unsigned int side
)
1807 case tic6x_func_unit_l
:
1808 return 1 << (side
- 1);
1810 case tic6x_func_unit_s
:
1811 return 1 << (side
+ 1);
1813 case tic6x_func_unit_d
:
1814 return 1 << (side
+ 3);
1816 case tic6x_func_unit_m
:
1817 return 1 << (side
+ 5);
1824 /* Try to encode the instruction with opcode number ID and operands
1825 OPERANDS (number NUM_OPERANDS), creg value THIS_LINE_CREG and z
1826 value THIS_LINE_Z; FUNC_UNIT_SIDE, FUNC_UNIT_CROSS and
1827 FUNC_UNIT_DATA_SIDE describe the functional unit specification;
1828 SPLOOP_II is the ii value from the previous SPLOOP-family
1829 instruction, or 0 if not in such a loop; the only possible problems
1830 are operands being out of range (they already match the
1831 fine-grained form), and inappropriate predication. If this
1832 succeeds, return the encoding and set *OK to TRUE; otherwise return
1833 0 and set *OK to FALSE. If a fix is needed, set *FIX_NEEDED to
1834 true and fill in *FIX_EXP, *FIX_PCREL, *FX_R_TYPE and *FIX_ADDA.
1835 Print error messages for failure if PRINT_ERRORS is TRUE; the
1836 opcode starts at STR and has length OPC_LEN. */
1839 tic6x_try_encode (tic6x_opcode_id id
, tic6x_operand
*operands
,
1840 unsigned int num_operands
, unsigned int this_line_creg
,
1841 unsigned int this_line_z
, unsigned int func_unit_side
,
1842 unsigned int func_unit_cross
,
1843 unsigned int func_unit_data_side
, int sploop_ii
,
1844 expressionS
**fix_exp
, int *fix_pcrel
,
1845 bfd_reloc_code_real_type
*fx_r_type
, bfd_boolean
*fix_adda
,
1846 bfd_boolean
*fix_needed
, bfd_boolean
*ok
,
1847 bfd_boolean print_errors
, char *str
, int opc_len
)
1849 const tic6x_opcode
*opct
;
1850 const tic6x_insn_format
*fmt
;
1851 unsigned int opcode_value
;
1854 opct
= &tic6x_opcode_table
[id
];
1855 fmt
= &tic6x_insn_format_table
[opct
->format
];
1856 opcode_value
= fmt
->cst_bits
;
1858 for (fld
= 0; fld
< opct
->num_fixed_fields
; fld
++)
1860 if (opct
->fixed_fields
[fld
].min_val
== opct
->fixed_fields
[fld
].max_val
)
1862 const tic6x_insn_field
*fldd
;
1863 fldd
= tic6x_field_from_fmt (fmt
, opct
->fixed_fields
[fld
].field_id
);
1866 opcode_value
|= opct
->fixed_fields
[fld
].min_val
<< fldd
->low_pos
;
1870 for (fld
= 0; fld
< opct
->num_variable_fields
; fld
++)
1872 const tic6x_insn_field
*fldd
;
1878 unsigned int fcyc_bits
;
1883 fldd
= tic6x_field_from_fmt (fmt
, opct
->variable_fields
[fld
].field_id
);
1886 opno
= opct
->variable_fields
[fld
].operand_num
;
1887 switch (opct
->variable_fields
[fld
].coding_method
)
1889 case tic6x_coding_ucst
:
1890 if (operands
[opno
].form
!= TIC6X_OP_EXP
)
1892 if (operands
[opno
].value
.exp
.X_op
!= O_constant
)
1894 ucexp
= operands
[opno
].value
.exp
;
1896 if (ucexp
.X_add_number
< 0
1897 || ucexp
.X_add_number
>= (1 << fldd
->width
))
1900 as_bad (_("operand %u of '%.*s' out of range"), opno
+ 1,
1905 value
= ucexp
.X_add_number
;
1908 case tic6x_coding_scst
:
1909 if (operands
[opno
].form
!= TIC6X_OP_EXP
)
1911 if (operands
[opno
].value
.exp
.X_op
!= O_constant
)
1914 /* Opcode table should not permit non-constants without
1915 a known relocation for them. */
1916 if (fldd
->low_pos
!= 7 || fldd
->width
!= 16)
1919 *fix_exp
= &operands
[opno
].value
.exp
;
1921 *fx_r_type
= BFD_RELOC_C6000_ABS_S16
;
1925 sign_value
= SEXT (operands
[opno
].value
.exp
.X_add_number
);
1927 if (sign_value
< -(1 << (fldd
->width
- 1))
1928 || (sign_value
>= (1 << (fldd
->width
- 1))))
1931 as_bad (_("operand %u of '%.*s' out of range"), opno
+ 1,
1936 value
= sign_value
+ (1 << (fldd
->width
- 1));
1937 value
^= (1 << (fldd
->width
- 1));
1940 case tic6x_coding_ucst_minus_one
:
1941 if (operands
[opno
].form
!= TIC6X_OP_EXP
)
1943 if (operands
[opno
].value
.exp
.X_op
!= O_constant
)
1945 if (operands
[opno
].value
.exp
.X_add_number
<= 0
1946 || operands
[opno
].value
.exp
.X_add_number
> (1 << fldd
->width
))
1949 as_bad (_("operand %u of '%.*s' out of range"), opno
+ 1,
1954 value
= operands
[opno
].value
.exp
.X_add_number
- 1;
1957 case tic6x_coding_scst_negate
:
1958 if (operands
[opno
].form
!= TIC6X_OP_EXP
)
1960 if (operands
[opno
].value
.exp
.X_op
!= O_constant
)
1962 sign_value
= SEXT (-operands
[opno
].value
.exp
.X_add_number
);
1963 goto signed_constant
;
1965 case tic6x_coding_ulcst_dpr_byte
:
1966 case tic6x_coding_ulcst_dpr_half
:
1967 case tic6x_coding_ulcst_dpr_word
:
1968 bits
= tic6x_dpr_shift (opct
->variable_fields
[fld
].coding_method
);
1969 switch (operands
[opno
].form
)
1972 if (operands
[opno
].value
.exp
.X_op
== O_constant
)
1974 ucexp
= operands
[opno
].value
.exp
;
1975 goto unsigned_constant
;
1977 expp
= &operands
[opno
].value
.exp
;
1980 case TIC6X_OP_MEM_NOUNREG
:
1981 mem
= operands
[opno
].value
.mem
;
1982 tic6x_default_mem_ref (&mem
);
1983 if (mem
.offset_is_reg
)
1985 if (mem
.offset
.exp
.X_op
== O_constant
)
1987 ucexp
= mem
.offset
.exp
;
1988 if (mem
.scaled
== tic6x_offset_unscaled
)
1990 if (ucexp
.X_add_number
& ((1 << bits
) - 1))
1993 as_bad (_("offset in operand %u of '%.*s' not "
1994 "divisible by %u"), opno
+ 1, opc_len
,
1999 ucexp
.X_add_number
>>= bits
;
2001 goto unsigned_constant
;
2003 if (mem
.scaled
!= tic6x_offset_unscaled
)
2005 if (operands
[opno
].value
.mem
.mod
== tic6x_mem_mod_none
2006 || operands
[opno
].value
.mem
.scaled
!= tic6x_offset_unscaled
2007 || operands
[opno
].value
.mem
.offset_is_reg
)
2009 expp
= &operands
[opno
].value
.mem
.offset
.exp
;
2016 /* Opcode table should not use this encoding without a known
2018 if (fldd
->low_pos
!= 8 || fldd
->width
!= 15)
2020 /* We do not check for offset divisibility here; such a
2021 check is not needed at this point to encode the value,
2022 and if there is eventually a problem it will be detected
2023 either in md_apply_fix or at link time. */
2028 = tic6x_dpr_reloc (opct
->variable_fields
[fld
].coding_method
);
2029 if (operands
[opno
].form
== TIC6X_OP_EXP
)
2035 case tic6x_coding_lcst_low16
:
2036 if (operands
[opno
].form
!= TIC6X_OP_EXP
)
2038 if (operands
[opno
].value
.exp
.X_op
== O_constant
)
2039 value
= operands
[opno
].value
.exp
.X_add_number
& 0xffff;
2043 /* Opcode table should not use this encoding without a
2044 known relocation. */
2045 if (fldd
->low_pos
!= 7 || fldd
->width
!= 16)
2048 *fix_exp
= &operands
[opno
].value
.exp
;
2050 *fx_r_type
= BFD_RELOC_C6000_ABS_L16
;
2055 case tic6x_coding_lcst_high16
:
2056 if (operands
[opno
].form
!= TIC6X_OP_EXP
)
2058 if (operands
[opno
].value
.exp
.X_op
== O_constant
)
2059 value
= (operands
[opno
].value
.exp
.X_add_number
>> 16) & 0xffff;
2063 /* Opcode table should not use this encoding without a
2064 known relocation. */
2065 if (fldd
->low_pos
!= 7 || fldd
->width
!= 16)
2068 *fix_exp
= &operands
[opno
].value
.exp
;
2070 *fx_r_type
= BFD_RELOC_C6000_ABS_H16
;
2075 case tic6x_coding_pcrel
:
2076 case tic6x_coding_pcrel_half
:
2077 if (operands
[opno
].form
!= TIC6X_OP_EXP
)
2081 *fix_exp
= &operands
[opno
].value
.exp
;
2083 if (fldd
->low_pos
== 7 && fldd
->width
== 21)
2084 *fx_r_type
= BFD_RELOC_C6000_PCR_S21
;
2085 else if (fldd
->low_pos
== 16 && fldd
->width
== 12)
2086 *fx_r_type
= BFD_RELOC_C6000_PCR_S12
;
2087 else if (fldd
->low_pos
== 13 && fldd
->width
== 10)
2088 *fx_r_type
= BFD_RELOC_C6000_PCR_S10
;
2089 else if (fldd
->low_pos
== 16 && fldd
->width
== 7)
2090 *fx_r_type
= BFD_RELOC_C6000_PCR_S7
;
2092 /* Opcode table should not use this encoding without a
2093 known relocation. */
2098 case tic6x_coding_reg
:
2099 switch (operands
[opno
].form
)
2102 case TIC6X_OP_REGPAIR
:
2103 value
= operands
[opno
].value
.reg
.num
;
2106 case TIC6X_OP_MEM_NOUNREG
:
2107 case TIC6X_OP_MEM_UNREG
:
2108 value
= operands
[opno
].value
.mem
.base_reg
.num
;
2116 case tic6x_coding_areg
:
2117 switch (operands
[opno
].form
)
2120 value
= (operands
[opno
].value
.reg
.num
== 15 ? 1 : 0);
2123 case TIC6X_OP_MEM_NOUNREG
:
2124 value
= (operands
[opno
].value
.mem
.base_reg
.num
== 15 ? 1 : 0);
2132 case tic6x_coding_crlo
:
2133 if (operands
[opno
].form
!= TIC6X_OP_CTRL
)
2135 value
= tic6x_ctrl_table
[operands
[opno
].value
.ctrl
].crlo
;
2138 case tic6x_coding_crhi
:
2139 if (operands
[opno
].form
!= TIC6X_OP_CTRL
)
2144 case tic6x_coding_reg_shift
:
2145 if (operands
[opno
].form
!= TIC6X_OP_REGPAIR
)
2147 value
= operands
[opno
].value
.reg
.num
>> 1;
2150 case tic6x_coding_mem_offset
:
2151 if (operands
[opno
].form
!= TIC6X_OP_MEM_NOUNREG
)
2153 mem
= operands
[opno
].value
.mem
;
2154 tic6x_default_mem_ref (&mem
);
2155 if (mem
.offset_is_reg
)
2157 if (mem
.scaled
!= tic6x_offset_scaled
)
2159 value
= mem
.offset
.reg
.num
;
2165 if (mem
.offset
.exp
.X_op
!= O_constant
)
2169 case tic6x_offset_scaled
:
2173 case tic6x_offset_unscaled
:
2174 scale
= opct
->operand_info
[opno
].size
;
2175 if (scale
!= 1 && scale
!= 2 && scale
!= 4 && scale
!= 8)
2182 if (mem
.offset
.exp
.X_add_number
< 0
2183 || mem
.offset
.exp
.X_add_number
>= (1 << fldd
->width
) * scale
)
2186 as_bad (_("offset in operand %u of '%.*s' out of range"),
2187 opno
+ 1, opc_len
, str
);
2191 if (mem
.offset
.exp
.X_add_number
% scale
)
2194 as_bad (_("offset in operand %u of '%.*s' not "
2196 opno
+ 1, opc_len
, str
, scale
);
2200 value
= mem
.offset
.exp
.X_add_number
/ scale
;
2204 case tic6x_coding_mem_offset_noscale
:
2205 if (operands
[opno
].form
!= TIC6X_OP_MEM_UNREG
)
2207 mem
= operands
[opno
].value
.mem
;
2208 tic6x_default_mem_ref (&mem
);
2209 if (mem
.offset_is_reg
)
2210 value
= mem
.offset
.reg
.num
;
2213 if (mem
.offset
.exp
.X_op
!= O_constant
)
2215 if (mem
.offset
.exp
.X_add_number
< 0
2216 || mem
.offset
.exp
.X_add_number
>= (1 << fldd
->width
))
2219 as_bad (_("offset in operand %u of '%.*s' out of range"),
2220 opno
+ 1, opc_len
, str
);
2224 value
= mem
.offset
.exp
.X_add_number
;
2228 case tic6x_coding_mem_mode
:
2229 if (operands
[opno
].form
!= TIC6X_OP_MEM_NOUNREG
2230 && operands
[opno
].form
!= TIC6X_OP_MEM_UNREG
)
2232 mem
= operands
[opno
].value
.mem
;
2233 tic6x_default_mem_ref (&mem
);
2236 case tic6x_mem_mod_plus
:
2240 case tic6x_mem_mod_minus
:
2244 case tic6x_mem_mod_preinc
:
2248 case tic6x_mem_mod_predec
:
2252 case tic6x_mem_mod_postinc
:
2256 case tic6x_mem_mod_postdec
:
2263 value
+= (mem
.offset_is_reg
? 4 : 0);
2266 case tic6x_coding_scaled
:
2267 if (operands
[opno
].form
!= TIC6X_OP_MEM_UNREG
)
2269 mem
= operands
[opno
].value
.mem
;
2270 tic6x_default_mem_ref (&mem
);
2273 case tic6x_offset_unscaled
:
2277 case tic6x_offset_scaled
:
2286 case tic6x_coding_spmask
:
2287 /* The position of such a field is hardcoded in the handling
2289 if (fldd
->low_pos
!= 18)
2292 for (opno
= 0; opno
< num_operands
; opno
++)
2296 v
= tic6x_encode_spmask (operands
[opno
].value
.func_unit
.base
,
2297 operands
[opno
].value
.func_unit
.side
);
2301 as_bad (_("functional unit already masked for operand "
2302 "%u of '%.*s'"), opno
+ 1, opc_len
, str
);
2310 case tic6x_coding_reg_unused
:
2311 /* This is a placeholder; correct handling goes along with
2312 resource constraint checks. */
2316 case tic6x_coding_fstg
:
2317 case tic6x_coding_fcyc
:
2318 if (operands
[opno
].form
!= TIC6X_OP_EXP
)
2320 if (operands
[opno
].value
.exp
.X_op
!= O_constant
)
2325 as_bad (_("'%.*s' instruction not in a software "
2334 else if (sploop_ii
<= 2)
2336 else if (sploop_ii
<= 4)
2338 else if (sploop_ii
<= 8)
2340 else if (sploop_ii
<= 14)
2344 if (fcyc_bits
> fldd
->width
)
2347 if (opct
->variable_fields
[fld
].coding_method
== tic6x_coding_fstg
)
2349 if (operands
[opno
].value
.exp
.X_add_number
< 0
2350 || (operands
[opno
].value
.exp
.X_add_number
2351 >= (1 << (fldd
->width
- fcyc_bits
))))
2354 as_bad (_("operand %u of '%.*s' out of range"), opno
+ 1,
2359 value
= operands
[opno
].value
.exp
.X_add_number
<< fcyc_bits
;
2363 if (operands
[opno
].value
.exp
.X_add_number
< 0
2364 || (operands
[opno
].value
.exp
.X_add_number
>= sploop_ii
))
2367 as_bad (_("operand %u of '%.*s' out of range"), opno
+ 1,
2372 value
= operands
[opno
].value
.exp
.X_add_number
;
2376 case tic6x_coding_fu
:
2377 value
= func_unit_side
== 2 ? 1 : 0;
2380 case tic6x_coding_data_fu
:
2381 value
= func_unit_data_side
== 2 ? 1 : 0;
2384 case tic6x_coding_xpath
:
2385 value
= func_unit_cross
;
2392 for (ffld
= 0; ffld
< opct
->num_fixed_fields
; ffld
++)
2393 if ((opct
->fixed_fields
[ffld
].field_id
2394 == opct
->variable_fields
[fld
].field_id
)
2395 && (value
< opct
->fixed_fields
[ffld
].min_val
2396 || value
> opct
->fixed_fields
[ffld
].max_val
))
2399 as_bad (_("operand %u of '%.*s' out of range"), opno
+ 1,
2405 opcode_value
|= value
<< fldd
->low_pos
;
2410 const tic6x_insn_field
*creg
;
2411 const tic6x_insn_field
*z
;
2413 creg
= tic6x_field_from_fmt (fmt
, tic6x_field_creg
);
2417 as_bad (_("instruction '%.*s' cannot be predicated"),
2422 z
= tic6x_field_from_fmt (fmt
, tic6x_field_z
);
2423 /* If there is a creg field, there must be a z field; otherwise
2424 there is an error in the format table. */
2428 opcode_value
|= this_line_creg
<< creg
->low_pos
;
2429 opcode_value
|= this_line_z
<< z
->low_pos
;
2433 return opcode_value
;
2436 /* Convert the target integer stored in N bytes in BUF to a host
2437 integer, returning that value. */
2440 md_chars_to_number (char *buf
, int n
)
2443 unsigned char *p
= (unsigned char *) buf
;
2445 if (target_big_endian
)
2450 result
|= (*p
++ & 0xff);
2458 result
|= (p
[n
] & 0xff);
2465 /* Assemble the instruction starting at STR (an opcode, with the
2466 opcode name all-lowercase). */
2469 md_assemble (char *str
)
2473 bfd_boolean this_line_parallel
;
2474 bfd_boolean this_line_spmask
;
2475 unsigned int this_line_creg
;
2476 unsigned int this_line_z
;
2477 bfd_boolean this_insn_label
;
2478 segment_info_type
*seginfo
;
2479 tic6x_opcode_list
*opc_list
, *opc
;
2480 tic6x_func_unit_base func_unit_base
= tic6x_func_unit_nfu
;
2481 unsigned int func_unit_side
= 0;
2482 unsigned int func_unit_cross
= 0;
2483 unsigned int cross_side
= 0;
2484 unsigned int func_unit_data_side
= 0;
2485 unsigned int max_matching_opcodes
, num_matching_opcodes
;
2486 tic6x_opcode_id
*opcm
= NULL
;
2487 unsigned int opc_rank
[TIC6X_NUM_PREFER
];
2488 const tic6x_opcode
*opct
= NULL
;
2489 int min_rank
, try_rank
, max_rank
;
2490 bfd_boolean num_operands_permitted
[TIC6X_MAX_SOURCE_OPERANDS
+ 1]
2492 unsigned int operand_forms
[TIC6X_MAX_SOURCE_OPERANDS
] = { 0 };
2493 tic6x_operand operands
[TIC6X_MAX_SOURCE_OPERANDS
];
2494 unsigned int max_num_operands
;
2495 unsigned int num_operands_read
;
2496 bfd_boolean ok_this_arch
, ok_this_fu
, ok_this_arch_fu
;
2497 bfd_boolean bad_operands
= FALSE
;
2498 unsigned int opcode_value
;
2499 bfd_boolean encoded_ok
;
2500 bfd_boolean fix_needed
= FALSE
;
2501 expressionS
*fix_exp
= NULL
;
2503 bfd_reloc_code_real_type fx_r_type
= BFD_RELOC_UNUSED
;
2504 bfd_boolean fix_adda
= FALSE
;
2508 while (*p
&& !is_end_of_line
[(unsigned char) *p
] && *p
!= ' ')
2511 /* This function should only have been called when there is actually
2512 an instruction to assemble. */
2516 /* Reset global settings for parallel bars and predicates now to
2517 avoid extra errors if there are problems with this opcode. */
2518 this_line_parallel
= tic6x_line_parallel
;
2519 this_line_spmask
= tic6x_line_spmask
;
2520 this_line_creg
= tic6x_line_creg
;
2521 this_line_z
= tic6x_line_z
;
2522 tic6x_line_parallel
= FALSE
;
2523 tic6x_line_spmask
= FALSE
;
2524 tic6x_line_creg
= 0;
2526 seginfo
= seg_info (now_seg
);
2527 this_insn_label
= seginfo
->tc_segment_info_data
.seen_label
;
2528 seginfo
->tc_segment_info_data
.seen_label
= FALSE
;
2530 opc_list
= hash_find_n (opcode_hash
, str
, p
- str
);
2531 if (opc_list
== NULL
)
2535 as_bad (_("unknown opcode '%s'"), str
);
2541 skip_whitespace (p
);
2543 /* See if there is something that looks like a functional unit
2547 bfd_boolean good_func_unit
;
2548 tic6x_func_unit_base maybe_base
= tic6x_func_unit_nfu
;
2549 unsigned int maybe_side
= 0;
2550 unsigned int maybe_cross
= 0;
2551 unsigned int maybe_data_side
= 0;
2553 good_func_unit
= tic6x_parse_func_unit_base (p
+ 1, &maybe_base
,
2558 if (p
[3] == ' ' || is_end_of_line
[(unsigned char) p
[3]])
2560 else if ((p
[3] == 'x' || p
[3] == 'X')
2561 && (p
[4] == ' ' || is_end_of_line
[(unsigned char) p
[4]]))
2566 else if (maybe_base
== tic6x_func_unit_d
2567 && (p
[3] == 't' || p
[3] == 'T')
2568 && (p
[4] == '1' || p
[4] == '2')
2569 && (p
[5] == ' ' || is_end_of_line
[(unsigned char) p
[5]]))
2571 maybe_data_side
= p
[4] - '0';
2575 good_func_unit
= FALSE
;
2580 func_unit_base
= maybe_base
;
2581 func_unit_side
= maybe_side
;
2582 func_unit_cross
= maybe_cross
;
2583 cross_side
= (func_unit_cross
? 3 - func_unit_side
: func_unit_side
);
2584 func_unit_data_side
= maybe_data_side
;
2587 skip_whitespace (p
);
2590 /* Determine which entries in the opcode table match, and the
2591 associated permitted forms of operands. */
2592 max_matching_opcodes
= 0;
2593 for (opc
= opc_list
; opc
; opc
= opc
->next
)
2594 max_matching_opcodes
++;
2595 num_matching_opcodes
= 0;
2596 opcm
= xmalloc (max_matching_opcodes
* sizeof (*opcm
));
2597 max_num_operands
= 0;
2598 ok_this_arch
= FALSE
;
2600 ok_this_arch_fu
= FALSE
;
2601 for (opc
= opc_list
; opc
; opc
= opc
->next
)
2603 unsigned int num_operands
;
2605 bfd_boolean this_opc_arch_ok
= TRUE
;
2606 bfd_boolean this_opc_fu_ok
= TRUE
;
2608 if (tic6x_insn_format_table
[tic6x_opcode_table
[opc
->id
].format
].num_bits
2611 if (!(tic6x_opcode_table
[opc
->id
].isa_variants
& tic6x_features
))
2612 this_opc_arch_ok
= FALSE
;
2613 if (tic6x_opcode_table
[opc
->id
].func_unit
!= func_unit_base
)
2614 this_opc_fu_ok
= FALSE
;
2615 if (func_unit_side
== 1
2616 && (tic6x_opcode_table
[opc
->id
].flags
& TIC6X_FLAG_SIDE_B_ONLY
))
2617 this_opc_fu_ok
= FALSE
;
2619 && (tic6x_opcode_table
[opc
->id
].flags
& TIC6X_FLAG_NO_CROSS
))
2620 this_opc_fu_ok
= FALSE
;
2621 if (!func_unit_data_side
2622 && (tic6x_opcode_table
[opc
->id
].flags
2623 & (TIC6X_FLAG_LOAD
| TIC6X_FLAG_STORE
)))
2624 this_opc_fu_ok
= FALSE
;
2625 if (func_unit_data_side
2626 && !(tic6x_opcode_table
[opc
->id
].flags
2627 & (TIC6X_FLAG_LOAD
| TIC6X_FLAG_STORE
)))
2628 this_opc_fu_ok
= FALSE
;
2629 if (func_unit_data_side
== 1
2630 && (tic6x_opcode_table
[opc
->id
].flags
& TIC6X_FLAG_SIDE_T2_ONLY
))
2631 this_opc_fu_ok
= FALSE
;
2632 if (this_opc_arch_ok
)
2633 ok_this_arch
= TRUE
;
2636 if (!this_opc_arch_ok
|| !this_opc_fu_ok
)
2638 ok_this_arch_fu
= TRUE
;
2639 opcm
[num_matching_opcodes
] = opc
->id
;
2640 num_matching_opcodes
++;
2641 num_operands
= tic6x_opcode_table
[opc
->id
].num_operands
;
2643 if (tic6x_opcode_table
[opc
->id
].flags
& TIC6X_FLAG_SPMASK
)
2645 if (num_operands
!= 1
2646 || (tic6x_opcode_table
[opc
->id
].operand_info
[0].form
2647 != tic6x_operand_func_unit
))
2650 for (i
= 0; i
< num_operands
; i
++)
2653 |= tic6x_coarse_operand_form (tic6x_operand_func_unit
);
2654 num_operands_permitted
[i
] = TRUE
;
2659 for (i
= 0; i
< num_operands
; i
++)
2661 tic6x_operand_form f
2662 = tic6x_opcode_table
[opc
->id
].operand_info
[i
].form
;
2664 operand_forms
[i
] |= tic6x_coarse_operand_form (f
);
2667 num_operands_permitted
[num_operands
] = TRUE
;
2668 if (num_operands
> max_num_operands
)
2669 max_num_operands
= num_operands
;
2674 as_bad (_("'%.*s' instruction not supported on this architecture"),
2682 as_bad (_("'%.*s' instruction not supported on this functional unit"),
2688 if (!ok_this_arch_fu
)
2690 as_bad (_("'%.*s' instruction not supported on this functional unit"
2691 " for this architecture"),
2697 /* If there were no instructions matching the above availability
2698 checks, we should now have given an error and returned. */
2699 if (num_matching_opcodes
== 0)
2702 num_operands_read
= 0;
2705 skip_whitespace (p
);
2706 if (is_end_of_line
[(unsigned char) *p
])
2708 if (num_operands_read
> 0)
2710 as_bad (_("missing operand after comma"));
2711 bad_operands
= TRUE
;
2716 if (max_num_operands
== 0)
2718 as_bad (_("too many operands to '%.*s'"), opc_len
, str
);
2719 bad_operands
= TRUE
;
2723 if (!tic6x_parse_operand (&p
, &operands
[num_operands_read
],
2724 operand_forms
[num_operands_read
], str
, opc_len
,
2725 num_operands_read
+ 1))
2726 bad_operands
= TRUE
;
2727 num_operands_read
++;
2729 if (is_end_of_line
[(unsigned char) *p
])
2734 if (num_operands_read
== max_num_operands
)
2736 as_bad (_("too many operands to '%.*s'"), opc_len
, str
);
2737 bad_operands
= TRUE
;
2743 /* Operand parsing should consume whole operands. */
2747 if (!bad_operands
&& !num_operands_permitted
[num_operands_read
])
2749 as_bad (_("bad number of operands to '%.*s'"), opc_len
, str
);
2750 bad_operands
= TRUE
;
2755 /* Each operand is of the right syntactic form for some opcode
2756 choice, and the number of operands is valid. Check that each
2757 operand is OK in detail for some opcode choice with the right
2758 number of operands. */
2761 for (i
= 0; i
< num_operands_read
; i
++)
2763 bfd_boolean coarse_ok
= FALSE
;
2764 bfd_boolean fine_ok
= FALSE
;
2765 tic6x_operand_match fine_failure
= tic6x_match_matches
;
2768 for (j
= 0; j
< num_matching_opcodes
; j
++)
2770 tic6x_operand_form f
;
2773 tic6x_operand_match this_fine_failure
;
2775 if (tic6x_opcode_table
[opcm
[j
]].flags
& TIC6X_FLAG_SPMASK
)
2777 f
= tic6x_operand_func_unit
;
2782 if (tic6x_opcode_table
[opcm
[j
]].num_operands
2783 != num_operands_read
)
2786 f
= tic6x_opcode_table
[opcm
[j
]].operand_info
[i
].form
;
2787 rw
= tic6x_opcode_table
[opcm
[j
]].operand_info
[i
].rw
;
2789 cf
= tic6x_coarse_operand_form (f
);
2791 if (operands
[i
].form
!= cf
)
2796 = tic6x_operand_matches_form (&operands
[i
], f
, rw
,
2799 func_unit_data_side
);
2800 if (this_fine_failure
== tic6x_match_matches
)
2805 if (fine_failure
== tic6x_match_matches
2806 || fine_failure
> this_fine_failure
)
2807 fine_failure
= this_fine_failure
;
2810 /* No instructions should have operand syntactic forms only
2811 acceptable with certain numbers of operands, so no
2812 diagnostic for this case. */
2818 switch (fine_failure
)
2820 case tic6x_match_non_const
:
2821 as_bad (_("operand %u of '%.*s' not constant"),
2822 i
+ 1, opc_len
, str
);
2825 case tic6x_match_wrong_side
:
2826 as_bad (_("operand %u of '%.*s' on wrong side"),
2827 i
+ 1, opc_len
, str
);
2830 case tic6x_match_bad_return
:
2831 as_bad (_("operand %u of '%.*s' not a valid return "
2832 "address register"),
2833 i
+ 1, opc_len
, str
);
2836 case tic6x_match_ctrl_write_only
:
2837 as_bad (_("operand %u of '%.*s' is write-only"),
2838 i
+ 1, opc_len
, str
);
2841 case tic6x_match_ctrl_read_only
:
2842 as_bad (_("operand %u of '%.*s' is read-only"),
2843 i
+ 1, opc_len
, str
);
2846 case tic6x_match_bad_mem
:
2847 as_bad (_("operand %u of '%.*s' not a valid memory "
2849 i
+ 1, opc_len
, str
);
2852 case tic6x_match_bad_address
:
2853 as_bad (_("operand %u of '%.*s' not a valid base "
2854 "address register"),
2855 i
+ 1, opc_len
, str
);
2861 bad_operands
= TRUE
;
2869 /* Each operand is OK for some opcode choice, and the number of
2870 operands is valid. Check whether there is an opcode choice
2871 for which all operands are simultaneously valid. */
2873 bfd_boolean found_match
= FALSE
;
2875 for (i
= 0; i
< TIC6X_NUM_PREFER
; i
++)
2876 opc_rank
[i
] = (unsigned int) -1;
2878 min_rank
= TIC6X_NUM_PREFER
- 1;
2881 for (i
= 0; i
< num_matching_opcodes
; i
++)
2884 bfd_boolean this_matches
= TRUE
;
2886 if (!(tic6x_opcode_table
[opcm
[i
]].flags
& TIC6X_FLAG_SPMASK
)
2887 && tic6x_opcode_table
[opcm
[i
]].num_operands
!= num_operands_read
)
2890 for (j
= 0; j
< num_operands_read
; j
++)
2892 tic6x_operand_form f
;
2895 if (tic6x_opcode_table
[opcm
[i
]].flags
& TIC6X_FLAG_SPMASK
)
2897 f
= tic6x_operand_func_unit
;
2902 f
= tic6x_opcode_table
[opcm
[i
]].operand_info
[j
].form
;
2903 rw
= tic6x_opcode_table
[opcm
[i
]].operand_info
[j
].rw
;
2905 if (tic6x_operand_matches_form (&operands
[j
], f
, rw
,
2908 func_unit_data_side
)
2909 != tic6x_match_matches
)
2911 this_matches
= FALSE
;
2918 int rank
= TIC6X_PREFER_VAL (tic6x_opcode_table
[opcm
[i
]].flags
);
2920 if (rank
< min_rank
)
2922 if (rank
> max_rank
)
2925 if (opc_rank
[rank
] == (unsigned int) -1)
2928 /* The opcode table should provide a total ordering
2929 for all cases where multiple matches may get
2939 as_bad (_("bad operand combination for '%.*s'"), opc_len
, str
);
2940 bad_operands
= TRUE
;
2952 for (try_rank
= max_rank
; try_rank
>= min_rank
; try_rank
--)
2956 if (opc_rank
[try_rank
] == (unsigned int) -1)
2959 opcode_value
= tic6x_try_encode (opcm
[opc_rank
[try_rank
]], operands
,
2960 num_operands_read
, this_line_creg
,
2961 this_line_z
, func_unit_side
,
2962 func_unit_cross
, func_unit_data_side
,
2963 seginfo
->tc_segment_info_data
.sploop_ii
,
2964 &fix_exp
, &fix_pcrel
, &fx_r_type
,
2965 &fix_adda
, &fix_needed
, &encoded_ok
,
2966 (try_rank
== min_rank
? TRUE
: FALSE
),
2970 opct
= &tic6x_opcode_table
[opcm
[opc_rank
[try_rank
]]];
2980 if (this_line_parallel
)
2982 if (seginfo
->tc_segment_info_data
.num_execute_packet_insns
== 0)
2984 as_bad (_("parallel instruction not following another instruction"));
2988 if (seginfo
->tc_segment_info_data
.num_execute_packet_insns
>= 8)
2990 as_bad (_("too many instructions in execute packet"));
2994 if (this_insn_label
)
2995 as_bad (_("label not at start of execute packet"));
2997 if (opct
->flags
& TIC6X_FLAG_FIRST
)
2998 as_bad (_("'%.*s' instruction not at start of execute packet"),
3001 *seginfo
->tc_segment_info_data
.last_insn_lsb
|= 0x1;
3005 seginfo
->tc_segment_info_data
.num_execute_packet_insns
= 0;
3006 seginfo
->tc_segment_info_data
.spmask_addr
= NULL
;
3009 if (opct
->flags
& TIC6X_FLAG_SPLOOP
)
3011 if (seginfo
->tc_segment_info_data
.sploop_ii
)
3012 as_bad (_("nested software pipelined loop"));
3013 if (num_operands_read
!= 1
3014 || operands
[0].form
!= TIC6X_OP_EXP
3015 || operands
[0].value
.exp
.X_op
!= O_constant
)
3017 seginfo
->tc_segment_info_data
.sploop_ii
3018 = operands
[0].value
.exp
.X_add_number
;
3020 else if (opct
->flags
& TIC6X_FLAG_SPKERNEL
)
3022 if (!seginfo
->tc_segment_info_data
.sploop_ii
)
3023 as_bad (_("'%.*s' instruction not in a software pipelined loop"),
3025 seginfo
->tc_segment_info_data
.sploop_ii
= 0;
3028 if (this_line_spmask
)
3030 if (seginfo
->tc_segment_info_data
.spmask_addr
== NULL
)
3031 as_bad (_("'||^' without previous SPMASK"));
3032 else if (func_unit_base
== tic6x_func_unit_nfu
)
3033 as_bad (_("cannot mask instruction using no functional unit"));
3036 unsigned int spmask_opcode
;
3037 unsigned int mask_bit
;
3040 = md_chars_to_number (seginfo
->tc_segment_info_data
.spmask_addr
,
3042 mask_bit
= tic6x_encode_spmask (func_unit_base
, func_unit_side
);
3044 if (spmask_opcode
& mask_bit
)
3045 as_bad (_("functional unit already masked"));
3046 spmask_opcode
|= mask_bit
;
3047 md_number_to_chars (seginfo
->tc_segment_info_data
.spmask_addr
,
3052 record_alignment (now_seg
, 5);
3053 output
= frag_more (4);
3054 md_number_to_chars (output
, opcode_value
, 4);
3056 tic6x_fix_new_exp (frag_now
, output
- frag_now
->fr_literal
, 4, fix_exp
,
3057 fix_pcrel
, fx_r_type
, fix_adda
);
3058 seginfo
->tc_segment_info_data
.num_execute_packet_insns
++;
3059 seginfo
->tc_segment_info_data
.last_insn_lsb
3060 = (target_big_endian
? output
+ 3 : output
);
3061 if (opct
->flags
& TIC6X_FLAG_SPMASK
)
3062 seginfo
->tc_segment_info_data
.spmask_addr
= output
;
3063 dwarf2_emit_insn (4);
3066 /* Modify NEWVAL (32-bit) by inserting VALUE, shifted right by SHIFT
3067 and the least significant BITS bits taken, at position POS. */
3068 #define MODIFY_VALUE(NEWVAL, VALUE, SHIFT, POS, BITS) \
3070 (NEWVAL) &= 0xffffffffU & ~(((1U << (BITS)) - 1) << (POS)); \
3071 (NEWVAL) |= (((VALUE) >> (SHIFT)) & ((1U << (BITS)) - 1)) << (POS); \
3074 /* Apply a fixup to the object file. */
3077 md_apply_fix (fixS
*fixP
, valueT
*valP
, segT seg ATTRIBUTE_UNUSED
)
3079 offsetT value
= *valP
;
3080 char *buf
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
3082 value
= SEXT (value
);
3085 fixP
->fx_offset
= SEXT (fixP
->fx_offset
);
3087 if (fixP
->fx_addsy
== NULL
&& fixP
->fx_pcrel
== 0)
3090 /* We do our own overflow checks. */
3091 fixP
->fx_no_overflow
= 1;
3093 switch (fixP
->fx_r_type
)
3095 case BFD_RELOC_NONE
:
3096 /* Force output to the object file. */
3101 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3102 md_number_to_chars (buf
, value
, 4);
3106 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3108 if (value
< -0x8000 || value
> 0xffff)
3109 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3110 _("value too large for 2-byte field"));
3111 md_number_to_chars (buf
, value
, 2);
3116 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3118 if (value
< -0x80 || value
> 0xff)
3119 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3120 _("value too large for 1-byte field"));
3121 md_number_to_chars (buf
, value
, 1);
3125 case BFD_RELOC_C6000_ABS_S16
:
3126 case BFD_RELOC_C6000_ABS_L16
:
3127 case BFD_RELOC_C6000_SBR_S16
:
3128 case BFD_RELOC_C6000_SBR_L16_B
:
3129 case BFD_RELOC_C6000_SBR_L16_H
:
3130 case BFD_RELOC_C6000_SBR_L16_W
:
3131 case BFD_RELOC_C6000_SBR_GOT_L16_W
:
3132 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3134 offsetT newval
= md_chars_to_number (buf
, 4);
3137 switch (fixP
->fx_r_type
)
3139 case BFD_RELOC_C6000_SBR_L16_H
:
3143 case BFD_RELOC_C6000_SBR_L16_W
:
3144 case BFD_RELOC_C6000_SBR_GOT_L16_W
:
3153 MODIFY_VALUE (newval
, value
, shift
, 7, 16);
3154 if ((value
< -0x8000 || value
> 0x7fff)
3155 && (fixP
->fx_r_type
== BFD_RELOC_C6000_ABS_S16
3156 || fixP
->fx_r_type
== BFD_RELOC_C6000_SBR_S16
))
3157 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3158 _("immediate offset out of range"));
3160 md_number_to_chars (buf
, newval
, 4);
3163 && fixP
->fx_r_type
!= BFD_RELOC_C6000_ABS_S16
3164 && fixP
->fx_r_type
!= BFD_RELOC_C6000_ABS_L16
)
3168 case BFD_RELOC_C6000_ABS_H16
:
3169 case BFD_RELOC_C6000_SBR_H16_B
:
3170 case BFD_RELOC_C6000_SBR_H16_H
:
3171 case BFD_RELOC_C6000_SBR_H16_W
:
3172 case BFD_RELOC_C6000_SBR_GOT_H16_W
:
3173 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3175 offsetT newval
= md_chars_to_number (buf
, 4);
3178 switch (fixP
->fx_r_type
)
3180 case BFD_RELOC_C6000_SBR_H16_H
:
3184 case BFD_RELOC_C6000_SBR_H16_W
:
3185 case BFD_RELOC_C6000_SBR_GOT_H16_W
:
3194 MODIFY_VALUE (newval
, value
, shift
, 7, 16);
3196 md_number_to_chars (buf
, newval
, 4);
3198 if (fixP
->fx_done
&& fixP
->fx_r_type
!= BFD_RELOC_C6000_ABS_H16
)
3202 case BFD_RELOC_C6000_SBR_U15_B
:
3203 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3205 offsetT newval
= md_chars_to_number (buf
, 4);
3207 MODIFY_VALUE (newval
, value
, 0, 8, 15);
3208 if (value
< 0 || value
> 0x7fff)
3209 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3210 _("immediate offset out of range"));
3212 md_number_to_chars (buf
, newval
, 4);
3216 case BFD_RELOC_C6000_SBR_U15_H
:
3217 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3219 offsetT newval
= md_chars_to_number (buf
, 4);
3221 /* Constant ADDA operands, processed as constant when the
3222 instruction is parsed, are encoded as-is rather than
3223 shifted. If the operand of an ADDA instruction is now
3224 constant (for example, the difference between two labels
3225 found after the instruction), ensure it is encoded the
3226 same way it would have been if the constant value had
3227 been known when the instruction was parsed. */
3228 if (fixP
->tc_fix_data
.fix_adda
&& fixP
->fx_done
)
3231 MODIFY_VALUE (newval
, value
, 1, 8, 15);
3233 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3234 _("immediate offset not 2-byte-aligned"));
3235 if (value
< 0 || value
> 0xfffe)
3236 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3237 _("immediate offset out of range"));
3239 md_number_to_chars (buf
, newval
, 4);
3243 case BFD_RELOC_C6000_SBR_U15_W
:
3244 case BFD_RELOC_C6000_SBR_GOT_U15_W
:
3245 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3247 offsetT newval
= md_chars_to_number (buf
, 4);
3249 /* Constant ADDA operands, processed as constant when the
3250 instruction is parsed, are encoded as-is rather than
3251 shifted. If the operand of an ADDA instruction is now
3252 constant (for example, the difference between two labels
3253 found after the instruction), ensure it is encoded the
3254 same way it would have been if the constant value had
3255 been known when the instruction was parsed. */
3256 if (fixP
->tc_fix_data
.fix_adda
&& fixP
->fx_done
)
3259 MODIFY_VALUE (newval
, value
, 2, 8, 15);
3261 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3262 _("immediate offset not 4-byte-aligned"));
3263 if (value
< 0 || value
> 0x1fffc)
3264 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3265 _("immediate offset out of range"));
3267 md_number_to_chars (buf
, newval
, 4);
3269 if (fixP
->fx_done
&& fixP
->fx_r_type
!= BFD_RELOC_C6000_SBR_U15_W
)
3273 case BFD_RELOC_C6000_DSBT_INDEX
:
3275 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3276 _("addend used with $DSBT_INDEX"));
3281 case BFD_RELOC_C6000_PCR_S21
:
3282 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3284 offsetT newval
= md_chars_to_number (buf
, 4);
3286 MODIFY_VALUE (newval
, value
, 2, 7, 21);
3289 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3290 _("PC-relative offset not 4-byte-aligned"));
3291 if (value
< -0x400000 || value
> 0x3ffffc)
3292 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3293 _("PC-relative offset out of range"));
3295 md_number_to_chars (buf
, newval
, 4);
3299 case BFD_RELOC_C6000_PCR_S12
:
3300 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3302 offsetT newval
= md_chars_to_number (buf
, 4);
3304 MODIFY_VALUE (newval
, value
, 2, 16, 12);
3307 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3308 _("PC-relative offset not 4-byte-aligned"));
3309 if (value
< -0x2000 || value
> 0x1ffc)
3310 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3311 _("PC-relative offset out of range"));
3313 md_number_to_chars (buf
, newval
, 4);
3317 case BFD_RELOC_C6000_PCR_S10
:
3318 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3320 offsetT newval
= md_chars_to_number (buf
, 4);
3322 MODIFY_VALUE (newval
, value
, 2, 13, 10);
3325 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3326 _("PC-relative offset not 4-byte-aligned"));
3327 if (value
< -0x800 || value
> 0x7fc)
3328 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3329 _("PC-relative offset out of range"));
3331 md_number_to_chars (buf
, newval
, 4);
3335 case BFD_RELOC_C6000_PCR_S7
:
3336 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3338 offsetT newval
= md_chars_to_number (buf
, 4);
3340 MODIFY_VALUE (newval
, value
, 2, 16, 7);
3343 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3344 _("PC-relative offset not 4-byte-aligned"));
3345 if (value
< -0x100 || value
> 0xfc)
3346 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3347 _("PC-relative offset out of range"));
3349 md_number_to_chars (buf
, newval
, 4);
3358 /* Convert a floating-point number to target (IEEE) format. */
3361 md_atof (int type
, char *litP
, int *sizeP
)
3363 return ieee_md_atof (type
, litP
, sizeP
, target_big_endian
);
3366 /* No machine-dependent frags yet. */
3369 md_convert_frag (bfd
*abfd ATTRIBUTE_UNUSED
, segT asec ATTRIBUTE_UNUSED
,
3370 fragS
*fragp ATTRIBUTE_UNUSED
)
3375 /* No machine-dependent frags yet. */
3378 md_estimate_size_before_relax (fragS
*fragp ATTRIBUTE_UNUSED
,
3379 segT seg ATTRIBUTE_UNUSED
)
3384 /* Put a number into target byte order. */
3387 md_number_to_chars (char *buf
, valueT val
, int n
)
3389 if (target_big_endian
)
3390 number_to_chars_bigendian (buf
, val
, n
);
3392 number_to_chars_littleendian (buf
, val
, n
);
3395 /* Machine-dependent operand parsing not currently needed. */
3398 md_operand (expressionS
*op ATTRIBUTE_UNUSED
)
3402 /* PC-relative operands are relative to the start of the fetch
3406 tic6x_pcrel_from_section (fixS
*fixp
, segT sec
)
3408 if (fixp
->fx_addsy
!= NULL
3409 && (!S_IS_DEFINED (fixp
->fx_addsy
)
3410 || S_GET_SEGMENT (fixp
->fx_addsy
) != sec
))
3412 return (fixp
->fx_where
+ fixp
->fx_frag
->fr_address
) & ~(long) 0x1f;
3415 /* Round up a section size to the appropriate boundary. */
3418 md_section_align (segT segment ATTRIBUTE_UNUSED
,
3421 /* Round up section sizes to ensure that text sections consist of
3422 whole fetch packets. */
3423 int align
= bfd_get_section_alignment (stdoutput
, segment
);
3424 return ((size
+ (1 << align
) - 1) & ((valueT
) -1 << align
));
3427 /* No special undefined symbol handling needed for now. */
3430 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
3435 /* Translate internal representation of relocation info to BFD target
3439 tc_gen_reloc (asection
*section ATTRIBUTE_UNUSED
, fixS
*fixp
)
3442 bfd_reloc_code_real_type r_type
;
3444 reloc
= xmalloc (sizeof (arelent
));
3445 reloc
->sym_ptr_ptr
= xmalloc (sizeof (asymbol
*));
3446 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
3447 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
3448 reloc
->addend
= (tic6x_generate_rela
? fixp
->fx_offset
: 0);
3449 r_type
= fixp
->fx_r_type
;
3450 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, r_type
);
3452 if (reloc
->howto
== NULL
)
3454 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
3455 _("Cannot represent relocation type %s"),
3456 bfd_get_reloc_code_name (r_type
));
3460 /* Correct for adjustments bfd_install_relocation will make. */
3461 if (reloc
->howto
->pcrel_offset
&& reloc
->howto
->partial_inplace
)
3462 reloc
->addend
+= reloc
->address
;