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* gas/arm/thumb2_bcond.d: Allow for varying number of nops at the
[binutils/dougsmingw.git] / opcodes / m32c-ibld.c
blob66fc9991a1ba7a1c141566f9b854509568f767a6
1 /* Instruction building/extraction support for m32c. -*- C -*-
2
3 THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
4 - the resultant file is machine generated, cgen-ibld.in isn't
5
6 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005, 2006, 2007,
7 2008, 2010 Free Software Foundation, Inc.
8
9 This file is part of libopcodes.
10
11 This library is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 3, or (at your option)
14 any later version.
15
16 It is distributed in the hope that it will be useful, but WITHOUT
17 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
18 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
19 License for more details.
20
21 You should have received a copy of the GNU General Public License
22 along with this program; if not, write to the Free Software Foundation, Inc.,
23 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
24
25 /* ??? Eventually more and more of this stuff can go to cpu-independent files.
26 Keep that in mind. */
27
28 #include "sysdep.h"
29 #include <stdio.h>
30 #include "ansidecl.h"
31 #include "dis-asm.h"
32 #include "bfd.h"
33 #include "symcat.h"
34 #include "m32c-desc.h"
35 #include "m32c-opc.h"
36 #include "cgen/basic-modes.h"
37 #include "opintl.h"
38 #include "safe-ctype.h"
39
40 #undef min
41 #define min(a,b) ((a) < (b) ? (a) : (b))
42 #undef max
43 #define max(a,b) ((a) > (b) ? (a) : (b))
44
45 /* Used by the ifield rtx function. */
46 #define FLD(f) (fields->f)
47
48 static const char * insert_normal
49 (CGEN_CPU_DESC, long, unsigned int, unsigned int, unsigned int,
50 unsigned int, unsigned int, unsigned int, CGEN_INSN_BYTES_PTR);
51 static const char * insert_insn_normal
52 (CGEN_CPU_DESC, const CGEN_INSN *,
53 CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
54 static int extract_normal
55 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, CGEN_INSN_INT,
56 unsigned int, unsigned int, unsigned int, unsigned int,
57 unsigned int, unsigned int, bfd_vma, long *);
58 static int extract_insn_normal
59 (CGEN_CPU_DESC, const CGEN_INSN *, CGEN_EXTRACT_INFO *,
60 CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
61 #if CGEN_INT_INSN_P
62 static void put_insn_int_value
63 (CGEN_CPU_DESC, CGEN_INSN_BYTES_PTR, int, int, CGEN_INSN_INT);
64 #endif
65 #if ! CGEN_INT_INSN_P
66 static CGEN_INLINE void insert_1
67 (CGEN_CPU_DESC, unsigned long, int, int, int, unsigned char *);
68 static CGEN_INLINE int fill_cache
69 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, bfd_vma);
70 static CGEN_INLINE long extract_1
71 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, int, unsigned char *, bfd_vma);
72 #endif
73 \f
74 /* Operand insertion. */
75
76 #if ! CGEN_INT_INSN_P
77
78 /* Subroutine of insert_normal. */
79
80 static CGEN_INLINE void
81 insert_1 (CGEN_CPU_DESC cd,
82 unsigned long value,
83 int start,
84 int length,
85 int word_length,
86 unsigned char *bufp)
87 {
88 unsigned long x,mask;
89 int shift;
90
91 x = cgen_get_insn_value (cd, bufp, word_length);
92
93 /* Written this way to avoid undefined behaviour. */
94 mask = (((1L << (length - 1)) - 1) << 1) | 1;
95 if (CGEN_INSN_LSB0_P)
96 shift = (start + 1) - length;
97 else
98 shift = (word_length - (start + length));
99 x = (x & ~(mask << shift)) | ((value & mask) << shift);
100
101 cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x);
102 }
103
104 #endif /* ! CGEN_INT_INSN_P */
105
106 /* Default insertion routine.
107
108 ATTRS is a mask of the boolean attributes.
109 WORD_OFFSET is the offset in bits from the start of the insn of the value.
110 WORD_LENGTH is the length of the word in bits in which the value resides.
111 START is the starting bit number in the word, architecture origin.
112 LENGTH is the length of VALUE in bits.
113 TOTAL_LENGTH is the total length of the insn in bits.
114
115 The result is an error message or NULL if success. */
116
117 /* ??? This duplicates functionality with bfd's howto table and
118 bfd_install_relocation. */
119 /* ??? This doesn't handle bfd_vma's. Create another function when
120 necessary. */
121
122 static const char *
123 insert_normal (CGEN_CPU_DESC cd,
124 long value,
125 unsigned int attrs,
126 unsigned int word_offset,
127 unsigned int start,
128 unsigned int length,
129 unsigned int word_length,
130 unsigned int total_length,
131 CGEN_INSN_BYTES_PTR buffer)
132 {
133 static char errbuf[100];
134 /* Written this way to avoid undefined behaviour. */
135 unsigned long mask = (((1L << (length - 1)) - 1) << 1) | 1;
136
137 /* If LENGTH is zero, this operand doesn't contribute to the value. */
138 if (length == 0)
139 return NULL;
140
141 if (word_length > 8 * sizeof (CGEN_INSN_INT))
142 abort ();
143
144 /* For architectures with insns smaller than the base-insn-bitsize,
145 word_length may be too big. */
146 if (cd->min_insn_bitsize < cd->base_insn_bitsize)
147 {
148 if (word_offset == 0
149 && word_length > total_length)
150 word_length = total_length;
151 }
152
153 /* Ensure VALUE will fit. */
154 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT))
155 {
156 long minval = - (1L << (length - 1));
157 unsigned long maxval = mask;
158
159 if ((value > 0 && (unsigned long) value > maxval)
160 || value < minval)
161 {
162 /* xgettext:c-format */
163 sprintf (errbuf,
164 _("operand out of range (%ld not between %ld and %lu)"),
165 value, minval, maxval);
166 return errbuf;
167 }
168 }
169 else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED))
170 {
171 unsigned long maxval = mask;
172 unsigned long val = (unsigned long) value;
173
174 /* For hosts with a word size > 32 check to see if value has been sign
175 extended beyond 32 bits. If so then ignore these higher sign bits
176 as the user is attempting to store a 32-bit signed value into an
177 unsigned 32-bit field which is allowed. */
178 if (sizeof (unsigned long) > 4 && ((value >> 32) == -1))
179 val &= 0xFFFFFFFF;
180
181 if (val > maxval)
182 {
183 /* xgettext:c-format */
184 sprintf (errbuf,
185 _("operand out of range (0x%lx not between 0 and 0x%lx)"),
186 val, maxval);
187 return errbuf;
188 }
189 }
190 else
191 {
192 if (! cgen_signed_overflow_ok_p (cd))
193 {
194 long minval = - (1L << (length - 1));
195 long maxval = (1L << (length - 1)) - 1;
196
197 if (value < minval || value > maxval)
198 {
199 sprintf
200 /* xgettext:c-format */
201 (errbuf, _("operand out of range (%ld not between %ld and %ld)"),
202 value, minval, maxval);
203 return errbuf;
204 }
205 }
206 }
207
208 #if CGEN_INT_INSN_P
209
210 {
211 int shift;
212
213 if (CGEN_INSN_LSB0_P)
214 shift = (word_offset + start + 1) - length;
215 else
216 shift = total_length - (word_offset + start + length);
217 *buffer = (*buffer & ~(mask << shift)) | ((value & mask) << shift);
218 }
219
220 #else /* ! CGEN_INT_INSN_P */
221
222 {
223 unsigned char *bufp = (unsigned char *) buffer + word_offset / 8;
224
225 insert_1 (cd, value, start, length, word_length, bufp);
226 }
227
228 #endif /* ! CGEN_INT_INSN_P */
229
230 return NULL;
231 }
232
233 /* Default insn builder (insert handler).
234 The instruction is recorded in CGEN_INT_INSN_P byte order (meaning
235 that if CGEN_INSN_BYTES_PTR is an int * and thus, the value is
236 recorded in host byte order, otherwise BUFFER is an array of bytes
237 and the value is recorded in target byte order).
238 The result is an error message or NULL if success. */
239
240 static const char *
241 insert_insn_normal (CGEN_CPU_DESC cd,
242 const CGEN_INSN * insn,
243 CGEN_FIELDS * fields,
244 CGEN_INSN_BYTES_PTR buffer,
245 bfd_vma pc)
246 {
247 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
248 unsigned long value;
249 const CGEN_SYNTAX_CHAR_TYPE * syn;
250
251 CGEN_INIT_INSERT (cd);
252 value = CGEN_INSN_BASE_VALUE (insn);
253
254 /* If we're recording insns as numbers (rather than a string of bytes),
255 target byte order handling is deferred until later. */
256
257 #if CGEN_INT_INSN_P
258
259 put_insn_int_value (cd, buffer, cd->base_insn_bitsize,
260 CGEN_FIELDS_BITSIZE (fields), value);
261
262 #else
263
264 cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize,
265 (unsigned) CGEN_FIELDS_BITSIZE (fields)),
266 value);
267
268 #endif /* ! CGEN_INT_INSN_P */
269
270 /* ??? It would be better to scan the format's fields.
271 Still need to be able to insert a value based on the operand though;
272 e.g. storing a branch displacement that got resolved later.
273 Needs more thought first. */
274
275 for (syn = CGEN_SYNTAX_STRING (syntax); * syn; ++ syn)
276 {
277 const char *errmsg;
278
279 if (CGEN_SYNTAX_CHAR_P (* syn))
280 continue;
281
282 errmsg = (* cd->insert_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
283 fields, buffer, pc);
284 if (errmsg)
285 return errmsg;
286 }
287
288 return NULL;
289 }
290
291 #if CGEN_INT_INSN_P
292 /* Cover function to store an insn value into an integral insn. Must go here
293 because it needs <prefix>-desc.h for CGEN_INT_INSN_P. */
294
295 static void
296 put_insn_int_value (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
297 CGEN_INSN_BYTES_PTR buf,
298 int length,
299 int insn_length,
300 CGEN_INSN_INT value)
301 {
302 /* For architectures with insns smaller than the base-insn-bitsize,
303 length may be too big. */
304 if (length > insn_length)
305 *buf = value;
306 else
307 {
308 int shift = insn_length - length;
309 /* Written this way to avoid undefined behaviour. */
310 CGEN_INSN_INT mask = (((1L << (length - 1)) - 1) << 1) | 1;
311
312 *buf = (*buf & ~(mask << shift)) | ((value & mask) << shift);
313 }
314 }
315 #endif
316 \f
317 /* Operand extraction. */
318
319 #if ! CGEN_INT_INSN_P
320
321 /* Subroutine of extract_normal.
322 Ensure sufficient bytes are cached in EX_INFO.
323 OFFSET is the offset in bytes from the start of the insn of the value.
324 BYTES is the length of the needed value.
325 Returns 1 for success, 0 for failure. */
326
327 static CGEN_INLINE int
328 fill_cache (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
329 CGEN_EXTRACT_INFO *ex_info,
330 int offset,
331 int bytes,
332 bfd_vma pc)
333 {
334 /* It's doubtful that the middle part has already been fetched so
335 we don't optimize that case. kiss. */
336 unsigned int mask;
337 disassemble_info *info = (disassemble_info *) ex_info->dis_info;
338
339 /* First do a quick check. */
340 mask = (1 << bytes) - 1;
341 if (((ex_info->valid >> offset) & mask) == mask)
342 return 1;
343
344 /* Search for the first byte we need to read. */
345 for (mask = 1 << offset; bytes > 0; --bytes, ++offset, mask <<= 1)
346 if (! (mask & ex_info->valid))
347 break;
348
349 if (bytes)
350 {
351 int status;
352
353 pc += offset;
354 status = (*info->read_memory_func)
355 (pc, ex_info->insn_bytes + offset, bytes, info);
356
357 if (status != 0)
358 {
359 (*info->memory_error_func) (status, pc, info);
360 return 0;
361 }
362
363 ex_info->valid |= ((1 << bytes) - 1) << offset;
364 }
365
366 return 1;
367 }
368
369 /* Subroutine of extract_normal. */
370
371 static CGEN_INLINE long
372 extract_1 (CGEN_CPU_DESC cd,
373 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
374 int start,
375 int length,
376 int word_length,
377 unsigned char *bufp,
378 bfd_vma pc ATTRIBUTE_UNUSED)
379 {
380 unsigned long x;
381 int shift;
382
383 x = cgen_get_insn_value (cd, bufp, word_length);
384
385 if (CGEN_INSN_LSB0_P)
386 shift = (start + 1) - length;
387 else
388 shift = (word_length - (start + length));
389 return x >> shift;
390 }
391
392 #endif /* ! CGEN_INT_INSN_P */
393
394 /* Default extraction routine.
395
396 INSN_VALUE is the first base_insn_bitsize bits of the insn in host order,
397 or sometimes less for cases like the m32r where the base insn size is 32
398 but some insns are 16 bits.
399 ATTRS is a mask of the boolean attributes. We only need `SIGNED',
400 but for generality we take a bitmask of all of them.
401 WORD_OFFSET is the offset in bits from the start of the insn of the value.
402 WORD_LENGTH is the length of the word in bits in which the value resides.
403 START is the starting bit number in the word, architecture origin.
404 LENGTH is the length of VALUE in bits.
405 TOTAL_LENGTH is the total length of the insn in bits.
406
407 Returns 1 for success, 0 for failure. */
408
409 /* ??? The return code isn't properly used. wip. */
410
411 /* ??? This doesn't handle bfd_vma's. Create another function when
412 necessary. */
413
414 static int
415 extract_normal (CGEN_CPU_DESC cd,
416 #if ! CGEN_INT_INSN_P
417 CGEN_EXTRACT_INFO *ex_info,
418 #else
419 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
420 #endif
421 CGEN_INSN_INT insn_value,
422 unsigned int attrs,
423 unsigned int word_offset,
424 unsigned int start,
425 unsigned int length,
426 unsigned int word_length,
427 unsigned int total_length,
428 #if ! CGEN_INT_INSN_P
429 bfd_vma pc,
430 #else
431 bfd_vma pc ATTRIBUTE_UNUSED,
432 #endif
433 long *valuep)
434 {
435 long value, mask;
436
437 /* If LENGTH is zero, this operand doesn't contribute to the value
438 so give it a standard value of zero. */
439 if (length == 0)
440 {
441 *valuep = 0;
442 return 1;
443 }
444
445 if (word_length > 8 * sizeof (CGEN_INSN_INT))
446 abort ();
447
448 /* For architectures with insns smaller than the insn-base-bitsize,
449 word_length may be too big. */
450 if (cd->min_insn_bitsize < cd->base_insn_bitsize)
451 {
452 if (word_offset + word_length > total_length)
453 word_length = total_length - word_offset;
454 }
455
456 /* Does the value reside in INSN_VALUE, and at the right alignment? */
457
458 if (CGEN_INT_INSN_P || (word_offset == 0 && word_length == total_length))
459 {
460 if (CGEN_INSN_LSB0_P)
461 value = insn_value >> ((word_offset + start + 1) - length);
462 else
463 value = insn_value >> (total_length - ( word_offset + start + length));
464 }
465
466 #if ! CGEN_INT_INSN_P
467
468 else
469 {
470 unsigned char *bufp = ex_info->insn_bytes + word_offset / 8;
471
472 if (word_length > 8 * sizeof (CGEN_INSN_INT))
473 abort ();
474
475 if (fill_cache (cd, ex_info, word_offset / 8, word_length / 8, pc) == 0)
476 return 0;
477
478 value = extract_1 (cd, ex_info, start, length, word_length, bufp, pc);
479 }
480
481 #endif /* ! CGEN_INT_INSN_P */
482
483 /* Written this way to avoid undefined behaviour. */
484 mask = (((1L << (length - 1)) - 1) << 1) | 1;
485
486 value &= mask;
487 /* sign extend? */
488 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED)
489 && (value & (1L << (length - 1))))
490 value |= ~mask;
491
492 *valuep = value;
493
494 return 1;
495 }
496
497 /* Default insn extractor.
498
499 INSN_VALUE is the first base_insn_bitsize bits, translated to host order.
500 The extracted fields are stored in FIELDS.
501 EX_INFO is used to handle reading variable length insns.
502 Return the length of the insn in bits, or 0 if no match,
503 or -1 if an error occurs fetching data (memory_error_func will have
504 been called). */
505
506 static int
507 extract_insn_normal (CGEN_CPU_DESC cd,
508 const CGEN_INSN *insn,
509 CGEN_EXTRACT_INFO *ex_info,
510 CGEN_INSN_INT insn_value,
511 CGEN_FIELDS *fields,
512 bfd_vma pc)
513 {
514 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
515 const CGEN_SYNTAX_CHAR_TYPE *syn;
516
517 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
518
519 CGEN_INIT_EXTRACT (cd);
520
521 for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
522 {
523 int length;
524
525 if (CGEN_SYNTAX_CHAR_P (*syn))
526 continue;
527
528 length = (* cd->extract_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
529 ex_info, insn_value, fields, pc);
530 if (length <= 0)
531 return length;
532 }
533
534 /* We recognized and successfully extracted this insn. */
535 return CGEN_INSN_BITSIZE (insn);
536 }
537 \f
538 /* Machine generated code added here. */
539
540 const char * m32c_cgen_insert_operand
541 (CGEN_CPU_DESC, int, CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
542
543 /* Main entry point for operand insertion.
544
545 This function is basically just a big switch statement. Earlier versions
546 used tables to look up the function to use, but
547 - if the table contains both assembler and disassembler functions then
548 the disassembler contains much of the assembler and vice-versa,
549 - there's a lot of inlining possibilities as things grow,
550 - using a switch statement avoids the function call overhead.
551
552 This function could be moved into `parse_insn_normal', but keeping it
553 separate makes clear the interface between `parse_insn_normal' and each of
554 the handlers. It's also needed by GAS to insert operands that couldn't be
555 resolved during parsing. */
556
557 const char *
558 m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
559 int opindex,
560 CGEN_FIELDS * fields,
561 CGEN_INSN_BYTES_PTR buffer,
562 bfd_vma pc ATTRIBUTE_UNUSED)
563 {
564 const char * errmsg = NULL;
565 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
566
567 switch (opindex)
568 {
569 case M32C_OPERAND_A0 :
570 break;
571 case M32C_OPERAND_A1 :
572 break;
573 case M32C_OPERAND_AN16_PUSH_S :
574 errmsg = insert_normal (cd, fields->f_4_1, 0, 0, 4, 1, 32, total_length, buffer);
575 break;
576 case M32C_OPERAND_BIT16AN :
577 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
578 break;
579 case M32C_OPERAND_BIT16RN :
580 errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer);
581 break;
582 case M32C_OPERAND_BIT3_S :
583 {
584 {
585 FLD (f_7_1) = ((((FLD (f_imm3_S)) - (1))) & (1));
586 FLD (f_2_2) = ((((UINT) (((FLD (f_imm3_S)) - (1))) >> (1))) & (3));
587 }
588 errmsg = insert_normal (cd, fields->f_2_2, 0, 0, 2, 2, 32, total_length, buffer);
589 if (errmsg)
590 break;
591 errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer);
592 if (errmsg)
593 break;
594 }
595 break;
596 case M32C_OPERAND_BIT32ANPREFIXED :
597 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
598 break;
599 case M32C_OPERAND_BIT32ANUNPREFIXED :
600 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
601 break;
602 case M32C_OPERAND_BIT32RNPREFIXED :
603 {
604 long value = fields->f_dst32_rn_prefixed_QI;
605 value = (((((((~ (value))) << (1))) & (2))) | (((((USI) (value) >> (1))) & (1))));
606 errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer);
607 }
608 break;
609 case M32C_OPERAND_BIT32RNUNPREFIXED :
610 {
611 long value = fields->f_dst32_rn_unprefixed_QI;
612 value = (((((((~ (value))) << (1))) & (2))) | (((((USI) (value) >> (1))) & (1))));
613 errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer);
614 }
615 break;
616 case M32C_OPERAND_BITBASE16_16_S8 :
617 errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer);
618 break;
619 case M32C_OPERAND_BITBASE16_16_U16 :
620 {
621 long value = fields->f_dsp_16_u16;
622 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
623 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
624 }
625 break;
626 case M32C_OPERAND_BITBASE16_16_U8 :
627 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
628 break;
629 case M32C_OPERAND_BITBASE16_8_U11_S :
630 {
631 {
632 FLD (f_bitno16_S) = ((FLD (f_bitbase16_u11_S)) & (7));
633 FLD (f_dsp_8_u8) = ((((UINT) (FLD (f_bitbase16_u11_S)) >> (3))) & (255));
634 }
635 errmsg = insert_normal (cd, fields->f_bitno16_S, 0, 0, 5, 3, 32, total_length, buffer);
636 if (errmsg)
637 break;
638 errmsg = insert_normal (cd, fields->f_dsp_8_u8, 0, 0, 8, 8, 32, total_length, buffer);
639 if (errmsg)
640 break;
641 }
642 break;
643 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
644 {
645 {
646 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_s11_unprefixed)) & (7));
647 FLD (f_dsp_16_s8) = ((INT) (FLD (f_bitbase32_16_s11_unprefixed)) >> (3));
648 }
649 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
650 if (errmsg)
651 break;
652 errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer);
653 if (errmsg)
654 break;
655 }
656 break;
657 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
658 {
659 {
660 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_s19_unprefixed)) & (7));
661 FLD (f_dsp_16_s16) = ((INT) (FLD (f_bitbase32_16_s19_unprefixed)) >> (3));
662 }
663 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
664 if (errmsg)
665 break;
666 {
667 long value = fields->f_dsp_16_s16;
668 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
669 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, buffer);
670 }
671 if (errmsg)
672 break;
673 }
674 break;
675 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
676 {
677 {
678 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_u11_unprefixed)) & (7));
679 FLD (f_dsp_16_u8) = ((((UINT) (FLD (f_bitbase32_16_u11_unprefixed)) >> (3))) & (255));
680 }
681 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
682 if (errmsg)
683 break;
684 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
685 if (errmsg)
686 break;
687 }
688 break;
689 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
690 {
691 {
692 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_u19_unprefixed)) & (7));
693 FLD (f_dsp_16_u16) = ((((UINT) (FLD (f_bitbase32_16_u19_unprefixed)) >> (3))) & (65535));
694 }
695 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
696 if (errmsg)
697 break;
698 {
699 long value = fields->f_dsp_16_u16;
700 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
701 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
702 }
703 if (errmsg)
704 break;
705 }
706 break;
707 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
708 {
709 {
710 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_u27_unprefixed)) & (7));
711 FLD (f_dsp_16_u16) = ((((UINT) (FLD (f_bitbase32_16_u27_unprefixed)) >> (3))) & (65535));
712 FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_bitbase32_16_u27_unprefixed)) >> (19))) & (255));
713 }
714 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
715 if (errmsg)
716 break;
717 {
718 long value = fields->f_dsp_16_u16;
719 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
720 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
721 }
722 if (errmsg)
723 break;
724 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
725 if (errmsg)
726 break;
727 }
728 break;
729 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
730 {
731 {
732 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_s11_prefixed)) & (7));
733 FLD (f_dsp_24_s8) = ((INT) (FLD (f_bitbase32_24_s11_prefixed)) >> (3));
734 }
735 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
736 if (errmsg)
737 break;
738 errmsg = insert_normal (cd, fields->f_dsp_24_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, buffer);
739 if (errmsg)
740 break;
741 }
742 break;
743 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
744 {
745 {
746 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_s19_prefixed)) & (7));
747 FLD (f_dsp_24_u8) = ((((UINT) (FLD (f_bitbase32_24_s19_prefixed)) >> (3))) & (255));
748 FLD (f_dsp_32_s8) = ((INT) (FLD (f_bitbase32_24_s19_prefixed)) >> (11));
749 }
750 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
751 if (errmsg)
752 break;
753 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
754 if (errmsg)
755 break;
756 errmsg = insert_normal (cd, fields->f_dsp_32_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, buffer);
757 if (errmsg)
758 break;
759 }
760 break;
761 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
762 {
763 {
764 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_u11_prefixed)) & (7));
765 FLD (f_dsp_24_u8) = ((((UINT) (FLD (f_bitbase32_24_u11_prefixed)) >> (3))) & (255));
766 }
767 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
768 if (errmsg)
769 break;
770 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
771 if (errmsg)
772 break;
773 }
774 break;
775 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
776 {
777 {
778 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_u19_prefixed)) & (7));
779 FLD (f_dsp_24_u8) = ((((UINT) (FLD (f_bitbase32_24_u19_prefixed)) >> (3))) & (255));
780 FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_bitbase32_24_u19_prefixed)) >> (11))) & (255));
781 }
782 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
783 if (errmsg)
784 break;
785 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
786 if (errmsg)
787 break;
788 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
789 if (errmsg)
790 break;
791 }
792 break;
793 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
794 {
795 {
796 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_u27_prefixed)) & (7));
797 FLD (f_dsp_24_u8) = ((((UINT) (FLD (f_bitbase32_24_u27_prefixed)) >> (3))) & (255));
798 FLD (f_dsp_32_u16) = ((((UINT) (FLD (f_bitbase32_24_u27_prefixed)) >> (11))) & (65535));
799 }
800 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
801 if (errmsg)
802 break;
803 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
804 if (errmsg)
805 break;
806 {
807 long value = fields->f_dsp_32_u16;
808 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
809 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
810 }
811 if (errmsg)
812 break;
813 }
814 break;
815 case M32C_OPERAND_BITNO16R :
816 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
817 break;
818 case M32C_OPERAND_BITNO32PREFIXED :
819 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
820 break;
821 case M32C_OPERAND_BITNO32UNPREFIXED :
822 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
823 break;
824 case M32C_OPERAND_DSP_10_U6 :
825 errmsg = insert_normal (cd, fields->f_dsp_10_u6, 0, 0, 10, 6, 32, total_length, buffer);
826 break;
827 case M32C_OPERAND_DSP_16_S16 :
828 {
829 long value = fields->f_dsp_16_s16;
830 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
831 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, buffer);
832 }
833 break;
834 case M32C_OPERAND_DSP_16_S8 :
835 errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer);
836 break;
837 case M32C_OPERAND_DSP_16_U16 :
838 {
839 long value = fields->f_dsp_16_u16;
840 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
841 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
842 }
843 break;
844 case M32C_OPERAND_DSP_16_U20 :
845 {
846 {
847 FLD (f_dsp_16_u16) = ((FLD (f_dsp_16_u24)) & (65535));
848 FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_dsp_16_u24)) >> (16))) & (255));
849 }
850 {
851 long value = fields->f_dsp_16_u16;
852 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
853 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
854 }
855 if (errmsg)
856 break;
857 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
858 if (errmsg)
859 break;
860 }
861 break;
862 case M32C_OPERAND_DSP_16_U24 :
863 {
864 {
865 FLD (f_dsp_16_u16) = ((FLD (f_dsp_16_u24)) & (65535));
866 FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_dsp_16_u24)) >> (16))) & (255));
867 }
868 {
869 long value = fields->f_dsp_16_u16;
870 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
871 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
872 }
873 if (errmsg)
874 break;
875 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
876 if (errmsg)
877 break;
878 }
879 break;
880 case M32C_OPERAND_DSP_16_U8 :
881 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
882 break;
883 case M32C_OPERAND_DSP_24_S16 :
884 {
885 {
886 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_s16)) & (255));
887 FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_dsp_24_s16)) >> (8))) & (255));
888 }
889 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
890 if (errmsg)
891 break;
892 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
893 if (errmsg)
894 break;
895 }
896 break;
897 case M32C_OPERAND_DSP_24_S8 :
898 errmsg = insert_normal (cd, fields->f_dsp_24_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, buffer);
899 break;
900 case M32C_OPERAND_DSP_24_U16 :
901 {
902 {
903 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_u16)) & (255));
904 FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_dsp_24_u16)) >> (8))) & (255));
905 }
906 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
907 if (errmsg)
908 break;
909 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
910 if (errmsg)
911 break;
912 }
913 break;
914 case M32C_OPERAND_DSP_24_U20 :
915 {
916 {
917 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_u24)) & (255));
918 FLD (f_dsp_32_u16) = ((((UINT) (FLD (f_dsp_24_u24)) >> (8))) & (65535));
919 }
920 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
921 if (errmsg)
922 break;
923 {
924 long value = fields->f_dsp_32_u16;
925 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
926 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
927 }
928 if (errmsg)
929 break;
930 }
931 break;
932 case M32C_OPERAND_DSP_24_U24 :
933 {
934 {
935 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_u24)) & (255));
936 FLD (f_dsp_32_u16) = ((((UINT) (FLD (f_dsp_24_u24)) >> (8))) & (65535));
937 }
938 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
939 if (errmsg)
940 break;
941 {
942 long value = fields->f_dsp_32_u16;
943 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
944 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
945 }
946 if (errmsg)
947 break;
948 }
949 break;
950 case M32C_OPERAND_DSP_24_U8 :
951 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
952 break;
953 case M32C_OPERAND_DSP_32_S16 :
954 {
955 long value = fields->f_dsp_32_s16;
956 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
957 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, buffer);
958 }
959 break;
960 case M32C_OPERAND_DSP_32_S8 :
961 errmsg = insert_normal (cd, fields->f_dsp_32_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, buffer);
962 break;
963 case M32C_OPERAND_DSP_32_U16 :
964 {
965 long value = fields->f_dsp_32_u16;
966 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
967 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
968 }
969 break;
970 case M32C_OPERAND_DSP_32_U20 :
971 {
972 long value = fields->f_dsp_32_u24;
973 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
974 errmsg = insert_normal (cd, value, 0, 32, 0, 24, 32, total_length, buffer);
975 }
976 break;
977 case M32C_OPERAND_DSP_32_U24 :
978 {
979 long value = fields->f_dsp_32_u24;
980 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
981 errmsg = insert_normal (cd, value, 0, 32, 0, 24, 32, total_length, buffer);
982 }
983 break;
984 case M32C_OPERAND_DSP_32_U8 :
985 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
986 break;
987 case M32C_OPERAND_DSP_40_S16 :
988 {
989 long value = fields->f_dsp_40_s16;
990 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
991 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, buffer);
992 }
993 break;
994 case M32C_OPERAND_DSP_40_S8 :
995 errmsg = insert_normal (cd, fields->f_dsp_40_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, buffer);
996 break;
997 case M32C_OPERAND_DSP_40_U16 :
998 {
999 long value = fields->f_dsp_40_u16;
1000 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1001 errmsg = insert_normal (cd, value, 0, 32, 8, 16, 32, total_length, buffer);
1002 }
1003 break;
1004 case M32C_OPERAND_DSP_40_U20 :
1005 {
1006 long value = fields->f_dsp_40_u20;
1007 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (983040))));
1008 errmsg = insert_normal (cd, value, 0, 32, 8, 20, 32, total_length, buffer);
1009 }
1010 break;
1011 case M32C_OPERAND_DSP_40_U24 :
1012 {
1013 long value = fields->f_dsp_40_u24;
1014 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
1015 errmsg = insert_normal (cd, value, 0, 32, 8, 24, 32, total_length, buffer);
1016 }
1017 break;
1018 case M32C_OPERAND_DSP_40_U8 :
1019 errmsg = insert_normal (cd, fields->f_dsp_40_u8, 0, 32, 8, 8, 32, total_length, buffer);
1020 break;
1021 case M32C_OPERAND_DSP_48_S16 :
1022 {
1023 long value = fields->f_dsp_48_s16;
1024 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1025 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, buffer);
1026 }
1027 break;
1028 case M32C_OPERAND_DSP_48_S8 :
1029 errmsg = insert_normal (cd, fields->f_dsp_48_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, buffer);
1030 break;
1031 case M32C_OPERAND_DSP_48_U16 :
1032 {
1033 long value = fields->f_dsp_48_u16;
1034 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1035 errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer);
1036 }
1037 break;
1038 case M32C_OPERAND_DSP_48_U20 :
1039 {
1040 {
1041 FLD (f_dsp_64_u8) = ((((UINT) (FLD (f_dsp_48_u20)) >> (16))) & (15));
1042 FLD (f_dsp_48_u16) = ((FLD (f_dsp_48_u20)) & (65535));
1043 }
1044 {
1045 long value = fields->f_dsp_48_u16;
1046 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1047 errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer);
1048 }
1049 if (errmsg)
1050 break;
1051 errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer);
1052 if (errmsg)
1053 break;
1054 }
1055 break;
1056 case M32C_OPERAND_DSP_48_U24 :
1057 {
1058 {
1059 FLD (f_dsp_64_u8) = ((((UINT) (FLD (f_dsp_48_u24)) >> (16))) & (255));
1060 FLD (f_dsp_48_u16) = ((FLD (f_dsp_48_u24)) & (65535));
1061 }
1062 {
1063 long value = fields->f_dsp_48_u16;
1064 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1065 errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer);
1066 }
1067 if (errmsg)
1068 break;
1069 errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer);
1070 if (errmsg)
1071 break;
1072 }
1073 break;
1074 case M32C_OPERAND_DSP_48_U8 :
1075 errmsg = insert_normal (cd, fields->f_dsp_48_u8, 0, 32, 16, 8, 32, total_length, buffer);
1076 break;
1077 case M32C_OPERAND_DSP_8_S24 :
1078 {
1079 long value = fields->f_dsp_8_s24;
1080 value = ((((((USI) (value) >> (16))) | (((value) & (65280))))) | (((EXTQISI (TRUNCSIQI (((value) & (255))))) << (16))));
1081 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 24, 32, total_length, buffer);
1082 }
1083 break;
1084 case M32C_OPERAND_DSP_8_S8 :
1085 errmsg = insert_normal (cd, fields->f_dsp_8_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, buffer);
1086 break;
1087 case M32C_OPERAND_DSP_8_U16 :
1088 {
1089 long value = fields->f_dsp_8_u16;
1090 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1091 errmsg = insert_normal (cd, value, 0, 0, 8, 16, 32, total_length, buffer);
1092 }
1093 break;
1094 case M32C_OPERAND_DSP_8_U24 :
1095 {
1096 long value = fields->f_dsp_8_u24;
1097 value = ((((((USI) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
1098 errmsg = insert_normal (cd, value, 0, 0, 8, 24, 32, total_length, buffer);
1099 }
1100 break;
1101 case M32C_OPERAND_DSP_8_U6 :
1102 errmsg = insert_normal (cd, fields->f_dsp_8_u6, 0, 0, 8, 6, 32, total_length, buffer);
1103 break;
1104 case M32C_OPERAND_DSP_8_U8 :
1105 errmsg = insert_normal (cd, fields->f_dsp_8_u8, 0, 0, 8, 8, 32, total_length, buffer);
1106 break;
1107 case M32C_OPERAND_DST16AN :
1108 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
1109 break;
1110 case M32C_OPERAND_DST16AN_S :
1111 errmsg = insert_normal (cd, fields->f_dst16_an_s, 0, 0, 4, 1, 32, total_length, buffer);
1112 break;
1113 case M32C_OPERAND_DST16ANHI :
1114 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
1115 break;
1116 case M32C_OPERAND_DST16ANQI :
1117 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
1118 break;
1119 case M32C_OPERAND_DST16ANQI_S :
1120 errmsg = insert_normal (cd, fields->f_dst16_rn_QI_s, 0, 0, 5, 1, 32, total_length, buffer);
1121 break;
1122 case M32C_OPERAND_DST16ANSI :
1123 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
1124 break;
1125 case M32C_OPERAND_DST16RNEXTQI :
1126 errmsg = insert_normal (cd, fields->f_dst16_rn_ext, 0, 0, 14, 1, 32, total_length, buffer);
1127 break;
1128 case M32C_OPERAND_DST16RNHI :
1129 errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer);
1130 break;
1131 case M32C_OPERAND_DST16RNQI :
1132 errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer);
1133 break;
1134 case M32C_OPERAND_DST16RNQI_S :
1135 errmsg = insert_normal (cd, fields->f_dst16_rn_QI_s, 0, 0, 5, 1, 32, total_length, buffer);
1136 break;
1137 case M32C_OPERAND_DST16RNSI :
1138 errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer);
1139 break;
1140 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
1141 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1142 break;
1143 case M32C_OPERAND_DST32ANPREFIXED :
1144 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
1145 break;
1146 case M32C_OPERAND_DST32ANPREFIXEDHI :
1147 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
1148 break;
1149 case M32C_OPERAND_DST32ANPREFIXEDQI :
1150 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
1151 break;
1152 case M32C_OPERAND_DST32ANPREFIXEDSI :
1153 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
1154 break;
1155 case M32C_OPERAND_DST32ANUNPREFIXED :
1156 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1157 break;
1158 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
1159 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1160 break;
1161 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
1162 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1163 break;
1164 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
1165 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1166 break;
1167 case M32C_OPERAND_DST32R0HI_S :
1168 break;
1169 case M32C_OPERAND_DST32R0QI_S :
1170 break;
1171 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
1172 errmsg = insert_normal (cd, fields->f_dst32_rn_ext_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1173 break;
1174 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
1175 errmsg = insert_normal (cd, fields->f_dst32_rn_ext_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1176 break;
1177 case M32C_OPERAND_DST32RNPREFIXEDHI :
1178 {
1179 long value = fields->f_dst32_rn_prefixed_HI;
1180 value = ((((value) + (2))) % (4));
1181 errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer);
1182 }
1183 break;
1184 case M32C_OPERAND_DST32RNPREFIXEDQI :
1185 {
1186 long value = fields->f_dst32_rn_prefixed_QI;
1187 value = (((((((~ (value))) << (1))) & (2))) | (((((USI) (value) >> (1))) & (1))));
1188 errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer);
1189 }
1190 break;
1191 case M32C_OPERAND_DST32RNPREFIXEDSI :
1192 {
1193 long value = fields->f_dst32_rn_prefixed_SI;
1194 value = ((value) + (2));
1195 errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer);
1196 }
1197 break;
1198 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
1199 {
1200 long value = fields->f_dst32_rn_unprefixed_HI;
1201 value = ((((value) + (2))) % (4));
1202 errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer);
1203 }
1204 break;
1205 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
1206 {
1207 long value = fields->f_dst32_rn_unprefixed_QI;
1208 value = (((((((~ (value))) << (1))) & (2))) | (((((USI) (value) >> (1))) & (1))));
1209 errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer);
1210 }
1211 break;
1212 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
1213 {
1214 long value = fields->f_dst32_rn_unprefixed_SI;
1215 value = ((value) + (2));
1216 errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer);
1217 }
1218 break;
1219 case M32C_OPERAND_G :
1220 break;
1221 case M32C_OPERAND_IMM_12_S4 :
1222 errmsg = insert_normal (cd, fields->f_imm_12_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, buffer);
1223 break;
1224 case M32C_OPERAND_IMM_12_S4N :
1225 errmsg = insert_normal (cd, fields->f_imm_12_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, buffer);
1226 break;
1227 case M32C_OPERAND_IMM_13_U3 :
1228 errmsg = insert_normal (cd, fields->f_imm_13_u3, 0, 0, 13, 3, 32, total_length, buffer);
1229 break;
1230 case M32C_OPERAND_IMM_16_HI :
1231 {
1232 long value = fields->f_dsp_16_s16;
1233 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1234 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, buffer);
1235 }
1236 break;
1237 case M32C_OPERAND_IMM_16_QI :
1238 errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer);
1239 break;
1240 case M32C_OPERAND_IMM_16_SI :
1241 {
1242 {
1243 FLD (f_dsp_32_u16) = ((((UINT) (FLD (f_dsp_16_s32)) >> (16))) & (65535));
1244 FLD (f_dsp_16_u16) = ((FLD (f_dsp_16_s32)) & (65535));
1245 }
1246 {
1247 long value = fields->f_dsp_16_u16;
1248 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1249 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
1250 }
1251 if (errmsg)
1252 break;
1253 {
1254 long value = fields->f_dsp_32_u16;
1255 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1256 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
1257 }
1258 if (errmsg)
1259 break;
1260 }
1261 break;
1262 case M32C_OPERAND_IMM_20_S4 :
1263 errmsg = insert_normal (cd, fields->f_imm_20_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, buffer);
1264 break;
1265 case M32C_OPERAND_IMM_24_HI :
1266 {
1267 {
1268 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_s16)) & (255));
1269 FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_dsp_24_s16)) >> (8))) & (255));
1270 }
1271 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
1272 if (errmsg)
1273 break;
1274 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
1275 if (errmsg)
1276 break;
1277 }
1278 break;
1279 case M32C_OPERAND_IMM_24_QI :
1280 errmsg = insert_normal (cd, fields->f_dsp_24_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, buffer);
1281 break;
1282 case M32C_OPERAND_IMM_24_SI :
1283 {
1284 {
1285 FLD (f_dsp_32_u24) = ((((UINT) (FLD (f_dsp_24_s32)) >> (8))) & (16777215));
1286 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_s32)) & (255));
1287 }
1288 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
1289 if (errmsg)
1290 break;
1291 {
1292 long value = fields->f_dsp_32_u24;
1293 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
1294 errmsg = insert_normal (cd, value, 0, 32, 0, 24, 32, total_length, buffer);
1295 }
1296 if (errmsg)
1297 break;
1298 }
1299 break;
1300 case M32C_OPERAND_IMM_32_HI :
1301 {
1302 long value = fields->f_dsp_32_s16;
1303 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1304 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, buffer);
1305 }
1306 break;
1307 case M32C_OPERAND_IMM_32_QI :
1308 errmsg = insert_normal (cd, fields->f_dsp_32_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, buffer);
1309 break;
1310 case M32C_OPERAND_IMM_32_SI :
1311 {
1312 long value = fields->f_dsp_32_s32;
1313 value = EXTSISI (((((((((UINT) (value) >> (24))) & (255))) | (((((UINT) (value) >> (8))) & (65280))))) | (((((((value) << (8))) & (16711680))) | (((((value) << (24))) & (0xff000000)))))));
1314 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 32, 32, total_length, buffer);
1315 }
1316 break;
1317 case M32C_OPERAND_IMM_40_HI :
1318 {
1319 long value = fields->f_dsp_40_s16;
1320 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1321 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, buffer);
1322 }
1323 break;
1324 case M32C_OPERAND_IMM_40_QI :
1325 errmsg = insert_normal (cd, fields->f_dsp_40_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, buffer);
1326 break;
1327 case M32C_OPERAND_IMM_40_SI :
1328 {
1329 {
1330 FLD (f_dsp_64_u8) = ((((UINT) (FLD (f_dsp_40_s32)) >> (24))) & (255));
1331 FLD (f_dsp_40_u24) = ((FLD (f_dsp_40_s32)) & (16777215));
1332 }
1333 {
1334 long value = fields->f_dsp_40_u24;
1335 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
1336 errmsg = insert_normal (cd, value, 0, 32, 8, 24, 32, total_length, buffer);
1337 }
1338 if (errmsg)
1339 break;
1340 errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer);
1341 if (errmsg)
1342 break;
1343 }
1344 break;
1345 case M32C_OPERAND_IMM_48_HI :
1346 {
1347 long value = fields->f_dsp_48_s16;
1348 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1349 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, buffer);
1350 }
1351 break;
1352 case M32C_OPERAND_IMM_48_QI :
1353 errmsg = insert_normal (cd, fields->f_dsp_48_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, buffer);
1354 break;
1355 case M32C_OPERAND_IMM_48_SI :
1356 {
1357 {
1358 FLD (f_dsp_64_u16) = ((((UINT) (FLD (f_dsp_48_s32)) >> (16))) & (65535));
1359 FLD (f_dsp_48_u16) = ((FLD (f_dsp_48_s32)) & (65535));
1360 }
1361 {
1362 long value = fields->f_dsp_48_u16;
1363 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1364 errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer);
1365 }
1366 if (errmsg)
1367 break;
1368 {
1369 long value = fields->f_dsp_64_u16;
1370 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1371 errmsg = insert_normal (cd, value, 0, 64, 0, 16, 32, total_length, buffer);
1372 }
1373 if (errmsg)
1374 break;
1375 }
1376 break;
1377 case M32C_OPERAND_IMM_56_HI :
1378 {
1379 {
1380 FLD (f_dsp_56_u8) = ((FLD (f_dsp_56_s16)) & (255));
1381 FLD (f_dsp_64_u8) = ((((UINT) (FLD (f_dsp_56_s16)) >> (8))) & (255));
1382 }
1383 errmsg = insert_normal (cd, fields->f_dsp_56_u8, 0, 32, 24, 8, 32, total_length, buffer);
1384 if (errmsg)
1385 break;
1386 errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer);
1387 if (errmsg)
1388 break;
1389 }
1390 break;
1391 case M32C_OPERAND_IMM_56_QI :
1392 errmsg = insert_normal (cd, fields->f_dsp_56_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 24, 8, 32, total_length, buffer);
1393 break;
1394 case M32C_OPERAND_IMM_64_HI :
1395 {
1396 long value = fields->f_dsp_64_s16;
1397 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1398 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 64, 0, 16, 32, total_length, buffer);
1399 }
1400 break;
1401 case M32C_OPERAND_IMM_8_HI :
1402 {
1403 long value = fields->f_dsp_8_s16;
1404 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1405 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 16, 32, total_length, buffer);
1406 }
1407 break;
1408 case M32C_OPERAND_IMM_8_QI :
1409 errmsg = insert_normal (cd, fields->f_dsp_8_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, buffer);
1410 break;
1411 case M32C_OPERAND_IMM_8_S4 :
1412 errmsg = insert_normal (cd, fields->f_imm_8_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, buffer);
1413 break;
1414 case M32C_OPERAND_IMM_8_S4N :
1415 errmsg = insert_normal (cd, fields->f_imm_8_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, buffer);
1416 break;
1417 case M32C_OPERAND_IMM_SH_12_S4 :
1418 errmsg = insert_normal (cd, fields->f_imm_12_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, buffer);
1419 break;
1420 case M32C_OPERAND_IMM_SH_20_S4 :
1421 errmsg = insert_normal (cd, fields->f_imm_20_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, buffer);
1422 break;
1423 case M32C_OPERAND_IMM_SH_8_S4 :
1424 errmsg = insert_normal (cd, fields->f_imm_8_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, buffer);
1425 break;
1426 case M32C_OPERAND_IMM1_S :
1427 {
1428 long value = fields->f_imm1_S;
1429 value = ((value) - (1));
1430 errmsg = insert_normal (cd, value, 0, 0, 2, 1, 32, total_length, buffer);
1431 }
1432 break;
1433 case M32C_OPERAND_IMM3_S :
1434 {
1435 {
1436 FLD (f_7_1) = ((((FLD (f_imm3_S)) - (1))) & (1));
1437 FLD (f_2_2) = ((((UINT) (((FLD (f_imm3_S)) - (1))) >> (1))) & (3));
1438 }
1439 errmsg = insert_normal (cd, fields->f_2_2, 0, 0, 2, 2, 32, total_length, buffer);
1440 if (errmsg)
1441 break;
1442 errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer);
1443 if (errmsg)
1444 break;
1445 }
1446 break;
1447 case M32C_OPERAND_LAB_16_8 :
1448 {
1449 long value = fields->f_lab_16_8;
1450 value = ((value) - (((pc) + (2))));
1451 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 16, 8, 32, total_length, buffer);
1452 }
1453 break;
1454 case M32C_OPERAND_LAB_24_8 :
1455 {
1456 long value = fields->f_lab_24_8;
1457 value = ((value) - (((pc) + (2))));
1458 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 24, 8, 32, total_length, buffer);
1459 }
1460 break;
1461 case M32C_OPERAND_LAB_32_8 :
1462 {
1463 long value = fields->f_lab_32_8;
1464 value = ((value) - (((pc) + (2))));
1465 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 0, 8, 32, total_length, buffer);
1466 }
1467 break;
1468 case M32C_OPERAND_LAB_40_8 :
1469 {
1470 long value = fields->f_lab_40_8;
1471 value = ((value) - (((pc) + (2))));
1472 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 8, 8, 32, total_length, buffer);
1473 }
1474 break;
1475 case M32C_OPERAND_LAB_5_3 :
1476 {
1477 long value = fields->f_lab_5_3;
1478 value = ((value) - (((pc) + (2))));
1479 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_PCREL_ADDR), 0, 5, 3, 32, total_length, buffer);
1480 }
1481 break;
1482 case M32C_OPERAND_LAB_8_16 :
1483 {
1484 long value = fields->f_lab_8_16;
1485 value = ((((((((value) - (((pc) + (1))))) & (255))) << (8))) | (((USI) (((((value) - (((pc) + (1))))) & (65535))) >> (8))));
1486 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGN_OPT)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 16, 32, total_length, buffer);
1487 }
1488 break;
1489 case M32C_OPERAND_LAB_8_24 :
1490 {
1491 long value = fields->f_lab_8_24;
1492 value = ((((((USI) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
1493 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 8, 24, 32, total_length, buffer);
1494 }
1495 break;
1496 case M32C_OPERAND_LAB_8_8 :
1497 {
1498 long value = fields->f_lab_8_8;
1499 value = ((value) - (((pc) + (1))));
1500 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 32, total_length, buffer);
1501 }
1502 break;
1503 case M32C_OPERAND_LAB32_JMP_S :
1504 {
1505 {
1506 SI tmp_val;
1507 tmp_val = ((((FLD (f_lab32_jmp_s)) - (pc))) - (2));
1508 FLD (f_7_1) = ((tmp_val) & (1));
1509 FLD (f_2_2) = ((USI) (tmp_val) >> (1));
1510 }
1511 errmsg = insert_normal (cd, fields->f_2_2, 0, 0, 2, 2, 32, total_length, buffer);
1512 if (errmsg)
1513 break;
1514 errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer);
1515 if (errmsg)
1516 break;
1517 }
1518 break;
1519 case M32C_OPERAND_Q :
1520 break;
1521 case M32C_OPERAND_R0 :
1522 break;
1523 case M32C_OPERAND_R0H :
1524 break;
1525 case M32C_OPERAND_R0L :
1526 break;
1527 case M32C_OPERAND_R1 :
1528 break;
1529 case M32C_OPERAND_R1R2R0 :
1530 break;
1531 case M32C_OPERAND_R2 :
1532 break;
1533 case M32C_OPERAND_R2R0 :
1534 break;
1535 case M32C_OPERAND_R3 :
1536 break;
1537 case M32C_OPERAND_R3R1 :
1538 break;
1539 case M32C_OPERAND_REGSETPOP :
1540 errmsg = insert_normal (cd, fields->f_8_8, 0, 0, 8, 8, 32, total_length, buffer);
1541 break;
1542 case M32C_OPERAND_REGSETPUSH :
1543 errmsg = insert_normal (cd, fields->f_8_8, 0, 0, 8, 8, 32, total_length, buffer);
1544 break;
1545 case M32C_OPERAND_RN16_PUSH_S :
1546 errmsg = insert_normal (cd, fields->f_4_1, 0, 0, 4, 1, 32, total_length, buffer);
1547 break;
1548 case M32C_OPERAND_S :
1549 break;
1550 case M32C_OPERAND_SRC16AN :
1551 errmsg = insert_normal (cd, fields->f_src16_an, 0, 0, 11, 1, 32, total_length, buffer);
1552 break;
1553 case M32C_OPERAND_SRC16ANHI :
1554 errmsg = insert_normal (cd, fields->f_src16_an, 0, 0, 11, 1, 32, total_length, buffer);
1555 break;
1556 case M32C_OPERAND_SRC16ANQI :
1557 errmsg = insert_normal (cd, fields->f_src16_an, 0, 0, 11, 1, 32, total_length, buffer);
1558 break;
1559 case M32C_OPERAND_SRC16RNHI :
1560 errmsg = insert_normal (cd, fields->f_src16_rn, 0, 0, 10, 2, 32, total_length, buffer);
1561 break;
1562 case M32C_OPERAND_SRC16RNQI :
1563 errmsg = insert_normal (cd, fields->f_src16_rn, 0, 0, 10, 2, 32, total_length, buffer);
1564 break;
1565 case M32C_OPERAND_SRC32ANPREFIXED :
1566 errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer);
1567 break;
1568 case M32C_OPERAND_SRC32ANPREFIXEDHI :
1569 errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer);
1570 break;
1571 case M32C_OPERAND_SRC32ANPREFIXEDQI :
1572 errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer);
1573 break;
1574 case M32C_OPERAND_SRC32ANPREFIXEDSI :
1575 errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer);
1576 break;
1577 case M32C_OPERAND_SRC32ANUNPREFIXED :
1578 errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer);
1579 break;
1580 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
1581 errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer);
1582 break;
1583 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
1584 errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer);
1585 break;
1586 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
1587 errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer);
1588 break;
1589 case M32C_OPERAND_SRC32RNPREFIXEDHI :
1590 {
1591 long value = fields->f_src32_rn_prefixed_HI;
1592 value = ((((value) + (2))) % (4));
1593 errmsg = insert_normal (cd, value, 0, 0, 18, 2, 32, total_length, buffer);
1594 }
1595 break;
1596 case M32C_OPERAND_SRC32RNPREFIXEDQI :
1597 {
1598 long value = fields->f_src32_rn_prefixed_QI;
1599 value = (((((((~ (value))) << (1))) & (2))) | (((((USI) (value) >> (1))) & (1))));
1600 errmsg = insert_normal (cd, value, 0, 0, 18, 2, 32, total_length, buffer);
1601 }
1602 break;
1603 case M32C_OPERAND_SRC32RNPREFIXEDSI :
1604 {
1605 long value = fields->f_src32_rn_prefixed_SI;
1606 value = ((value) + (2));
1607 errmsg = insert_normal (cd, value, 0, 0, 18, 2, 32, total_length, buffer);
1608 }
1609 break;
1610 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
1611 {
1612 long value = fields->f_src32_rn_unprefixed_HI;
1613 value = ((((value) + (2))) % (4));
1614 errmsg = insert_normal (cd, value, 0, 0, 10, 2, 32, total_length, buffer);
1615 }
1616 break;
1617 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
1618 {
1619 long value = fields->f_src32_rn_unprefixed_QI;
1620 value = (((((((~ (value))) << (1))) & (2))) | (((((USI) (value) >> (1))) & (1))));
1621 errmsg = insert_normal (cd, value, 0, 0, 10, 2, 32, total_length, buffer);
1622 }
1623 break;
1624 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
1625 {
1626 long value = fields->f_src32_rn_unprefixed_SI;
1627 value = ((value) + (2));
1628 errmsg = insert_normal (cd, value, 0, 0, 10, 2, 32, total_length, buffer);
1629 }
1630 break;
1631 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
1632 errmsg = insert_normal (cd, fields->f_5_1, 0, 0, 5, 1, 32, total_length, buffer);
1633 break;
1634 case M32C_OPERAND_X :
1635 break;
1636 case M32C_OPERAND_Z :
1637 break;
1638 case M32C_OPERAND_COND16_16 :
1639 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
1640 break;
1641 case M32C_OPERAND_COND16_24 :
1642 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
1643 break;
1644 case M32C_OPERAND_COND16_32 :
1645 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
1646 break;
1647 case M32C_OPERAND_COND16C :
1648 errmsg = insert_normal (cd, fields->f_cond16, 0, 0, 12, 4, 32, total_length, buffer);
1649 break;
1650 case M32C_OPERAND_COND16J :
1651 errmsg = insert_normal (cd, fields->f_cond16, 0, 0, 12, 4, 32, total_length, buffer);
1652 break;
1653 case M32C_OPERAND_COND16J5 :
1654 errmsg = insert_normal (cd, fields->f_cond16j_5, 0, 0, 5, 3, 32, total_length, buffer);
1655 break;
1656 case M32C_OPERAND_COND32 :
1657 {
1658 {
1659 FLD (f_9_1) = ((((UINT) (FLD (f_cond32)) >> (3))) & (1));
1660 FLD (f_13_3) = ((FLD (f_cond32)) & (7));
1661 }
1662 errmsg = insert_normal (cd, fields->f_9_1, 0, 0, 9, 1, 32, total_length, buffer);
1663 if (errmsg)
1664 break;
1665 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1666 if (errmsg)
1667 break;
1668 }
1669 break;
1670 case M32C_OPERAND_COND32_16 :
1671 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
1672 break;
1673 case M32C_OPERAND_COND32_24 :
1674 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
1675 break;
1676 case M32C_OPERAND_COND32_32 :
1677 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
1678 break;
1679 case M32C_OPERAND_COND32_40 :
1680 errmsg = insert_normal (cd, fields->f_dsp_40_u8, 0, 32, 8, 8, 32, total_length, buffer);
1681 break;
1682 case M32C_OPERAND_COND32J :
1683 {
1684 {
1685 FLD (f_1_3) = ((((UINT) (FLD (f_cond32j)) >> (1))) & (7));
1686 FLD (f_7_1) = ((FLD (f_cond32j)) & (1));
1687 }
1688 errmsg = insert_normal (cd, fields->f_1_3, 0, 0, 1, 3, 32, total_length, buffer);
1689 if (errmsg)
1690 break;
1691 errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer);
1692 if (errmsg)
1693 break;
1694 }
1695 break;
1696 case M32C_OPERAND_CR1_PREFIXED_32 :
1697 errmsg = insert_normal (cd, fields->f_21_3, 0, 0, 21, 3, 32, total_length, buffer);
1698 break;
1699 case M32C_OPERAND_CR1_UNPREFIXED_32 :
1700 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1701 break;
1702 case M32C_OPERAND_CR16 :
1703 errmsg = insert_normal (cd, fields->f_9_3, 0, 0, 9, 3, 32, total_length, buffer);
1704 break;
1705 case M32C_OPERAND_CR2_32 :
1706 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1707 break;
1708 case M32C_OPERAND_CR3_PREFIXED_32 :
1709 errmsg = insert_normal (cd, fields->f_21_3, 0, 0, 21, 3, 32, total_length, buffer);
1710 break;
1711 case M32C_OPERAND_CR3_UNPREFIXED_32 :
1712 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1713 break;
1714 case M32C_OPERAND_FLAGS16 :
1715 errmsg = insert_normal (cd, fields->f_9_3, 0, 0, 9, 3, 32, total_length, buffer);
1716 break;
1717 case M32C_OPERAND_FLAGS32 :
1718 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1719 break;
1720 case M32C_OPERAND_SCCOND32 :
1721 errmsg = insert_normal (cd, fields->f_cond16, 0, 0, 12, 4, 32, total_length, buffer);
1722 break;
1723 case M32C_OPERAND_SIZE :
1724 break;
1725
1726 default :
1727 /* xgettext:c-format */
1728 fprintf (stderr, _("Unrecognized field %d while building insn.\n"),
1729 opindex);
1730 abort ();
1731 }
1732
1733 return errmsg;
1734 }
1735
1736 int m32c_cgen_extract_operand
1737 (CGEN_CPU_DESC, int, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
1738
1739 /* Main entry point for operand extraction.
1740 The result is <= 0 for error, >0 for success.
1741 ??? Actual values aren't well defined right now.
1742
1743 This function is basically just a big switch statement. Earlier versions
1744 used tables to look up the function to use, but
1745 - if the table contains both assembler and disassembler functions then
1746 the disassembler contains much of the assembler and vice-versa,
1747 - there's a lot of inlining possibilities as things grow,
1748 - using a switch statement avoids the function call overhead.
1749
1750 This function could be moved into `print_insn_normal', but keeping it
1751 separate makes clear the interface between `print_insn_normal' and each of
1752 the handlers. */
1753
1754 int
1755 m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
1756 int opindex,
1757 CGEN_EXTRACT_INFO *ex_info,
1758 CGEN_INSN_INT insn_value,
1759 CGEN_FIELDS * fields,
1760 bfd_vma pc)
1761 {
1762 /* Assume success (for those operands that are nops). */
1763 int length = 1;
1764 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
1765
1766 switch (opindex)
1767 {
1768 case M32C_OPERAND_A0 :
1769 break;
1770 case M32C_OPERAND_A1 :
1771 break;
1772 case M32C_OPERAND_AN16_PUSH_S :
1773 length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 1, 32, total_length, pc, & fields->f_4_1);
1774 break;
1775 case M32C_OPERAND_BIT16AN :
1776 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
1777 break;
1778 case M32C_OPERAND_BIT16RN :
1779 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn);
1780 break;
1781 case M32C_OPERAND_BIT3_S :
1782 {
1783 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 2, 32, total_length, pc, & fields->f_2_2);
1784 if (length <= 0) break;
1785 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1);
1786 if (length <= 0) break;
1787 {
1788 FLD (f_imm3_S) = ((((((FLD (f_2_2)) << (1))) | (FLD (f_7_1)))) + (1));
1789 }
1790 }
1791 break;
1792 case M32C_OPERAND_BIT32ANPREFIXED :
1793 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
1794 break;
1795 case M32C_OPERAND_BIT32ANUNPREFIXED :
1796 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
1797 break;
1798 case M32C_OPERAND_BIT32RNPREFIXED :
1799 {
1800 long value;
1801 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value);
1802 value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
1803 fields->f_dst32_rn_prefixed_QI = value;
1804 }
1805 break;
1806 case M32C_OPERAND_BIT32RNUNPREFIXED :
1807 {
1808 long value;
1809 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value);
1810 value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
1811 fields->f_dst32_rn_unprefixed_QI = value;
1812 }
1813 break;
1814 case M32C_OPERAND_BITBASE16_16_S8 :
1815 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8);
1816 break;
1817 case M32C_OPERAND_BITBASE16_16_U16 :
1818 {
1819 long value;
1820 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
1821 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1822 fields->f_dsp_16_u16 = value;
1823 }
1824 break;
1825 case M32C_OPERAND_BITBASE16_16_U8 :
1826 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
1827 break;
1828 case M32C_OPERAND_BITBASE16_8_U11_S :
1829 {
1830 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 3, 32, total_length, pc, & fields->f_bitno16_S);
1831 if (length <= 0) break;
1832 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_u8);
1833 if (length <= 0) break;
1834 {
1835 FLD (f_bitbase16_u11_S) = ((((FLD (f_dsp_8_u8)) << (3))) | (FLD (f_bitno16_S)));
1836 }
1837 }
1838 break;
1839 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
1840 {
1841 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1842 if (length <= 0) break;
1843 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8);
1844 if (length <= 0) break;
1845 {
1846 FLD (f_bitbase32_16_s11_unprefixed) = ((((FLD (f_dsp_16_s8)) << (3))) | (FLD (f_bitno32_unprefixed)));
1847 }
1848 }
1849 break;
1850 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
1851 {
1852 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1853 if (length <= 0) break;
1854 {
1855 long value;
1856 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value);
1857 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1858 fields->f_dsp_16_s16 = value;
1859 }
1860 if (length <= 0) break;
1861 {
1862 FLD (f_bitbase32_16_s19_unprefixed) = ((((FLD (f_dsp_16_s16)) << (3))) | (FLD (f_bitno32_unprefixed)));
1863 }
1864 }
1865 break;
1866 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
1867 {
1868 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1869 if (length <= 0) break;
1870 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
1871 if (length <= 0) break;
1872 {
1873 FLD (f_bitbase32_16_u11_unprefixed) = ((((FLD (f_dsp_16_u8)) << (3))) | (FLD (f_bitno32_unprefixed)));
1874 }
1875 }
1876 break;
1877 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
1878 {
1879 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1880 if (length <= 0) break;
1881 {
1882 long value;
1883 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
1884 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1885 fields->f_dsp_16_u16 = value;
1886 }
1887 if (length <= 0) break;
1888 {
1889 FLD (f_bitbase32_16_u19_unprefixed) = ((((FLD (f_dsp_16_u16)) << (3))) | (FLD (f_bitno32_unprefixed)));
1890 }
1891 }
1892 break;
1893 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
1894 {
1895 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1896 if (length <= 0) break;
1897 {
1898 long value;
1899 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
1900 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1901 fields->f_dsp_16_u16 = value;
1902 }
1903 if (length <= 0) break;
1904 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
1905 if (length <= 0) break;
1906 {
1907 FLD (f_bitbase32_16_u27_unprefixed) = ((((FLD (f_dsp_16_u16)) << (3))) | (((((FLD (f_dsp_32_u8)) << (19))) | (FLD (f_bitno32_unprefixed)))));
1908 }
1909 }
1910 break;
1911 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
1912 {
1913 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1914 if (length <= 0) break;
1915 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_s8);
1916 if (length <= 0) break;
1917 {
1918 FLD (f_bitbase32_24_s11_prefixed) = ((((FLD (f_dsp_24_s8)) << (3))) | (FLD (f_bitno32_prefixed)));
1919 }
1920 }
1921 break;
1922 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
1923 {
1924 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1925 if (length <= 0) break;
1926 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
1927 if (length <= 0) break;
1928 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_s8);
1929 if (length <= 0) break;
1930 {
1931 FLD (f_bitbase32_24_s19_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (((((FLD (f_dsp_32_s8)) << (11))) | (FLD (f_bitno32_prefixed)))));
1932 }
1933 }
1934 break;
1935 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
1936 {
1937 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1938 if (length <= 0) break;
1939 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
1940 if (length <= 0) break;
1941 {
1942 FLD (f_bitbase32_24_u11_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (FLD (f_bitno32_prefixed)));
1943 }
1944 }
1945 break;
1946 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
1947 {
1948 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1949 if (length <= 0) break;
1950 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
1951 if (length <= 0) break;
1952 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
1953 if (length <= 0) break;
1954 {
1955 FLD (f_bitbase32_24_u19_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (((((FLD (f_dsp_32_u8)) << (11))) | (FLD (f_bitno32_prefixed)))));
1956 }
1957 }
1958 break;
1959 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
1960 {
1961 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1962 if (length <= 0) break;
1963 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
1964 if (length <= 0) break;
1965 {
1966 long value;
1967 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
1968 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1969 fields->f_dsp_32_u16 = value;
1970 }
1971 if (length <= 0) break;
1972 {
1973 FLD (f_bitbase32_24_u27_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (((((FLD (f_dsp_32_u16)) << (11))) | (FLD (f_bitno32_prefixed)))));
1974 }
1975 }
1976 break;
1977 case M32C_OPERAND_BITNO16R :
1978 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
1979 break;
1980 case M32C_OPERAND_BITNO32PREFIXED :
1981 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1982 break;
1983 case M32C_OPERAND_BITNO32UNPREFIXED :
1984 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1985 break;
1986 case M32C_OPERAND_DSP_10_U6 :
1987 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 6, 32, total_length, pc, & fields->f_dsp_10_u6);
1988 break;
1989 case M32C_OPERAND_DSP_16_S16 :
1990 {
1991 long value;
1992 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value);
1993 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1994 fields->f_dsp_16_s16 = value;
1995 }
1996 break;
1997 case M32C_OPERAND_DSP_16_S8 :
1998 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8);
1999 break;
2000 case M32C_OPERAND_DSP_16_U16 :
2001 {
2002 long value;
2003 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
2004 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2005 fields->f_dsp_16_u16 = value;
2006 }
2007 break;
2008 case M32C_OPERAND_DSP_16_U20 :
2009 {
2010 {
2011 long value;
2012 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
2013 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2014 fields->f_dsp_16_u16 = value;
2015 }
2016 if (length <= 0) break;
2017 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2018 if (length <= 0) break;
2019 {
2020 FLD (f_dsp_16_u24) = ((((FLD (f_dsp_32_u8)) << (16))) | (FLD (f_dsp_16_u16)));
2021 }
2022 }
2023 break;
2024 case M32C_OPERAND_DSP_16_U24 :
2025 {
2026 {
2027 long value;
2028 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
2029 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2030 fields->f_dsp_16_u16 = value;
2031 }
2032 if (length <= 0) break;
2033 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2034 if (length <= 0) break;
2035 {
2036 FLD (f_dsp_16_u24) = ((((FLD (f_dsp_32_u8)) << (16))) | (FLD (f_dsp_16_u16)));
2037 }
2038 }
2039 break;
2040 case M32C_OPERAND_DSP_16_U8 :
2041 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
2042 break;
2043 case M32C_OPERAND_DSP_24_S16 :
2044 {
2045 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2046 if (length <= 0) break;
2047 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2048 if (length <= 0) break;
2049 {
2050 FLD (f_dsp_24_s16) = EXTHISI (((HI) (UINT) (((((FLD (f_dsp_32_u8)) << (8))) | (FLD (f_dsp_24_u8))))));
2051 }
2052 }
2053 break;
2054 case M32C_OPERAND_DSP_24_S8 :
2055 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_s8);
2056 break;
2057 case M32C_OPERAND_DSP_24_U16 :
2058 {
2059 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2060 if (length <= 0) break;
2061 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2062 if (length <= 0) break;
2063 {
2064 FLD (f_dsp_24_u16) = ((((FLD (f_dsp_32_u8)) << (8))) | (FLD (f_dsp_24_u8)));
2065 }
2066 }
2067 break;
2068 case M32C_OPERAND_DSP_24_U20 :
2069 {
2070 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2071 if (length <= 0) break;
2072 {
2073 long value;
2074 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
2075 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2076 fields->f_dsp_32_u16 = value;
2077 }
2078 if (length <= 0) break;
2079 {
2080 FLD (f_dsp_24_u24) = ((((FLD (f_dsp_32_u16)) << (8))) | (FLD (f_dsp_24_u8)));
2081 }
2082 }
2083 break;
2084 case M32C_OPERAND_DSP_24_U24 :
2085 {
2086 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2087 if (length <= 0) break;
2088 {
2089 long value;
2090 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
2091 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2092 fields->f_dsp_32_u16 = value;
2093 }
2094 if (length <= 0) break;
2095 {
2096 FLD (f_dsp_24_u24) = ((((FLD (f_dsp_32_u16)) << (8))) | (FLD (f_dsp_24_u8)));
2097 }
2098 }
2099 break;
2100 case M32C_OPERAND_DSP_24_U8 :
2101 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2102 break;
2103 case M32C_OPERAND_DSP_32_S16 :
2104 {
2105 long value;
2106 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, pc, & value);
2107 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2108 fields->f_dsp_32_s16 = value;
2109 }
2110 break;
2111 case M32C_OPERAND_DSP_32_S8 :
2112 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_s8);
2113 break;
2114 case M32C_OPERAND_DSP_32_U16 :
2115 {
2116 long value;
2117 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
2118 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2119 fields->f_dsp_32_u16 = value;
2120 }
2121 break;
2122 case M32C_OPERAND_DSP_32_U20 :
2123 {
2124 long value;
2125 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value);
2126 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2127 fields->f_dsp_32_u24 = value;
2128 }
2129 break;
2130 case M32C_OPERAND_DSP_32_U24 :
2131 {
2132 long value;
2133 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value);
2134 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2135 fields->f_dsp_32_u24 = value;
2136 }
2137 break;
2138 case M32C_OPERAND_DSP_32_U8 :
2139 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2140 break;
2141 case M32C_OPERAND_DSP_40_S16 :
2142 {
2143 long value;
2144 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, pc, & value);
2145 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2146 fields->f_dsp_40_s16 = value;
2147 }
2148 break;
2149 case M32C_OPERAND_DSP_40_S8 :
2150 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_s8);
2151 break;
2152 case M32C_OPERAND_DSP_40_U16 :
2153 {
2154 long value;
2155 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 16, 32, total_length, pc, & value);
2156 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2157 fields->f_dsp_40_u16 = value;
2158 }
2159 break;
2160 case M32C_OPERAND_DSP_40_U20 :
2161 {
2162 long value;
2163 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 20, 32, total_length, pc, & value);
2164 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (983040))));
2165 fields->f_dsp_40_u20 = value;
2166 }
2167 break;
2168 case M32C_OPERAND_DSP_40_U24 :
2169 {
2170 long value;
2171 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 24, 32, total_length, pc, & value);
2172 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2173 fields->f_dsp_40_u24 = value;
2174 }
2175 break;
2176 case M32C_OPERAND_DSP_40_U8 :
2177 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_u8);
2178 break;
2179 case M32C_OPERAND_DSP_48_S16 :
2180 {
2181 long value;
2182 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, pc, & value);
2183 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2184 fields->f_dsp_48_s16 = value;
2185 }
2186 break;
2187 case M32C_OPERAND_DSP_48_S8 :
2188 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, pc, & fields->f_dsp_48_s8);
2189 break;
2190 case M32C_OPERAND_DSP_48_U16 :
2191 {
2192 long value;
2193 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value);
2194 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2195 fields->f_dsp_48_u16 = value;
2196 }
2197 break;
2198 case M32C_OPERAND_DSP_48_U20 :
2199 {
2200 {
2201 long value;
2202 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value);
2203 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2204 fields->f_dsp_48_u16 = value;
2205 }
2206 if (length <= 0) break;
2207 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8);
2208 if (length <= 0) break;
2209 {
2210 FLD (f_dsp_48_u20) = ((((FLD (f_dsp_48_u16)) & (65535))) | (((((FLD (f_dsp_64_u8)) << (16))) & (983040))));
2211 }
2212 }
2213 break;
2214 case M32C_OPERAND_DSP_48_U24 :
2215 {
2216 {
2217 long value;
2218 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value);
2219 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2220 fields->f_dsp_48_u16 = value;
2221 }
2222 if (length <= 0) break;
2223 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8);
2224 if (length <= 0) break;
2225 {
2226 FLD (f_dsp_48_u24) = ((((FLD (f_dsp_48_u16)) & (65535))) | (((((FLD (f_dsp_64_u8)) << (16))) & (16711680))));
2227 }
2228 }
2229 break;
2230 case M32C_OPERAND_DSP_48_U8 :
2231 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 8, 32, total_length, pc, & fields->f_dsp_48_u8);
2232 break;
2233 case M32C_OPERAND_DSP_8_S24 :
2234 {
2235 long value;
2236 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 24, 32, total_length, pc, & value);
2237 value = ((((((USI) (value) >> (16))) | (((value) & (65280))))) | (((EXTQISI (TRUNCSIQI (((value) & (255))))) << (16))));
2238 fields->f_dsp_8_s24 = value;
2239 }
2240 break;
2241 case M32C_OPERAND_DSP_8_S8 :
2242 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_s8);
2243 break;
2244 case M32C_OPERAND_DSP_8_U16 :
2245 {
2246 long value;
2247 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 16, 32, total_length, pc, & value);
2248 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2249 fields->f_dsp_8_u16 = value;
2250 }
2251 break;
2252 case M32C_OPERAND_DSP_8_U24 :
2253 {
2254 long value;
2255 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 24, 32, total_length, pc, & value);
2256 value = ((((((USI) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
2257 fields->f_dsp_8_u24 = value;
2258 }
2259 break;
2260 case M32C_OPERAND_DSP_8_U6 :
2261 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 6, 32, total_length, pc, & fields->f_dsp_8_u6);
2262 break;
2263 case M32C_OPERAND_DSP_8_U8 :
2264 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_u8);
2265 break;
2266 case M32C_OPERAND_DST16AN :
2267 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
2268 break;
2269 case M32C_OPERAND_DST16AN_S :
2270 length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 1, 32, total_length, pc, & fields->f_dst16_an_s);
2271 break;
2272 case M32C_OPERAND_DST16ANHI :
2273 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
2274 break;
2275 case M32C_OPERAND_DST16ANQI :
2276 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
2277 break;
2278 case M32C_OPERAND_DST16ANQI_S :
2279 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 1, 32, total_length, pc, & fields->f_dst16_rn_QI_s);
2280 break;
2281 case M32C_OPERAND_DST16ANSI :
2282 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
2283 break;
2284 case M32C_OPERAND_DST16RNEXTQI :
2285 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 1, 32, total_length, pc, & fields->f_dst16_rn_ext);
2286 break;
2287 case M32C_OPERAND_DST16RNHI :
2288 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn);
2289 break;
2290 case M32C_OPERAND_DST16RNQI :
2291 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn);
2292 break;
2293 case M32C_OPERAND_DST16RNQI_S :
2294 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 1, 32, total_length, pc, & fields->f_dst16_rn_QI_s);
2295 break;
2296 case M32C_OPERAND_DST16RNSI :
2297 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn);
2298 break;
2299 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
2300 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2301 break;
2302 case M32C_OPERAND_DST32ANPREFIXED :
2303 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
2304 break;
2305 case M32C_OPERAND_DST32ANPREFIXEDHI :
2306 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
2307 break;
2308 case M32C_OPERAND_DST32ANPREFIXEDQI :
2309 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
2310 break;
2311 case M32C_OPERAND_DST32ANPREFIXEDSI :
2312 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
2313 break;
2314 case M32C_OPERAND_DST32ANUNPREFIXED :
2315 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2316 break;
2317 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
2318 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2319 break;
2320 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
2321 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2322 break;
2323 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
2324 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2325 break;
2326 case M32C_OPERAND_DST32R0HI_S :
2327 break;
2328 case M32C_OPERAND_DST32R0QI_S :
2329 break;
2330 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
2331 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_rn_ext_unprefixed);
2332 break;
2333 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
2334 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_rn_ext_unprefixed);
2335 break;
2336 case M32C_OPERAND_DST32RNPREFIXEDHI :
2337 {
2338 long value;
2339 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value);
2340 value = ((((value) + (2))) % (4));
2341 fields->f_dst32_rn_prefixed_HI = value;
2342 }
2343 break;
2344 case M32C_OPERAND_DST32RNPREFIXEDQI :
2345 {
2346 long value;
2347 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value);
2348 value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
2349 fields->f_dst32_rn_prefixed_QI = value;
2350 }
2351 break;
2352 case M32C_OPERAND_DST32RNPREFIXEDSI :
2353 {
2354 long value;
2355 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value);
2356 value = ((value) - (2));
2357 fields->f_dst32_rn_prefixed_SI = value;
2358 }
2359 break;
2360 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
2361 {
2362 long value;
2363 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value);
2364 value = ((((value) + (2))) % (4));
2365 fields->f_dst32_rn_unprefixed_HI = value;
2366 }
2367 break;
2368 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
2369 {
2370 long value;
2371 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value);
2372 value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
2373 fields->f_dst32_rn_unprefixed_QI = value;
2374 }
2375 break;
2376 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
2377 {
2378 long value;
2379 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value);
2380 value = ((value) - (2));
2381 fields->f_dst32_rn_unprefixed_SI = value;
2382 }
2383 break;
2384 case M32C_OPERAND_G :
2385 break;
2386 case M32C_OPERAND_IMM_12_S4 :
2387 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, pc, & fields->f_imm_12_s4);
2388 break;
2389 case M32C_OPERAND_IMM_12_S4N :
2390 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, pc, & fields->f_imm_12_s4);
2391 break;
2392 case M32C_OPERAND_IMM_13_U3 :
2393 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_imm_13_u3);
2394 break;
2395 case M32C_OPERAND_IMM_16_HI :
2396 {
2397 long value;
2398 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value);
2399 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2400 fields->f_dsp_16_s16 = value;
2401 }
2402 break;
2403 case M32C_OPERAND_IMM_16_QI :
2404 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8);
2405 break;
2406 case M32C_OPERAND_IMM_16_SI :
2407 {
2408 {
2409 long value;
2410 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
2411 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2412 fields->f_dsp_16_u16 = value;
2413 }
2414 if (length <= 0) break;
2415 {
2416 long value;
2417 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
2418 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2419 fields->f_dsp_32_u16 = value;
2420 }
2421 if (length <= 0) break;
2422 {
2423 FLD (f_dsp_16_s32) = ((((FLD (f_dsp_16_u16)) & (65535))) | (((((FLD (f_dsp_32_u16)) << (16))) & (0xffff0000))));
2424 }
2425 }
2426 break;
2427 case M32C_OPERAND_IMM_20_S4 :
2428 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, pc, & fields->f_imm_20_s4);
2429 break;
2430 case M32C_OPERAND_IMM_24_HI :
2431 {
2432 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2433 if (length <= 0) break;
2434 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2435 if (length <= 0) break;
2436 {
2437 FLD (f_dsp_24_s16) = EXTHISI (((HI) (UINT) (((((FLD (f_dsp_32_u8)) << (8))) | (FLD (f_dsp_24_u8))))));
2438 }
2439 }
2440 break;
2441 case M32C_OPERAND_IMM_24_QI :
2442 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_s8);
2443 break;
2444 case M32C_OPERAND_IMM_24_SI :
2445 {
2446 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2447 if (length <= 0) break;
2448 {
2449 long value;
2450 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value);
2451 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2452 fields->f_dsp_32_u24 = value;
2453 }
2454 if (length <= 0) break;
2455 {
2456 FLD (f_dsp_24_s32) = ((((FLD (f_dsp_24_u8)) & (255))) | (((((FLD (f_dsp_32_u24)) << (8))) & (0xffffff00))));
2457 }
2458 }
2459 break;
2460 case M32C_OPERAND_IMM_32_HI :
2461 {
2462 long value;
2463 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, pc, & value);
2464 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2465 fields->f_dsp_32_s16 = value;
2466 }
2467 break;
2468 case M32C_OPERAND_IMM_32_QI :
2469 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_s8);
2470 break;
2471 case M32C_OPERAND_IMM_32_SI :
2472 {
2473 long value;
2474 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 32, 32, total_length, pc, & value);
2475 value = EXTSISI (((((((((UINT) (value) >> (24))) & (255))) | (((((UINT) (value) >> (8))) & (65280))))) | (((((((value) << (8))) & (16711680))) | (((((value) << (24))) & (0xff000000)))))));
2476 fields->f_dsp_32_s32 = value;
2477 }
2478 break;
2479 case M32C_OPERAND_IMM_40_HI :
2480 {
2481 long value;
2482 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, pc, & value);
2483 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2484 fields->f_dsp_40_s16 = value;
2485 }
2486 break;
2487 case M32C_OPERAND_IMM_40_QI :
2488 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_s8);
2489 break;
2490 case M32C_OPERAND_IMM_40_SI :
2491 {
2492 {
2493 long value;
2494 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 24, 32, total_length, pc, & value);
2495 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2496 fields->f_dsp_40_u24 = value;
2497 }
2498 if (length <= 0) break;
2499 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8);
2500 if (length <= 0) break;
2501 {
2502 FLD (f_dsp_40_s32) = ((((FLD (f_dsp_40_u24)) & (16777215))) | (((((FLD (f_dsp_64_u8)) << (24))) & (0xff000000))));
2503 }
2504 }
2505 break;
2506 case M32C_OPERAND_IMM_48_HI :
2507 {
2508 long value;
2509 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, pc, & value);
2510 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2511 fields->f_dsp_48_s16 = value;
2512 }
2513 break;
2514 case M32C_OPERAND_IMM_48_QI :
2515 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, pc, & fields->f_dsp_48_s8);
2516 break;
2517 case M32C_OPERAND_IMM_48_SI :
2518 {
2519 {
2520 long value;
2521 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value);
2522 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2523 fields->f_dsp_48_u16 = value;
2524 }
2525 if (length <= 0) break;
2526 {
2527 long value;
2528 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 16, 32, total_length, pc, & value);
2529 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2530 fields->f_dsp_64_u16 = value;
2531 }
2532 if (length <= 0) break;
2533 {
2534 FLD (f_dsp_48_s32) = ((((FLD (f_dsp_48_u16)) & (65535))) | (((((FLD (f_dsp_64_u16)) << (16))) & (0xffff0000))));
2535 }
2536 }
2537 break;
2538 case M32C_OPERAND_IMM_56_HI :
2539 {
2540 length = extract_normal (cd, ex_info, insn_value, 0, 32, 24, 8, 32, total_length, pc, & fields->f_dsp_56_u8);
2541 if (length <= 0) break;
2542 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8);
2543 if (length <= 0) break;
2544 {
2545 FLD (f_dsp_56_s16) = EXTHISI (((HI) (UINT) (((((FLD (f_dsp_64_u8)) << (8))) | (FLD (f_dsp_56_u8))))));
2546 }
2547 }
2548 break;
2549 case M32C_OPERAND_IMM_56_QI :
2550 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 24, 8, 32, total_length, pc, & fields->f_dsp_56_s8);
2551 break;
2552 case M32C_OPERAND_IMM_64_HI :
2553 {
2554 long value;
2555 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 64, 0, 16, 32, total_length, pc, & value);
2556 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2557 fields->f_dsp_64_s16 = value;
2558 }
2559 break;
2560 case M32C_OPERAND_IMM_8_HI :
2561 {
2562 long value;
2563 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 16, 32, total_length, pc, & value);
2564 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2565 fields->f_dsp_8_s16 = value;
2566 }
2567 break;
2568 case M32C_OPERAND_IMM_8_QI :
2569 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_s8);
2570 break;
2571 case M32C_OPERAND_IMM_8_S4 :
2572 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, pc, & fields->f_imm_8_s4);
2573 break;
2574 case M32C_OPERAND_IMM_8_S4N :
2575 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, pc, & fields->f_imm_8_s4);
2576 break;
2577 case M32C_OPERAND_IMM_SH_12_S4 :
2578 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, pc, & fields->f_imm_12_s4);
2579 break;
2580 case M32C_OPERAND_IMM_SH_20_S4 :
2581 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, pc, & fields->f_imm_20_s4);
2582 break;
2583 case M32C_OPERAND_IMM_SH_8_S4 :
2584 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, pc, & fields->f_imm_8_s4);
2585 break;
2586 case M32C_OPERAND_IMM1_S :
2587 {
2588 long value;
2589 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 1, 32, total_length, pc, & value);
2590 value = ((value) + (1));
2591 fields->f_imm1_S = value;
2592 }
2593 break;
2594 case M32C_OPERAND_IMM3_S :
2595 {
2596 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 2, 32, total_length, pc, & fields->f_2_2);
2597 if (length <= 0) break;
2598 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1);
2599 if (length <= 0) break;
2600 {
2601 FLD (f_imm3_S) = ((((((FLD (f_2_2)) << (1))) | (FLD (f_7_1)))) + (1));
2602 }
2603 }
2604 break;
2605 case M32C_OPERAND_LAB_16_8 :
2606 {
2607 long value;
2608 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 16, 8, 32, total_length, pc, & value);
2609 value = ((value) + (((pc) + (2))));
2610 fields->f_lab_16_8 = value;
2611 }
2612 break;
2613 case M32C_OPERAND_LAB_24_8 :
2614 {
2615 long value;
2616 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 24, 8, 32, total_length, pc, & value);
2617 value = ((value) + (((pc) + (2))));
2618 fields->f_lab_24_8 = value;
2619 }
2620 break;
2621 case M32C_OPERAND_LAB_32_8 :
2622 {
2623 long value;
2624 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 0, 8, 32, total_length, pc, & value);
2625 value = ((value) + (((pc) + (2))));
2626 fields->f_lab_32_8 = value;
2627 }
2628 break;
2629 case M32C_OPERAND_LAB_40_8 :
2630 {
2631 long value;
2632 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 8, 8, 32, total_length, pc, & value);
2633 value = ((value) + (((pc) + (2))));
2634 fields->f_lab_40_8 = value;
2635 }
2636 break;
2637 case M32C_OPERAND_LAB_5_3 :
2638 {
2639 long value;
2640 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_PCREL_ADDR), 0, 5, 3, 32, total_length, pc, & value);
2641 value = ((value) + (((pc) + (2))));
2642 fields->f_lab_5_3 = value;
2643 }
2644 break;
2645 case M32C_OPERAND_LAB_8_16 :
2646 {
2647 long value;
2648 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGN_OPT)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 16, 32, total_length, pc, & value);
2649 value = ((((((USI) (((value) & (65535))) >> (8))) | (((SI) (((((value) & (255))) << (24))) >> (16))))) + (((pc) + (1))));
2650 fields->f_lab_8_16 = value;
2651 }
2652 break;
2653 case M32C_OPERAND_LAB_8_24 :
2654 {
2655 long value;
2656 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 8, 24, 32, total_length, pc, & value);
2657 value = ((((((USI) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
2658 fields->f_lab_8_24 = value;
2659 }
2660 break;
2661 case M32C_OPERAND_LAB_8_8 :
2662 {
2663 long value;
2664 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 32, total_length, pc, & value);
2665 value = ((value) + (((pc) + (1))));
2666 fields->f_lab_8_8 = value;
2667 }
2668 break;
2669 case M32C_OPERAND_LAB32_JMP_S :
2670 {
2671 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 2, 32, total_length, pc, & fields->f_2_2);
2672 if (length <= 0) break;
2673 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1);
2674 if (length <= 0) break;
2675 {
2676 FLD (f_lab32_jmp_s) = ((pc) + (((((((FLD (f_2_2)) << (1))) | (FLD (f_7_1)))) + (2))));
2677 }
2678 }
2679 break;
2680 case M32C_OPERAND_Q :
2681 break;
2682 case M32C_OPERAND_R0 :
2683 break;
2684 case M32C_OPERAND_R0H :
2685 break;
2686 case M32C_OPERAND_R0L :
2687 break;
2688 case M32C_OPERAND_R1 :
2689 break;
2690 case M32C_OPERAND_R1R2R0 :
2691 break;
2692 case M32C_OPERAND_R2 :
2693 break;
2694 case M32C_OPERAND_R2R0 :
2695 break;
2696 case M32C_OPERAND_R3 :
2697 break;
2698 case M32C_OPERAND_R3R1 :
2699 break;
2700 case M32C_OPERAND_REGSETPOP :
2701 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_8_8);
2702 break;
2703 case M32C_OPERAND_REGSETPUSH :
2704 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_8_8);
2705 break;
2706 case M32C_OPERAND_RN16_PUSH_S :
2707 length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 1, 32, total_length, pc, & fields->f_4_1);
2708 break;
2709 case M32C_OPERAND_S :
2710 break;
2711 case M32C_OPERAND_SRC16AN :
2712 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src16_an);
2713 break;
2714 case M32C_OPERAND_SRC16ANHI :
2715 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src16_an);
2716 break;
2717 case M32C_OPERAND_SRC16ANQI :
2718 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src16_an);
2719 break;
2720 case M32C_OPERAND_SRC16RNHI :
2721 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & fields->f_src16_rn);
2722 break;
2723 case M32C_OPERAND_SRC16RNQI :
2724 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & fields->f_src16_rn);
2725 break;
2726 case M32C_OPERAND_SRC32ANPREFIXED :
2727 length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed);
2728 break;
2729 case M32C_OPERAND_SRC32ANPREFIXEDHI :
2730 length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed);
2731 break;
2732 case M32C_OPERAND_SRC32ANPREFIXEDQI :
2733 length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed);
2734 break;
2735 case M32C_OPERAND_SRC32ANPREFIXEDSI :
2736 length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed);
2737 break;
2738 case M32C_OPERAND_SRC32ANUNPREFIXED :
2739 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed);
2740 break;
2741 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
2742 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed);
2743 break;
2744 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
2745 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed);
2746 break;
2747 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
2748 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed);
2749 break;
2750 case M32C_OPERAND_SRC32RNPREFIXEDHI :
2751 {
2752 long value;
2753 length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value);
2754 value = ((((value) + (2))) % (4));
2755 fields->f_src32_rn_prefixed_HI = value;
2756 }
2757 break;
2758 case M32C_OPERAND_SRC32RNPREFIXEDQI :
2759 {
2760 long value;
2761 length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value);
2762 value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
2763 fields->f_src32_rn_prefixed_QI = value;
2764 }
2765 break;
2766 case M32C_OPERAND_SRC32RNPREFIXEDSI :
2767 {
2768 long value;
2769 length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value);
2770 value = ((value) - (2));
2771 fields->f_src32_rn_prefixed_SI = value;
2772 }
2773 break;
2774 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
2775 {
2776 long value;
2777 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value);
2778 value = ((((value) + (2))) % (4));
2779 fields->f_src32_rn_unprefixed_HI = value;
2780 }
2781 break;
2782 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
2783 {
2784 long value;
2785 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value);
2786 value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
2787 fields->f_src32_rn_unprefixed_QI = value;
2788 }
2789 break;
2790 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
2791 {
2792 long value;
2793 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value);
2794 value = ((value) - (2));
2795 fields->f_src32_rn_unprefixed_SI = value;
2796 }
2797 break;
2798 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
2799 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 1, 32, total_length, pc, & fields->f_5_1);
2800 break;
2801 case M32C_OPERAND_X :
2802 break;
2803 case M32C_OPERAND_Z :
2804 break;
2805 case M32C_OPERAND_COND16_16 :
2806 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
2807 break;
2808 case M32C_OPERAND_COND16_24 :
2809 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2810 break;
2811 case M32C_OPERAND_COND16_32 :
2812 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2813 break;
2814 case M32C_OPERAND_COND16C :
2815 length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 32, total_length, pc, & fields->f_cond16);
2816 break;
2817 case M32C_OPERAND_COND16J :
2818 length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 32, total_length, pc, & fields->f_cond16);
2819 break;
2820 case M32C_OPERAND_COND16J5 :
2821 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 3, 32, total_length, pc, & fields->f_cond16j_5);
2822 break;
2823 case M32C_OPERAND_COND32 :
2824 {
2825 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_9_1);
2826 if (length <= 0) break;
2827 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2828 if (length <= 0) break;
2829 {
2830 FLD (f_cond32) = ((((FLD (f_9_1)) << (3))) | (FLD (f_13_3)));
2831 }
2832 }
2833 break;
2834 case M32C_OPERAND_COND32_16 :
2835 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
2836 break;
2837 case M32C_OPERAND_COND32_24 :
2838 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2839 break;
2840 case M32C_OPERAND_COND32_32 :
2841 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2842 break;
2843 case M32C_OPERAND_COND32_40 :
2844 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_u8);
2845 break;
2846 case M32C_OPERAND_COND32J :
2847 {
2848 length = extract_normal (cd, ex_info, insn_value, 0, 0, 1, 3, 32, total_length, pc, & fields->f_1_3);
2849 if (length <= 0) break;
2850 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1);
2851 if (length <= 0) break;
2852 {
2853 FLD (f_cond32j) = ((((FLD (f_1_3)) << (1))) | (FLD (f_7_1)));
2854 }
2855 }
2856 break;
2857 case M32C_OPERAND_CR1_PREFIXED_32 :
2858 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_21_3);
2859 break;
2860 case M32C_OPERAND_CR1_UNPREFIXED_32 :
2861 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2862 break;
2863 case M32C_OPERAND_CR16 :
2864 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 3, 32, total_length, pc, & fields->f_9_3);
2865 break;
2866 case M32C_OPERAND_CR2_32 :
2867 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2868 break;
2869 case M32C_OPERAND_CR3_PREFIXED_32 :
2870 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_21_3);
2871 break;
2872 case M32C_OPERAND_CR3_UNPREFIXED_32 :
2873 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2874 break;
2875 case M32C_OPERAND_FLAGS16 :
2876 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 3, 32, total_length, pc, & fields->f_9_3);
2877 break;
2878 case M32C_OPERAND_FLAGS32 :
2879 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2880 break;
2881 case M32C_OPERAND_SCCOND32 :
2882 length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 32, total_length, pc, & fields->f_cond16);
2883 break;
2884 case M32C_OPERAND_SIZE :
2885 break;
2886
2887 default :
2888 /* xgettext:c-format */
2889 fprintf (stderr, _("Unrecognized field %d while decoding insn.\n"),
2890 opindex);
2891 abort ();
2892 }
2893
2894 return length;
2895 }
2896
2897 cgen_insert_fn * const m32c_cgen_insert_handlers[] =
2898 {
2899 insert_insn_normal,
2900 };
2901
2902 cgen_extract_fn * const m32c_cgen_extract_handlers[] =
2903 {
2904 extract_insn_normal,
2905 };
2906
2907 int m32c_cgen_get_int_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
2908 bfd_vma m32c_cgen_get_vma_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
2909
2910 /* Getting values from cgen_fields is handled by a collection of functions.
2911 They are distinguished by the type of the VALUE argument they return.
2912 TODO: floating point, inlining support, remove cases where result type
2913 not appropriate. */
2914
2915 int
2916 m32c_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
2917 int opindex,
2918 const CGEN_FIELDS * fields)
2919 {
2920 int value;
2921
2922 switch (opindex)
2923 {
2924 case M32C_OPERAND_A0 :
2925 value = 0;
2926 break;
2927 case M32C_OPERAND_A1 :
2928 value = 0;
2929 break;
2930 case M32C_OPERAND_AN16_PUSH_S :
2931 value = fields->f_4_1;
2932 break;
2933 case M32C_OPERAND_BIT16AN :
2934 value = fields->f_dst16_an;
2935 break;
2936 case M32C_OPERAND_BIT16RN :
2937 value = fields->f_dst16_rn;
2938 break;
2939 case M32C_OPERAND_BIT3_S :
2940 value = fields->f_imm3_S;
2941 break;
2942 case M32C_OPERAND_BIT32ANPREFIXED :
2943 value = fields->f_dst32_an_prefixed;
2944 break;
2945 case M32C_OPERAND_BIT32ANUNPREFIXED :
2946 value = fields->f_dst32_an_unprefixed;
2947 break;
2948 case M32C_OPERAND_BIT32RNPREFIXED :
2949 value = fields->f_dst32_rn_prefixed_QI;
2950 break;
2951 case M32C_OPERAND_BIT32RNUNPREFIXED :
2952 value = fields->f_dst32_rn_unprefixed_QI;
2953 break;
2954 case M32C_OPERAND_BITBASE16_16_S8 :
2955 value = fields->f_dsp_16_s8;
2956 break;
2957 case M32C_OPERAND_BITBASE16_16_U16 :
2958 value = fields->f_dsp_16_u16;
2959 break;
2960 case M32C_OPERAND_BITBASE16_16_U8 :
2961 value = fields->f_dsp_16_u8;
2962 break;
2963 case M32C_OPERAND_BITBASE16_8_U11_S :
2964 value = fields->f_bitbase16_u11_S;
2965 break;
2966 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
2967 value = fields->f_bitbase32_16_s11_unprefixed;
2968 break;
2969 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
2970 value = fields->f_bitbase32_16_s19_unprefixed;
2971 break;
2972 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
2973 value = fields->f_bitbase32_16_u11_unprefixed;
2974 break;
2975 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
2976 value = fields->f_bitbase32_16_u19_unprefixed;
2977 break;
2978 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
2979 value = fields->f_bitbase32_16_u27_unprefixed;
2980 break;
2981 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
2982 value = fields->f_bitbase32_24_s11_prefixed;
2983 break;
2984 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
2985 value = fields->f_bitbase32_24_s19_prefixed;
2986 break;
2987 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
2988 value = fields->f_bitbase32_24_u11_prefixed;
2989 break;
2990 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
2991 value = fields->f_bitbase32_24_u19_prefixed;
2992 break;
2993 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
2994 value = fields->f_bitbase32_24_u27_prefixed;
2995 break;
2996 case M32C_OPERAND_BITNO16R :
2997 value = fields->f_dsp_16_u8;
2998 break;
2999 case M32C_OPERAND_BITNO32PREFIXED :
3000 value = fields->f_bitno32_prefixed;
3001 break;
3002 case M32C_OPERAND_BITNO32UNPREFIXED :
3003 value = fields->f_bitno32_unprefixed;
3004 break;
3005 case M32C_OPERAND_DSP_10_U6 :
3006 value = fields->f_dsp_10_u6;
3007 break;
3008 case M32C_OPERAND_DSP_16_S16 :
3009 value = fields->f_dsp_16_s16;
3010 break;
3011 case M32C_OPERAND_DSP_16_S8 :
3012 value = fields->f_dsp_16_s8;
3013 break;
3014 case M32C_OPERAND_DSP_16_U16 :
3015 value = fields->f_dsp_16_u16;
3016 break;
3017 case M32C_OPERAND_DSP_16_U20 :
3018 value = fields->f_dsp_16_u24;
3019 break;
3020 case M32C_OPERAND_DSP_16_U24 :
3021 value = fields->f_dsp_16_u24;
3022 break;
3023 case M32C_OPERAND_DSP_16_U8 :
3024 value = fields->f_dsp_16_u8;
3025 break;
3026 case M32C_OPERAND_DSP_24_S16 :
3027 value = fields->f_dsp_24_s16;
3028 break;
3029 case M32C_OPERAND_DSP_24_S8 :
3030 value = fields->f_dsp_24_s8;
3031 break;
3032 case M32C_OPERAND_DSP_24_U16 :
3033 value = fields->f_dsp_24_u16;
3034 break;
3035 case M32C_OPERAND_DSP_24_U20 :
3036 value = fields->f_dsp_24_u24;
3037 break;
3038 case M32C_OPERAND_DSP_24_U24 :
3039 value = fields->f_dsp_24_u24;
3040 break;
3041 case M32C_OPERAND_DSP_24_U8 :
3042 value = fields->f_dsp_24_u8;
3043 break;
3044 case M32C_OPERAND_DSP_32_S16 :
3045 value = fields->f_dsp_32_s16;
3046 break;
3047 case M32C_OPERAND_DSP_32_S8 :
3048 value = fields->f_dsp_32_s8;
3049 break;
3050 case M32C_OPERAND_DSP_32_U16 :
3051 value = fields->f_dsp_32_u16;
3052 break;
3053 case M32C_OPERAND_DSP_32_U20 :
3054 value = fields->f_dsp_32_u24;
3055 break;
3056 case M32C_OPERAND_DSP_32_U24 :
3057 value = fields->f_dsp_32_u24;
3058 break;
3059 case M32C_OPERAND_DSP_32_U8 :
3060 value = fields->f_dsp_32_u8;
3061 break;
3062 case M32C_OPERAND_DSP_40_S16 :
3063 value = fields->f_dsp_40_s16;
3064 break;
3065 case M32C_OPERAND_DSP_40_S8 :
3066 value = fields->f_dsp_40_s8;
3067 break;
3068 case M32C_OPERAND_DSP_40_U16 :
3069 value = fields->f_dsp_40_u16;
3070 break;
3071 case M32C_OPERAND_DSP_40_U20 :
3072 value = fields->f_dsp_40_u20;
3073 break;
3074 case M32C_OPERAND_DSP_40_U24 :
3075 value = fields->f_dsp_40_u24;
3076 break;
3077 case M32C_OPERAND_DSP_40_U8 :
3078 value = fields->f_dsp_40_u8;
3079 break;
3080 case M32C_OPERAND_DSP_48_S16 :
3081 value = fields->f_dsp_48_s16;
3082 break;
3083 case M32C_OPERAND_DSP_48_S8 :
3084 value = fields->f_dsp_48_s8;
3085 break;
3086 case M32C_OPERAND_DSP_48_U16 :
3087 value = fields->f_dsp_48_u16;
3088 break;
3089 case M32C_OPERAND_DSP_48_U20 :
3090 value = fields->f_dsp_48_u20;
3091 break;
3092 case M32C_OPERAND_DSP_48_U24 :
3093 value = fields->f_dsp_48_u24;
3094 break;
3095 case M32C_OPERAND_DSP_48_U8 :
3096 value = fields->f_dsp_48_u8;
3097 break;
3098 case M32C_OPERAND_DSP_8_S24 :
3099 value = fields->f_dsp_8_s24;
3100 break;
3101 case M32C_OPERAND_DSP_8_S8 :
3102 value = fields->f_dsp_8_s8;
3103 break;
3104 case M32C_OPERAND_DSP_8_U16 :
3105 value = fields->f_dsp_8_u16;
3106 break;
3107 case M32C_OPERAND_DSP_8_U24 :
3108 value = fields->f_dsp_8_u24;
3109 break;
3110 case M32C_OPERAND_DSP_8_U6 :
3111 value = fields->f_dsp_8_u6;
3112 break;
3113 case M32C_OPERAND_DSP_8_U8 :
3114 value = fields->f_dsp_8_u8;
3115 break;
3116 case M32C_OPERAND_DST16AN :
3117 value = fields->f_dst16_an;
3118 break;
3119 case M32C_OPERAND_DST16AN_S :
3120 value = fields->f_dst16_an_s;
3121 break;
3122 case M32C_OPERAND_DST16ANHI :
3123 value = fields->f_dst16_an;
3124 break;
3125 case M32C_OPERAND_DST16ANQI :
3126 value = fields->f_dst16_an;
3127 break;
3128 case M32C_OPERAND_DST16ANQI_S :
3129 value = fields->f_dst16_rn_QI_s;
3130 break;
3131 case M32C_OPERAND_DST16ANSI :
3132 value = fields->f_dst16_an;
3133 break;
3134 case M32C_OPERAND_DST16RNEXTQI :
3135 value = fields->f_dst16_rn_ext;
3136 break;
3137 case M32C_OPERAND_DST16RNHI :
3138 value = fields->f_dst16_rn;
3139 break;
3140 case M32C_OPERAND_DST16RNQI :
3141 value = fields->f_dst16_rn;
3142 break;
3143 case M32C_OPERAND_DST16RNQI_S :
3144 value = fields->f_dst16_rn_QI_s;
3145 break;
3146 case M32C_OPERAND_DST16RNSI :
3147 value = fields->f_dst16_rn;
3148 break;
3149 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
3150 value = fields->f_dst32_an_unprefixed;
3151 break;
3152 case M32C_OPERAND_DST32ANPREFIXED :
3153 value = fields->f_dst32_an_prefixed;
3154 break;
3155 case M32C_OPERAND_DST32ANPREFIXEDHI :
3156 value = fields->f_dst32_an_prefixed;
3157 break;
3158 case M32C_OPERAND_DST32ANPREFIXEDQI :
3159 value = fields->f_dst32_an_prefixed;
3160 break;
3161 case M32C_OPERAND_DST32ANPREFIXEDSI :
3162 value = fields->f_dst32_an_prefixed;
3163 break;
3164 case M32C_OPERAND_DST32ANUNPREFIXED :
3165 value = fields->f_dst32_an_unprefixed;
3166 break;
3167 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
3168 value = fields->f_dst32_an_unprefixed;
3169 break;
3170 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
3171 value = fields->f_dst32_an_unprefixed;
3172 break;
3173 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
3174 value = fields->f_dst32_an_unprefixed;
3175 break;
3176 case M32C_OPERAND_DST32R0HI_S :
3177 value = 0;
3178 break;
3179 case M32C_OPERAND_DST32R0QI_S :
3180 value = 0;
3181 break;
3182 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
3183 value = fields->f_dst32_rn_ext_unprefixed;
3184 break;
3185 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
3186 value = fields->f_dst32_rn_ext_unprefixed;
3187 break;
3188 case M32C_OPERAND_DST32RNPREFIXEDHI :
3189 value = fields->f_dst32_rn_prefixed_HI;
3190 break;
3191 case M32C_OPERAND_DST32RNPREFIXEDQI :
3192 value = fields->f_dst32_rn_prefixed_QI;
3193 break;
3194 case M32C_OPERAND_DST32RNPREFIXEDSI :
3195 value = fields->f_dst32_rn_prefixed_SI;
3196 break;
3197 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
3198 value = fields->f_dst32_rn_unprefixed_HI;
3199 break;
3200 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
3201 value = fields->f_dst32_rn_unprefixed_QI;
3202 break;
3203 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
3204 value = fields->f_dst32_rn_unprefixed_SI;
3205 break;
3206 case M32C_OPERAND_G :
3207 value = 0;
3208 break;
3209 case M32C_OPERAND_IMM_12_S4 :
3210 value = fields->f_imm_12_s4;
3211 break;
3212 case M32C_OPERAND_IMM_12_S4N :
3213 value = fields->f_imm_12_s4;
3214 break;
3215 case M32C_OPERAND_IMM_13_U3 :
3216 value = fields->f_imm_13_u3;
3217 break;
3218 case M32C_OPERAND_IMM_16_HI :
3219 value = fields->f_dsp_16_s16;
3220 break;
3221 case M32C_OPERAND_IMM_16_QI :
3222 value = fields->f_dsp_16_s8;
3223 break;
3224 case M32C_OPERAND_IMM_16_SI :
3225 value = fields->f_dsp_16_s32;
3226 break;
3227 case M32C_OPERAND_IMM_20_S4 :
3228 value = fields->f_imm_20_s4;
3229 break;
3230 case M32C_OPERAND_IMM_24_HI :
3231 value = fields->f_dsp_24_s16;
3232 break;
3233 case M32C_OPERAND_IMM_24_QI :
3234 value = fields->f_dsp_24_s8;
3235 break;
3236 case M32C_OPERAND_IMM_24_SI :
3237 value = fields->f_dsp_24_s32;
3238 break;
3239 case M32C_OPERAND_IMM_32_HI :
3240 value = fields->f_dsp_32_s16;
3241 break;
3242 case M32C_OPERAND_IMM_32_QI :
3243 value = fields->f_dsp_32_s8;
3244 break;
3245 case M32C_OPERAND_IMM_32_SI :
3246 value = fields->f_dsp_32_s32;
3247 break;
3248 case M32C_OPERAND_IMM_40_HI :
3249 value = fields->f_dsp_40_s16;
3250 break;
3251 case M32C_OPERAND_IMM_40_QI :
3252 value = fields->f_dsp_40_s8;
3253 break;
3254 case M32C_OPERAND_IMM_40_SI :
3255 value = fields->f_dsp_40_s32;
3256 break;
3257 case M32C_OPERAND_IMM_48_HI :
3258 value = fields->f_dsp_48_s16;
3259 break;
3260 case M32C_OPERAND_IMM_48_QI :
3261 value = fields->f_dsp_48_s8;
3262 break;
3263 case M32C_OPERAND_IMM_48_SI :
3264 value = fields->f_dsp_48_s32;
3265 break;
3266 case M32C_OPERAND_IMM_56_HI :
3267 value = fields->f_dsp_56_s16;
3268 break;
3269 case M32C_OPERAND_IMM_56_QI :
3270 value = fields->f_dsp_56_s8;
3271 break;
3272 case M32C_OPERAND_IMM_64_HI :
3273 value = fields->f_dsp_64_s16;
3274 break;
3275 case M32C_OPERAND_IMM_8_HI :
3276 value = fields->f_dsp_8_s16;
3277 break;
3278 case M32C_OPERAND_IMM_8_QI :
3279 value = fields->f_dsp_8_s8;
3280 break;
3281 case M32C_OPERAND_IMM_8_S4 :
3282 value = fields->f_imm_8_s4;
3283 break;
3284 case M32C_OPERAND_IMM_8_S4N :
3285 value = fields->f_imm_8_s4;
3286 break;
3287 case M32C_OPERAND_IMM_SH_12_S4 :
3288 value = fields->f_imm_12_s4;
3289 break;
3290 case M32C_OPERAND_IMM_SH_20_S4 :
3291 value = fields->f_imm_20_s4;
3292 break;
3293 case M32C_OPERAND_IMM_SH_8_S4 :
3294 value = fields->f_imm_8_s4;
3295 break;
3296 case M32C_OPERAND_IMM1_S :
3297 value = fields->f_imm1_S;
3298 break;
3299 case M32C_OPERAND_IMM3_S :
3300 value = fields->f_imm3_S;
3301 break;
3302 case M32C_OPERAND_LAB_16_8 :
3303 value = fields->f_lab_16_8;
3304 break;
3305 case M32C_OPERAND_LAB_24_8 :
3306 value = fields->f_lab_24_8;
3307 break;
3308 case M32C_OPERAND_LAB_32_8 :
3309 value = fields->f_lab_32_8;
3310 break;
3311 case M32C_OPERAND_LAB_40_8 :
3312 value = fields->f_lab_40_8;
3313 break;
3314 case M32C_OPERAND_LAB_5_3 :
3315 value = fields->f_lab_5_3;
3316 break;
3317 case M32C_OPERAND_LAB_8_16 :
3318 value = fields->f_lab_8_16;
3319 break;
3320 case M32C_OPERAND_LAB_8_24 :
3321 value = fields->f_lab_8_24;
3322 break;
3323 case M32C_OPERAND_LAB_8_8 :
3324 value = fields->f_lab_8_8;
3325 break;
3326 case M32C_OPERAND_LAB32_JMP_S :
3327 value = fields->f_lab32_jmp_s;
3328 break;
3329 case M32C_OPERAND_Q :
3330 value = 0;
3331 break;
3332 case M32C_OPERAND_R0 :
3333 value = 0;
3334 break;
3335 case M32C_OPERAND_R0H :
3336 value = 0;
3337 break;
3338 case M32C_OPERAND_R0L :
3339 value = 0;
3340 break;
3341 case M32C_OPERAND_R1 :
3342 value = 0;
3343 break;
3344 case M32C_OPERAND_R1R2R0 :
3345 value = 0;
3346 break;
3347 case M32C_OPERAND_R2 :
3348 value = 0;
3349 break;
3350 case M32C_OPERAND_R2R0 :
3351 value = 0;
3352 break;
3353 case M32C_OPERAND_R3 :
3354 value = 0;
3355 break;
3356 case M32C_OPERAND_R3R1 :
3357 value = 0;
3358 break;
3359 case M32C_OPERAND_REGSETPOP :
3360 value = fields->f_8_8;
3361 break;
3362 case M32C_OPERAND_REGSETPUSH :
3363 value = fields->f_8_8;
3364 break;
3365 case M32C_OPERAND_RN16_PUSH_S :
3366 value = fields->f_4_1;
3367 break;
3368 case M32C_OPERAND_S :
3369 value = 0;
3370 break;
3371 case M32C_OPERAND_SRC16AN :
3372 value = fields->f_src16_an;
3373 break;
3374 case M32C_OPERAND_SRC16ANHI :
3375 value = fields->f_src16_an;
3376 break;
3377 case M32C_OPERAND_SRC16ANQI :
3378 value = fields->f_src16_an;
3379 break;
3380 case M32C_OPERAND_SRC16RNHI :
3381 value = fields->f_src16_rn;
3382 break;
3383 case M32C_OPERAND_SRC16RNQI :
3384 value = fields->f_src16_rn;
3385 break;
3386 case M32C_OPERAND_SRC32ANPREFIXED :
3387 value = fields->f_src32_an_prefixed;
3388 break;
3389 case M32C_OPERAND_SRC32ANPREFIXEDHI :
3390 value = fields->f_src32_an_prefixed;
3391 break;
3392 case M32C_OPERAND_SRC32ANPREFIXEDQI :
3393 value = fields->f_src32_an_prefixed;
3394 break;
3395 case M32C_OPERAND_SRC32ANPREFIXEDSI :
3396 value = fields->f_src32_an_prefixed;
3397 break;
3398 case M32C_OPERAND_SRC32ANUNPREFIXED :
3399 value = fields->f_src32_an_unprefixed;
3400 break;
3401 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
3402 value = fields->f_src32_an_unprefixed;
3403 break;
3404 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
3405 value = fields->f_src32_an_unprefixed;
3406 break;
3407 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
3408 value = fields->f_src32_an_unprefixed;
3409 break;
3410 case M32C_OPERAND_SRC32RNPREFIXEDHI :
3411 value = fields->f_src32_rn_prefixed_HI;
3412 break;
3413 case M32C_OPERAND_SRC32RNPREFIXEDQI :
3414 value = fields->f_src32_rn_prefixed_QI;
3415 break;
3416 case M32C_OPERAND_SRC32RNPREFIXEDSI :
3417 value = fields->f_src32_rn_prefixed_SI;
3418 break;
3419 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
3420 value = fields->f_src32_rn_unprefixed_HI;
3421 break;
3422 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
3423 value = fields->f_src32_rn_unprefixed_QI;
3424 break;
3425 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
3426 value = fields->f_src32_rn_unprefixed_SI;
3427 break;
3428 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
3429 value = fields->f_5_1;
3430 break;
3431 case M32C_OPERAND_X :
3432 value = 0;
3433 break;
3434 case M32C_OPERAND_Z :
3435 value = 0;
3436 break;
3437 case M32C_OPERAND_COND16_16 :
3438 value = fields->f_dsp_16_u8;
3439 break;
3440 case M32C_OPERAND_COND16_24 :
3441 value = fields->f_dsp_24_u8;
3442 break;
3443 case M32C_OPERAND_COND16_32 :
3444 value = fields->f_dsp_32_u8;
3445 break;
3446 case M32C_OPERAND_COND16C :
3447 value = fields->f_cond16;
3448 break;
3449 case M32C_OPERAND_COND16J :
3450 value = fields->f_cond16;
3451 break;
3452 case M32C_OPERAND_COND16J5 :
3453 value = fields->f_cond16j_5;
3454 break;
3455 case M32C_OPERAND_COND32 :
3456 value = fields->f_cond32;
3457 break;
3458 case M32C_OPERAND_COND32_16 :
3459 value = fields->f_dsp_16_u8;
3460 break;
3461 case M32C_OPERAND_COND32_24 :
3462 value = fields->f_dsp_24_u8;
3463 break;
3464 case M32C_OPERAND_COND32_32 :
3465 value = fields->f_dsp_32_u8;
3466 break;
3467 case M32C_OPERAND_COND32_40 :
3468 value = fields->f_dsp_40_u8;
3469 break;
3470 case M32C_OPERAND_COND32J :
3471 value = fields->f_cond32j;
3472 break;
3473 case M32C_OPERAND_CR1_PREFIXED_32 :
3474 value = fields->f_21_3;
3475 break;
3476 case M32C_OPERAND_CR1_UNPREFIXED_32 :
3477 value = fields->f_13_3;
3478 break;
3479 case M32C_OPERAND_CR16 :
3480 value = fields->f_9_3;
3481 break;
3482 case M32C_OPERAND_CR2_32 :
3483 value = fields->f_13_3;
3484 break;
3485 case M32C_OPERAND_CR3_PREFIXED_32 :
3486 value = fields->f_21_3;
3487 break;
3488 case M32C_OPERAND_CR3_UNPREFIXED_32 :
3489 value = fields->f_13_3;
3490 break;
3491 case M32C_OPERAND_FLAGS16 :
3492 value = fields->f_9_3;
3493 break;
3494 case M32C_OPERAND_FLAGS32 :
3495 value = fields->f_13_3;
3496 break;
3497 case M32C_OPERAND_SCCOND32 :
3498 value = fields->f_cond16;
3499 break;
3500 case M32C_OPERAND_SIZE :
3501 value = 0;
3502 break;
3503
3504 default :
3505 /* xgettext:c-format */
3506 fprintf (stderr, _("Unrecognized field %d while getting int operand.\n"),
3507 opindex);
3508 abort ();
3509 }
3510
3511 return value;
3512 }
3513
3514 bfd_vma
3515 m32c_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
3516 int opindex,
3517 const CGEN_FIELDS * fields)
3518 {
3519 bfd_vma value;
3520
3521 switch (opindex)
3522 {
3523 case M32C_OPERAND_A0 :
3524 value = 0;
3525 break;
3526 case M32C_OPERAND_A1 :
3527 value = 0;
3528 break;
3529 case M32C_OPERAND_AN16_PUSH_S :
3530 value = fields->f_4_1;
3531 break;
3532 case M32C_OPERAND_BIT16AN :
3533 value = fields->f_dst16_an;
3534 break;
3535 case M32C_OPERAND_BIT16RN :
3536 value = fields->f_dst16_rn;
3537 break;
3538 case M32C_OPERAND_BIT3_S :
3539 value = fields->f_imm3_S;
3540 break;
3541 case M32C_OPERAND_BIT32ANPREFIXED :
3542 value = fields->f_dst32_an_prefixed;
3543 break;
3544 case M32C_OPERAND_BIT32ANUNPREFIXED :
3545 value = fields->f_dst32_an_unprefixed;
3546 break;
3547 case M32C_OPERAND_BIT32RNPREFIXED :
3548 value = fields->f_dst32_rn_prefixed_QI;
3549 break;
3550 case M32C_OPERAND_BIT32RNUNPREFIXED :
3551 value = fields->f_dst32_rn_unprefixed_QI;
3552 break;
3553 case M32C_OPERAND_BITBASE16_16_S8 :
3554 value = fields->f_dsp_16_s8;
3555 break;
3556 case M32C_OPERAND_BITBASE16_16_U16 :
3557 value = fields->f_dsp_16_u16;
3558 break;
3559 case M32C_OPERAND_BITBASE16_16_U8 :
3560 value = fields->f_dsp_16_u8;
3561 break;
3562 case M32C_OPERAND_BITBASE16_8_U11_S :
3563 value = fields->f_bitbase16_u11_S;
3564 break;
3565 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
3566 value = fields->f_bitbase32_16_s11_unprefixed;
3567 break;
3568 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
3569 value = fields->f_bitbase32_16_s19_unprefixed;
3570 break;
3571 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
3572 value = fields->f_bitbase32_16_u11_unprefixed;
3573 break;
3574 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
3575 value = fields->f_bitbase32_16_u19_unprefixed;
3576 break;
3577 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
3578 value = fields->f_bitbase32_16_u27_unprefixed;
3579 break;
3580 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
3581 value = fields->f_bitbase32_24_s11_prefixed;
3582 break;
3583 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
3584 value = fields->f_bitbase32_24_s19_prefixed;
3585 break;
3586 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
3587 value = fields->f_bitbase32_24_u11_prefixed;
3588 break;
3589 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
3590 value = fields->f_bitbase32_24_u19_prefixed;
3591 break;
3592 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
3593 value = fields->f_bitbase32_24_u27_prefixed;
3594 break;
3595 case M32C_OPERAND_BITNO16R :
3596 value = fields->f_dsp_16_u8;
3597 break;
3598 case M32C_OPERAND_BITNO32PREFIXED :
3599 value = fields->f_bitno32_prefixed;
3600 break;
3601 case M32C_OPERAND_BITNO32UNPREFIXED :
3602 value = fields->f_bitno32_unprefixed;
3603 break;
3604 case M32C_OPERAND_DSP_10_U6 :
3605 value = fields->f_dsp_10_u6;
3606 break;
3607 case M32C_OPERAND_DSP_16_S16 :
3608 value = fields->f_dsp_16_s16;
3609 break;
3610 case M32C_OPERAND_DSP_16_S8 :
3611 value = fields->f_dsp_16_s8;
3612 break;
3613 case M32C_OPERAND_DSP_16_U16 :
3614 value = fields->f_dsp_16_u16;
3615 break;
3616 case M32C_OPERAND_DSP_16_U20 :
3617 value = fields->f_dsp_16_u24;
3618 break;
3619 case M32C_OPERAND_DSP_16_U24 :
3620 value = fields->f_dsp_16_u24;
3621 break;
3622 case M32C_OPERAND_DSP_16_U8 :
3623 value = fields->f_dsp_16_u8;
3624 break;
3625 case M32C_OPERAND_DSP_24_S16 :
3626 value = fields->f_dsp_24_s16;
3627 break;
3628 case M32C_OPERAND_DSP_24_S8 :
3629 value = fields->f_dsp_24_s8;
3630 break;
3631 case M32C_OPERAND_DSP_24_U16 :
3632 value = fields->f_dsp_24_u16;
3633 break;
3634 case M32C_OPERAND_DSP_24_U20 :
3635 value = fields->f_dsp_24_u24;
3636 break;
3637 case M32C_OPERAND_DSP_24_U24 :
3638 value = fields->f_dsp_24_u24;
3639 break;
3640 case M32C_OPERAND_DSP_24_U8 :
3641 value = fields->f_dsp_24_u8;
3642 break;
3643 case M32C_OPERAND_DSP_32_S16 :
3644 value = fields->f_dsp_32_s16;
3645 break;
3646 case M32C_OPERAND_DSP_32_S8 :
3647 value = fields->f_dsp_32_s8;
3648 break;
3649 case M32C_OPERAND_DSP_32_U16 :
3650 value = fields->f_dsp_32_u16;
3651 break;
3652 case M32C_OPERAND_DSP_32_U20 :
3653 value = fields->f_dsp_32_u24;
3654 break;
3655 case M32C_OPERAND_DSP_32_U24 :
3656 value = fields->f_dsp_32_u24;
3657 break;
3658 case M32C_OPERAND_DSP_32_U8 :
3659 value = fields->f_dsp_32_u8;
3660 break;
3661 case M32C_OPERAND_DSP_40_S16 :
3662 value = fields->f_dsp_40_s16;
3663 break;
3664 case M32C_OPERAND_DSP_40_S8 :
3665 value = fields->f_dsp_40_s8;
3666 break;
3667 case M32C_OPERAND_DSP_40_U16 :
3668 value = fields->f_dsp_40_u16;
3669 break;
3670 case M32C_OPERAND_DSP_40_U20 :
3671 value = fields->f_dsp_40_u20;
3672 break;
3673 case M32C_OPERAND_DSP_40_U24 :
3674 value = fields->f_dsp_40_u24;
3675 break;
3676 case M32C_OPERAND_DSP_40_U8 :
3677 value = fields->f_dsp_40_u8;
3678 break;
3679 case M32C_OPERAND_DSP_48_S16 :
3680 value = fields->f_dsp_48_s16;
3681 break;
3682 case M32C_OPERAND_DSP_48_S8 :
3683 value = fields->f_dsp_48_s8;
3684 break;
3685 case M32C_OPERAND_DSP_48_U16 :
3686 value = fields->f_dsp_48_u16;
3687 break;
3688 case M32C_OPERAND_DSP_48_U20 :
3689 value = fields->f_dsp_48_u20;
3690 break;
3691 case M32C_OPERAND_DSP_48_U24 :
3692 value = fields->f_dsp_48_u24;
3693 break;
3694 case M32C_OPERAND_DSP_48_U8 :
3695 value = fields->f_dsp_48_u8;
3696 break;
3697 case M32C_OPERAND_DSP_8_S24 :
3698 value = fields->f_dsp_8_s24;
3699 break;
3700 case M32C_OPERAND_DSP_8_S8 :
3701 value = fields->f_dsp_8_s8;
3702 break;
3703 case M32C_OPERAND_DSP_8_U16 :
3704 value = fields->f_dsp_8_u16;
3705 break;
3706 case M32C_OPERAND_DSP_8_U24 :
3707 value = fields->f_dsp_8_u24;
3708 break;
3709 case M32C_OPERAND_DSP_8_U6 :
3710 value = fields->f_dsp_8_u6;
3711 break;
3712 case M32C_OPERAND_DSP_8_U8 :
3713 value = fields->f_dsp_8_u8;
3714 break;
3715 case M32C_OPERAND_DST16AN :
3716 value = fields->f_dst16_an;
3717 break;
3718 case M32C_OPERAND_DST16AN_S :
3719 value = fields->f_dst16_an_s;
3720 break;
3721 case M32C_OPERAND_DST16ANHI :
3722 value = fields->f_dst16_an;
3723 break;
3724 case M32C_OPERAND_DST16ANQI :
3725 value = fields->f_dst16_an;
3726 break;
3727 case M32C_OPERAND_DST16ANQI_S :
3728 value = fields->f_dst16_rn_QI_s;
3729 break;
3730 case M32C_OPERAND_DST16ANSI :
3731 value = fields->f_dst16_an;
3732 break;
3733 case M32C_OPERAND_DST16RNEXTQI :
3734 value = fields->f_dst16_rn_ext;
3735 break;
3736 case M32C_OPERAND_DST16RNHI :
3737 value = fields->f_dst16_rn;
3738 break;
3739 case M32C_OPERAND_DST16RNQI :
3740 value = fields->f_dst16_rn;
3741 break;
3742 case M32C_OPERAND_DST16RNQI_S :
3743 value = fields->f_dst16_rn_QI_s;
3744 break;
3745 case M32C_OPERAND_DST16RNSI :
3746 value = fields->f_dst16_rn;
3747 break;
3748 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
3749 value = fields->f_dst32_an_unprefixed;
3750 break;
3751 case M32C_OPERAND_DST32ANPREFIXED :
3752 value = fields->f_dst32_an_prefixed;
3753 break;
3754 case M32C_OPERAND_DST32ANPREFIXEDHI :
3755 value = fields->f_dst32_an_prefixed;
3756 break;
3757 case M32C_OPERAND_DST32ANPREFIXEDQI :
3758 value = fields->f_dst32_an_prefixed;
3759 break;
3760 case M32C_OPERAND_DST32ANPREFIXEDSI :
3761 value = fields->f_dst32_an_prefixed;
3762 break;
3763 case M32C_OPERAND_DST32ANUNPREFIXED :
3764 value = fields->f_dst32_an_unprefixed;
3765 break;
3766 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
3767 value = fields->f_dst32_an_unprefixed;
3768 break;
3769 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
3770 value = fields->f_dst32_an_unprefixed;
3771 break;
3772 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
3773 value = fields->f_dst32_an_unprefixed;
3774 break;
3775 case M32C_OPERAND_DST32R0HI_S :
3776 value = 0;
3777 break;
3778 case M32C_OPERAND_DST32R0QI_S :
3779 value = 0;
3780 break;
3781 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
3782 value = fields->f_dst32_rn_ext_unprefixed;
3783 break;
3784 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
3785 value = fields->f_dst32_rn_ext_unprefixed;
3786 break;
3787 case M32C_OPERAND_DST32RNPREFIXEDHI :
3788 value = fields->f_dst32_rn_prefixed_HI;
3789 break;
3790 case M32C_OPERAND_DST32RNPREFIXEDQI :
3791 value = fields->f_dst32_rn_prefixed_QI;
3792 break;
3793 case M32C_OPERAND_DST32RNPREFIXEDSI :
3794 value = fields->f_dst32_rn_prefixed_SI;
3795 break;
3796 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
3797 value = fields->f_dst32_rn_unprefixed_HI;
3798 break;
3799 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
3800 value = fields->f_dst32_rn_unprefixed_QI;
3801 break;
3802 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
3803 value = fields->f_dst32_rn_unprefixed_SI;
3804 break;
3805 case M32C_OPERAND_G :
3806 value = 0;
3807 break;
3808 case M32C_OPERAND_IMM_12_S4 :
3809 value = fields->f_imm_12_s4;
3810 break;
3811 case M32C_OPERAND_IMM_12_S4N :
3812 value = fields->f_imm_12_s4;
3813 break;
3814 case M32C_OPERAND_IMM_13_U3 :
3815 value = fields->f_imm_13_u3;
3816 break;
3817 case M32C_OPERAND_IMM_16_HI :
3818 value = fields->f_dsp_16_s16;
3819 break;
3820 case M32C_OPERAND_IMM_16_QI :
3821 value = fields->f_dsp_16_s8;
3822 break;
3823 case M32C_OPERAND_IMM_16_SI :
3824 value = fields->f_dsp_16_s32;
3825 break;
3826 case M32C_OPERAND_IMM_20_S4 :
3827 value = fields->f_imm_20_s4;
3828 break;
3829 case M32C_OPERAND_IMM_24_HI :
3830 value = fields->f_dsp_24_s16;
3831 break;
3832 case M32C_OPERAND_IMM_24_QI :
3833 value = fields->f_dsp_24_s8;
3834 break;
3835 case M32C_OPERAND_IMM_24_SI :
3836 value = fields->f_dsp_24_s32;
3837 break;
3838 case M32C_OPERAND_IMM_32_HI :
3839 value = fields->f_dsp_32_s16;
3840 break;
3841 case M32C_OPERAND_IMM_32_QI :
3842 value = fields->f_dsp_32_s8;
3843 break;
3844 case M32C_OPERAND_IMM_32_SI :
3845 value = fields->f_dsp_32_s32;
3846 break;
3847 case M32C_OPERAND_IMM_40_HI :
3848 value = fields->f_dsp_40_s16;
3849 break;
3850 case M32C_OPERAND_IMM_40_QI :
3851 value = fields->f_dsp_40_s8;
3852 break;
3853 case M32C_OPERAND_IMM_40_SI :
3854 value = fields->f_dsp_40_s32;
3855 break;
3856 case M32C_OPERAND_IMM_48_HI :
3857 value = fields->f_dsp_48_s16;
3858 break;
3859 case M32C_OPERAND_IMM_48_QI :
3860 value = fields->f_dsp_48_s8;
3861 break;
3862 case M32C_OPERAND_IMM_48_SI :
3863 value = fields->f_dsp_48_s32;
3864 break;
3865 case M32C_OPERAND_IMM_56_HI :
3866 value = fields->f_dsp_56_s16;
3867 break;
3868 case M32C_OPERAND_IMM_56_QI :
3869 value = fields->f_dsp_56_s8;
3870 break;
3871 case M32C_OPERAND_IMM_64_HI :
3872 value = fields->f_dsp_64_s16;
3873 break;
3874 case M32C_OPERAND_IMM_8_HI :
3875 value = fields->f_dsp_8_s16;
3876 break;
3877 case M32C_OPERAND_IMM_8_QI :
3878 value = fields->f_dsp_8_s8;
3879 break;
3880 case M32C_OPERAND_IMM_8_S4 :
3881 value = fields->f_imm_8_s4;
3882 break;
3883 case M32C_OPERAND_IMM_8_S4N :
3884 value = fields->f_imm_8_s4;
3885 break;
3886 case M32C_OPERAND_IMM_SH_12_S4 :
3887 value = fields->f_imm_12_s4;
3888 break;
3889 case M32C_OPERAND_IMM_SH_20_S4 :
3890 value = fields->f_imm_20_s4;
3891 break;
3892 case M32C_OPERAND_IMM_SH_8_S4 :
3893 value = fields->f_imm_8_s4;
3894 break;
3895 case M32C_OPERAND_IMM1_S :
3896 value = fields->f_imm1_S;
3897 break;
3898 case M32C_OPERAND_IMM3_S :
3899 value = fields->f_imm3_S;
3900 break;
3901 case M32C_OPERAND_LAB_16_8 :
3902 value = fields->f_lab_16_8;
3903 break;
3904 case M32C_OPERAND_LAB_24_8 :
3905 value = fields->f_lab_24_8;
3906 break;
3907 case M32C_OPERAND_LAB_32_8 :
3908 value = fields->f_lab_32_8;
3909 break;
3910 case M32C_OPERAND_LAB_40_8 :
3911 value = fields->f_lab_40_8;
3912 break;
3913 case M32C_OPERAND_LAB_5_3 :
3914 value = fields->f_lab_5_3;
3915 break;
3916 case M32C_OPERAND_LAB_8_16 :
3917 value = fields->f_lab_8_16;
3918 break;
3919 case M32C_OPERAND_LAB_8_24 :
3920 value = fields->f_lab_8_24;
3921 break;
3922 case M32C_OPERAND_LAB_8_8 :
3923 value = fields->f_lab_8_8;
3924 break;
3925 case M32C_OPERAND_LAB32_JMP_S :
3926 value = fields->f_lab32_jmp_s;
3927 break;
3928 case M32C_OPERAND_Q :
3929 value = 0;
3930 break;
3931 case M32C_OPERAND_R0 :
3932 value = 0;
3933 break;
3934 case M32C_OPERAND_R0H :
3935 value = 0;
3936 break;
3937 case M32C_OPERAND_R0L :
3938 value = 0;
3939 break;
3940 case M32C_OPERAND_R1 :
3941 value = 0;
3942 break;
3943 case M32C_OPERAND_R1R2R0 :
3944 value = 0;
3945 break;
3946 case M32C_OPERAND_R2 :
3947 value = 0;
3948 break;
3949 case M32C_OPERAND_R2R0 :
3950 value = 0;
3951 break;
3952 case M32C_OPERAND_R3 :
3953 value = 0;
3954 break;
3955 case M32C_OPERAND_R3R1 :
3956 value = 0;
3957 break;
3958 case M32C_OPERAND_REGSETPOP :
3959 value = fields->f_8_8;
3960 break;
3961 case M32C_OPERAND_REGSETPUSH :
3962 value = fields->f_8_8;
3963 break;
3964 case M32C_OPERAND_RN16_PUSH_S :
3965 value = fields->f_4_1;
3966 break;
3967 case M32C_OPERAND_S :
3968 value = 0;
3969 break;
3970 case M32C_OPERAND_SRC16AN :
3971 value = fields->f_src16_an;
3972 break;
3973 case M32C_OPERAND_SRC16ANHI :
3974 value = fields->f_src16_an;
3975 break;
3976 case M32C_OPERAND_SRC16ANQI :
3977 value = fields->f_src16_an;
3978 break;
3979 case M32C_OPERAND_SRC16RNHI :
3980 value = fields->f_src16_rn;
3981 break;
3982 case M32C_OPERAND_SRC16RNQI :
3983 value = fields->f_src16_rn;
3984 break;
3985 case M32C_OPERAND_SRC32ANPREFIXED :
3986 value = fields->f_src32_an_prefixed;
3987 break;
3988 case M32C_OPERAND_SRC32ANPREFIXEDHI :
3989 value = fields->f_src32_an_prefixed;
3990 break;
3991 case M32C_OPERAND_SRC32ANPREFIXEDQI :
3992 value = fields->f_src32_an_prefixed;
3993 break;
3994 case M32C_OPERAND_SRC32ANPREFIXEDSI :
3995 value = fields->f_src32_an_prefixed;
3996 break;
3997 case M32C_OPERAND_SRC32ANUNPREFIXED :
3998 value = fields->f_src32_an_unprefixed;
3999 break;
4000 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
4001 value = fields->f_src32_an_unprefixed;
4002 break;
4003 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
4004 value = fields->f_src32_an_unprefixed;
4005 break;
4006 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
4007 value = fields->f_src32_an_unprefixed;
4008 break;
4009 case M32C_OPERAND_SRC32RNPREFIXEDHI :
4010 value = fields->f_src32_rn_prefixed_HI;
4011 break;
4012 case M32C_OPERAND_SRC32RNPREFIXEDQI :
4013 value = fields->f_src32_rn_prefixed_QI;
4014 break;
4015 case M32C_OPERAND_SRC32RNPREFIXEDSI :
4016 value = fields->f_src32_rn_prefixed_SI;
4017 break;
4018 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
4019 value = fields->f_src32_rn_unprefixed_HI;
4020 break;
4021 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
4022 value = fields->f_src32_rn_unprefixed_QI;
4023 break;
4024 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
4025 value = fields->f_src32_rn_unprefixed_SI;
4026 break;
4027 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
4028 value = fields->f_5_1;
4029 break;
4030 case M32C_OPERAND_X :
4031 value = 0;
4032 break;
4033 case M32C_OPERAND_Z :
4034 value = 0;
4035 break;
4036 case M32C_OPERAND_COND16_16 :
4037 value = fields->f_dsp_16_u8;
4038 break;
4039 case M32C_OPERAND_COND16_24 :
4040 value = fields->f_dsp_24_u8;
4041 break;
4042 case M32C_OPERAND_COND16_32 :
4043 value = fields->f_dsp_32_u8;
4044 break;
4045 case M32C_OPERAND_COND16C :
4046 value = fields->f_cond16;
4047 break;
4048 case M32C_OPERAND_COND16J :
4049 value = fields->f_cond16;
4050 break;
4051 case M32C_OPERAND_COND16J5 :
4052 value = fields->f_cond16j_5;
4053 break;
4054 case M32C_OPERAND_COND32 :
4055 value = fields->f_cond32;
4056 break;
4057 case M32C_OPERAND_COND32_16 :
4058 value = fields->f_dsp_16_u8;
4059 break;
4060 case M32C_OPERAND_COND32_24 :
4061 value = fields->f_dsp_24_u8;
4062 break;
4063 case M32C_OPERAND_COND32_32 :
4064 value = fields->f_dsp_32_u8;
4065 break;
4066 case M32C_OPERAND_COND32_40 :
4067 value = fields->f_dsp_40_u8;
4068 break;
4069 case M32C_OPERAND_COND32J :
4070 value = fields->f_cond32j;
4071 break;
4072 case M32C_OPERAND_CR1_PREFIXED_32 :
4073 value = fields->f_21_3;
4074 break;
4075 case M32C_OPERAND_CR1_UNPREFIXED_32 :
4076 value = fields->f_13_3;
4077 break;
4078 case M32C_OPERAND_CR16 :
4079 value = fields->f_9_3;
4080 break;
4081 case M32C_OPERAND_CR2_32 :
4082 value = fields->f_13_3;
4083 break;
4084 case M32C_OPERAND_CR3_PREFIXED_32 :
4085 value = fields->f_21_3;
4086 break;
4087 case M32C_OPERAND_CR3_UNPREFIXED_32 :
4088 value = fields->f_13_3;
4089 break;
4090 case M32C_OPERAND_FLAGS16 :
4091 value = fields->f_9_3;
4092 break;
4093 case M32C_OPERAND_FLAGS32 :
4094 value = fields->f_13_3;
4095 break;
4096 case M32C_OPERAND_SCCOND32 :
4097 value = fields->f_cond16;
4098 break;
4099 case M32C_OPERAND_SIZE :
4100 value = 0;
4101 break;
4102
4103 default :
4104 /* xgettext:c-format */
4105 fprintf (stderr, _("Unrecognized field %d while getting vma operand.\n"),
4106 opindex);
4107 abort ();
4108 }
4109
4110 return value;
4111 }
4112
4113 void m32c_cgen_set_int_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, int);
4114 void m32c_cgen_set_vma_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, bfd_vma);
4115
4116 /* Stuffing values in cgen_fields is handled by a collection of functions.
4117 They are distinguished by the type of the VALUE argument they accept.
4118 TODO: floating point, inlining support, remove cases where argument type
4119 not appropriate. */
4120
4121 void
4122 m32c_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
4123 int opindex,
4124 CGEN_FIELDS * fields,
4125 int value)
4126 {
4127 switch (opindex)
4128 {
4129 case M32C_OPERAND_A0 :
4130 break;
4131 case M32C_OPERAND_A1 :
4132 break;
4133 case M32C_OPERAND_AN16_PUSH_S :
4134 fields->f_4_1 = value;
4135 break;
4136 case M32C_OPERAND_BIT16AN :
4137 fields->f_dst16_an = value;
4138 break;
4139 case M32C_OPERAND_BIT16RN :
4140 fields->f_dst16_rn = value;
4141 break;
4142 case M32C_OPERAND_BIT3_S :
4143 fields->f_imm3_S = value;
4144 break;
4145 case M32C_OPERAND_BIT32ANPREFIXED :
4146 fields->f_dst32_an_prefixed = value;
4147 break;
4148 case M32C_OPERAND_BIT32ANUNPREFIXED :
4149 fields->f_dst32_an_unprefixed = value;
4150 break;
4151 case M32C_OPERAND_BIT32RNPREFIXED :
4152 fields->f_dst32_rn_prefixed_QI = value;
4153 break;
4154 case M32C_OPERAND_BIT32RNUNPREFIXED :
4155 fields->f_dst32_rn_unprefixed_QI = value;
4156 break;
4157 case M32C_OPERAND_BITBASE16_16_S8 :
4158 fields->f_dsp_16_s8 = value;
4159 break;
4160 case M32C_OPERAND_BITBASE16_16_U16 :
4161 fields->f_dsp_16_u16 = value;
4162 break;
4163 case M32C_OPERAND_BITBASE16_16_U8 :
4164 fields->f_dsp_16_u8 = value;
4165 break;
4166 case M32C_OPERAND_BITBASE16_8_U11_S :
4167 fields->f_bitbase16_u11_S = value;
4168 break;
4169 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
4170 fields->f_bitbase32_16_s11_unprefixed = value;
4171 break;
4172 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
4173 fields->f_bitbase32_16_s19_unprefixed = value;
4174 break;
4175 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
4176 fields->f_bitbase32_16_u11_unprefixed = value;
4177 break;
4178 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
4179 fields->f_bitbase32_16_u19_unprefixed = value;
4180 break;
4181 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
4182 fields->f_bitbase32_16_u27_unprefixed = value;
4183 break;
4184 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
4185 fields->f_bitbase32_24_s11_prefixed = value;
4186 break;
4187 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
4188 fields->f_bitbase32_24_s19_prefixed = value;
4189 break;
4190 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
4191 fields->f_bitbase32_24_u11_prefixed = value;
4192 break;
4193 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
4194 fields->f_bitbase32_24_u19_prefixed = value;
4195 break;
4196 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
4197 fields->f_bitbase32_24_u27_prefixed = value;
4198 break;
4199 case M32C_OPERAND_BITNO16R :
4200 fields->f_dsp_16_u8 = value;
4201 break;
4202 case M32C_OPERAND_BITNO32PREFIXED :
4203 fields->f_bitno32_prefixed = value;
4204 break;
4205 case M32C_OPERAND_BITNO32UNPREFIXED :
4206 fields->f_bitno32_unprefixed = value;
4207 break;
4208 case M32C_OPERAND_DSP_10_U6 :
4209 fields->f_dsp_10_u6 = value;
4210 break;
4211 case M32C_OPERAND_DSP_16_S16 :
4212 fields->f_dsp_16_s16 = value;
4213 break;
4214 case M32C_OPERAND_DSP_16_S8 :
4215 fields->f_dsp_16_s8 = value;
4216 break;
4217 case M32C_OPERAND_DSP_16_U16 :
4218 fields->f_dsp_16_u16 = value;
4219 break;
4220 case M32C_OPERAND_DSP_16_U20 :
4221 fields->f_dsp_16_u24 = value;
4222 break;
4223 case M32C_OPERAND_DSP_16_U24 :
4224 fields->f_dsp_16_u24 = value;
4225 break;
4226 case M32C_OPERAND_DSP_16_U8 :
4227 fields->f_dsp_16_u8 = value;
4228 break;
4229 case M32C_OPERAND_DSP_24_S16 :
4230 fields->f_dsp_24_s16 = value;
4231 break;
4232 case M32C_OPERAND_DSP_24_S8 :
4233 fields->f_dsp_24_s8 = value;
4234 break;
4235 case M32C_OPERAND_DSP_24_U16 :
4236 fields->f_dsp_24_u16 = value;
4237 break;
4238 case M32C_OPERAND_DSP_24_U20 :
4239 fields->f_dsp_24_u24 = value;
4240 break;
4241 case M32C_OPERAND_DSP_24_U24 :
4242 fields->f_dsp_24_u24 = value;
4243 break;
4244 case M32C_OPERAND_DSP_24_U8 :
4245 fields->f_dsp_24_u8 = value;
4246 break;
4247 case M32C_OPERAND_DSP_32_S16 :
4248 fields->f_dsp_32_s16 = value;
4249 break;
4250 case M32C_OPERAND_DSP_32_S8 :
4251 fields->f_dsp_32_s8 = value;
4252 break;
4253 case M32C_OPERAND_DSP_32_U16 :
4254 fields->f_dsp_32_u16 = value;
4255 break;
4256 case M32C_OPERAND_DSP_32_U20 :
4257 fields->f_dsp_32_u24 = value;
4258 break;
4259 case M32C_OPERAND_DSP_32_U24 :
4260 fields->f_dsp_32_u24 = value;
4261 break;
4262 case M32C_OPERAND_DSP_32_U8 :
4263 fields->f_dsp_32_u8 = value;
4264 break;
4265 case M32C_OPERAND_DSP_40_S16 :
4266 fields->f_dsp_40_s16 = value;
4267 break;
4268 case M32C_OPERAND_DSP_40_S8 :
4269 fields->f_dsp_40_s8 = value;
4270 break;
4271 case M32C_OPERAND_DSP_40_U16 :
4272 fields->f_dsp_40_u16 = value;
4273 break;
4274 case M32C_OPERAND_DSP_40_U20 :
4275 fields->f_dsp_40_u20 = value;
4276 break;
4277 case M32C_OPERAND_DSP_40_U24 :
4278 fields->f_dsp_40_u24 = value;
4279 break;
4280 case M32C_OPERAND_DSP_40_U8 :
4281 fields->f_dsp_40_u8 = value;
4282 break;
4283 case M32C_OPERAND_DSP_48_S16 :
4284 fields->f_dsp_48_s16 = value;
4285 break;
4286 case M32C_OPERAND_DSP_48_S8 :
4287 fields->f_dsp_48_s8 = value;
4288 break;
4289 case M32C_OPERAND_DSP_48_U16 :
4290 fields->f_dsp_48_u16 = value;
4291 break;
4292 case M32C_OPERAND_DSP_48_U20 :
4293 fields->f_dsp_48_u20 = value;
4294 break;
4295 case M32C_OPERAND_DSP_48_U24 :
4296 fields->f_dsp_48_u24 = value;
4297 break;
4298 case M32C_OPERAND_DSP_48_U8 :
4299 fields->f_dsp_48_u8 = value;
4300 break;
4301 case M32C_OPERAND_DSP_8_S24 :
4302 fields->f_dsp_8_s24 = value;
4303 break;
4304 case M32C_OPERAND_DSP_8_S8 :
4305 fields->f_dsp_8_s8 = value;
4306 break;
4307 case M32C_OPERAND_DSP_8_U16 :
4308 fields->f_dsp_8_u16 = value;
4309 break;
4310 case M32C_OPERAND_DSP_8_U24 :
4311 fields->f_dsp_8_u24 = value;
4312 break;
4313 case M32C_OPERAND_DSP_8_U6 :
4314 fields->f_dsp_8_u6 = value;
4315 break;
4316 case M32C_OPERAND_DSP_8_U8 :
4317 fields->f_dsp_8_u8 = value;
4318 break;
4319 case M32C_OPERAND_DST16AN :
4320 fields->f_dst16_an = value;
4321 break;
4322 case M32C_OPERAND_DST16AN_S :
4323 fields->f_dst16_an_s = value;
4324 break;
4325 case M32C_OPERAND_DST16ANHI :
4326 fields->f_dst16_an = value;
4327 break;
4328 case M32C_OPERAND_DST16ANQI :
4329 fields->f_dst16_an = value;
4330 break;
4331 case M32C_OPERAND_DST16ANQI_S :
4332 fields->f_dst16_rn_QI_s = value;
4333 break;
4334 case M32C_OPERAND_DST16ANSI :
4335 fields->f_dst16_an = value;
4336 break;
4337 case M32C_OPERAND_DST16RNEXTQI :
4338 fields->f_dst16_rn_ext = value;
4339 break;
4340 case M32C_OPERAND_DST16RNHI :
4341 fields->f_dst16_rn = value;
4342 break;
4343 case M32C_OPERAND_DST16RNQI :
4344 fields->f_dst16_rn = value;
4345 break;
4346 case M32C_OPERAND_DST16RNQI_S :
4347 fields->f_dst16_rn_QI_s = value;
4348 break;
4349 case M32C_OPERAND_DST16RNSI :
4350 fields->f_dst16_rn = value;
4351 break;
4352 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
4353 fields->f_dst32_an_unprefixed = value;
4354 break;
4355 case M32C_OPERAND_DST32ANPREFIXED :
4356 fields->f_dst32_an_prefixed = value;
4357 break;
4358 case M32C_OPERAND_DST32ANPREFIXEDHI :
4359 fields->f_dst32_an_prefixed = value;
4360 break;
4361 case M32C_OPERAND_DST32ANPREFIXEDQI :
4362 fields->f_dst32_an_prefixed = value;
4363 break;
4364 case M32C_OPERAND_DST32ANPREFIXEDSI :
4365 fields->f_dst32_an_prefixed = value;
4366 break;
4367 case M32C_OPERAND_DST32ANUNPREFIXED :
4368 fields->f_dst32_an_unprefixed = value;
4369 break;
4370 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
4371 fields->f_dst32_an_unprefixed = value;
4372 break;
4373 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
4374 fields->f_dst32_an_unprefixed = value;
4375 break;
4376 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
4377 fields->f_dst32_an_unprefixed = value;
4378 break;
4379 case M32C_OPERAND_DST32R0HI_S :
4380 break;
4381 case M32C_OPERAND_DST32R0QI_S :
4382 break;
4383 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
4384 fields->f_dst32_rn_ext_unprefixed = value;
4385 break;
4386 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
4387 fields->f_dst32_rn_ext_unprefixed = value;
4388 break;
4389 case M32C_OPERAND_DST32RNPREFIXEDHI :
4390 fields->f_dst32_rn_prefixed_HI = value;
4391 break;
4392 case M32C_OPERAND_DST32RNPREFIXEDQI :
4393 fields->f_dst32_rn_prefixed_QI = value;
4394 break;
4395 case M32C_OPERAND_DST32RNPREFIXEDSI :
4396 fields->f_dst32_rn_prefixed_SI = value;
4397 break;
4398 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
4399 fields->f_dst32_rn_unprefixed_HI = value;
4400 break;
4401 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
4402 fields->f_dst32_rn_unprefixed_QI = value;
4403 break;
4404 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
4405 fields->f_dst32_rn_unprefixed_SI = value;
4406 break;
4407 case M32C_OPERAND_G :
4408 break;
4409 case M32C_OPERAND_IMM_12_S4 :
4410 fields->f_imm_12_s4 = value;
4411 break;
4412 case M32C_OPERAND_IMM_12_S4N :
4413 fields->f_imm_12_s4 = value;
4414 break;
4415 case M32C_OPERAND_IMM_13_U3 :
4416 fields->f_imm_13_u3 = value;
4417 break;
4418 case M32C_OPERAND_IMM_16_HI :
4419 fields->f_dsp_16_s16 = value;
4420 break;
4421 case M32C_OPERAND_IMM_16_QI :
4422 fields->f_dsp_16_s8 = value;
4423 break;
4424 case M32C_OPERAND_IMM_16_SI :
4425 fields->f_dsp_16_s32 = value;
4426 break;
4427 case M32C_OPERAND_IMM_20_S4 :
4428 fields->f_imm_20_s4 = value;
4429 break;
4430 case M32C_OPERAND_IMM_24_HI :
4431 fields->f_dsp_24_s16 = value;
4432 break;
4433 case M32C_OPERAND_IMM_24_QI :
4434 fields->f_dsp_24_s8 = value;
4435 break;
4436 case M32C_OPERAND_IMM_24_SI :
4437 fields->f_dsp_24_s32 = value;
4438 break;
4439 case M32C_OPERAND_IMM_32_HI :
4440 fields->f_dsp_32_s16 = value;
4441 break;
4442 case M32C_OPERAND_IMM_32_QI :
4443 fields->f_dsp_32_s8 = value;
4444 break;
4445 case M32C_OPERAND_IMM_32_SI :
4446 fields->f_dsp_32_s32 = value;
4447 break;
4448 case M32C_OPERAND_IMM_40_HI :
4449 fields->f_dsp_40_s16 = value;
4450 break;
4451 case M32C_OPERAND_IMM_40_QI :
4452 fields->f_dsp_40_s8 = value;
4453 break;
4454 case M32C_OPERAND_IMM_40_SI :
4455 fields->f_dsp_40_s32 = value;
4456 break;
4457 case M32C_OPERAND_IMM_48_HI :
4458 fields->f_dsp_48_s16 = value;
4459 break;
4460 case M32C_OPERAND_IMM_48_QI :
4461 fields->f_dsp_48_s8 = value;
4462 break;
4463 case M32C_OPERAND_IMM_48_SI :
4464 fields->f_dsp_48_s32 = value;
4465 break;
4466 case M32C_OPERAND_IMM_56_HI :
4467 fields->f_dsp_56_s16 = value;
4468 break;
4469 case M32C_OPERAND_IMM_56_QI :
4470 fields->f_dsp_56_s8 = value;
4471 break;
4472 case M32C_OPERAND_IMM_64_HI :
4473 fields->f_dsp_64_s16 = value;
4474 break;
4475 case M32C_OPERAND_IMM_8_HI :
4476 fields->f_dsp_8_s16 = value;
4477 break;
4478 case M32C_OPERAND_IMM_8_QI :
4479 fields->f_dsp_8_s8 = value;
4480 break;
4481 case M32C_OPERAND_IMM_8_S4 :
4482 fields->f_imm_8_s4 = value;
4483 break;
4484 case M32C_OPERAND_IMM_8_S4N :
4485 fields->f_imm_8_s4 = value;
4486 break;
4487 case M32C_OPERAND_IMM_SH_12_S4 :
4488 fields->f_imm_12_s4 = value;
4489 break;
4490 case M32C_OPERAND_IMM_SH_20_S4 :
4491 fields->f_imm_20_s4 = value;
4492 break;
4493 case M32C_OPERAND_IMM_SH_8_S4 :
4494 fields->f_imm_8_s4 = value;
4495 break;
4496 case M32C_OPERAND_IMM1_S :
4497 fields->f_imm1_S = value;
4498 break;
4499 case M32C_OPERAND_IMM3_S :
4500 fields->f_imm3_S = value;
4501 break;
4502 case M32C_OPERAND_LAB_16_8 :
4503 fields->f_lab_16_8 = value;
4504 break;
4505 case M32C_OPERAND_LAB_24_8 :
4506 fields->f_lab_24_8 = value;
4507 break;
4508 case M32C_OPERAND_LAB_32_8 :
4509 fields->f_lab_32_8 = value;
4510 break;
4511 case M32C_OPERAND_LAB_40_8 :
4512 fields->f_lab_40_8 = value;
4513 break;
4514 case M32C_OPERAND_LAB_5_3 :
4515 fields->f_lab_5_3 = value;
4516 break;
4517 case M32C_OPERAND_LAB_8_16 :
4518 fields->f_lab_8_16 = value;
4519 break;
4520 case M32C_OPERAND_LAB_8_24 :
4521 fields->f_lab_8_24 = value;
4522 break;
4523 case M32C_OPERAND_LAB_8_8 :
4524 fields->f_lab_8_8 = value;
4525 break;
4526 case M32C_OPERAND_LAB32_JMP_S :
4527 fields->f_lab32_jmp_s = value;
4528 break;
4529 case M32C_OPERAND_Q :
4530 break;
4531 case M32C_OPERAND_R0 :
4532 break;
4533 case M32C_OPERAND_R0H :
4534 break;
4535 case M32C_OPERAND_R0L :
4536 break;
4537 case M32C_OPERAND_R1 :
4538 break;
4539 case M32C_OPERAND_R1R2R0 :
4540 break;
4541 case M32C_OPERAND_R2 :
4542 break;
4543 case M32C_OPERAND_R2R0 :
4544 break;
4545 case M32C_OPERAND_R3 :
4546 break;
4547 case M32C_OPERAND_R3R1 :
4548 break;
4549 case M32C_OPERAND_REGSETPOP :
4550 fields->f_8_8 = value;
4551 break;
4552 case M32C_OPERAND_REGSETPUSH :
4553 fields->f_8_8 = value;
4554 break;
4555 case M32C_OPERAND_RN16_PUSH_S :
4556 fields->f_4_1 = value;
4557 break;
4558 case M32C_OPERAND_S :
4559 break;
4560 case M32C_OPERAND_SRC16AN :
4561 fields->f_src16_an = value;
4562 break;
4563 case M32C_OPERAND_SRC16ANHI :
4564 fields->f_src16_an = value;
4565 break;
4566 case M32C_OPERAND_SRC16ANQI :
4567 fields->f_src16_an = value;
4568 break;
4569 case M32C_OPERAND_SRC16RNHI :
4570 fields->f_src16_rn = value;
4571 break;
4572 case M32C_OPERAND_SRC16RNQI :
4573 fields->f_src16_rn = value;
4574 break;
4575 case M32C_OPERAND_SRC32ANPREFIXED :
4576 fields->f_src32_an_prefixed = value;
4577 break;
4578 case M32C_OPERAND_SRC32ANPREFIXEDHI :
4579 fields->f_src32_an_prefixed = value;
4580 break;
4581 case M32C_OPERAND_SRC32ANPREFIXEDQI :
4582 fields->f_src32_an_prefixed = value;
4583 break;
4584 case M32C_OPERAND_SRC32ANPREFIXEDSI :
4585 fields->f_src32_an_prefixed = value;
4586 break;
4587 case M32C_OPERAND_SRC32ANUNPREFIXED :
4588 fields->f_src32_an_unprefixed = value;
4589 break;
4590 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
4591 fields->f_src32_an_unprefixed = value;
4592 break;
4593 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
4594 fields->f_src32_an_unprefixed = value;
4595 break;
4596 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
4597 fields->f_src32_an_unprefixed = value;
4598 break;
4599 case M32C_OPERAND_SRC32RNPREFIXEDHI :
4600 fields->f_src32_rn_prefixed_HI = value;
4601 break;
4602 case M32C_OPERAND_SRC32RNPREFIXEDQI :
4603 fields->f_src32_rn_prefixed_QI = value;
4604 break;
4605 case M32C_OPERAND_SRC32RNPREFIXEDSI :
4606 fields->f_src32_rn_prefixed_SI = value;
4607 break;
4608 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
4609 fields->f_src32_rn_unprefixed_HI = value;
4610 break;
4611 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
4612 fields->f_src32_rn_unprefixed_QI = value;
4613 break;
4614 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
4615 fields->f_src32_rn_unprefixed_SI = value;
4616 break;
4617 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
4618 fields->f_5_1 = value;
4619 break;
4620 case M32C_OPERAND_X :
4621 break;
4622 case M32C_OPERAND_Z :
4623 break;
4624 case M32C_OPERAND_COND16_16 :
4625 fields->f_dsp_16_u8 = value;
4626 break;
4627 case M32C_OPERAND_COND16_24 :
4628 fields->f_dsp_24_u8 = value;
4629 break;
4630 case M32C_OPERAND_COND16_32 :
4631 fields->f_dsp_32_u8 = value;
4632 break;
4633 case M32C_OPERAND_COND16C :
4634 fields->f_cond16 = value;
4635 break;
4636 case M32C_OPERAND_COND16J :
4637 fields->f_cond16 = value;
4638 break;
4639 case M32C_OPERAND_COND16J5 :
4640 fields->f_cond16j_5 = value;
4641 break;
4642 case M32C_OPERAND_COND32 :
4643 fields->f_cond32 = value;
4644 break;
4645 case M32C_OPERAND_COND32_16 :
4646 fields->f_dsp_16_u8 = value;
4647 break;
4648 case M32C_OPERAND_COND32_24 :
4649 fields->f_dsp_24_u8 = value;
4650 break;
4651 case M32C_OPERAND_COND32_32 :
4652 fields->f_dsp_32_u8 = value;
4653 break;
4654 case M32C_OPERAND_COND32_40 :
4655 fields->f_dsp_40_u8 = value;
4656 break;
4657 case M32C_OPERAND_COND32J :
4658 fields->f_cond32j = value;
4659 break;
4660 case M32C_OPERAND_CR1_PREFIXED_32 :
4661 fields->f_21_3 = value;
4662 break;
4663 case M32C_OPERAND_CR1_UNPREFIXED_32 :
4664 fields->f_13_3 = value;
4665 break;
4666 case M32C_OPERAND_CR16 :
4667 fields->f_9_3 = value;
4668 break;
4669 case M32C_OPERAND_CR2_32 :
4670 fields->f_13_3 = value;
4671 break;
4672 case M32C_OPERAND_CR3_PREFIXED_32 :
4673 fields->f_21_3 = value;
4674 break;
4675 case M32C_OPERAND_CR3_UNPREFIXED_32 :
4676 fields->f_13_3 = value;
4677 break;
4678 case M32C_OPERAND_FLAGS16 :
4679 fields->f_9_3 = value;
4680 break;
4681 case M32C_OPERAND_FLAGS32 :
4682 fields->f_13_3 = value;
4683 break;
4684 case M32C_OPERAND_SCCOND32 :
4685 fields->f_cond16 = value;
4686 break;
4687 case M32C_OPERAND_SIZE :
4688 break;
4689
4690 default :
4691 /* xgettext:c-format */
4692 fprintf (stderr, _("Unrecognized field %d while setting int operand.\n"),
4693 opindex);
4694 abort ();
4695 }
4696 }
4697
4698 void
4699 m32c_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
4700 int opindex,
4701 CGEN_FIELDS * fields,
4702 bfd_vma value)
4703 {
4704 switch (opindex)
4705 {
4706 case M32C_OPERAND_A0 :
4707 break;
4708 case M32C_OPERAND_A1 :
4709 break;
4710 case M32C_OPERAND_AN16_PUSH_S :
4711 fields->f_4_1 = value;
4712 break;
4713 case M32C_OPERAND_BIT16AN :
4714 fields->f_dst16_an = value;
4715 break;
4716 case M32C_OPERAND_BIT16RN :
4717 fields->f_dst16_rn = value;
4718 break;
4719 case M32C_OPERAND_BIT3_S :
4720 fields->f_imm3_S = value;
4721 break;
4722 case M32C_OPERAND_BIT32ANPREFIXED :
4723 fields->f_dst32_an_prefixed = value;
4724 break;
4725 case M32C_OPERAND_BIT32ANUNPREFIXED :
4726 fields->f_dst32_an_unprefixed = value;
4727 break;
4728 case M32C_OPERAND_BIT32RNPREFIXED :
4729 fields->f_dst32_rn_prefixed_QI = value;
4730 break;
4731 case M32C_OPERAND_BIT32RNUNPREFIXED :
4732 fields->f_dst32_rn_unprefixed_QI = value;
4733 break;
4734 case M32C_OPERAND_BITBASE16_16_S8 :
4735 fields->f_dsp_16_s8 = value;
4736 break;
4737 case M32C_OPERAND_BITBASE16_16_U16 :
4738 fields->f_dsp_16_u16 = value;
4739 break;
4740 case M32C_OPERAND_BITBASE16_16_U8 :
4741 fields->f_dsp_16_u8 = value;
4742 break;
4743 case M32C_OPERAND_BITBASE16_8_U11_S :
4744 fields->f_bitbase16_u11_S = value;
4745 break;
4746 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
4747 fields->f_bitbase32_16_s11_unprefixed = value;
4748 break;
4749 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
4750 fields->f_bitbase32_16_s19_unprefixed = value;
4751 break;
4752 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
4753 fields->f_bitbase32_16_u11_unprefixed = value;
4754 break;
4755 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
4756 fields->f_bitbase32_16_u19_unprefixed = value;
4757 break;
4758 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
4759 fields->f_bitbase32_16_u27_unprefixed = value;
4760 break;
4761 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
4762 fields->f_bitbase32_24_s11_prefixed = value;
4763 break;
4764 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
4765 fields->f_bitbase32_24_s19_prefixed = value;
4766 break;
4767 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
4768 fields->f_bitbase32_24_u11_prefixed = value;
4769 break;
4770 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
4771 fields->f_bitbase32_24_u19_prefixed = value;
4772 break;
4773 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
4774 fields->f_bitbase32_24_u27_prefixed = value;
4775 break;
4776 case M32C_OPERAND_BITNO16R :
4777 fields->f_dsp_16_u8 = value;
4778 break;
4779 case M32C_OPERAND_BITNO32PREFIXED :
4780 fields->f_bitno32_prefixed = value;
4781 break;
4782 case M32C_OPERAND_BITNO32UNPREFIXED :
4783 fields->f_bitno32_unprefixed = value;
4784 break;
4785 case M32C_OPERAND_DSP_10_U6 :
4786 fields->f_dsp_10_u6 = value;
4787 break;
4788 case M32C_OPERAND_DSP_16_S16 :
4789 fields->f_dsp_16_s16 = value;
4790 break;
4791 case M32C_OPERAND_DSP_16_S8 :
4792 fields->f_dsp_16_s8 = value;
4793 break;
4794 case M32C_OPERAND_DSP_16_U16 :
4795 fields->f_dsp_16_u16 = value;
4796 break;
4797 case M32C_OPERAND_DSP_16_U20 :
4798 fields->f_dsp_16_u24 = value;
4799 break;
4800 case M32C_OPERAND_DSP_16_U24 :
4801 fields->f_dsp_16_u24 = value;
4802 break;
4803 case M32C_OPERAND_DSP_16_U8 :
4804 fields->f_dsp_16_u8 = value;
4805 break;
4806 case M32C_OPERAND_DSP_24_S16 :
4807 fields->f_dsp_24_s16 = value;
4808 break;
4809 case M32C_OPERAND_DSP_24_S8 :
4810 fields->f_dsp_24_s8 = value;
4811 break;
4812 case M32C_OPERAND_DSP_24_U16 :
4813 fields->f_dsp_24_u16 = value;
4814 break;
4815 case M32C_OPERAND_DSP_24_U20 :
4816 fields->f_dsp_24_u24 = value;
4817 break;
4818 case M32C_OPERAND_DSP_24_U24 :
4819 fields->f_dsp_24_u24 = value;
4820 break;
4821 case M32C_OPERAND_DSP_24_U8 :
4822 fields->f_dsp_24_u8 = value;
4823 break;
4824 case M32C_OPERAND_DSP_32_S16 :
4825 fields->f_dsp_32_s16 = value;
4826 break;
4827 case M32C_OPERAND_DSP_32_S8 :
4828 fields->f_dsp_32_s8 = value;
4829 break;
4830 case M32C_OPERAND_DSP_32_U16 :
4831 fields->f_dsp_32_u16 = value;
4832 break;
4833 case M32C_OPERAND_DSP_32_U20 :
4834 fields->f_dsp_32_u24 = value;
4835 break;
4836 case M32C_OPERAND_DSP_32_U24 :
4837 fields->f_dsp_32_u24 = value;
4838 break;
4839 case M32C_OPERAND_DSP_32_U8 :
4840 fields->f_dsp_32_u8 = value;
4841 break;
4842 case M32C_OPERAND_DSP_40_S16 :
4843 fields->f_dsp_40_s16 = value;
4844 break;
4845 case M32C_OPERAND_DSP_40_S8 :
4846 fields->f_dsp_40_s8 = value;
4847 break;
4848 case M32C_OPERAND_DSP_40_U16 :
4849 fields->f_dsp_40_u16 = value;
4850 break;
4851 case M32C_OPERAND_DSP_40_U20 :
4852 fields->f_dsp_40_u20 = value;
4853 break;
4854 case M32C_OPERAND_DSP_40_U24 :
4855 fields->f_dsp_40_u24 = value;
4856 break;
4857 case M32C_OPERAND_DSP_40_U8 :
4858 fields->f_dsp_40_u8 = value;
4859 break;
4860 case M32C_OPERAND_DSP_48_S16 :
4861 fields->f_dsp_48_s16 = value;
4862 break;
4863 case M32C_OPERAND_DSP_48_S8 :
4864 fields->f_dsp_48_s8 = value;
4865 break;
4866 case M32C_OPERAND_DSP_48_U16 :
4867 fields->f_dsp_48_u16 = value;
4868 break;
4869 case M32C_OPERAND_DSP_48_U20 :
4870 fields->f_dsp_48_u20 = value;
4871 break;
4872 case M32C_OPERAND_DSP_48_U24 :
4873 fields->f_dsp_48_u24 = value;
4874 break;
4875 case M32C_OPERAND_DSP_48_U8 :
4876 fields->f_dsp_48_u8 = value;
4877 break;
4878 case M32C_OPERAND_DSP_8_S24 :
4879 fields->f_dsp_8_s24 = value;
4880 break;
4881 case M32C_OPERAND_DSP_8_S8 :
4882 fields->f_dsp_8_s8 = value;
4883 break;
4884 case M32C_OPERAND_DSP_8_U16 :
4885 fields->f_dsp_8_u16 = value;
4886 break;
4887 case M32C_OPERAND_DSP_8_U24 :
4888 fields->f_dsp_8_u24 = value;
4889 break;
4890 case M32C_OPERAND_DSP_8_U6 :
4891 fields->f_dsp_8_u6 = value;
4892 break;
4893 case M32C_OPERAND_DSP_8_U8 :
4894 fields->f_dsp_8_u8 = value;
4895 break;
4896 case M32C_OPERAND_DST16AN :
4897 fields->f_dst16_an = value;
4898 break;
4899 case M32C_OPERAND_DST16AN_S :
4900 fields->f_dst16_an_s = value;
4901 break;
4902 case M32C_OPERAND_DST16ANHI :
4903 fields->f_dst16_an = value;
4904 break;
4905 case M32C_OPERAND_DST16ANQI :
4906 fields->f_dst16_an = value;
4907 break;
4908 case M32C_OPERAND_DST16ANQI_S :
4909 fields->f_dst16_rn_QI_s = value;
4910 break;
4911 case M32C_OPERAND_DST16ANSI :
4912 fields->f_dst16_an = value;
4913 break;
4914 case M32C_OPERAND_DST16RNEXTQI :
4915 fields->f_dst16_rn_ext = value;
4916 break;
4917 case M32C_OPERAND_DST16RNHI :
4918 fields->f_dst16_rn = value;
4919 break;
4920 case M32C_OPERAND_DST16RNQI :
4921 fields->f_dst16_rn = value;
4922 break;
4923 case M32C_OPERAND_DST16RNQI_S :
4924 fields->f_dst16_rn_QI_s = value;
4925 break;
4926 case M32C_OPERAND_DST16RNSI :
4927 fields->f_dst16_rn = value;
4928 break;
4929 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
4930 fields->f_dst32_an_unprefixed = value;
4931 break;
4932 case M32C_OPERAND_DST32ANPREFIXED :
4933 fields->f_dst32_an_prefixed = value;
4934 break;
4935 case M32C_OPERAND_DST32ANPREFIXEDHI :
4936 fields->f_dst32_an_prefixed = value;
4937 break;
4938 case M32C_OPERAND_DST32ANPREFIXEDQI :
4939 fields->f_dst32_an_prefixed = value;
4940 break;
4941 case M32C_OPERAND_DST32ANPREFIXEDSI :
4942 fields->f_dst32_an_prefixed = value;
4943 break;
4944 case M32C_OPERAND_DST32ANUNPREFIXED :
4945 fields->f_dst32_an_unprefixed = value;
4946 break;
4947 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
4948 fields->f_dst32_an_unprefixed = value;
4949 break;
4950 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
4951 fields->f_dst32_an_unprefixed = value;
4952 break;
4953 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
4954 fields->f_dst32_an_unprefixed = value;
4955 break;
4956 case M32C_OPERAND_DST32R0HI_S :
4957 break;
4958 case M32C_OPERAND_DST32R0QI_S :
4959 break;
4960 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
4961 fields->f_dst32_rn_ext_unprefixed = value;
4962 break;
4963 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
4964 fields->f_dst32_rn_ext_unprefixed = value;
4965 break;
4966 case M32C_OPERAND_DST32RNPREFIXEDHI :
4967 fields->f_dst32_rn_prefixed_HI = value;
4968 break;
4969 case M32C_OPERAND_DST32RNPREFIXEDQI :
4970 fields->f_dst32_rn_prefixed_QI = value;
4971 break;
4972 case M32C_OPERAND_DST32RNPREFIXEDSI :
4973 fields->f_dst32_rn_prefixed_SI = value;
4974 break;
4975 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
4976 fields->f_dst32_rn_unprefixed_HI = value;
4977 break;
4978 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
4979 fields->f_dst32_rn_unprefixed_QI = value;
4980 break;
4981 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
4982 fields->f_dst32_rn_unprefixed_SI = value;
4983 break;
4984 case M32C_OPERAND_G :
4985 break;
4986 case M32C_OPERAND_IMM_12_S4 :
4987 fields->f_imm_12_s4 = value;
4988 break;
4989 case M32C_OPERAND_IMM_12_S4N :
4990 fields->f_imm_12_s4 = value;
4991 break;
4992 case M32C_OPERAND_IMM_13_U3 :
4993 fields->f_imm_13_u3 = value;
4994 break;
4995 case M32C_OPERAND_IMM_16_HI :
4996 fields->f_dsp_16_s16 = value;
4997 break;
4998 case M32C_OPERAND_IMM_16_QI :
4999 fields->f_dsp_16_s8 = value;
5000 break;
5001 case M32C_OPERAND_IMM_16_SI :
5002 fields->f_dsp_16_s32 = value;
5003 break;
5004 case M32C_OPERAND_IMM_20_S4 :
5005 fields->f_imm_20_s4 = value;
5006 break;
5007 case M32C_OPERAND_IMM_24_HI :
5008 fields->f_dsp_24_s16 = value;
5009 break;
5010 case M32C_OPERAND_IMM_24_QI :
5011 fields->f_dsp_24_s8 = value;
5012 break;
5013 case M32C_OPERAND_IMM_24_SI :
5014 fields->f_dsp_24_s32 = value;
5015 break;
5016 case M32C_OPERAND_IMM_32_HI :
5017 fields->f_dsp_32_s16 = value;
5018 break;
5019 case M32C_OPERAND_IMM_32_QI :
5020 fields->f_dsp_32_s8 = value;
5021 break;
5022 case M32C_OPERAND_IMM_32_SI :
5023 fields->f_dsp_32_s32 = value;
5024 break;
5025 case M32C_OPERAND_IMM_40_HI :
5026 fields->f_dsp_40_s16 = value;
5027 break;
5028 case M32C_OPERAND_IMM_40_QI :
5029 fields->f_dsp_40_s8 = value;
5030 break;
5031 case M32C_OPERAND_IMM_40_SI :
5032 fields->f_dsp_40_s32 = value;
5033 break;
5034 case M32C_OPERAND_IMM_48_HI :
5035 fields->f_dsp_48_s16 = value;
5036 break;
5037 case M32C_OPERAND_IMM_48_QI :
5038 fields->f_dsp_48_s8 = value;
5039 break;
5040 case M32C_OPERAND_IMM_48_SI :
5041 fields->f_dsp_48_s32 = value;
5042 break;
5043 case M32C_OPERAND_IMM_56_HI :
5044 fields->f_dsp_56_s16 = value;
5045 break;
5046 case M32C_OPERAND_IMM_56_QI :
5047 fields->f_dsp_56_s8 = value;
5048 break;
5049 case M32C_OPERAND_IMM_64_HI :
5050 fields->f_dsp_64_s16 = value;
5051 break;
5052 case M32C_OPERAND_IMM_8_HI :
5053 fields->f_dsp_8_s16 = value;
5054 break;
5055 case M32C_OPERAND_IMM_8_QI :
5056 fields->f_dsp_8_s8 = value;
5057 break;
5058 case M32C_OPERAND_IMM_8_S4 :
5059 fields->f_imm_8_s4 = value;
5060 break;
5061 case M32C_OPERAND_IMM_8_S4N :
5062 fields->f_imm_8_s4 = value;
5063 break;
5064 case M32C_OPERAND_IMM_SH_12_S4 :
5065 fields->f_imm_12_s4 = value;
5066 break;
5067 case M32C_OPERAND_IMM_SH_20_S4 :
5068 fields->f_imm_20_s4 = value;
5069 break;
5070 case M32C_OPERAND_IMM_SH_8_S4 :
5071 fields->f_imm_8_s4 = value;
5072 break;
5073 case M32C_OPERAND_IMM1_S :
5074 fields->f_imm1_S = value;
5075 break;
5076 case M32C_OPERAND_IMM3_S :
5077 fields->f_imm3_S = value;
5078 break;
5079 case M32C_OPERAND_LAB_16_8 :
5080 fields->f_lab_16_8 = value;
5081 break;
5082 case M32C_OPERAND_LAB_24_8 :
5083 fields->f_lab_24_8 = value;
5084 break;
5085 case M32C_OPERAND_LAB_32_8 :
5086 fields->f_lab_32_8 = value;
5087 break;
5088 case M32C_OPERAND_LAB_40_8 :
5089 fields->f_lab_40_8 = value;
5090 break;
5091 case M32C_OPERAND_LAB_5_3 :
5092 fields->f_lab_5_3 = value;
5093 break;
5094 case M32C_OPERAND_LAB_8_16 :
5095 fields->f_lab_8_16 = value;
5096 break;
5097 case M32C_OPERAND_LAB_8_24 :
5098 fields->f_lab_8_24 = value;
5099 break;
5100 case M32C_OPERAND_LAB_8_8 :
5101 fields->f_lab_8_8 = value;
5102 break;
5103 case M32C_OPERAND_LAB32_JMP_S :
5104 fields->f_lab32_jmp_s = value;
5105 break;
5106 case M32C_OPERAND_Q :
5107 break;
5108 case M32C_OPERAND_R0 :
5109 break;
5110 case M32C_OPERAND_R0H :
5111 break;
5112 case M32C_OPERAND_R0L :
5113 break;
5114 case M32C_OPERAND_R1 :
5115 break;
5116 case M32C_OPERAND_R1R2R0 :
5117 break;
5118 case M32C_OPERAND_R2 :
5119 break;
5120 case M32C_OPERAND_R2R0 :
5121 break;
5122 case M32C_OPERAND_R3 :
5123 break;
5124 case M32C_OPERAND_R3R1 :
5125 break;
5126 case M32C_OPERAND_REGSETPOP :
5127 fields->f_8_8 = value;
5128 break;
5129 case M32C_OPERAND_REGSETPUSH :
5130 fields->f_8_8 = value;
5131 break;
5132 case M32C_OPERAND_RN16_PUSH_S :
5133 fields->f_4_1 = value;
5134 break;
5135 case M32C_OPERAND_S :
5136 break;
5137 case M32C_OPERAND_SRC16AN :
5138 fields->f_src16_an = value;
5139 break;
5140 case M32C_OPERAND_SRC16ANHI :
5141 fields->f_src16_an = value;
5142 break;
5143 case M32C_OPERAND_SRC16ANQI :
5144 fields->f_src16_an = value;
5145 break;
5146 case M32C_OPERAND_SRC16RNHI :
5147 fields->f_src16_rn = value;
5148 break;
5149 case M32C_OPERAND_SRC16RNQI :
5150 fields->f_src16_rn = value;
5151 break;
5152 case M32C_OPERAND_SRC32ANPREFIXED :
5153 fields->f_src32_an_prefixed = value;
5154 break;
5155 case M32C_OPERAND_SRC32ANPREFIXEDHI :
5156 fields->f_src32_an_prefixed = value;
5157 break;
5158 case M32C_OPERAND_SRC32ANPREFIXEDQI :
5159 fields->f_src32_an_prefixed = value;
5160 break;
5161 case M32C_OPERAND_SRC32ANPREFIXEDSI :
5162 fields->f_src32_an_prefixed = value;
5163 break;
5164 case M32C_OPERAND_SRC32ANUNPREFIXED :
5165 fields->f_src32_an_unprefixed = value;
5166 break;
5167 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
5168 fields->f_src32_an_unprefixed = value;
5169 break;
5170 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
5171 fields->f_src32_an_unprefixed = value;
5172 break;
5173 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
5174 fields->f_src32_an_unprefixed = value;
5175 break;
5176 case M32C_OPERAND_SRC32RNPREFIXEDHI :
5177 fields->f_src32_rn_prefixed_HI = value;
5178 break;
5179 case M32C_OPERAND_SRC32RNPREFIXEDQI :
5180 fields->f_src32_rn_prefixed_QI = value;
5181 break;
5182 case M32C_OPERAND_SRC32RNPREFIXEDSI :
5183 fields->f_src32_rn_prefixed_SI = value;
5184 break;
5185 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
5186 fields->f_src32_rn_unprefixed_HI = value;
5187 break;
5188 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
5189 fields->f_src32_rn_unprefixed_QI = value;
5190 break;
5191 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
5192 fields->f_src32_rn_unprefixed_SI = value;
5193 break;
5194 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
5195 fields->f_5_1 = value;
5196 break;
5197 case M32C_OPERAND_X :
5198 break;
5199 case M32C_OPERAND_Z :
5200 break;
5201 case M32C_OPERAND_COND16_16 :
5202 fields->f_dsp_16_u8 = value;
5203 break;
5204 case M32C_OPERAND_COND16_24 :
5205 fields->f_dsp_24_u8 = value;
5206 break;
5207 case M32C_OPERAND_COND16_32 :
5208 fields->f_dsp_32_u8 = value;
5209 break;
5210 case M32C_OPERAND_COND16C :
5211 fields->f_cond16 = value;
5212 break;
5213 case M32C_OPERAND_COND16J :
5214 fields->f_cond16 = value;
5215 break;
5216 case M32C_OPERAND_COND16J5 :
5217 fields->f_cond16j_5 = value;
5218 break;
5219 case M32C_OPERAND_COND32 :
5220 fields->f_cond32 = value;
5221 break;
5222 case M32C_OPERAND_COND32_16 :
5223 fields->f_dsp_16_u8 = value;
5224 break;
5225 case M32C_OPERAND_COND32_24 :
5226 fields->f_dsp_24_u8 = value;
5227 break;
5228 case M32C_OPERAND_COND32_32 :
5229 fields->f_dsp_32_u8 = value;
5230 break;
5231 case M32C_OPERAND_COND32_40 :
5232 fields->f_dsp_40_u8 = value;
5233 break;
5234 case M32C_OPERAND_COND32J :
5235 fields->f_cond32j = value;
5236 break;
5237 case M32C_OPERAND_CR1_PREFIXED_32 :
5238 fields->f_21_3 = value;
5239 break;
5240 case M32C_OPERAND_CR1_UNPREFIXED_32 :
5241 fields->f_13_3 = value;
5242 break;
5243 case M32C_OPERAND_CR16 :
5244 fields->f_9_3 = value;
5245 break;
5246 case M32C_OPERAND_CR2_32 :
5247 fields->f_13_3 = value;
5248 break;
5249 case M32C_OPERAND_CR3_PREFIXED_32 :
5250 fields->f_21_3 = value;
5251 break;
5252 case M32C_OPERAND_CR3_UNPREFIXED_32 :
5253 fields->f_13_3 = value;
5254 break;
5255 case M32C_OPERAND_FLAGS16 :
5256 fields->f_9_3 = value;
5257 break;
5258 case M32C_OPERAND_FLAGS32 :
5259 fields->f_13_3 = value;
5260 break;
5261 case M32C_OPERAND_SCCOND32 :
5262 fields->f_cond16 = value;
5263 break;
5264 case M32C_OPERAND_SIZE :
5265 break;
5266
5267 default :
5268 /* xgettext:c-format */
5269 fprintf (stderr, _("Unrecognized field %d while setting vma operand.\n"),
5270 opindex);
5271 abort ();
5272 }
5273 }
5274
5275 /* Function to call before using the instruction builder tables. */
5276
5277 void
5278 m32c_cgen_init_ibld_table (CGEN_CPU_DESC cd)
5279 {
5280 cd->insert_handlers = & m32c_cgen_insert_handlers[0];
5281 cd->extract_handlers = & m32c_cgen_extract_handlers[0];
5282
5283 cd->insert_operand = m32c_cgen_insert_operand;
5284 cd->extract_operand = m32c_cgen_extract_operand;
5285
5286 cd->get_int_operand = m32c_cgen_get_int_operand;
5287 cd->set_int_operand = m32c_cgen_set_int_operand;
5288 cd->get_vma_operand = m32c_cgen_get_vma_operand;
5289 cd->set_vma_operand = m32c_cgen_set_vma_operand;
5290 }
Patches to binutils for mingw-w64