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[binutils/dougsmingw.git] / gas / config / tc-alpha.c
blob45144af74e94ec4f081d03054960cd9afec7e405
1 /* tc-alpha.c - Processor-specific code for the DEC Alpha AXP CPU.
2 Copyright 1989, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
3 2001, 2002, 2003, 2004, 2005, 2007, 2008, 2009
4 Free Software Foundation, Inc.
5 Contributed by Carnegie Mellon University, 1993.
6 Written by Alessandro Forin, based on earlier gas-1.38 target CPU files.
7 Modified by Ken Raeburn for gas-2.x and ECOFF support.
8 Modified by Richard Henderson for ELF support.
9 Modified by Klaus K"ampf for EVAX (OpenVMS/Alpha) support.
10
11 This file is part of GAS, the GNU Assembler.
12
13 GAS is free software; you can redistribute it and/or modify
14 it under the terms of the GNU General Public License as published by
15 the Free Software Foundation; either version 3, or (at your option)
16 any later version.
17
18 GAS is distributed in the hope that it will be useful,
19 but WITHOUT ANY WARRANTY; without even the implied warranty of
20 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 GNU General Public License for more details.
22
23 You should have received a copy of the GNU General Public License
24 along with GAS; see the file COPYING. If not, write to the Free
25 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
26 02110-1301, USA. */
27
28 /* Mach Operating System
29 Copyright (c) 1993 Carnegie Mellon University
30 All Rights Reserved.
31
32 Permission to use, copy, modify and distribute this software and its
33 documentation is hereby granted, provided that both the copyright
34 notice and this permission notice appear in all copies of the
35 software, derivative works or modified versions, and any portions
36 thereof, and that both notices appear in supporting documentation.
37
38 CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS
39 CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
40 ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
41
42 Carnegie Mellon requests users of this software to return to
43
44 Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
45 School of Computer Science
46 Carnegie Mellon University
47 Pittsburgh PA 15213-3890
48
49 any improvements or extensions that they make and grant Carnegie the
50 rights to redistribute these changes. */
51
52 #include "as.h"
53 #include "subsegs.h"
54 #include "struc-symbol.h"
55 #include "ecoff.h"
56
57 #include "opcode/alpha.h"
58
59 #ifdef OBJ_ELF
60 #include "elf/alpha.h"
61 #endif
62
63 #ifdef OBJ_EVAX
64 #include "vms.h"
65 #endif
66
67 #include "dwarf2dbg.h"
68 #include "dw2gencfi.h"
69 #include "safe-ctype.h"
70 \f
71 /* Local types. */
72
73 #define TOKENIZE_ERROR -1
74 #define TOKENIZE_ERROR_REPORT -2
75 #define MAX_INSN_FIXUPS 2
76 #define MAX_INSN_ARGS 5
77
78 /* Used since new relocation types are introduced in this
79 file (DUMMY_RELOC_LITUSE_*) */
80 typedef int extended_bfd_reloc_code_real_type;
81
82 struct alpha_fixup
83 {
84 expressionS exp;
85 /* bfd_reloc_code_real_type reloc; */
86 extended_bfd_reloc_code_real_type reloc;
87 #ifdef OBJ_EVAX
88 symbolS *xtrasym, *procsym;
89 #endif
90 };
91
92 struct alpha_insn
93 {
94 unsigned insn;
95 int nfixups;
96 struct alpha_fixup fixups[MAX_INSN_FIXUPS];
97 long sequence;
98 };
99
100 enum alpha_macro_arg
101 {
102 MACRO_EOA = 1,
103 MACRO_IR,
104 MACRO_PIR,
105 MACRO_OPIR,
106 MACRO_CPIR,
107 MACRO_FPR,
108 MACRO_EXP
109 };
110
111 struct alpha_macro
112 {
113 const char *name;
114 void (*emit) (const expressionS *, int, const void *);
115 const void * arg;
116 enum alpha_macro_arg argsets[16];
117 };
118
119 /* Extra expression types. */
120
121 #define O_pregister O_md1 /* O_register, in parentheses. */
122 #define O_cpregister O_md2 /* + a leading comma. */
123
124 /* The alpha_reloc_op table below depends on the ordering of these. */
125 #define O_literal O_md3 /* !literal relocation. */
126 #define O_lituse_addr O_md4 /* !lituse_addr relocation. */
127 #define O_lituse_base O_md5 /* !lituse_base relocation. */
128 #define O_lituse_bytoff O_md6 /* !lituse_bytoff relocation. */
129 #define O_lituse_jsr O_md7 /* !lituse_jsr relocation. */
130 #define O_lituse_tlsgd O_md8 /* !lituse_tlsgd relocation. */
131 #define O_lituse_tlsldm O_md9 /* !lituse_tlsldm relocation. */
132 #define O_lituse_jsrdirect O_md10 /* !lituse_jsrdirect relocation. */
133 #define O_gpdisp O_md11 /* !gpdisp relocation. */
134 #define O_gprelhigh O_md12 /* !gprelhigh relocation. */
135 #define O_gprellow O_md13 /* !gprellow relocation. */
136 #define O_gprel O_md14 /* !gprel relocation. */
137 #define O_samegp O_md15 /* !samegp relocation. */
138 #define O_tlsgd O_md16 /* !tlsgd relocation. */
139 #define O_tlsldm O_md17 /* !tlsldm relocation. */
140 #define O_gotdtprel O_md18 /* !gotdtprel relocation. */
141 #define O_dtprelhi O_md19 /* !dtprelhi relocation. */
142 #define O_dtprello O_md20 /* !dtprello relocation. */
143 #define O_dtprel O_md21 /* !dtprel relocation. */
144 #define O_gottprel O_md22 /* !gottprel relocation. */
145 #define O_tprelhi O_md23 /* !tprelhi relocation. */
146 #define O_tprello O_md24 /* !tprello relocation. */
147 #define O_tprel O_md25 /* !tprel relocation. */
148
149 #define DUMMY_RELOC_LITUSE_ADDR (BFD_RELOC_UNUSED + 1)
150 #define DUMMY_RELOC_LITUSE_BASE (BFD_RELOC_UNUSED + 2)
151 #define DUMMY_RELOC_LITUSE_BYTOFF (BFD_RELOC_UNUSED + 3)
152 #define DUMMY_RELOC_LITUSE_JSR (BFD_RELOC_UNUSED + 4)
153 #define DUMMY_RELOC_LITUSE_TLSGD (BFD_RELOC_UNUSED + 5)
154 #define DUMMY_RELOC_LITUSE_TLSLDM (BFD_RELOC_UNUSED + 6)
155 #define DUMMY_RELOC_LITUSE_JSRDIRECT (BFD_RELOC_UNUSED + 7)
156
157 #define USER_RELOC_P(R) ((R) >= O_literal && (R) <= O_tprel)
158
159 /* Macros for extracting the type and number of encoded register tokens. */
160
161 #define is_ir_num(x) (((x) & 32) == 0)
162 #define is_fpr_num(x) (((x) & 32) != 0)
163 #define regno(x) ((x) & 31)
164
165 /* Something odd inherited from the old assembler. */
166
167 #define note_gpreg(R) (alpha_gprmask |= (1 << (R)))
168 #define note_fpreg(R) (alpha_fprmask |= (1 << (R)))
169
170 /* Predicates for 16- and 32-bit ranges */
171 /* XXX: The non-shift version appears to trigger a compiler bug when
172 cross-assembling from x86 w/ gcc 2.7.2. */
173
174 #if 1
175 #define range_signed_16(x) \
176 (((offsetT) (x) >> 15) == 0 || ((offsetT) (x) >> 15) == -1)
177 #define range_signed_32(x) \
178 (((offsetT) (x) >> 31) == 0 || ((offsetT) (x) >> 31) == -1)
179 #else
180 #define range_signed_16(x) ((offsetT) (x) >= -(offsetT) 0x8000 && \
181 (offsetT) (x) <= (offsetT) 0x7FFF)
182 #define range_signed_32(x) ((offsetT) (x) >= -(offsetT) 0x80000000 && \
183 (offsetT) (x) <= (offsetT) 0x7FFFFFFF)
184 #endif
185
186 /* Macros for sign extending from 16- and 32-bits. */
187 /* XXX: The cast macros will work on all the systems that I care about,
188 but really a predicate should be found to use the non-cast forms. */
189
190 #if 1
191 #define sign_extend_16(x) ((short) (x))
192 #define sign_extend_32(x) ((int) (x))
193 #else
194 #define sign_extend_16(x) ((offsetT) (((x) & 0xFFFF) ^ 0x8000) - 0x8000)
195 #define sign_extend_32(x) ((offsetT) (((x) & 0xFFFFFFFF) \
196 ^ 0x80000000) - 0x80000000)
197 #endif
198
199 /* Macros to build tokens. */
200
201 #define set_tok_reg(t, r) (memset (&(t), 0, sizeof (t)), \
202 (t).X_op = O_register, \
203 (t).X_add_number = (r))
204 #define set_tok_preg(t, r) (memset (&(t), 0, sizeof (t)), \
205 (t).X_op = O_pregister, \
206 (t).X_add_number = (r))
207 #define set_tok_cpreg(t, r) (memset (&(t), 0, sizeof (t)), \
208 (t).X_op = O_cpregister, \
209 (t).X_add_number = (r))
210 #define set_tok_freg(t, r) (memset (&(t), 0, sizeof (t)), \
211 (t).X_op = O_register, \
212 (t).X_add_number = (r) + 32)
213 #define set_tok_sym(t, s, a) (memset (&(t), 0, sizeof (t)), \
214 (t).X_op = O_symbol, \
215 (t).X_add_symbol = (s), \
216 (t).X_add_number = (a))
217 #define set_tok_const(t, n) (memset (&(t), 0, sizeof (t)), \
218 (t).X_op = O_constant, \
219 (t).X_add_number = (n))
220 \f
221 /* Generic assembler global variables which must be defined by all
222 targets. */
223
224 /* Characters which always start a comment. */
225 const char comment_chars[] = "#";
226
227 /* Characters which start a comment at the beginning of a line. */
228 const char line_comment_chars[] = "#";
229
230 /* Characters which may be used to separate multiple commands on a
231 single line. */
232 const char line_separator_chars[] = ";";
233
234 /* Characters which are used to indicate an exponent in a floating
235 point number. */
236 const char EXP_CHARS[] = "eE";
237
238 /* Characters which mean that a number is a floating point constant,
239 as in 0d1.0. */
240 /* XXX: Do all of these really get used on the alpha?? */
241 char FLT_CHARS[] = "rRsSfFdDxXpP";
242
243 #ifdef OBJ_EVAX
244 const char *md_shortopts = "Fm:g+1h:HG:";
245 #else
246 const char *md_shortopts = "Fm:gG:";
247 #endif
248
249 struct option md_longopts[] =
250 {
251 #define OPTION_32ADDR (OPTION_MD_BASE)
252 { "32addr", no_argument, NULL, OPTION_32ADDR },
253 #define OPTION_RELAX (OPTION_32ADDR + 1)
254 { "relax", no_argument, NULL, OPTION_RELAX },
255 #ifdef OBJ_ELF
256 #define OPTION_MDEBUG (OPTION_RELAX + 1)
257 #define OPTION_NO_MDEBUG (OPTION_MDEBUG + 1)
258 { "mdebug", no_argument, NULL, OPTION_MDEBUG },
259 { "no-mdebug", no_argument, NULL, OPTION_NO_MDEBUG },
260 #endif
261 #ifdef OBJ_EVAX
262 #define OPTION_REPLACE (OPTION_RELAX + 1)
263 #define OPTION_NOREPLACE (OPTION_REPLACE+1)
264 { "replace", no_argument, NULL, OPTION_REPLACE },
265 { "noreplace", no_argument, NULL, OPTION_NOREPLACE },
266 #endif
267 { NULL, no_argument, NULL, 0 }
268 };
269
270 size_t md_longopts_size = sizeof (md_longopts);
271 \f
272 #ifdef OBJ_EVAX
273 #define AXP_REG_R0 0
274 #define AXP_REG_R16 16
275 #define AXP_REG_R17 17
276 #undef AXP_REG_T9
277 #define AXP_REG_T9 22
278 #undef AXP_REG_T10
279 #define AXP_REG_T10 23
280 #undef AXP_REG_T11
281 #define AXP_REG_T11 24
282 #undef AXP_REG_T12
283 #define AXP_REG_T12 25
284 #define AXP_REG_AI 25
285 #undef AXP_REG_FP
286 #define AXP_REG_FP 29
287
288 #undef AXP_REG_GP
289 #define AXP_REG_GP AXP_REG_PV
290
291 static struct hash_control *alpha_evax_proc_hash;
292
293 #endif /* OBJ_EVAX */
294
295 /* The cpu for which we are generating code. */
296 static unsigned alpha_target = AXP_OPCODE_BASE;
297 static const char *alpha_target_name = "<all>";
298
299 /* The hash table of instruction opcodes. */
300 static struct hash_control *alpha_opcode_hash;
301
302 /* The hash table of macro opcodes. */
303 static struct hash_control *alpha_macro_hash;
304
305 #ifdef OBJ_ECOFF
306 /* The $gp relocation symbol. */
307 static symbolS *alpha_gp_symbol;
308
309 /* XXX: what is this, and why is it exported? */
310 valueT alpha_gp_value;
311 #endif
312
313 /* The current $gp register. */
314 static int alpha_gp_register = AXP_REG_GP;
315
316 /* A table of the register symbols. */
317 static symbolS *alpha_register_table[64];
318
319 /* Constant sections, or sections of constants. */
320 #ifdef OBJ_ECOFF
321 static segT alpha_lita_section;
322 #endif
323 #ifdef OBJ_EVAX
324 segT alpha_link_section;
325 #endif
326 #ifndef OBJ_EVAX
327 static segT alpha_lit8_section;
328 #endif
329
330 /* Symbols referring to said sections. */
331 #ifdef OBJ_ECOFF
332 static symbolS *alpha_lita_symbol;
333 #endif
334 #ifdef OBJ_EVAX
335 static symbolS *alpha_link_symbol;
336 #endif
337 #ifndef OBJ_EVAX
338 static symbolS *alpha_lit8_symbol;
339 #endif
340
341 /* Literal for .litX+0x8000 within .lita. */
342 #ifdef OBJ_ECOFF
343 static offsetT alpha_lit8_literal;
344 #endif
345
346 /* Is the assembler not allowed to use $at? */
347 static int alpha_noat_on = 0;
348
349 /* Are macros enabled? */
350 static int alpha_macros_on = 1;
351
352 /* Are floats disabled? */
353 static int alpha_nofloats_on = 0;
354
355 /* Are addresses 32 bit? */
356 static int alpha_addr32_on = 0;
357
358 /* Symbol labelling the current insn. When the Alpha gas sees
359 foo:
360 .quad 0
361 and the section happens to not be on an eight byte boundary, it
362 will align both the symbol and the .quad to an eight byte boundary. */
363 static symbolS *alpha_insn_label;
364 #if defined(OBJ_ELF) || defined (OBJ_EVAX)
365 static symbolS *alpha_prologue_label;
366 #endif
367
368 #ifdef OBJ_EVAX
369 /* Symbol associate with the current jsr instruction. */
370 static symbolS *alpha_linkage_symbol;
371 #endif
372
373 /* Whether we should automatically align data generation pseudo-ops.
374 .align 0 will turn this off. */
375 static int alpha_auto_align_on = 1;
376
377 /* The known current alignment of the current section. */
378 static int alpha_current_align;
379
380 /* These are exported to ECOFF code. */
381 unsigned long alpha_gprmask, alpha_fprmask;
382
383 /* Whether the debugging option was seen. */
384 static int alpha_debug;
385
386 #ifdef OBJ_ELF
387 /* Whether we are emitting an mdebug section. */
388 int alpha_flag_mdebug = -1;
389 #endif
390
391 #ifdef OBJ_EVAX
392 /* Whether to perform the VMS procedure call optimization. */
393 int alpha_flag_replace = 1;
394 #endif
395
396 /* Don't fully resolve relocations, allowing code movement in the linker. */
397 static int alpha_flag_relax;
398
399 /* What value to give to bfd_set_gp_size. */
400 static int g_switch_value = 8;
401
402 #ifdef OBJ_EVAX
403 /* Collect information about current procedure here. */
404 struct alpha_evax_procs
405 {
406 symbolS *symbol; /* Proc pdesc symbol. */
407 int pdsckind;
408 int framereg; /* Register for frame pointer. */
409 int framesize; /* Size of frame. */
410 int rsa_offset;
411 int ra_save;
412 int fp_save;
413 long imask;
414 long fmask;
415 int type;
416 int prologue;
417 symbolS *handler;
418 int handler_data;
419 };
420
421 struct alpha_linkage_fixups *alpha_linkage_fixup_root;
422 static struct alpha_linkage_fixups *alpha_linkage_fixup_tail;
423
424 static struct alpha_evax_procs *alpha_evax_proc;
425
426 static int alpha_flag_hash_long_names = 0; /* -+ */
427 static int alpha_flag_show_after_trunc = 0; /* -H */
428
429 /* If the -+ switch is given, then a hash is appended to any name that is
430 longer than 64 characters, else longer symbol names are truncated. */
431
432 #endif
433 \f
434 #ifdef RELOC_OP_P
435 /* A table to map the spelling of a relocation operand into an appropriate
436 bfd_reloc_code_real_type type. The table is assumed to be ordered such
437 that op-O_literal indexes into it. */
438
439 #define ALPHA_RELOC_TABLE(op) \
440 (&alpha_reloc_op[ ((!USER_RELOC_P (op)) \
441 ? (abort (), 0) \
442 : (int) (op) - (int) O_literal) ])
443
444 #define DEF(NAME, RELOC, REQ, ALLOW) \
445 { #NAME, sizeof(#NAME)-1, O_##NAME, RELOC, REQ, ALLOW}
446
447 static const struct alpha_reloc_op_tag
448 {
449 const char *name; /* String to lookup. */
450 size_t length; /* Size of the string. */
451 operatorT op; /* Which operator to use. */
452 extended_bfd_reloc_code_real_type reloc;
453 unsigned int require_seq : 1; /* Require a sequence number. */
454 unsigned int allow_seq : 1; /* Allow a sequence number. */
455 }
456 alpha_reloc_op[] =
457 {
458 DEF (literal, BFD_RELOC_ALPHA_ELF_LITERAL, 0, 1),
459 DEF (lituse_addr, DUMMY_RELOC_LITUSE_ADDR, 1, 1),
460 DEF (lituse_base, DUMMY_RELOC_LITUSE_BASE, 1, 1),
461 DEF (lituse_bytoff, DUMMY_RELOC_LITUSE_BYTOFF, 1, 1),
462 DEF (lituse_jsr, DUMMY_RELOC_LITUSE_JSR, 1, 1),
463 DEF (lituse_tlsgd, DUMMY_RELOC_LITUSE_TLSGD, 1, 1),
464 DEF (lituse_tlsldm, DUMMY_RELOC_LITUSE_TLSLDM, 1, 1),
465 DEF (lituse_jsrdirect, DUMMY_RELOC_LITUSE_JSRDIRECT, 1, 1),
466 DEF (gpdisp, BFD_RELOC_ALPHA_GPDISP, 1, 1),
467 DEF (gprelhigh, BFD_RELOC_ALPHA_GPREL_HI16, 0, 0),
468 DEF (gprellow, BFD_RELOC_ALPHA_GPREL_LO16, 0, 0),
469 DEF (gprel, BFD_RELOC_GPREL16, 0, 0),
470 DEF (samegp, BFD_RELOC_ALPHA_BRSGP, 0, 0),
471 DEF (tlsgd, BFD_RELOC_ALPHA_TLSGD, 0, 1),
472 DEF (tlsldm, BFD_RELOC_ALPHA_TLSLDM, 0, 1),
473 DEF (gotdtprel, BFD_RELOC_ALPHA_GOTDTPREL16, 0, 0),
474 DEF (dtprelhi, BFD_RELOC_ALPHA_DTPREL_HI16, 0, 0),
475 DEF (dtprello, BFD_RELOC_ALPHA_DTPREL_LO16, 0, 0),
476 DEF (dtprel, BFD_RELOC_ALPHA_DTPREL16, 0, 0),
477 DEF (gottprel, BFD_RELOC_ALPHA_GOTTPREL16, 0, 0),
478 DEF (tprelhi, BFD_RELOC_ALPHA_TPREL_HI16, 0, 0),
479 DEF (tprello, BFD_RELOC_ALPHA_TPREL_LO16, 0, 0),
480 DEF (tprel, BFD_RELOC_ALPHA_TPREL16, 0, 0),
481 };
482
483 #undef DEF
484
485 static const int alpha_num_reloc_op
486 = sizeof (alpha_reloc_op) / sizeof (*alpha_reloc_op);
487 #endif /* RELOC_OP_P */
488
489 /* Maximum # digits needed to hold the largest sequence #. */
490 #define ALPHA_RELOC_DIGITS 25
491
492 /* Structure to hold explicit sequence information. */
493 struct alpha_reloc_tag
494 {
495 fixS *master; /* The literal reloc. */
496 #ifdef OBJ_EVAX
497 struct symbol *sym;
498 struct symbol *psym;
499 #endif
500 fixS *slaves; /* Head of linked list of lituses. */
501 segT segment; /* Segment relocs are in or undefined_section. */
502 long sequence; /* Sequence #. */
503 unsigned n_master; /* # of literals. */
504 unsigned n_slaves; /* # of lituses. */
505 unsigned saw_tlsgd : 1; /* True if ... */
506 unsigned saw_tlsldm : 1;
507 unsigned saw_lu_tlsgd : 1;
508 unsigned saw_lu_tlsldm : 1;
509 unsigned multi_section_p : 1; /* True if more than one section was used. */
510 char string[1]; /* Printable form of sequence to hash with. */
511 };
512
513 /* Hash table to link up literals with the appropriate lituse. */
514 static struct hash_control *alpha_literal_hash;
515
516 /* Sequence numbers for internal use by macros. */
517 static long next_sequence_num = -1;
518 \f
519 /* A table of CPU names and opcode sets. */
520
521 static const struct cpu_type
522 {
523 const char *name;
524 unsigned flags;
525 }
526 cpu_types[] =
527 {
528 /* Ad hoc convention: cpu number gets palcode, process code doesn't.
529 This supports usage under DU 4.0b that does ".arch ev4", and
530 usage in MILO that does -m21064. Probably something more
531 specific like -m21064-pal should be used, but oh well. */
532
533 { "21064", AXP_OPCODE_BASE|AXP_OPCODE_EV4 },
534 { "21064a", AXP_OPCODE_BASE|AXP_OPCODE_EV4 },
535 { "21066", AXP_OPCODE_BASE|AXP_OPCODE_EV4 },
536 { "21068", AXP_OPCODE_BASE|AXP_OPCODE_EV4 },
537 { "21164", AXP_OPCODE_BASE|AXP_OPCODE_EV5 },
538 { "21164a", AXP_OPCODE_BASE|AXP_OPCODE_EV5|AXP_OPCODE_BWX },
539 { "21164pc", (AXP_OPCODE_BASE|AXP_OPCODE_EV5|AXP_OPCODE_BWX
540 |AXP_OPCODE_MAX) },
541 { "21264", (AXP_OPCODE_BASE|AXP_OPCODE_EV6|AXP_OPCODE_BWX
542 |AXP_OPCODE_MAX|AXP_OPCODE_CIX) },
543 { "21264a", (AXP_OPCODE_BASE|AXP_OPCODE_EV6|AXP_OPCODE_BWX
544 |AXP_OPCODE_MAX|AXP_OPCODE_CIX) },
545 { "21264b", (AXP_OPCODE_BASE|AXP_OPCODE_EV6|AXP_OPCODE_BWX
546 |AXP_OPCODE_MAX|AXP_OPCODE_CIX) },
547
548 { "ev4", AXP_OPCODE_BASE },
549 { "ev45", AXP_OPCODE_BASE },
550 { "lca45", AXP_OPCODE_BASE },
551 { "ev5", AXP_OPCODE_BASE },
552 { "ev56", AXP_OPCODE_BASE|AXP_OPCODE_BWX },
553 { "pca56", AXP_OPCODE_BASE|AXP_OPCODE_BWX|AXP_OPCODE_MAX },
554 { "ev6", AXP_OPCODE_BASE|AXP_OPCODE_BWX|AXP_OPCODE_MAX|AXP_OPCODE_CIX },
555 { "ev67", AXP_OPCODE_BASE|AXP_OPCODE_BWX|AXP_OPCODE_MAX|AXP_OPCODE_CIX },
556 { "ev68", AXP_OPCODE_BASE|AXP_OPCODE_BWX|AXP_OPCODE_MAX|AXP_OPCODE_CIX },
557
558 { "all", AXP_OPCODE_BASE },
559 { 0, 0 }
560 };
561
562 /* Some instruction sets indexed by lg(size). */
563 static const char * const sextX_op[] = { "sextb", "sextw", "sextl", NULL };
564 static const char * const insXl_op[] = { "insbl", "inswl", "insll", "insql" };
565 static const char * const insXh_op[] = { NULL, "inswh", "inslh", "insqh" };
566 static const char * const extXl_op[] = { "extbl", "extwl", "extll", "extql" };
567 static const char * const extXh_op[] = { NULL, "extwh", "extlh", "extqh" };
568 static const char * const mskXl_op[] = { "mskbl", "mskwl", "mskll", "mskql" };
569 static const char * const mskXh_op[] = { NULL, "mskwh", "msklh", "mskqh" };
570 static const char * const stX_op[] = { "stb", "stw", "stl", "stq" };
571 static const char * const ldXu_op[] = { "ldbu", "ldwu", NULL, NULL };
572
573 static void assemble_insn (const struct alpha_opcode *, const expressionS *, int, struct alpha_insn *, extended_bfd_reloc_code_real_type);
574 static void emit_insn (struct alpha_insn *);
575 static void assemble_tokens (const char *, const expressionS *, int, int);
576 #ifdef OBJ_EVAX
577 static char *s_alpha_section_name (void);
578 static symbolS *add_to_link_pool (symbolS *, symbolS *, offsetT);
579 #endif
580 \f
581 static struct alpha_reloc_tag *
582 get_alpha_reloc_tag (long sequence)
583 {
584 char buffer[ALPHA_RELOC_DIGITS];
585 struct alpha_reloc_tag *info;
586
587 sprintf (buffer, "!%ld", sequence);
588
589 info = (struct alpha_reloc_tag *) hash_find (alpha_literal_hash, buffer);
590 if (! info)
591 {
592 size_t len = strlen (buffer);
593 const char *errmsg;
594
595 info = (struct alpha_reloc_tag *)
596 xcalloc (sizeof (struct alpha_reloc_tag) + len, 1);
597
598 info->segment = now_seg;
599 info->sequence = sequence;
600 strcpy (info->string, buffer);
601 errmsg = hash_insert (alpha_literal_hash, info->string, (void *) info);
602 if (errmsg)
603 as_fatal ("%s", errmsg);
604 #ifdef OBJ_EVAX
605 info->sym = 0;
606 info->psym = 0;
607 #endif
608 }
609
610 return info;
611 }
612
613 #ifndef OBJ_EVAX
614
615 static void
616 alpha_adjust_relocs (bfd *abfd ATTRIBUTE_UNUSED,
617 asection *sec,
618 void * ptr ATTRIBUTE_UNUSED)
619 {
620 segment_info_type *seginfo = seg_info (sec);
621 fixS **prevP;
622 fixS *fixp;
623 fixS *next;
624 fixS *slave;
625
626 /* If seginfo is NULL, we did not create this section; don't do
627 anything with it. By using a pointer to a pointer, we can update
628 the links in place. */
629 if (seginfo == NULL)
630 return;
631
632 /* If there are no relocations, skip the section. */
633 if (! seginfo->fix_root)
634 return;
635
636 /* First rebuild the fixup chain without the explicit lituse and
637 gpdisp_lo16 relocs. */
638 prevP = &seginfo->fix_root;
639 for (fixp = seginfo->fix_root; fixp; fixp = next)
640 {
641 next = fixp->fx_next;
642 fixp->fx_next = (fixS *) 0;
643
644 switch (fixp->fx_r_type)
645 {
646 case BFD_RELOC_ALPHA_LITUSE:
647 if (fixp->tc_fix_data.info->n_master == 0)
648 as_bad_where (fixp->fx_file, fixp->fx_line,
649 _("No !literal!%ld was found"),
650 fixp->tc_fix_data.info->sequence);
651 #ifdef RELOC_OP_P
652 if (fixp->fx_offset == LITUSE_ALPHA_TLSGD)
653 {
654 if (! fixp->tc_fix_data.info->saw_tlsgd)
655 as_bad_where (fixp->fx_file, fixp->fx_line,
656 _("No !tlsgd!%ld was found"),
657 fixp->tc_fix_data.info->sequence);
658 }
659 else if (fixp->fx_offset == LITUSE_ALPHA_TLSLDM)
660 {
661 if (! fixp->tc_fix_data.info->saw_tlsldm)
662 as_bad_where (fixp->fx_file, fixp->fx_line,
663 _("No !tlsldm!%ld was found"),
664 fixp->tc_fix_data.info->sequence);
665 }
666 #endif
667 break;
668
669 case BFD_RELOC_ALPHA_GPDISP_LO16:
670 if (fixp->tc_fix_data.info->n_master == 0)
671 as_bad_where (fixp->fx_file, fixp->fx_line,
672 _("No ldah !gpdisp!%ld was found"),
673 fixp->tc_fix_data.info->sequence);
674 break;
675
676 case BFD_RELOC_ALPHA_ELF_LITERAL:
677 if (fixp->tc_fix_data.info
678 && (fixp->tc_fix_data.info->saw_tlsgd
679 || fixp->tc_fix_data.info->saw_tlsldm))
680 break;
681 /* FALLTHRU */
682
683 default:
684 *prevP = fixp;
685 prevP = &fixp->fx_next;
686 break;
687 }
688 }
689
690 /* Go back and re-chain dependent relocations. They are currently
691 linked through the next_reloc field in reverse order, so as we
692 go through the next_reloc chain, we effectively reverse the chain
693 once again.
694
695 Except if there is more than one !literal for a given sequence
696 number. In that case, the programmer and/or compiler is not sure
697 how control flows from literal to lituse, and we can't be sure to
698 get the relaxation correct.
699
700 ??? Well, actually we could, if there are enough lituses such that
701 we can make each literal have at least one of each lituse type
702 present. Not implemented.
703
704 Also suppress the optimization if the !literals/!lituses are spread
705 in different segments. This can happen with "intersting" uses of
706 inline assembly; examples are present in the Linux kernel semaphores. */
707
708 for (fixp = seginfo->fix_root; fixp; fixp = next)
709 {
710 next = fixp->fx_next;
711 switch (fixp->fx_r_type)
712 {
713 case BFD_RELOC_ALPHA_TLSGD:
714 case BFD_RELOC_ALPHA_TLSLDM:
715 if (!fixp->tc_fix_data.info)
716 break;
717 if (fixp->tc_fix_data.info->n_master == 0)
718 break;
719 else if (fixp->tc_fix_data.info->n_master > 1)
720 {
721 as_bad_where (fixp->fx_file, fixp->fx_line,
722 _("too many !literal!%ld for %s"),
723 fixp->tc_fix_data.info->sequence,
724 (fixp->fx_r_type == BFD_RELOC_ALPHA_TLSGD
725 ? "!tlsgd" : "!tlsldm"));
726 break;
727 }
728
729 fixp->tc_fix_data.info->master->fx_next = fixp->fx_next;
730 fixp->fx_next = fixp->tc_fix_data.info->master;
731 fixp = fixp->fx_next;
732 /* Fall through. */
733
734 case BFD_RELOC_ALPHA_ELF_LITERAL:
735 if (fixp->tc_fix_data.info
736 && fixp->tc_fix_data.info->n_master == 1
737 && ! fixp->tc_fix_data.info->multi_section_p)
738 {
739 for (slave = fixp->tc_fix_data.info->slaves;
740 slave != (fixS *) 0;
741 slave = slave->tc_fix_data.next_reloc)
742 {
743 slave->fx_next = fixp->fx_next;
744 fixp->fx_next = slave;
745 }
746 }
747 break;
748
749 case BFD_RELOC_ALPHA_GPDISP_HI16:
750 if (fixp->tc_fix_data.info->n_slaves == 0)
751 as_bad_where (fixp->fx_file, fixp->fx_line,
752 _("No lda !gpdisp!%ld was found"),
753 fixp->tc_fix_data.info->sequence);
754 else
755 {
756 slave = fixp->tc_fix_data.info->slaves;
757 slave->fx_next = next;
758 fixp->fx_next = slave;
759 }
760 break;
761
762 default:
763 break;
764 }
765 }
766 }
767
768 /* Before the relocations are written, reorder them, so that user
769 supplied !lituse relocations follow the appropriate !literal
770 relocations, and similarly for !gpdisp relocations. */
771
772 void
773 alpha_before_fix (void)
774 {
775 if (alpha_literal_hash)
776 bfd_map_over_sections (stdoutput, alpha_adjust_relocs, NULL);
777 }
778
779 #endif
780 \f
781 #ifdef DEBUG_ALPHA
782 static void
783 debug_exp (expressionS tok[], int ntok)
784 {
785 int i;
786
787 fprintf (stderr, "debug_exp: %d tokens", ntok);
788 for (i = 0; i < ntok; i++)
789 {
790 expressionS *t = &tok[i];
791 const char *name;
792
793 switch (t->X_op)
794 {
795 default: name = "unknown"; break;
796 case O_illegal: name = "O_illegal"; break;
797 case O_absent: name = "O_absent"; break;
798 case O_constant: name = "O_constant"; break;
799 case O_symbol: name = "O_symbol"; break;
800 case O_symbol_rva: name = "O_symbol_rva"; break;
801 case O_register: name = "O_register"; break;
802 case O_big: name = "O_big"; break;
803 case O_uminus: name = "O_uminus"; break;
804 case O_bit_not: name = "O_bit_not"; break;
805 case O_logical_not: name = "O_logical_not"; break;
806 case O_multiply: name = "O_multiply"; break;
807 case O_divide: name = "O_divide"; break;
808 case O_modulus: name = "O_modulus"; break;
809 case O_left_shift: name = "O_left_shift"; break;
810 case O_right_shift: name = "O_right_shift"; break;
811 case O_bit_inclusive_or: name = "O_bit_inclusive_or"; break;
812 case O_bit_or_not: name = "O_bit_or_not"; break;
813 case O_bit_exclusive_or: name = "O_bit_exclusive_or"; break;
814 case O_bit_and: name = "O_bit_and"; break;
815 case O_add: name = "O_add"; break;
816 case O_subtract: name = "O_subtract"; break;
817 case O_eq: name = "O_eq"; break;
818 case O_ne: name = "O_ne"; break;
819 case O_lt: name = "O_lt"; break;
820 case O_le: name = "O_le"; break;
821 case O_ge: name = "O_ge"; break;
822 case O_gt: name = "O_gt"; break;
823 case O_logical_and: name = "O_logical_and"; break;
824 case O_logical_or: name = "O_logical_or"; break;
825 case O_index: name = "O_index"; break;
826 case O_pregister: name = "O_pregister"; break;
827 case O_cpregister: name = "O_cpregister"; break;
828 case O_literal: name = "O_literal"; break;
829 case O_lituse_addr: name = "O_lituse_addr"; break;
830 case O_lituse_base: name = "O_lituse_base"; break;
831 case O_lituse_bytoff: name = "O_lituse_bytoff"; break;
832 case O_lituse_jsr: name = "O_lituse_jsr"; break;
833 case O_lituse_tlsgd: name = "O_lituse_tlsgd"; break;
834 case O_lituse_tlsldm: name = "O_lituse_tlsldm"; break;
835 case O_lituse_jsrdirect: name = "O_lituse_jsrdirect"; break;
836 case O_gpdisp: name = "O_gpdisp"; break;
837 case O_gprelhigh: name = "O_gprelhigh"; break;
838 case O_gprellow: name = "O_gprellow"; break;
839 case O_gprel: name = "O_gprel"; break;
840 case O_samegp: name = "O_samegp"; break;
841 case O_tlsgd: name = "O_tlsgd"; break;
842 case O_tlsldm: name = "O_tlsldm"; break;
843 case O_gotdtprel: name = "O_gotdtprel"; break;
844 case O_dtprelhi: name = "O_dtprelhi"; break;
845 case O_dtprello: name = "O_dtprello"; break;
846 case O_dtprel: name = "O_dtprel"; break;
847 case O_gottprel: name = "O_gottprel"; break;
848 case O_tprelhi: name = "O_tprelhi"; break;
849 case O_tprello: name = "O_tprello"; break;
850 case O_tprel: name = "O_tprel"; break;
851 }
852
853 fprintf (stderr, ", %s(%s, %s, %d)", name,
854 (t->X_add_symbol) ? S_GET_NAME (t->X_add_symbol) : "--",
855 (t->X_op_symbol) ? S_GET_NAME (t->X_op_symbol) : "--",
856 (int) t->X_add_number);
857 }
858 fprintf (stderr, "\n");
859 fflush (stderr);
860 }
861 #endif
862
863 /* Parse the arguments to an opcode. */
864
865 static int
866 tokenize_arguments (char *str,
867 expressionS tok[],
868 int ntok)
869 {
870 expressionS *end_tok = tok + ntok;
871 char *old_input_line_pointer;
872 int saw_comma = 0, saw_arg = 0;
873 #ifdef DEBUG_ALPHA
874 expressionS *orig_tok = tok;
875 #endif
876 #ifdef RELOC_OP_P
877 char *p;
878 const struct alpha_reloc_op_tag *r;
879 int c, i;
880 size_t len;
881 int reloc_found_p = 0;
882 #endif
883
884 memset (tok, 0, sizeof (*tok) * ntok);
885
886 /* Save and restore input_line_pointer around this function. */
887 old_input_line_pointer = input_line_pointer;
888 input_line_pointer = str;
889
890 #ifdef RELOC_OP_P
891 /* ??? Wrest control of ! away from the regular expression parser. */
892 is_end_of_line[(unsigned char) '!'] = 1;
893 #endif
894
895 while (tok < end_tok && *input_line_pointer)
896 {
897 SKIP_WHITESPACE ();
898 switch (*input_line_pointer)
899 {
900 case '\0':
901 goto fini;
902
903 #ifdef RELOC_OP_P
904 case '!':
905 /* A relocation operand can be placed after the normal operand on an
906 assembly language statement, and has the following form:
907 !relocation_type!sequence_number. */
908 if (reloc_found_p)
909 {
910 /* Only support one relocation op per insn. */
911 as_bad (_("More than one relocation op per insn"));
912 goto err_report;
913 }
914
915 if (!saw_arg)
916 goto err;
917
918 ++input_line_pointer;
919 SKIP_WHITESPACE ();
920 p = input_line_pointer;
921 c = get_symbol_end ();
922
923 /* Parse !relocation_type. */
924 len = input_line_pointer - p;
925 if (len == 0)
926 {
927 as_bad (_("No relocation operand"));
928 goto err_report;
929 }
930
931 r = &alpha_reloc_op[0];
932 for (i = alpha_num_reloc_op - 1; i >= 0; i--, r++)
933 if (len == r->length && memcmp (p, r->name, len) == 0)
934 break;
935 if (i < 0)
936 {
937 as_bad (_("Unknown relocation operand: !%s"), p);
938 goto err_report;
939 }
940
941 *input_line_pointer = c;
942 SKIP_WHITESPACE ();
943 if (*input_line_pointer != '!')
944 {
945 if (r->require_seq)
946 {
947 as_bad (_("no sequence number after !%s"), p);
948 goto err_report;
949 }
950
951 tok->X_add_number = 0;
952 }
953 else
954 {
955 if (! r->allow_seq)
956 {
957 as_bad (_("!%s does not use a sequence number"), p);
958 goto err_report;
959 }
960
961 input_line_pointer++;
962
963 /* Parse !sequence_number. */
964 expression (tok);
965 if (tok->X_op != O_constant || tok->X_add_number <= 0)
966 {
967 as_bad (_("Bad sequence number: !%s!%s"),
968 r->name, input_line_pointer);
969 goto err_report;
970 }
971 }
972
973 tok->X_op = r->op;
974 reloc_found_p = 1;
975 ++tok;
976 break;
977 #endif /* RELOC_OP_P */
978
979 case ',':
980 ++input_line_pointer;
981 if (saw_comma || !saw_arg)
982 goto err;
983 saw_comma = 1;
984 break;
985
986 case '(':
987 {
988 char *hold = input_line_pointer++;
989
990 /* First try for parenthesized register ... */
991 expression (tok);
992 if (*input_line_pointer == ')' && tok->X_op == O_register)
993 {
994 tok->X_op = (saw_comma ? O_cpregister : O_pregister);
995 saw_comma = 0;
996 saw_arg = 1;
997 ++input_line_pointer;
998 ++tok;
999 break;
1000 }
1001
1002 /* ... then fall through to plain expression. */
1003 input_line_pointer = hold;
1004 }
1005
1006 default:
1007 if (saw_arg && !saw_comma)
1008 goto err;
1009
1010 expression (tok);
1011 if (tok->X_op == O_illegal || tok->X_op == O_absent)
1012 goto err;
1013
1014 saw_comma = 0;
1015 saw_arg = 1;
1016 ++tok;
1017 break;
1018 }
1019 }
1020
1021 fini:
1022 if (saw_comma)
1023 goto err;
1024 input_line_pointer = old_input_line_pointer;
1025
1026 #ifdef DEBUG_ALPHA
1027 debug_exp (orig_tok, ntok - (end_tok - tok));
1028 #endif
1029 #ifdef RELOC_OP_P
1030 is_end_of_line[(unsigned char) '!'] = 0;
1031 #endif
1032
1033 return ntok - (end_tok - tok);
1034
1035 err:
1036 #ifdef RELOC_OP_P
1037 is_end_of_line[(unsigned char) '!'] = 0;
1038 #endif
1039 input_line_pointer = old_input_line_pointer;
1040 return TOKENIZE_ERROR;
1041
1042 #ifdef RELOC_OP_P
1043 err_report:
1044 is_end_of_line[(unsigned char) '!'] = 0;
1045 #endif
1046 input_line_pointer = old_input_line_pointer;
1047 return TOKENIZE_ERROR_REPORT;
1048 }
1049
1050 /* Search forward through all variants of an opcode looking for a
1051 syntax match. */
1052
1053 static const struct alpha_opcode *
1054 find_opcode_match (const struct alpha_opcode *first_opcode,
1055 const expressionS *tok,
1056 int *pntok,
1057 int *pcpumatch)
1058 {
1059 const struct alpha_opcode *opcode = first_opcode;
1060 int ntok = *pntok;
1061 int got_cpu_match = 0;
1062
1063 do
1064 {
1065 const unsigned char *opidx;
1066 int tokidx = 0;
1067
1068 /* Don't match opcodes that don't exist on this architecture. */
1069 if (!(opcode->flags & alpha_target))
1070 goto match_failed;
1071
1072 got_cpu_match = 1;
1073
1074 for (opidx = opcode->operands; *opidx; ++opidx)
1075 {
1076 const struct alpha_operand *operand = &alpha_operands[*opidx];
1077
1078 /* Only take input from real operands. */
1079 if (operand->flags & AXP_OPERAND_FAKE)
1080 continue;
1081
1082 /* When we expect input, make sure we have it. */
1083 if (tokidx >= ntok)
1084 {
1085 if ((operand->flags & AXP_OPERAND_OPTIONAL_MASK) == 0)
1086 goto match_failed;
1087 continue;
1088 }
1089
1090 /* Match operand type with expression type. */
1091 switch (operand->flags & AXP_OPERAND_TYPECHECK_MASK)
1092 {
1093 case AXP_OPERAND_IR:
1094 if (tok[tokidx].X_op != O_register
1095 || !is_ir_num (tok[tokidx].X_add_number))
1096 goto match_failed;
1097 break;
1098 case AXP_OPERAND_FPR:
1099 if (tok[tokidx].X_op != O_register
1100 || !is_fpr_num (tok[tokidx].X_add_number))
1101 goto match_failed;
1102 break;
1103 case AXP_OPERAND_IR | AXP_OPERAND_PARENS:
1104 if (tok[tokidx].X_op != O_pregister
1105 || !is_ir_num (tok[tokidx].X_add_number))
1106 goto match_failed;
1107 break;
1108 case AXP_OPERAND_IR | AXP_OPERAND_PARENS | AXP_OPERAND_COMMA:
1109 if (tok[tokidx].X_op != O_cpregister
1110 || !is_ir_num (tok[tokidx].X_add_number))
1111 goto match_failed;
1112 break;
1113
1114 case AXP_OPERAND_RELATIVE:
1115 case AXP_OPERAND_SIGNED:
1116 case AXP_OPERAND_UNSIGNED:
1117 switch (tok[tokidx].X_op)
1118 {
1119 case O_illegal:
1120 case O_absent:
1121 case O_register:
1122 case O_pregister:
1123 case O_cpregister:
1124 goto match_failed;
1125
1126 default:
1127 break;
1128 }
1129 break;
1130
1131 default:
1132 /* Everything else should have been fake. */
1133 abort ();
1134 }
1135 ++tokidx;
1136 }
1137
1138 /* Possible match -- did we use all of our input? */
1139 if (tokidx == ntok)
1140 {
1141 *pntok = ntok;
1142 return opcode;
1143 }
1144
1145 match_failed:;
1146 }
1147 while (++opcode - alpha_opcodes < (int) alpha_num_opcodes
1148 && !strcmp (opcode->name, first_opcode->name));
1149
1150 if (*pcpumatch)
1151 *pcpumatch = got_cpu_match;
1152
1153 return NULL;
1154 }
1155
1156 /* Given an opcode name and a pre-tokenized set of arguments, assemble
1157 the insn, but do not emit it.
1158
1159 Note that this implies no macros allowed, since we can't store more
1160 than one insn in an insn structure. */
1161
1162 static void
1163 assemble_tokens_to_insn (const char *opname,
1164 const expressionS *tok,
1165 int ntok,
1166 struct alpha_insn *insn)
1167 {
1168 const struct alpha_opcode *opcode;
1169
1170 /* Search opcodes. */
1171 opcode = (const struct alpha_opcode *) hash_find (alpha_opcode_hash, opname);
1172 if (opcode)
1173 {
1174 int cpumatch;
1175 opcode = find_opcode_match (opcode, tok, &ntok, &cpumatch);
1176 if (opcode)
1177 {
1178 assemble_insn (opcode, tok, ntok, insn, BFD_RELOC_UNUSED);
1179 return;
1180 }
1181 else if (cpumatch)
1182 as_bad (_("inappropriate arguments for opcode `%s'"), opname);
1183 else
1184 as_bad (_("opcode `%s' not supported for target %s"), opname,
1185 alpha_target_name);
1186 }
1187 else
1188 as_bad (_("unknown opcode `%s'"), opname);
1189 }
1190
1191 /* Build a BFD section with its flags set appropriately for the .lita,
1192 .lit8, or .lit4 sections. */
1193
1194 static void
1195 create_literal_section (const char *name,
1196 segT *secp,
1197 symbolS **symp)
1198 {
1199 segT current_section = now_seg;
1200 int current_subsec = now_subseg;
1201 segT new_sec;
1202
1203 *secp = new_sec = subseg_new (name, 0);
1204 subseg_set (current_section, current_subsec);
1205 bfd_set_section_alignment (stdoutput, new_sec, 4);
1206 bfd_set_section_flags (stdoutput, new_sec,
1207 SEC_RELOC | SEC_ALLOC | SEC_LOAD | SEC_READONLY
1208 | SEC_DATA);
1209
1210 S_CLEAR_EXTERNAL (*symp = section_symbol (new_sec));
1211 }
1212
1213 /* Load a (partial) expression into a target register.
1214
1215 If poffset is not null, after the call it will either contain
1216 O_constant 0, or a 16-bit offset appropriate for any MEM format
1217 instruction. In addition, pbasereg will be modified to point to
1218 the base register to use in that MEM format instruction.
1219
1220 In any case, *pbasereg should contain a base register to add to the
1221 expression. This will normally be either AXP_REG_ZERO or
1222 alpha_gp_register. Symbol addresses will always be loaded via $gp,
1223 so "foo($0)" is interpreted as adding the address of foo to $0;
1224 i.e. "ldq $targ, LIT($gp); addq $targ, $0, $targ". Odd, perhaps,
1225 but this is what OSF/1 does.
1226
1227 If explicit relocations of the form !literal!<number> are allowed,
1228 and used, then explicit_reloc with be an expression pointer.
1229
1230 Finally, the return value is nonzero if the calling macro may emit
1231 a LITUSE reloc if otherwise appropriate; the return value is the
1232 sequence number to use. */
1233
1234 static long
1235 load_expression (int targreg,
1236 const expressionS *exp,
1237 int *pbasereg,
1238 expressionS *poffset,
1239 const char *opname)
1240 {
1241 long emit_lituse = 0;
1242 offsetT addend = exp->X_add_number;
1243 int basereg = *pbasereg;
1244 struct alpha_insn insn;
1245 expressionS newtok[3];
1246
1247 switch (exp->X_op)
1248 {
1249 case O_symbol:
1250 {
1251 #ifdef OBJ_ECOFF
1252 offsetT lit;
1253
1254 /* Attempt to reduce .lit load by splitting the offset from
1255 its symbol when possible, but don't create a situation in
1256 which we'd fail. */
1257 if (!range_signed_32 (addend) &&
1258 (alpha_noat_on || targreg == AXP_REG_AT))
1259 {
1260 lit = add_to_literal_pool (exp->X_add_symbol, addend,
1261 alpha_lita_section, 8);
1262 addend = 0;
1263 }
1264 else
1265 lit = add_to_literal_pool (exp->X_add_symbol, 0,
1266 alpha_lita_section, 8);
1267
1268 if (lit >= 0x8000)
1269 as_fatal (_("overflow in literal (.lita) table"));
1270
1271 /* Emit "ldq r, lit(gp)". */
1272
1273 if (basereg != alpha_gp_register && targreg == basereg)
1274 {
1275 if (alpha_noat_on)
1276 as_bad (_("macro requires $at register while noat in effect"));
1277 if (targreg == AXP_REG_AT)
1278 as_bad (_("macro requires $at while $at in use"));
1279
1280 set_tok_reg (newtok[0], AXP_REG_AT);
1281 }
1282 else
1283 set_tok_reg (newtok[0], targreg);
1284
1285 set_tok_sym (newtok[1], alpha_lita_symbol, lit);
1286 set_tok_preg (newtok[2], alpha_gp_register);
1287
1288 assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
1289
1290 gas_assert (insn.nfixups == 1);
1291 insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITERAL;
1292 insn.sequence = emit_lituse = next_sequence_num--;
1293 #endif /* OBJ_ECOFF */
1294 #ifdef OBJ_ELF
1295 /* Emit "ldq r, gotoff(gp)". */
1296
1297 if (basereg != alpha_gp_register && targreg == basereg)
1298 {
1299 if (alpha_noat_on)
1300 as_bad (_("macro requires $at register while noat in effect"));
1301 if (targreg == AXP_REG_AT)
1302 as_bad (_("macro requires $at while $at in use"));
1303
1304 set_tok_reg (newtok[0], AXP_REG_AT);
1305 }
1306 else
1307 set_tok_reg (newtok[0], targreg);
1308
1309 /* XXX: Disable this .got minimizing optimization so that we can get
1310 better instruction offset knowledge in the compiler. This happens
1311 very infrequently anyway. */
1312 if (1
1313 || (!range_signed_32 (addend)
1314 && (alpha_noat_on || targreg == AXP_REG_AT)))
1315 {
1316 newtok[1] = *exp;
1317 addend = 0;
1318 }
1319 else
1320 set_tok_sym (newtok[1], exp->X_add_symbol, 0);
1321
1322 set_tok_preg (newtok[2], alpha_gp_register);
1323
1324 assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
1325
1326 gas_assert (insn.nfixups == 1);
1327 insn.fixups[0].reloc = BFD_RELOC_ALPHA_ELF_LITERAL;
1328 insn.sequence = emit_lituse = next_sequence_num--;
1329 #endif /* OBJ_ELF */
1330 #ifdef OBJ_EVAX
1331 /* Find symbol or symbol pointer in link section. */
1332
1333 if (exp->X_add_symbol == alpha_evax_proc->symbol)
1334 {
1335 if (range_signed_16 (addend))
1336 {
1337 set_tok_reg (newtok[0], targreg);
1338 set_tok_const (newtok[1], addend);
1339 set_tok_preg (newtok[2], basereg);
1340 assemble_tokens_to_insn ("lda", newtok, 3, &insn);
1341 addend = 0;
1342 }
1343 else
1344 {
1345 set_tok_reg (newtok[0], targreg);
1346 set_tok_const (newtok[1], 0);
1347 set_tok_preg (newtok[2], basereg);
1348 assemble_tokens_to_insn ("lda", newtok, 3, &insn);
1349 }
1350 }
1351 else
1352 {
1353 const char *symname = S_GET_NAME (exp->X_add_symbol);
1354 const char *ptr1, *ptr2;
1355 int symlen = strlen (symname);
1356
1357 if ((symlen > 4 &&
1358 strcmp (ptr2 = &symname [symlen - 4], "..lk") == 0))
1359 {
1360 set_tok_reg (newtok[0], targreg);
1361
1362 newtok[1] = *exp;
1363 newtok[1].X_op = O_subtract;
1364 newtok[1].X_op_symbol = alpha_evax_proc->symbol;
1365
1366 set_tok_preg (newtok[2], basereg);
1367 assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
1368 alpha_linkage_symbol = exp->X_add_symbol;
1369
1370 if (poffset)
1371 set_tok_const (*poffset, 0);
1372
1373 if (alpha_flag_replace && targreg == 26)
1374 {
1375 char *ensymname;
1376 symbolS *ensym;
1377 volatile asymbol *dummy;
1378
1379 ptr1 = strstr (symname, "..") + 2;
1380 if (ptr1 > ptr2)
1381 ptr1 = symname;
1382 ensymname = (char *) xmalloc (ptr2 - ptr1 + 5);
1383 memcpy (ensymname, ptr1, ptr2 - ptr1);
1384 memcpy (ensymname + (ptr2 - ptr1), "..en", 5);
1385
1386 gas_assert (insn.nfixups + 1 <= MAX_INSN_FIXUPS);
1387 insn.fixups[insn.nfixups].reloc = BFD_RELOC_ALPHA_NOP;
1388 ensym = symbol_find_or_make (ensymname);
1389 ensym->sy_used = 1;
1390 /* The fixup must be the same as the BFD_RELOC_ALPHA_BOH
1391 case in emit_jsrjmp. See B.4.5.2 of the OpenVMS Linker
1392 Utility Manual. */
1393 insn.fixups[insn.nfixups].exp.X_op = O_symbol;
1394 insn.fixups[insn.nfixups].exp.X_add_symbol = ensym;
1395 insn.fixups[insn.nfixups].exp.X_add_number = 0;
1396 insn.fixups[insn.nfixups].xtrasym = alpha_linkage_symbol;
1397 insn.fixups[insn.nfixups].procsym = alpha_evax_proc->symbol;
1398 insn.nfixups++;
1399
1400 /* ??? Force bsym to be instantiated now, as it will be
1401 too late to do so in tc_gen_reloc. */
1402 dummy = symbol_get_bfdsym (exp->X_add_symbol);
1403 }
1404 else if (alpha_flag_replace && targreg == 27)
1405 {
1406 char *psymname;
1407 symbolS *psym;
1408
1409 ptr1 = strstr (symname, "..") + 2;
1410 if (ptr1 > ptr2)
1411 ptr1 = symname;
1412 psymname = (char *) xmalloc (ptr2 - ptr1 + 1);
1413 memcpy (psymname, ptr1, ptr2 - ptr1);
1414 psymname [ptr2 - ptr1] = 0;
1415 gas_assert (insn.nfixups + 1 <= MAX_INSN_FIXUPS);
1416 insn.fixups[insn.nfixups].reloc = BFD_RELOC_ALPHA_LDA;
1417 psym = symbol_find_or_make (psymname);
1418 psym->sy_used = 1;
1419 insn.fixups[insn.nfixups].exp.X_op = O_subtract;
1420 insn.fixups[insn.nfixups].exp.X_add_symbol = psym;
1421 insn.fixups[insn.nfixups].exp.X_op_symbol = alpha_evax_proc->symbol;
1422 insn.fixups[insn.nfixups].exp.X_add_number = 0;
1423 insn.fixups[insn.nfixups].xtrasym = alpha_linkage_symbol;
1424 insn.fixups[insn.nfixups].procsym = alpha_evax_proc->symbol;
1425 insn.nfixups++;
1426 }
1427
1428 emit_insn(&insn);
1429 return 0;
1430 }
1431 else
1432 {
1433 symbolS *linkexp;
1434
1435 if (!range_signed_32 (addend))
1436 addend = sign_extend_32 (addend);
1437 linkexp = add_to_link_pool (alpha_evax_proc->symbol,
1438 exp->X_add_symbol, 0);
1439 set_tok_reg (newtok[0], targreg);
1440 set_tok_sym (newtok[1], linkexp, 0);
1441 set_tok_preg (newtok[2], basereg);
1442 assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
1443 }
1444 }
1445 #endif /* OBJ_EVAX */
1446
1447 emit_insn (&insn);
1448
1449 #ifndef OBJ_EVAX
1450 if (basereg != alpha_gp_register && basereg != AXP_REG_ZERO)
1451 {
1452 /* Emit "addq r, base, r". */
1453
1454 set_tok_reg (newtok[1], basereg);
1455 set_tok_reg (newtok[2], targreg);
1456 assemble_tokens ("addq", newtok, 3, 0);
1457 }
1458 #endif
1459 basereg = targreg;
1460 }
1461 break;
1462
1463 case O_constant:
1464 break;
1465
1466 case O_subtract:
1467 /* Assume that this difference expression will be resolved to an
1468 absolute value and that that value will fit in 16 bits. */
1469
1470 set_tok_reg (newtok[0], targreg);
1471 newtok[1] = *exp;
1472 set_tok_preg (newtok[2], basereg);
1473 assemble_tokens (opname, newtok, 3, 0);
1474
1475 if (poffset)
1476 set_tok_const (*poffset, 0);
1477 return 0;
1478
1479 case O_big:
1480 if (exp->X_add_number > 0)
1481 as_bad (_("bignum invalid; zero assumed"));
1482 else
1483 as_bad (_("floating point number invalid; zero assumed"));
1484 addend = 0;
1485 break;
1486
1487 default:
1488 as_bad (_("can't handle expression"));
1489 addend = 0;
1490 break;
1491 }
1492
1493 if (!range_signed_32 (addend))
1494 {
1495 #ifdef OBJ_EVAX
1496 symbolS *litexp;
1497 #else
1498 offsetT lit;
1499 long seq_num = next_sequence_num--;
1500 #endif
1501
1502 /* For 64-bit addends, just put it in the literal pool. */
1503 #ifdef OBJ_EVAX
1504 /* Emit "ldq targreg, lit(basereg)". */
1505 litexp = add_to_link_pool (alpha_evax_proc->symbol,
1506 section_symbol (absolute_section), addend);
1507 set_tok_reg (newtok[0], targreg);
1508 set_tok_sym (newtok[1], litexp, 0);
1509 set_tok_preg (newtok[2], alpha_gp_register);
1510 assemble_tokens ("ldq", newtok, 3, 0);
1511 #else
1512
1513 if (alpha_lit8_section == NULL)
1514 {
1515 create_literal_section (".lit8",
1516 &alpha_lit8_section,
1517 &alpha_lit8_symbol);
1518
1519 #ifdef OBJ_ECOFF
1520 alpha_lit8_literal = add_to_literal_pool (alpha_lit8_symbol, 0x8000,
1521 alpha_lita_section, 8);
1522 if (alpha_lit8_literal >= 0x8000)
1523 as_fatal (_("overflow in literal (.lita) table"));
1524 #endif
1525 }
1526
1527 lit = add_to_literal_pool (NULL, addend, alpha_lit8_section, 8) - 0x8000;
1528 if (lit >= 0x8000)
1529 as_fatal (_("overflow in literal (.lit8) table"));
1530
1531 /* Emit "lda litreg, .lit8+0x8000". */
1532
1533 if (targreg == basereg)
1534 {
1535 if (alpha_noat_on)
1536 as_bad (_("macro requires $at register while noat in effect"));
1537 if (targreg == AXP_REG_AT)
1538 as_bad (_("macro requires $at while $at in use"));
1539
1540 set_tok_reg (newtok[0], AXP_REG_AT);
1541 }
1542 else
1543 set_tok_reg (newtok[0], targreg);
1544 #ifdef OBJ_ECOFF
1545 set_tok_sym (newtok[1], alpha_lita_symbol, alpha_lit8_literal);
1546 #endif
1547 #ifdef OBJ_ELF
1548 set_tok_sym (newtok[1], alpha_lit8_symbol, 0x8000);
1549 #endif
1550 set_tok_preg (newtok[2], alpha_gp_register);
1551
1552 assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
1553
1554 gas_assert (insn.nfixups == 1);
1555 #ifdef OBJ_ECOFF
1556 insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITERAL;
1557 #endif
1558 #ifdef OBJ_ELF
1559 insn.fixups[0].reloc = BFD_RELOC_ALPHA_ELF_LITERAL;
1560 #endif
1561 insn.sequence = seq_num;
1562
1563 emit_insn (&insn);
1564
1565 /* Emit "ldq litreg, lit(litreg)". */
1566
1567 set_tok_const (newtok[1], lit);
1568 set_tok_preg (newtok[2], newtok[0].X_add_number);
1569
1570 assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
1571
1572 gas_assert (insn.nfixups < MAX_INSN_FIXUPS);
1573 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE;
1574 insn.fixups[insn.nfixups].exp.X_op = O_absent;
1575 insn.nfixups++;
1576 insn.sequence = seq_num;
1577 emit_lituse = 0;
1578
1579 emit_insn (&insn);
1580
1581 /* Emit "addq litreg, base, target". */
1582
1583 if (basereg != AXP_REG_ZERO)
1584 {
1585 set_tok_reg (newtok[1], basereg);
1586 set_tok_reg (newtok[2], targreg);
1587 assemble_tokens ("addq", newtok, 3, 0);
1588 }
1589 #endif /* !OBJ_EVAX */
1590
1591 if (poffset)
1592 set_tok_const (*poffset, 0);
1593 *pbasereg = targreg;
1594 }
1595 else
1596 {
1597 offsetT low, high, extra, tmp;
1598
1599 /* For 32-bit operands, break up the addend. */
1600
1601 low = sign_extend_16 (addend);
1602 tmp = addend - low;
1603 high = sign_extend_16 (tmp >> 16);
1604
1605 if (tmp - (high << 16))
1606 {
1607 extra = 0x4000;
1608 tmp -= 0x40000000;
1609 high = sign_extend_16 (tmp >> 16);
1610 }
1611 else
1612 extra = 0;
1613
1614 set_tok_reg (newtok[0], targreg);
1615 set_tok_preg (newtok[2], basereg);
1616
1617 if (extra)
1618 {
1619 /* Emit "ldah r, extra(r). */
1620 set_tok_const (newtok[1], extra);
1621 assemble_tokens ("ldah", newtok, 3, 0);
1622 set_tok_preg (newtok[2], basereg = targreg);
1623 }
1624
1625 if (high)
1626 {
1627 /* Emit "ldah r, high(r). */
1628 set_tok_const (newtok[1], high);
1629 assemble_tokens ("ldah", newtok, 3, 0);
1630 basereg = targreg;
1631 set_tok_preg (newtok[2], basereg);
1632 }
1633
1634 if ((low && !poffset) || (!poffset && basereg != targreg))
1635 {
1636 /* Emit "lda r, low(base)". */
1637 set_tok_const (newtok[1], low);
1638 assemble_tokens ("lda", newtok, 3, 0);
1639 basereg = targreg;
1640 low = 0;
1641 }
1642
1643 if (poffset)
1644 set_tok_const (*poffset, low);
1645 *pbasereg = basereg;
1646 }
1647
1648 return emit_lituse;
1649 }
1650
1651 /* The lda macro differs from the lda instruction in that it handles
1652 most simple expressions, particularly symbol address loads and
1653 large constants. */
1654
1655 static void
1656 emit_lda (const expressionS *tok,
1657 int ntok,
1658 const void * unused ATTRIBUTE_UNUSED)
1659 {
1660 int basereg;
1661
1662 if (ntok == 2)
1663 basereg = (tok[1].X_op == O_constant ? AXP_REG_ZERO : alpha_gp_register);
1664 else
1665 basereg = tok[2].X_add_number;
1666
1667 (void) load_expression (tok[0].X_add_number, &tok[1], &basereg, NULL, "lda");
1668 }
1669
1670 /* The ldah macro differs from the ldah instruction in that it has $31
1671 as an implied base register. */
1672
1673 static void
1674 emit_ldah (const expressionS *tok,
1675 int ntok ATTRIBUTE_UNUSED,
1676 const void * unused ATTRIBUTE_UNUSED)
1677 {
1678 expressionS newtok[3];
1679
1680 newtok[0] = tok[0];
1681 newtok[1] = tok[1];
1682 set_tok_preg (newtok[2], AXP_REG_ZERO);
1683
1684 assemble_tokens ("ldah", newtok, 3, 0);
1685 }
1686
1687 /* Called internally to handle all alignment needs. This takes care
1688 of eliding calls to frag_align if'n the cached current alignment
1689 says we've already got it, as well as taking care of the auto-align
1690 feature wrt labels. */
1691
1692 static void
1693 alpha_align (int n,
1694 char *pfill,
1695 symbolS *label,
1696 int force ATTRIBUTE_UNUSED)
1697 {
1698 if (alpha_current_align >= n)
1699 return;
1700
1701 if (pfill == NULL)
1702 {
1703 if (subseg_text_p (now_seg))
1704 frag_align_code (n, 0);
1705 else
1706 frag_align (n, 0, 0);
1707 }
1708 else
1709 frag_align (n, *pfill, 0);
1710
1711 alpha_current_align = n;
1712
1713 if (label != NULL && S_GET_SEGMENT (label) == now_seg)
1714 {
1715 symbol_set_frag (label, frag_now);
1716 S_SET_VALUE (label, (valueT) frag_now_fix ());
1717 }
1718
1719 record_alignment (now_seg, n);
1720
1721 /* ??? If alpha_flag_relax && force && elf, record the requested alignment
1722 in a reloc for the linker to see. */
1723 }
1724
1725 /* Actually output an instruction with its fixup. */
1726
1727 static void
1728 emit_insn (struct alpha_insn *insn)
1729 {
1730 char *f;
1731 int i;
1732
1733 /* Take care of alignment duties. */
1734 if (alpha_auto_align_on && alpha_current_align < 2)
1735 alpha_align (2, (char *) NULL, alpha_insn_label, 0);
1736 if (alpha_current_align > 2)
1737 alpha_current_align = 2;
1738 alpha_insn_label = NULL;
1739
1740 /* Write out the instruction. */
1741 f = frag_more (4);
1742 md_number_to_chars (f, insn->insn, 4);
1743
1744 #ifdef OBJ_ELF
1745 dwarf2_emit_insn (4);
1746 #endif
1747
1748 /* Apply the fixups in order. */
1749 for (i = 0; i < insn->nfixups; ++i)
1750 {
1751 const struct alpha_operand *operand = (const struct alpha_operand *) 0;
1752 struct alpha_fixup *fixup = &insn->fixups[i];
1753 struct alpha_reloc_tag *info = NULL;
1754 int size, pcrel;
1755 fixS *fixP;
1756
1757 /* Some fixups are only used internally and so have no howto. */
1758 if ((int) fixup->reloc < 0)
1759 {
1760 operand = &alpha_operands[-(int) fixup->reloc];
1761 size = 4;
1762 pcrel = ((operand->flags & AXP_OPERAND_RELATIVE) != 0);
1763 }
1764 else if (fixup->reloc > BFD_RELOC_UNUSED
1765 || fixup->reloc == BFD_RELOC_ALPHA_GPDISP_HI16
1766 || fixup->reloc == BFD_RELOC_ALPHA_GPDISP_LO16)
1767 {
1768 size = 2;
1769 pcrel = 0;
1770 }
1771 else
1772 {
1773 reloc_howto_type *reloc_howto =
1774 bfd_reloc_type_lookup (stdoutput,
1775 (bfd_reloc_code_real_type) fixup->reloc);
1776 gas_assert (reloc_howto);
1777
1778 size = bfd_get_reloc_size (reloc_howto);
1779
1780 switch (fixup->reloc)
1781 {
1782 #ifdef OBJ_EVAX
1783 case BFD_RELOC_ALPHA_NOP:
1784 case BFD_RELOC_ALPHA_BSR:
1785 case BFD_RELOC_ALPHA_LDA:
1786 case BFD_RELOC_ALPHA_BOH:
1787 break;
1788 #endif
1789 default:
1790 gas_assert (size >= 1 && size <= 4);
1791 }
1792
1793 pcrel = reloc_howto->pc_relative;
1794 }
1795
1796 fixP = fix_new_exp (frag_now, f - frag_now->fr_literal, size,
1797 &fixup->exp, pcrel, (bfd_reloc_code_real_type) fixup->reloc);
1798
1799 /* Turn off complaints that the addend is too large for some fixups,
1800 and copy in the sequence number for the explicit relocations. */
1801 switch (fixup->reloc)
1802 {
1803 case BFD_RELOC_ALPHA_HINT:
1804 case BFD_RELOC_GPREL32:
1805 case BFD_RELOC_GPREL16:
1806 case BFD_RELOC_ALPHA_GPREL_HI16:
1807 case BFD_RELOC_ALPHA_GPREL_LO16:
1808 case BFD_RELOC_ALPHA_GOTDTPREL16:
1809 case BFD_RELOC_ALPHA_DTPREL_HI16:
1810 case BFD_RELOC_ALPHA_DTPREL_LO16:
1811 case BFD_RELOC_ALPHA_DTPREL16:
1812 case BFD_RELOC_ALPHA_GOTTPREL16:
1813 case BFD_RELOC_ALPHA_TPREL_HI16:
1814 case BFD_RELOC_ALPHA_TPREL_LO16:
1815 case BFD_RELOC_ALPHA_TPREL16:
1816 fixP->fx_no_overflow = 1;
1817 break;
1818
1819 case BFD_RELOC_ALPHA_GPDISP_HI16:
1820 fixP->fx_no_overflow = 1;
1821 fixP->fx_addsy = section_symbol (now_seg);
1822 fixP->fx_offset = 0;
1823
1824 info = get_alpha_reloc_tag (insn->sequence);
1825 if (++info->n_master > 1)
1826 as_bad (_("too many ldah insns for !gpdisp!%ld"), insn->sequence);
1827 if (info->segment != now_seg)
1828 as_bad (_("both insns for !gpdisp!%ld must be in the same section"),
1829 insn->sequence);
1830 fixP->tc_fix_data.info = info;
1831 break;
1832
1833 case BFD_RELOC_ALPHA_GPDISP_LO16:
1834 fixP->fx_no_overflow = 1;
1835
1836 info = get_alpha_reloc_tag (insn->sequence);
1837 if (++info->n_slaves > 1)
1838 as_bad (_("too many lda insns for !gpdisp!%ld"), insn->sequence);
1839 if (info->segment != now_seg)
1840 as_bad (_("both insns for !gpdisp!%ld must be in the same section"),
1841 insn->sequence);
1842 fixP->tc_fix_data.info = info;
1843 info->slaves = fixP;
1844 break;
1845
1846 case BFD_RELOC_ALPHA_LITERAL:
1847 case BFD_RELOC_ALPHA_ELF_LITERAL:
1848 fixP->fx_no_overflow = 1;
1849
1850 if (insn->sequence == 0)
1851 break;
1852 info = get_alpha_reloc_tag (insn->sequence);
1853 info->master = fixP;
1854 info->n_master++;
1855 if (info->segment != now_seg)
1856 info->multi_section_p = 1;
1857 fixP->tc_fix_data.info = info;
1858 break;
1859
1860 #ifdef RELOC_OP_P
1861 case DUMMY_RELOC_LITUSE_ADDR:
1862 fixP->fx_offset = LITUSE_ALPHA_ADDR;
1863 goto do_lituse;
1864 case DUMMY_RELOC_LITUSE_BASE:
1865 fixP->fx_offset = LITUSE_ALPHA_BASE;
1866 goto do_lituse;
1867 case DUMMY_RELOC_LITUSE_BYTOFF:
1868 fixP->fx_offset = LITUSE_ALPHA_BYTOFF;
1869 goto do_lituse;
1870 case DUMMY_RELOC_LITUSE_JSR:
1871 fixP->fx_offset = LITUSE_ALPHA_JSR;
1872 goto do_lituse;
1873 case DUMMY_RELOC_LITUSE_TLSGD:
1874 fixP->fx_offset = LITUSE_ALPHA_TLSGD;
1875 goto do_lituse;
1876 case DUMMY_RELOC_LITUSE_TLSLDM:
1877 fixP->fx_offset = LITUSE_ALPHA_TLSLDM;
1878 goto do_lituse;
1879 case DUMMY_RELOC_LITUSE_JSRDIRECT:
1880 fixP->fx_offset = LITUSE_ALPHA_JSRDIRECT;
1881 goto do_lituse;
1882 do_lituse:
1883 fixP->fx_addsy = section_symbol (now_seg);
1884 fixP->fx_r_type = BFD_RELOC_ALPHA_LITUSE;
1885
1886 info = get_alpha_reloc_tag (insn->sequence);
1887 if (fixup->reloc == DUMMY_RELOC_LITUSE_TLSGD)
1888 info->saw_lu_tlsgd = 1;
1889 else if (fixup->reloc == DUMMY_RELOC_LITUSE_TLSLDM)
1890 info->saw_lu_tlsldm = 1;
1891 if (++info->n_slaves > 1)
1892 {
1893 if (info->saw_lu_tlsgd)
1894 as_bad (_("too many lituse insns for !lituse_tlsgd!%ld"),
1895 insn->sequence);
1896 else if (info->saw_lu_tlsldm)
1897 as_bad (_("too many lituse insns for !lituse_tlsldm!%ld"),
1898 insn->sequence);
1899 }
1900 fixP->tc_fix_data.info = info;
1901 fixP->tc_fix_data.next_reloc = info->slaves;
1902 info->slaves = fixP;
1903 if (info->segment != now_seg)
1904 info->multi_section_p = 1;
1905 break;
1906
1907 case BFD_RELOC_ALPHA_TLSGD:
1908 fixP->fx_no_overflow = 1;
1909
1910 if (insn->sequence == 0)
1911 break;
1912 info = get_alpha_reloc_tag (insn->sequence);
1913 if (info->saw_tlsgd)
1914 as_bad (_("duplicate !tlsgd!%ld"), insn->sequence);
1915 else if (info->saw_tlsldm)
1916 as_bad (_("sequence number in use for !tlsldm!%ld"),
1917 insn->sequence);
1918 else
1919 info->saw_tlsgd = 1;
1920 fixP->tc_fix_data.info = info;
1921 break;
1922
1923 case BFD_RELOC_ALPHA_TLSLDM:
1924 fixP->fx_no_overflow = 1;
1925
1926 if (insn->sequence == 0)
1927 break;
1928 info = get_alpha_reloc_tag (insn->sequence);
1929 if (info->saw_tlsldm)
1930 as_bad (_("duplicate !tlsldm!%ld"), insn->sequence);
1931 else if (info->saw_tlsgd)
1932 as_bad (_("sequence number in use for !tlsgd!%ld"),
1933 insn->sequence);
1934 else
1935 info->saw_tlsldm = 1;
1936 fixP->tc_fix_data.info = info;
1937 break;
1938 #endif
1939 #ifdef OBJ_EVAX
1940 case BFD_RELOC_ALPHA_NOP:
1941 case BFD_RELOC_ALPHA_LDA:
1942 case BFD_RELOC_ALPHA_BSR:
1943 case BFD_RELOC_ALPHA_BOH:
1944 info = get_alpha_reloc_tag (next_sequence_num--);
1945 fixP->tc_fix_data.info = info;
1946 fixP->tc_fix_data.info->sym = fixup->xtrasym;
1947 fixP->tc_fix_data.info->psym = fixup->procsym;
1948 break;
1949 #endif
1950
1951 default:
1952 if ((int) fixup->reloc < 0)
1953 {
1954 if (operand->flags & AXP_OPERAND_NOOVERFLOW)
1955 fixP->fx_no_overflow = 1;
1956 }
1957 break;
1958 }
1959 }
1960 }
1961
1962 /* Insert an operand value into an instruction. */
1963
1964 static unsigned
1965 insert_operand (unsigned insn,
1966 const struct alpha_operand *operand,
1967 offsetT val,
1968 char *file,
1969 unsigned line)
1970 {
1971 if (operand->bits != 32 && !(operand->flags & AXP_OPERAND_NOOVERFLOW))
1972 {
1973 offsetT min, max;
1974
1975 if (operand->flags & AXP_OPERAND_SIGNED)
1976 {
1977 max = (1 << (operand->bits - 1)) - 1;
1978 min = -(1 << (operand->bits - 1));
1979 }
1980 else
1981 {
1982 max = (1 << operand->bits) - 1;
1983 min = 0;
1984 }
1985
1986 if (val < min || val > max)
1987 as_warn_value_out_of_range (_("operand"), val, min, max, file, line);
1988 }
1989
1990 if (operand->insert)
1991 {
1992 const char *errmsg = NULL;
1993
1994 insn = (*operand->insert) (insn, val, &errmsg);
1995 if (errmsg)
1996 as_warn ("%s", errmsg);
1997 }
1998 else
1999 insn |= ((val & ((1 << operand->bits) - 1)) << operand->shift);
2000
2001 return insn;
2002 }
2003
2004 /* Turn an opcode description and a set of arguments into
2005 an instruction and a fixup. */
2006
2007 static void
2008 assemble_insn (const struct alpha_opcode *opcode,
2009 const expressionS *tok,
2010 int ntok,
2011 struct alpha_insn *insn,
2012 extended_bfd_reloc_code_real_type reloc)
2013 {
2014 const struct alpha_operand *reloc_operand = NULL;
2015 const expressionS *reloc_exp = NULL;
2016 const unsigned char *argidx;
2017 unsigned image;
2018 int tokidx = 0;
2019
2020 memset (insn, 0, sizeof (*insn));
2021 image = opcode->opcode;
2022
2023 for (argidx = opcode->operands; *argidx; ++argidx)
2024 {
2025 const struct alpha_operand *operand = &alpha_operands[*argidx];
2026 const expressionS *t = (const expressionS *) 0;
2027
2028 if (operand->flags & AXP_OPERAND_FAKE)
2029 {
2030 /* Fake operands take no value and generate no fixup. */
2031 image = insert_operand (image, operand, 0, NULL, 0);
2032 continue;
2033 }
2034
2035 if (tokidx >= ntok)
2036 {
2037 switch (operand->flags & AXP_OPERAND_OPTIONAL_MASK)
2038 {
2039 case AXP_OPERAND_DEFAULT_FIRST:
2040 t = &tok[0];
2041 break;
2042 case AXP_OPERAND_DEFAULT_SECOND:
2043 t = &tok[1];
2044 break;
2045 case AXP_OPERAND_DEFAULT_ZERO:
2046 {
2047 static expressionS zero_exp;
2048 t = &zero_exp;
2049 zero_exp.X_op = O_constant;
2050 zero_exp.X_unsigned = 1;
2051 }
2052 break;
2053 default:
2054 abort ();
2055 }
2056 }
2057 else
2058 t = &tok[tokidx++];
2059
2060 switch (t->X_op)
2061 {
2062 case O_register:
2063 case O_pregister:
2064 case O_cpregister:
2065 image = insert_operand (image, operand, regno (t->X_add_number),
2066 NULL, 0);
2067 break;
2068
2069 case O_constant:
2070 image = insert_operand (image, operand, t->X_add_number, NULL, 0);
2071 gas_assert (reloc_operand == NULL);
2072 reloc_operand = operand;
2073 reloc_exp = t;
2074 break;
2075
2076 default:
2077 /* This is only 0 for fields that should contain registers,
2078 which means this pattern shouldn't have matched. */
2079 if (operand->default_reloc == 0)
2080 abort ();
2081
2082 /* There is one special case for which an insn receives two
2083 relocations, and thus the user-supplied reloc does not
2084 override the operand reloc. */
2085 if (operand->default_reloc == BFD_RELOC_ALPHA_HINT)
2086 {
2087 struct alpha_fixup *fixup;
2088
2089 if (insn->nfixups >= MAX_INSN_FIXUPS)
2090 as_fatal (_("too many fixups"));
2091
2092 fixup = &insn->fixups[insn->nfixups++];
2093 fixup->exp = *t;
2094 fixup->reloc = BFD_RELOC_ALPHA_HINT;
2095 }
2096 else
2097 {
2098 if (reloc == BFD_RELOC_UNUSED)
2099 reloc = operand->default_reloc;
2100
2101 gas_assert (reloc_operand == NULL);
2102 reloc_operand = operand;
2103 reloc_exp = t;
2104 }
2105 break;
2106 }
2107 }
2108
2109 if (reloc != BFD_RELOC_UNUSED)
2110 {
2111 struct alpha_fixup *fixup;
2112
2113 if (insn->nfixups >= MAX_INSN_FIXUPS)
2114 as_fatal (_("too many fixups"));
2115
2116 /* ??? My but this is hacky. But the OSF/1 assembler uses the same
2117 relocation tag for both ldah and lda with gpdisp. Choose the
2118 correct internal relocation based on the opcode. */
2119 if (reloc == BFD_RELOC_ALPHA_GPDISP)
2120 {
2121 if (strcmp (opcode->name, "ldah") == 0)
2122 reloc = BFD_RELOC_ALPHA_GPDISP_HI16;
2123 else if (strcmp (opcode->name, "lda") == 0)
2124 reloc = BFD_RELOC_ALPHA_GPDISP_LO16;
2125 else
2126 as_bad (_("invalid relocation for instruction"));
2127 }
2128
2129 /* If this is a real relocation (as opposed to a lituse hint), then
2130 the relocation width should match the operand width.
2131 Take care of -MDISP in operand table. */
2132 else if (reloc < BFD_RELOC_UNUSED && reloc > 0)
2133 {
2134 reloc_howto_type *reloc_howto
2135 = bfd_reloc_type_lookup (stdoutput,
2136 (bfd_reloc_code_real_type) reloc);
2137 if (reloc_operand == NULL
2138 || reloc_howto->bitsize != reloc_operand->bits)
2139 {
2140 as_bad (_("invalid relocation for field"));
2141 return;
2142 }
2143 }
2144
2145 fixup = &insn->fixups[insn->nfixups++];
2146 if (reloc_exp)
2147 fixup->exp = *reloc_exp;
2148 else
2149 fixup->exp.X_op = O_absent;
2150 fixup->reloc = reloc;
2151 }
2152
2153 insn->insn = image;
2154 }
2155
2156 /* Handle all "simple" integer register loads -- ldq, ldq_l, ldq_u,
2157 etc. They differ from the real instructions in that they do simple
2158 expressions like the lda macro. */
2159
2160 static void
2161 emit_ir_load (const expressionS *tok,
2162 int ntok,
2163 const void * opname)
2164 {
2165 int basereg;
2166 long lituse;
2167 expressionS newtok[3];
2168 struct alpha_insn insn;
2169 const char *symname
2170 = tok[1].X_add_symbol ? S_GET_NAME (tok[1].X_add_symbol): "";
2171 int symlen = strlen (symname);
2172
2173 if (ntok == 2)
2174 basereg = (tok[1].X_op == O_constant ? AXP_REG_ZERO : alpha_gp_register);
2175 else
2176 basereg = tok[2].X_add_number;
2177
2178 lituse = load_expression (tok[0].X_add_number, &tok[1],
2179 &basereg, &newtok[1], (const char *) opname);
2180
2181 if (basereg == alpha_gp_register &&
2182 (symlen > 4 && strcmp (&symname [symlen - 4], "..lk") == 0))
2183 return;
2184
2185 newtok[0] = tok[0];
2186 set_tok_preg (newtok[2], basereg);
2187
2188 assemble_tokens_to_insn ((const char *) opname, newtok, 3, &insn);
2189
2190 if (lituse)
2191 {
2192 gas_assert (insn.nfixups < MAX_INSN_FIXUPS);
2193 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE;
2194 insn.fixups[insn.nfixups].exp.X_op = O_absent;
2195 insn.nfixups++;
2196 insn.sequence = lituse;
2197 }
2198
2199 emit_insn (&insn);
2200 }
2201
2202 /* Handle fp register loads, and both integer and fp register stores.
2203 Again, we handle simple expressions. */
2204
2205 static void
2206 emit_loadstore (const expressionS *tok,
2207 int ntok,
2208 const void * opname)
2209 {
2210 int basereg;
2211 long lituse;
2212 expressionS newtok[3];
2213 struct alpha_insn insn;
2214
2215 if (ntok == 2)
2216 basereg = (tok[1].X_op == O_constant ? AXP_REG_ZERO : alpha_gp_register);
2217 else
2218 basereg = tok[2].X_add_number;
2219
2220 if (tok[1].X_op != O_constant || !range_signed_16 (tok[1].X_add_number))
2221 {
2222 if (alpha_noat_on)
2223 as_bad (_("macro requires $at register while noat in effect"));
2224
2225 lituse = load_expression (AXP_REG_AT, &tok[1],
2226 &basereg, &newtok[1], (const char *) opname);
2227 }
2228 else
2229 {
2230 newtok[1] = tok[1];
2231 lituse = 0;
2232 }
2233
2234 newtok[0] = tok[0];
2235 set_tok_preg (newtok[2], basereg);
2236
2237 assemble_tokens_to_insn ((const char *) opname, newtok, 3, &insn);
2238
2239 if (lituse)
2240 {
2241 gas_assert (insn.nfixups < MAX_INSN_FIXUPS);
2242 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE;
2243 insn.fixups[insn.nfixups].exp.X_op = O_absent;
2244 insn.nfixups++;
2245 insn.sequence = lituse;
2246 }
2247
2248 emit_insn (&insn);
2249 }
2250
2251 /* Load a half-word or byte as an unsigned value. */
2252
2253 static void
2254 emit_ldXu (const expressionS *tok,
2255 int ntok,
2256 const void * vlgsize)
2257 {
2258 if (alpha_target & AXP_OPCODE_BWX)
2259 emit_ir_load (tok, ntok, ldXu_op[(long) vlgsize]);
2260 else
2261 {
2262 expressionS newtok[3];
2263 struct alpha_insn insn;
2264 int basereg;
2265 long lituse;
2266
2267 if (alpha_noat_on)
2268 as_bad (_("macro requires $at register while noat in effect"));
2269
2270 if (ntok == 2)
2271 basereg = (tok[1].X_op == O_constant
2272 ? AXP_REG_ZERO : alpha_gp_register);
2273 else
2274 basereg = tok[2].X_add_number;
2275
2276 /* Emit "lda $at, exp". */
2277 lituse = load_expression (AXP_REG_AT, &tok[1], &basereg, NULL, "lda");
2278
2279 /* Emit "ldq_u targ, 0($at)". */
2280 newtok[0] = tok[0];
2281 set_tok_const (newtok[1], 0);
2282 set_tok_preg (newtok[2], basereg);
2283 assemble_tokens_to_insn ("ldq_u", newtok, 3, &insn);
2284
2285 if (lituse)
2286 {
2287 gas_assert (insn.nfixups < MAX_INSN_FIXUPS);
2288 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE;
2289 insn.fixups[insn.nfixups].exp.X_op = O_absent;
2290 insn.nfixups++;
2291 insn.sequence = lituse;
2292 }
2293
2294 emit_insn (&insn);
2295
2296 /* Emit "extXl targ, $at, targ". */
2297 set_tok_reg (newtok[1], basereg);
2298 newtok[2] = newtok[0];
2299 assemble_tokens_to_insn (extXl_op[(long) vlgsize], newtok, 3, &insn);
2300
2301 if (lituse)
2302 {
2303 gas_assert (insn.nfixups < MAX_INSN_FIXUPS);
2304 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BYTOFF;
2305 insn.fixups[insn.nfixups].exp.X_op = O_absent;
2306 insn.nfixups++;
2307 insn.sequence = lituse;
2308 }
2309
2310 emit_insn (&insn);
2311 }
2312 }
2313
2314 /* Load a half-word or byte as a signed value. */
2315
2316 static void
2317 emit_ldX (const expressionS *tok,
2318 int ntok,
2319 const void * vlgsize)
2320 {
2321 emit_ldXu (tok, ntok, vlgsize);
2322 assemble_tokens (sextX_op[(long) vlgsize], tok, 1, 1);
2323 }
2324
2325 /* Load an integral value from an unaligned address as an unsigned
2326 value. */
2327
2328 static void
2329 emit_uldXu (const expressionS *tok,
2330 int ntok,
2331 const void * vlgsize)
2332 {
2333 long lgsize = (long) vlgsize;
2334 expressionS newtok[3];
2335
2336 if (alpha_noat_on)
2337 as_bad (_("macro requires $at register while noat in effect"));
2338
2339 /* Emit "lda $at, exp". */
2340 memcpy (newtok, tok, sizeof (expressionS) * ntok);
2341 newtok[0].X_add_number = AXP_REG_AT;
2342 assemble_tokens ("lda", newtok, ntok, 1);
2343
2344 /* Emit "ldq_u $t9, 0($at)". */
2345 set_tok_reg (newtok[0], AXP_REG_T9);
2346 set_tok_const (newtok[1], 0);
2347 set_tok_preg (newtok[2], AXP_REG_AT);
2348 assemble_tokens ("ldq_u", newtok, 3, 1);
2349
2350 /* Emit "ldq_u $t10, size-1($at)". */
2351 set_tok_reg (newtok[0], AXP_REG_T10);
2352 set_tok_const (newtok[1], (1 << lgsize) - 1);
2353 assemble_tokens ("ldq_u", newtok, 3, 1);
2354
2355 /* Emit "extXl $t9, $at, $t9". */
2356 set_tok_reg (newtok[0], AXP_REG_T9);
2357 set_tok_reg (newtok[1], AXP_REG_AT);
2358 set_tok_reg (newtok[2], AXP_REG_T9);
2359 assemble_tokens (extXl_op[lgsize], newtok, 3, 1);
2360
2361 /* Emit "extXh $t10, $at, $t10". */
2362 set_tok_reg (newtok[0], AXP_REG_T10);
2363 set_tok_reg (newtok[2], AXP_REG_T10);
2364 assemble_tokens (extXh_op[lgsize], newtok, 3, 1);
2365
2366 /* Emit "or $t9, $t10, targ". */
2367 set_tok_reg (newtok[0], AXP_REG_T9);
2368 set_tok_reg (newtok[1], AXP_REG_T10);
2369 newtok[2] = tok[0];
2370 assemble_tokens ("or", newtok, 3, 1);
2371 }
2372
2373 /* Load an integral value from an unaligned address as a signed value.
2374 Note that quads should get funneled to the unsigned load since we
2375 don't have to do the sign extension. */
2376
2377 static void
2378 emit_uldX (const expressionS *tok,
2379 int ntok,
2380 const void * vlgsize)
2381 {
2382 emit_uldXu (tok, ntok, vlgsize);
2383 assemble_tokens (sextX_op[(long) vlgsize], tok, 1, 1);
2384 }
2385
2386 /* Implement the ldil macro. */
2387
2388 static void
2389 emit_ldil (const expressionS *tok,
2390 int ntok,
2391 const void * unused ATTRIBUTE_UNUSED)
2392 {
2393 expressionS newtok[2];
2394
2395 memcpy (newtok, tok, sizeof (newtok));
2396 newtok[1].X_add_number = sign_extend_32 (tok[1].X_add_number);
2397
2398 assemble_tokens ("lda", newtok, ntok, 1);
2399 }
2400
2401 /* Store a half-word or byte. */
2402
2403 static void
2404 emit_stX (const expressionS *tok,
2405 int ntok,
2406 const void * vlgsize)
2407 {
2408 int lgsize = (int) (long) vlgsize;
2409
2410 if (alpha_target & AXP_OPCODE_BWX)
2411 emit_loadstore (tok, ntok, stX_op[lgsize]);
2412 else
2413 {
2414 expressionS newtok[3];
2415 struct alpha_insn insn;
2416 int basereg;
2417 long lituse;
2418
2419 if (alpha_noat_on)
2420 as_bad (_("macro requires $at register while noat in effect"));
2421
2422 if (ntok == 2)
2423 basereg = (tok[1].X_op == O_constant
2424 ? AXP_REG_ZERO : alpha_gp_register);
2425 else
2426 basereg = tok[2].X_add_number;
2427
2428 /* Emit "lda $at, exp". */
2429 lituse = load_expression (AXP_REG_AT, &tok[1], &basereg, NULL, "lda");
2430
2431 /* Emit "ldq_u $t9, 0($at)". */
2432 set_tok_reg (newtok[0], AXP_REG_T9);
2433 set_tok_const (newtok[1], 0);
2434 set_tok_preg (newtok[2], basereg);
2435 assemble_tokens_to_insn ("ldq_u", newtok, 3, &insn);
2436
2437 if (lituse)
2438 {
2439 gas_assert (insn.nfixups < MAX_INSN_FIXUPS);
2440 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE;
2441 insn.fixups[insn.nfixups].exp.X_op = O_absent;
2442 insn.nfixups++;
2443 insn.sequence = lituse;
2444 }
2445
2446 emit_insn (&insn);
2447
2448 /* Emit "insXl src, $at, $t10". */
2449 newtok[0] = tok[0];
2450 set_tok_reg (newtok[1], basereg);
2451 set_tok_reg (newtok[2], AXP_REG_T10);
2452 assemble_tokens_to_insn (insXl_op[lgsize], newtok, 3, &insn);
2453
2454 if (lituse)
2455 {
2456 gas_assert (insn.nfixups < MAX_INSN_FIXUPS);
2457 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BYTOFF;
2458 insn.fixups[insn.nfixups].exp.X_op = O_absent;
2459 insn.nfixups++;
2460 insn.sequence = lituse;
2461 }
2462
2463 emit_insn (&insn);
2464
2465 /* Emit "mskXl $t9, $at, $t9". */
2466 set_tok_reg (newtok[0], AXP_REG_T9);
2467 newtok[2] = newtok[0];
2468 assemble_tokens_to_insn (mskXl_op[lgsize], newtok, 3, &insn);
2469
2470 if (lituse)
2471 {
2472 gas_assert (insn.nfixups < MAX_INSN_FIXUPS);
2473 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BYTOFF;
2474 insn.fixups[insn.nfixups].exp.X_op = O_absent;
2475 insn.nfixups++;
2476 insn.sequence = lituse;
2477 }
2478
2479 emit_insn (&insn);
2480
2481 /* Emit "or $t9, $t10, $t9". */
2482 set_tok_reg (newtok[1], AXP_REG_T10);
2483 assemble_tokens ("or", newtok, 3, 1);
2484
2485 /* Emit "stq_u $t9, 0($at). */
2486 set_tok_const(newtok[1], 0);
2487 set_tok_preg (newtok[2], AXP_REG_AT);
2488 assemble_tokens_to_insn ("stq_u", newtok, 3, &insn);
2489
2490 if (lituse)
2491 {
2492 gas_assert (insn.nfixups < MAX_INSN_FIXUPS);
2493 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE;
2494 insn.fixups[insn.nfixups].exp.X_op = O_absent;
2495 insn.nfixups++;
2496 insn.sequence = lituse;
2497 }
2498
2499 emit_insn (&insn);
2500 }
2501 }
2502
2503 /* Store an integer to an unaligned address. */
2504
2505 static void
2506 emit_ustX (const expressionS *tok,
2507 int ntok,
2508 const void * vlgsize)
2509 {
2510 int lgsize = (int) (long) vlgsize;
2511 expressionS newtok[3];
2512
2513 /* Emit "lda $at, exp". */
2514 memcpy (newtok, tok, sizeof (expressionS) * ntok);
2515 newtok[0].X_add_number = AXP_REG_AT;
2516 assemble_tokens ("lda", newtok, ntok, 1);
2517
2518 /* Emit "ldq_u $9, 0($at)". */
2519 set_tok_reg (newtok[0], AXP_REG_T9);
2520 set_tok_const (newtok[1], 0);
2521 set_tok_preg (newtok[2], AXP_REG_AT);
2522 assemble_tokens ("ldq_u", newtok, 3, 1);
2523
2524 /* Emit "ldq_u $10, size-1($at)". */
2525 set_tok_reg (newtok[0], AXP_REG_T10);
2526 set_tok_const (newtok[1], (1 << lgsize) - 1);
2527 assemble_tokens ("ldq_u", newtok, 3, 1);
2528
2529 /* Emit "insXl src, $at, $t11". */
2530 newtok[0] = tok[0];
2531 set_tok_reg (newtok[1], AXP_REG_AT);
2532 set_tok_reg (newtok[2], AXP_REG_T11);
2533 assemble_tokens (insXl_op[lgsize], newtok, 3, 1);
2534
2535 /* Emit "insXh src, $at, $t12". */
2536 set_tok_reg (newtok[2], AXP_REG_T12);
2537 assemble_tokens (insXh_op[lgsize], newtok, 3, 1);
2538
2539 /* Emit "mskXl $t9, $at, $t9". */
2540 set_tok_reg (newtok[0], AXP_REG_T9);
2541 newtok[2] = newtok[0];
2542 assemble_tokens (mskXl_op[lgsize], newtok, 3, 1);
2543
2544 /* Emit "mskXh $t10, $at, $t10". */
2545 set_tok_reg (newtok[0], AXP_REG_T10);
2546 newtok[2] = newtok[0];
2547 assemble_tokens (mskXh_op[lgsize], newtok, 3, 1);
2548
2549 /* Emit "or $t9, $t11, $t9". */
2550 set_tok_reg (newtok[0], AXP_REG_T9);
2551 set_tok_reg (newtok[1], AXP_REG_T11);
2552 newtok[2] = newtok[0];
2553 assemble_tokens ("or", newtok, 3, 1);
2554
2555 /* Emit "or $t10, $t12, $t10". */
2556 set_tok_reg (newtok[0], AXP_REG_T10);
2557 set_tok_reg (newtok[1], AXP_REG_T12);
2558 newtok[2] = newtok[0];
2559 assemble_tokens ("or", newtok, 3, 1);
2560
2561 /* Emit "stq_u $t10, size-1($at)". */
2562 set_tok_reg (newtok[0], AXP_REG_T10);
2563 set_tok_const (newtok[1], (1 << lgsize) - 1);
2564 set_tok_preg (newtok[2], AXP_REG_AT);
2565 assemble_tokens ("stq_u", newtok, 3, 1);
2566
2567 /* Emit "stq_u $t9, 0($at)". */
2568 set_tok_reg (newtok[0], AXP_REG_T9);
2569 set_tok_const (newtok[1], 0);
2570 assemble_tokens ("stq_u", newtok, 3, 1);
2571 }
2572
2573 /* Sign extend a half-word or byte. The 32-bit sign extend is
2574 implemented as "addl $31, $r, $t" in the opcode table. */
2575
2576 static void
2577 emit_sextX (const expressionS *tok,
2578 int ntok,
2579 const void * vlgsize)
2580 {
2581 long lgsize = (long) vlgsize;
2582
2583 if (alpha_target & AXP_OPCODE_BWX)
2584 assemble_tokens (sextX_op[lgsize], tok, ntok, 0);
2585 else
2586 {
2587 int bitshift = 64 - 8 * (1 << lgsize);
2588 expressionS newtok[3];
2589
2590 /* Emit "sll src,bits,dst". */
2591 newtok[0] = tok[0];
2592 set_tok_const (newtok[1], bitshift);
2593 newtok[2] = tok[ntok - 1];
2594 assemble_tokens ("sll", newtok, 3, 1);
2595
2596 /* Emit "sra dst,bits,dst". */
2597 newtok[0] = newtok[2];
2598 assemble_tokens ("sra", newtok, 3, 1);
2599 }
2600 }
2601
2602 /* Implement the division and modulus macros. */
2603
2604 #ifdef OBJ_EVAX
2605
2606 /* Make register usage like in normal procedure call.
2607 Don't clobber PV and RA. */
2608
2609 static void
2610 emit_division (const expressionS *tok,
2611 int ntok,
2612 const void * symname)
2613 {
2614 /* DIVISION and MODULUS. Yech.
2615
2616 Convert
2617 OP x,y,result
2618 to
2619 mov x,R16 # if x != R16
2620 mov y,R17 # if y != R17
2621 lda AT,__OP
2622 jsr AT,(AT),0
2623 mov R0,result
2624
2625 with appropriate optimizations if R0,R16,R17 are the registers
2626 specified by the compiler. */
2627
2628 int xr, yr, rr;
2629 symbolS *sym;
2630 expressionS newtok[3];
2631
2632 xr = regno (tok[0].X_add_number);
2633 yr = regno (tok[1].X_add_number);
2634
2635 if (ntok < 3)
2636 rr = xr;
2637 else
2638 rr = regno (tok[2].X_add_number);
2639
2640 /* Move the operands into the right place. */
2641 if (yr == AXP_REG_R16 && xr == AXP_REG_R17)
2642 {
2643 /* They are in exactly the wrong order -- swap through AT. */
2644 if (alpha_noat_on)
2645 as_bad (_("macro requires $at register while noat in effect"));
2646
2647 set_tok_reg (newtok[0], AXP_REG_R16);
2648 set_tok_reg (newtok[1], AXP_REG_AT);
2649 assemble_tokens ("mov", newtok, 2, 1);
2650
2651 set_tok_reg (newtok[0], AXP_REG_R17);
2652 set_tok_reg (newtok[1], AXP_REG_R16);
2653 assemble_tokens ("mov", newtok, 2, 1);
2654
2655 set_tok_reg (newtok[0], AXP_REG_AT);
2656 set_tok_reg (newtok[1], AXP_REG_R17);
2657 assemble_tokens ("mov", newtok, 2, 1);
2658 }
2659 else
2660 {
2661 if (yr == AXP_REG_R16)
2662 {
2663 set_tok_reg (newtok[0], AXP_REG_R16);
2664 set_tok_reg (newtok[1], AXP_REG_R17);
2665 assemble_tokens ("mov", newtok, 2, 1);
2666 }
2667
2668 if (xr != AXP_REG_R16)
2669 {
2670 set_tok_reg (newtok[0], xr);
2671 set_tok_reg (newtok[1], AXP_REG_R16);
2672 assemble_tokens ("mov", newtok, 2, 1);
2673 }
2674
2675 if (yr != AXP_REG_R16 && yr != AXP_REG_R17)
2676 {
2677 set_tok_reg (newtok[0], yr);
2678 set_tok_reg (newtok[1], AXP_REG_R17);
2679 assemble_tokens ("mov", newtok, 2, 1);
2680 }
2681 }
2682
2683 sym = symbol_find_or_make ((const char *) symname);
2684
2685 set_tok_reg (newtok[0], AXP_REG_AT);
2686 set_tok_sym (newtok[1], sym, 0);
2687 assemble_tokens ("lda", newtok, 2, 1);
2688
2689 /* Call the division routine. */
2690 set_tok_reg (newtok[0], AXP_REG_AT);
2691 set_tok_cpreg (newtok[1], AXP_REG_AT);
2692 set_tok_const (newtok[2], 0);
2693 assemble_tokens ("jsr", newtok, 3, 1);
2694
2695 /* Move the result to the right place. */
2696 if (rr != AXP_REG_R0)
2697 {
2698 set_tok_reg (newtok[0], AXP_REG_R0);
2699 set_tok_reg (newtok[1], rr);
2700 assemble_tokens ("mov", newtok, 2, 1);
2701 }
2702 }
2703
2704 #else /* !OBJ_EVAX */
2705
2706 static void
2707 emit_division (const expressionS *tok,
2708 int ntok,
2709 const void * symname)
2710 {
2711 /* DIVISION and MODULUS. Yech.
2712 Convert
2713 OP x,y,result
2714 to
2715 lda pv,__OP
2716 mov x,t10
2717 mov y,t11
2718 jsr t9,(pv),__OP
2719 mov t12,result
2720
2721 with appropriate optimizations if t10,t11,t12 are the registers
2722 specified by the compiler. */
2723
2724 int xr, yr, rr;
2725 symbolS *sym;
2726 expressionS newtok[3];
2727
2728 xr = regno (tok[0].X_add_number);
2729 yr = regno (tok[1].X_add_number);
2730
2731 if (ntok < 3)
2732 rr = xr;
2733 else
2734 rr = regno (tok[2].X_add_number);
2735
2736 sym = symbol_find_or_make ((const char *) symname);
2737
2738 /* Move the operands into the right place. */
2739 if (yr == AXP_REG_T10 && xr == AXP_REG_T11)
2740 {
2741 /* They are in exactly the wrong order -- swap through AT. */
2742 if (alpha_noat_on)
2743 as_bad (_("macro requires $at register while noat in effect"));
2744
2745 set_tok_reg (newtok[0], AXP_REG_T10);
2746 set_tok_reg (newtok[1], AXP_REG_AT);
2747 assemble_tokens ("mov", newtok, 2, 1);
2748
2749 set_tok_reg (newtok[0], AXP_REG_T11);
2750 set_tok_reg (newtok[1], AXP_REG_T10);
2751 assemble_tokens ("mov", newtok, 2, 1);
2752
2753 set_tok_reg (newtok[0], AXP_REG_AT);
2754 set_tok_reg (newtok[1], AXP_REG_T11);
2755 assemble_tokens ("mov", newtok, 2, 1);
2756 }
2757 else
2758 {
2759 if (yr == AXP_REG_T10)
2760 {
2761 set_tok_reg (newtok[0], AXP_REG_T10);
2762 set_tok_reg (newtok[1], AXP_REG_T11);
2763 assemble_tokens ("mov", newtok, 2, 1);
2764 }
2765
2766 if (xr != AXP_REG_T10)
2767 {
2768 set_tok_reg (newtok[0], xr);
2769 set_tok_reg (newtok[1], AXP_REG_T10);
2770 assemble_tokens ("mov", newtok, 2, 1);
2771 }
2772
2773 if (yr != AXP_REG_T10 && yr != AXP_REG_T11)
2774 {
2775 set_tok_reg (newtok[0], yr);
2776 set_tok_reg (newtok[1], AXP_REG_T11);
2777 assemble_tokens ("mov", newtok, 2, 1);
2778 }
2779 }
2780
2781 /* Call the division routine. */
2782 set_tok_reg (newtok[0], AXP_REG_T9);
2783 set_tok_sym (newtok[1], sym, 0);
2784 assemble_tokens ("jsr", newtok, 2, 1);
2785
2786 /* Reload the GP register. */
2787 #ifdef OBJ_AOUT
2788 FIXME
2789 #endif
2790 #if defined(OBJ_ECOFF) || defined(OBJ_ELF)
2791 set_tok_reg (newtok[0], alpha_gp_register);
2792 set_tok_const (newtok[1], 0);
2793 set_tok_preg (newtok[2], AXP_REG_T9);
2794 assemble_tokens ("ldgp", newtok, 3, 1);
2795 #endif
2796
2797 /* Move the result to the right place. */
2798 if (rr != AXP_REG_T12)
2799 {
2800 set_tok_reg (newtok[0], AXP_REG_T12);
2801 set_tok_reg (newtok[1], rr);
2802 assemble_tokens ("mov", newtok, 2, 1);
2803 }
2804 }
2805
2806 #endif /* !OBJ_EVAX */
2807
2808 /* The jsr and jmp macros differ from their instruction counterparts
2809 in that they can load the target address and default most
2810 everything. */
2811
2812 static void
2813 emit_jsrjmp (const expressionS *tok,
2814 int ntok,
2815 const void * vopname)
2816 {
2817 const char *opname = (const char *) vopname;
2818 struct alpha_insn insn;
2819 expressionS newtok[3];
2820 int r, tokidx = 0;
2821 long lituse = 0;
2822
2823 if (tokidx < ntok && tok[tokidx].X_op == O_register)
2824 r = regno (tok[tokidx++].X_add_number);
2825 else
2826 r = strcmp (opname, "jmp") == 0 ? AXP_REG_ZERO : AXP_REG_RA;
2827
2828 set_tok_reg (newtok[0], r);
2829
2830 if (tokidx < ntok &&
2831 (tok[tokidx].X_op == O_pregister || tok[tokidx].X_op == O_cpregister))
2832 r = regno (tok[tokidx++].X_add_number);
2833 #ifdef OBJ_EVAX
2834 /* Keep register if jsr $n.<sym>. */
2835 #else
2836 else
2837 {
2838 int basereg = alpha_gp_register;
2839 lituse = load_expression (r = AXP_REG_PV, &tok[tokidx],
2840 &basereg, NULL, opname);
2841 }
2842 #endif
2843
2844 set_tok_cpreg (newtok[1], r);
2845
2846 #ifndef OBJ_EVAX
2847 if (tokidx < ntok)
2848 newtok[2] = tok[tokidx];
2849 else
2850 #endif
2851 set_tok_const (newtok[2], 0);
2852
2853 assemble_tokens_to_insn (opname, newtok, 3, &insn);
2854
2855 if (lituse)
2856 {
2857 gas_assert (insn.nfixups < MAX_INSN_FIXUPS);
2858 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_JSR;
2859 insn.fixups[insn.nfixups].exp.X_op = O_absent;
2860 insn.nfixups++;
2861 insn.sequence = lituse;
2862 }
2863
2864 #ifdef OBJ_EVAX
2865 if (alpha_flag_replace
2866 && r == AXP_REG_RA
2867 && tok[tokidx].X_add_symbol
2868 && alpha_linkage_symbol)
2869 {
2870 const char *symname = S_GET_NAME (tok[tokidx].X_add_symbol);
2871 int symlen = strlen (symname);
2872 char *ensymname;
2873
2874 ensymname = (char *) xmalloc (symlen + 5);
2875 memcpy (ensymname, symname, symlen);
2876 memcpy (ensymname + symlen, "..en", 5);
2877
2878 gas_assert (insn.nfixups < MAX_INSN_FIXUPS);
2879 if (insn.nfixups > 0)
2880 {
2881 memmove (&insn.fixups[1], &insn.fixups[0],
2882 sizeof(struct alpha_fixup) * insn.nfixups);
2883 }
2884
2885 /* The fixup must be the same as the BFD_RELOC_ALPHA_NOP
2886 case in load_expression. See B.4.5.2 of the OpenVMS
2887 Linker Utility Manual. */
2888 insn.fixups[0].reloc = BFD_RELOC_ALPHA_BOH;
2889 insn.fixups[0].exp.X_op = O_symbol;
2890 insn.fixups[0].exp.X_add_symbol = symbol_find_or_make (ensymname);
2891 insn.fixups[0].exp.X_add_number = 0;
2892 insn.fixups[0].xtrasym = alpha_linkage_symbol;
2893 insn.fixups[0].procsym = alpha_evax_proc->symbol;
2894 insn.nfixups++;
2895 alpha_linkage_symbol = 0;
2896 }
2897 #endif
2898
2899 emit_insn (&insn);
2900 }
2901
2902 /* The ret and jcr instructions differ from their instruction
2903 counterparts in that everything can be defaulted. */
2904
2905 static void
2906 emit_retjcr (const expressionS *tok,
2907 int ntok,
2908 const void * vopname)
2909 {
2910 const char *opname = (const char *) vopname;
2911 expressionS newtok[3];
2912 int r, tokidx = 0;
2913
2914 if (tokidx < ntok && tok[tokidx].X_op == O_register)
2915 r = regno (tok[tokidx++].X_add_number);
2916 else
2917 r = AXP_REG_ZERO;
2918
2919 set_tok_reg (newtok[0], r);
2920
2921 if (tokidx < ntok &&
2922 (tok[tokidx].X_op == O_pregister || tok[tokidx].X_op == O_cpregister))
2923 r = regno (tok[tokidx++].X_add_number);
2924 else
2925 r = AXP_REG_RA;
2926
2927 set_tok_cpreg (newtok[1], r);
2928
2929 if (tokidx < ntok)
2930 newtok[2] = tok[tokidx];
2931 else
2932 set_tok_const (newtok[2], strcmp (opname, "ret") == 0);
2933
2934 assemble_tokens (opname, newtok, 3, 0);
2935 }
2936
2937 /* Implement the ldgp macro. */
2938
2939 static void
2940 emit_ldgp (const expressionS *tok,
2941 int ntok ATTRIBUTE_UNUSED,
2942 const void * unused ATTRIBUTE_UNUSED)
2943 {
2944 #ifdef OBJ_AOUT
2945 FIXME
2946 #endif
2947 #if defined(OBJ_ECOFF) || defined(OBJ_ELF)
2948 /* from "ldgp r1,n(r2)", generate "ldah r1,X(R2); lda r1,Y(r1)"
2949 with appropriate constants and relocations. */
2950 struct alpha_insn insn;
2951 expressionS newtok[3];
2952 expressionS addend;
2953
2954 #ifdef OBJ_ECOFF
2955 if (regno (tok[2].X_add_number) == AXP_REG_PV)
2956 ecoff_set_gp_prolog_size (0);
2957 #endif
2958
2959 newtok[0] = tok[0];
2960 set_tok_const (newtok[1], 0);
2961 newtok[2] = tok[2];
2962
2963 assemble_tokens_to_insn ("ldah", newtok, 3, &insn);
2964
2965 addend = tok[1];
2966
2967 #ifdef OBJ_ECOFF
2968 if (addend.X_op != O_constant)
2969 as_bad (_("can not resolve expression"));
2970 addend.X_op = O_symbol;
2971 addend.X_add_symbol = alpha_gp_symbol;
2972 #endif
2973
2974 insn.nfixups = 1;
2975 insn.fixups[0].exp = addend;
2976 insn.fixups[0].reloc = BFD_RELOC_ALPHA_GPDISP_HI16;
2977 insn.sequence = next_sequence_num;
2978
2979 emit_insn (&insn);
2980
2981 set_tok_preg (newtok[2], tok[0].X_add_number);
2982
2983 assemble_tokens_to_insn ("lda", newtok, 3, &insn);
2984
2985 #ifdef OBJ_ECOFF
2986 addend.X_add_number += 4;
2987 #endif
2988
2989 insn.nfixups = 1;
2990 insn.fixups[0].exp = addend;
2991 insn.fixups[0].reloc = BFD_RELOC_ALPHA_GPDISP_LO16;
2992 insn.sequence = next_sequence_num--;
2993
2994 emit_insn (&insn);
2995 #else /* OBJ_ECOFF || OBJ_ELF */
2996 /* Avoid warning. */
2997 tok = NULL;
2998 #endif
2999 }
3000
3001 /* The macro table. */
3002
3003 static const struct alpha_macro alpha_macros[] =
3004 {
3005 /* Load/Store macros. */
3006 { "lda", emit_lda, NULL,
3007 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
3008 { "ldah", emit_ldah, NULL,
3009 { MACRO_IR, MACRO_EXP, MACRO_EOA } },
3010
3011 { "ldl", emit_ir_load, "ldl",
3012 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
3013 { "ldl_l", emit_ir_load, "ldl_l",
3014 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
3015 { "ldq", emit_ir_load, "ldq",
3016 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
3017 { "ldq_l", emit_ir_load, "ldq_l",
3018 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
3019 { "ldq_u", emit_ir_load, "ldq_u",
3020 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
3021 { "ldf", emit_loadstore, "ldf",
3022 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
3023 { "ldg", emit_loadstore, "ldg",
3024 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
3025 { "lds", emit_loadstore, "lds",
3026 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
3027 { "ldt", emit_loadstore, "ldt",
3028 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
3029
3030 { "ldb", emit_ldX, (void *) 0,
3031 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
3032 { "ldbu", emit_ldXu, (void *) 0,
3033 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
3034 { "ldw", emit_ldX, (void *) 1,
3035 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
3036 { "ldwu", emit_ldXu, (void *) 1,
3037 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
3038
3039 { "uldw", emit_uldX, (void *) 1,
3040 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
3041 { "uldwu", emit_uldXu, (void *) 1,
3042 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
3043 { "uldl", emit_uldX, (void *) 2,
3044 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
3045 { "uldlu", emit_uldXu, (void *) 2,
3046 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
3047 { "uldq", emit_uldXu, (void *) 3,
3048 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
3049
3050 { "ldgp", emit_ldgp, NULL,
3051 { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA } },
3052
3053 { "ldi", emit_lda, NULL,
3054 { MACRO_IR, MACRO_EXP, MACRO_EOA } },
3055 { "ldil", emit_ldil, NULL,
3056 { MACRO_IR, MACRO_EXP, MACRO_EOA } },
3057 { "ldiq", emit_lda, NULL,
3058 { MACRO_IR, MACRO_EXP, MACRO_EOA } },
3059
3060 { "stl", emit_loadstore, "stl",
3061 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
3062 { "stl_c", emit_loadstore, "stl_c",
3063 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
3064 { "stq", emit_loadstore, "stq",
3065 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
3066 { "stq_c", emit_loadstore, "stq_c",
3067 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
3068 { "stq_u", emit_loadstore, "stq_u",
3069 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
3070 { "stf", emit_loadstore, "stf",
3071 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
3072 { "stg", emit_loadstore, "stg",
3073 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
3074 { "sts", emit_loadstore, "sts",
3075 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
3076 { "stt", emit_loadstore, "stt",
3077 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
3078
3079 { "stb", emit_stX, (void *) 0,
3080 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
3081 { "stw", emit_stX, (void *) 1,
3082 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
3083 { "ustw", emit_ustX, (void *) 1,
3084 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
3085 { "ustl", emit_ustX, (void *) 2,
3086 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
3087 { "ustq", emit_ustX, (void *) 3,
3088 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
3089
3090 /* Arithmetic macros. */
3091
3092 { "sextb", emit_sextX, (void *) 0,
3093 { MACRO_IR, MACRO_IR, MACRO_EOA,
3094 MACRO_IR, MACRO_EOA,
3095 /* MACRO_EXP, MACRO_IR, MACRO_EOA */ } },
3096 { "sextw", emit_sextX, (void *) 1,
3097 { MACRO_IR, MACRO_IR, MACRO_EOA,
3098 MACRO_IR, MACRO_EOA,
3099 /* MACRO_EXP, MACRO_IR, MACRO_EOA */ } },
3100
3101 { "divl", emit_division, "__divl",
3102 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
3103 MACRO_IR, MACRO_IR, MACRO_EOA,
3104 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
3105 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
3106 { "divlu", emit_division, "__divlu",
3107 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
3108 MACRO_IR, MACRO_IR, MACRO_EOA,
3109 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
3110 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
3111 { "divq", emit_division, "__divq",
3112 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
3113 MACRO_IR, MACRO_IR, MACRO_EOA,
3114 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
3115 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
3116 { "divqu", emit_division, "__divqu",
3117 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
3118 MACRO_IR, MACRO_IR, MACRO_EOA,
3119 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
3120 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
3121 { "reml", emit_division, "__reml",
3122 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
3123 MACRO_IR, MACRO_IR, MACRO_EOA,
3124 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
3125 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
3126 { "remlu", emit_division, "__remlu",
3127 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
3128 MACRO_IR, MACRO_IR, MACRO_EOA,
3129 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
3130 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
3131 { "remq", emit_division, "__remq",
3132 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
3133 MACRO_IR, MACRO_IR, MACRO_EOA,
3134 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
3135 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
3136 { "remqu", emit_division, "__remqu",
3137 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
3138 MACRO_IR, MACRO_IR, MACRO_EOA,
3139 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
3140 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
3141
3142 { "jsr", emit_jsrjmp, "jsr",
3143 { MACRO_PIR, MACRO_EXP, MACRO_EOA,
3144 MACRO_PIR, MACRO_EOA,
3145 MACRO_IR, MACRO_EXP, MACRO_EOA,
3146 MACRO_EXP, MACRO_EOA } },
3147 { "jmp", emit_jsrjmp, "jmp",
3148 { MACRO_PIR, MACRO_EXP, MACRO_EOA,
3149 MACRO_PIR, MACRO_EOA,
3150 MACRO_IR, MACRO_EXP, MACRO_EOA,
3151 MACRO_EXP, MACRO_EOA } },
3152 { "ret", emit_retjcr, "ret",
3153 { MACRO_IR, MACRO_EXP, MACRO_EOA,
3154 MACRO_IR, MACRO_EOA,
3155 MACRO_PIR, MACRO_EXP, MACRO_EOA,
3156 MACRO_PIR, MACRO_EOA,
3157 MACRO_EXP, MACRO_EOA,
3158 MACRO_EOA } },
3159 { "jcr", emit_retjcr, "jcr",
3160 { MACRO_IR, MACRO_EXP, MACRO_EOA,
3161 MACRO_IR, MACRO_EOA,
3162 MACRO_PIR, MACRO_EXP, MACRO_EOA,
3163 MACRO_PIR, MACRO_EOA,
3164 MACRO_EXP, MACRO_EOA,
3165 MACRO_EOA } },
3166 { "jsr_coroutine", emit_retjcr, "jcr",
3167 { MACRO_IR, MACRO_EXP, MACRO_EOA,
3168 MACRO_IR, MACRO_EOA,
3169 MACRO_PIR, MACRO_EXP, MACRO_EOA,
3170 MACRO_PIR, MACRO_EOA,
3171 MACRO_EXP, MACRO_EOA,
3172 MACRO_EOA } },
3173 };
3174
3175 static const unsigned int alpha_num_macros
3176 = sizeof (alpha_macros) / sizeof (*alpha_macros);
3177
3178 /* Search forward through all variants of a macro looking for a syntax
3179 match. */
3180
3181 static const struct alpha_macro *
3182 find_macro_match (const struct alpha_macro *first_macro,
3183 const expressionS *tok,
3184 int *pntok)
3185
3186 {
3187 const struct alpha_macro *macro = first_macro;
3188 int ntok = *pntok;
3189
3190 do
3191 {
3192 const enum alpha_macro_arg *arg = macro->argsets;
3193 int tokidx = 0;
3194
3195 while (*arg)
3196 {
3197 switch (*arg)
3198 {
3199 case MACRO_EOA:
3200 if (tokidx == ntok)
3201 return macro;
3202 else
3203 tokidx = 0;
3204 break;
3205
3206 /* Index register. */
3207 case MACRO_IR:
3208 if (tokidx >= ntok || tok[tokidx].X_op != O_register
3209 || !is_ir_num (tok[tokidx].X_add_number))
3210 goto match_failed;
3211 ++tokidx;
3212 break;
3213
3214 /* Parenthesized index register. */
3215 case MACRO_PIR:
3216 if (tokidx >= ntok || tok[tokidx].X_op != O_pregister
3217 || !is_ir_num (tok[tokidx].X_add_number))
3218 goto match_failed;
3219 ++tokidx;
3220 break;
3221
3222 /* Optional parenthesized index register. */
3223 case MACRO_OPIR:
3224 if (tokidx < ntok && tok[tokidx].X_op == O_pregister
3225 && is_ir_num (tok[tokidx].X_add_number))
3226 ++tokidx;
3227 break;
3228
3229 /* Leading comma with a parenthesized index register. */
3230 case MACRO_CPIR:
3231 if (tokidx >= ntok || tok[tokidx].X_op != O_cpregister
3232 || !is_ir_num (tok[tokidx].X_add_number))
3233 goto match_failed;
3234 ++tokidx;
3235 break;
3236
3237 /* Floating point register. */
3238 case MACRO_FPR:
3239 if (tokidx >= ntok || tok[tokidx].X_op != O_register
3240 || !is_fpr_num (tok[tokidx].X_add_number))
3241 goto match_failed;
3242 ++tokidx;
3243 break;
3244
3245 /* Normal expression. */
3246 case MACRO_EXP:
3247 if (tokidx >= ntok)
3248 goto match_failed;
3249 switch (tok[tokidx].X_op)
3250 {
3251 case O_illegal:
3252 case O_absent:
3253 case O_register:
3254 case O_pregister:
3255 case O_cpregister:
3256 case O_literal:
3257 case O_lituse_base:
3258 case O_lituse_bytoff:
3259 case O_lituse_jsr:
3260 case O_gpdisp:
3261 case O_gprelhigh:
3262 case O_gprellow:
3263 case O_gprel:
3264 case O_samegp:
3265 goto match_failed;
3266
3267 default:
3268 break;
3269 }
3270 ++tokidx;
3271 break;
3272
3273 match_failed:
3274 while (*arg != MACRO_EOA)
3275 ++arg;
3276 tokidx = 0;
3277 break;
3278 }
3279 ++arg;
3280 }
3281 }
3282 while (++macro - alpha_macros < (int) alpha_num_macros
3283 && !strcmp (macro->name, first_macro->name));
3284
3285 return NULL;
3286 }
3287
3288 /* Given an opcode name and a pre-tokenized set of arguments, take the
3289 opcode all the way through emission. */
3290
3291 static void
3292 assemble_tokens (const char *opname,
3293 const expressionS *tok,
3294 int ntok,
3295 int local_macros_on)
3296 {
3297 int found_something = 0;
3298 const struct alpha_opcode *opcode;
3299 const struct alpha_macro *macro;
3300 int cpumatch = 1;
3301 extended_bfd_reloc_code_real_type reloc = BFD_RELOC_UNUSED;
3302
3303 #ifdef RELOC_OP_P
3304 /* If a user-specified relocation is present, this is not a macro. */
3305 if (ntok && USER_RELOC_P (tok[ntok - 1].X_op))
3306 {
3307 reloc = ALPHA_RELOC_TABLE (tok[ntok - 1].X_op)->reloc;
3308 ntok--;
3309 }
3310 else
3311 #endif
3312 if (local_macros_on)
3313 {
3314 macro = ((const struct alpha_macro *)
3315 hash_find (alpha_macro_hash, opname));
3316 if (macro)
3317 {
3318 found_something = 1;
3319 macro = find_macro_match (macro, tok, &ntok);
3320 if (macro)
3321 {
3322 (*macro->emit) (tok, ntok, macro->arg);
3323 return;
3324 }
3325 }
3326 }
3327
3328 /* Search opcodes. */
3329 opcode = (const struct alpha_opcode *) hash_find (alpha_opcode_hash, opname);
3330 if (opcode)
3331 {
3332 found_something = 1;
3333 opcode = find_opcode_match (opcode, tok, &ntok, &cpumatch);
3334 if (opcode)
3335 {
3336 struct alpha_insn insn;
3337 assemble_insn (opcode, tok, ntok, &insn, reloc);
3338
3339 /* Copy the sequence number for the reloc from the reloc token. */
3340 if (reloc != BFD_RELOC_UNUSED)
3341 insn.sequence = tok[ntok].X_add_number;
3342
3343 emit_insn (&insn);
3344 return;
3345 }
3346 }
3347
3348 if (found_something)
3349 {
3350 if (cpumatch)
3351 as_bad (_("inappropriate arguments for opcode `%s'"), opname);
3352 else
3353 as_bad (_("opcode `%s' not supported for target %s"), opname,
3354 alpha_target_name);
3355 }
3356 else
3357 as_bad (_("unknown opcode `%s'"), opname);
3358 }
3359 \f
3360 #ifdef OBJ_EVAX
3361
3362 /* Add symbol+addend to link pool.
3363 Return offset from basesym to entry in link pool.
3364
3365 Add new fixup only if offset isn't 16bit. */
3366
3367 static symbolS *
3368 add_to_link_pool (symbolS *basesym,
3369 symbolS *sym,
3370 offsetT addend)
3371 {
3372 segT current_section = now_seg;
3373 int current_subsec = now_subseg;
3374 valueT offset;
3375 char *p;
3376 segment_info_type *seginfo = seg_info (alpha_link_section);
3377 fixS *fixp;
3378 symbolS *linksym, *expsym;
3379 expressionS e;
3380
3381 offset = 0; /* ??? DBR */
3382
3383 /* @@ This assumes all entries in a given section will be of the same
3384 size... Probably correct, but unwise to rely on. */
3385 /* This must always be called with the same subsegment. */
3386
3387 if (seginfo->frchainP)
3388 for (fixp = seginfo->frchainP->fix_root;
3389 fixp != (fixS *) NULL;
3390 fixp = fixp->fx_next)
3391 {
3392 if (fixp->tc_fix_data.info
3393 && fixp->tc_fix_data.info->sym
3394 && fixp->tc_fix_data.info->sym->sy_value.X_op_symbol == basesym)
3395 offset += 8;
3396
3397 if (fixp->fx_addsy == sym
3398 && fixp->fx_offset == (valueT)addend
3399 && fixp->tc_fix_data.info
3400 && fixp->tc_fix_data.info->sym
3401 && fixp->tc_fix_data.info->sym->sy_value.X_op_symbol == basesym)
3402 return fixp->tc_fix_data.info->sym;
3403 }
3404
3405 /* Not found in 16bit signed range. */
3406
3407 subseg_set (alpha_link_section, 0);
3408 linksym = symbol_new
3409 (FAKE_LABEL_NAME, now_seg, (valueT) frag_now_fix (), frag_now);
3410 p = frag_more (8);
3411 memset (p, 0, 8);
3412
3413 e.X_op = O_subtract;
3414 e.X_add_symbol = linksym;
3415 e.X_op_symbol = basesym;
3416 e.X_add_number = 0;
3417 expsym = make_expr_symbol (&e);
3418
3419 fixp = fix_new
3420 (frag_now, p-frag_now->fr_literal, 8, sym, addend, 0, BFD_RELOC_64);
3421 fixp->tc_fix_data.info = get_alpha_reloc_tag (next_sequence_num--);
3422 fixp->tc_fix_data.info->sym = expsym;
3423
3424 subseg_set (current_section, current_subsec);
3425 seginfo->literal_pool_size += 8;
3426 return expsym;
3427 }
3428 #endif /* OBJ_EVAX */
3429 \f
3430 /* Assembler directives. */
3431
3432 /* Handle the .text pseudo-op. This is like the usual one, but it
3433 clears alpha_insn_label and restores auto alignment. */
3434
3435 static void
3436 s_alpha_text (int i)
3437 {
3438 #ifdef OBJ_ELF
3439 obj_elf_text (i);
3440 #else
3441 s_text (i);
3442 #endif
3443 #ifdef OBJ_EVAX
3444 {
3445 symbolS * symbolP;
3446
3447 symbolP = symbol_find (".text");
3448 if (symbolP == NULL)
3449 {
3450 symbolP = symbol_make (".text");
3451 S_SET_SEGMENT (symbolP, text_section);
3452 symbol_table_insert (symbolP);
3453 }
3454 }
3455 #endif
3456 alpha_insn_label = NULL;
3457 alpha_auto_align_on = 1;
3458 alpha_current_align = 0;
3459 }
3460
3461 /* Handle the .data pseudo-op. This is like the usual one, but it
3462 clears alpha_insn_label and restores auto alignment. */
3463
3464 static void
3465 s_alpha_data (int i)
3466 {
3467 #ifdef OBJ_ELF
3468 obj_elf_data (i);
3469 #else
3470 s_data (i);
3471 #endif
3472 alpha_insn_label = NULL;
3473 alpha_auto_align_on = 1;
3474 alpha_current_align = 0;
3475 }
3476
3477 #if defined (OBJ_ECOFF) || defined (OBJ_EVAX)
3478
3479 /* Handle the OSF/1 and openVMS .comm pseudo quirks. */
3480
3481 static void
3482 s_alpha_comm (int ignore ATTRIBUTE_UNUSED)
3483 {
3484 char *name;
3485 char c;
3486 char *p;
3487 offsetT size;
3488 symbolS *symbolP;
3489 #ifdef OBJ_EVAX
3490 offsetT temp;
3491 int log_align = 0;
3492 #endif
3493
3494 name = input_line_pointer;
3495 c = get_symbol_end ();
3496
3497 /* Just after name is now '\0'. */
3498 p = input_line_pointer;
3499 *p = c;
3500
3501 SKIP_WHITESPACE ();
3502
3503 /* Alpha OSF/1 compiler doesn't provide the comma, gcc does. */
3504 if (*input_line_pointer == ',')
3505 {
3506 input_line_pointer++;
3507 SKIP_WHITESPACE ();
3508 }
3509 if ((size = get_absolute_expression ()) < 0)
3510 {
3511 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
3512 ignore_rest_of_line ();
3513 return;
3514 }
3515
3516 *p = 0;
3517 symbolP = symbol_find_or_make (name);
3518 *p = c;
3519
3520 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
3521 {
3522 as_bad (_("Ignoring attempt to re-define symbol"));
3523 ignore_rest_of_line ();
3524 return;
3525 }
3526
3527 #ifdef OBJ_EVAX
3528 if (*input_line_pointer != ',')
3529 temp = 8; /* Default alignment. */
3530 else
3531 {
3532 input_line_pointer++;
3533 SKIP_WHITESPACE ();
3534 temp = get_absolute_expression ();
3535 }
3536
3537 /* ??? Unlike on OSF/1, the alignment factor is not in log units. */
3538 while ((temp >>= 1) != 0)
3539 ++log_align;
3540
3541 if (*input_line_pointer == ',')
3542 {
3543 /* Extended form of the directive
3544
3545 .comm symbol, size, alignment, section
3546
3547 where the "common" semantics is transferred to the section.
3548 The symbol is effectively an alias for the section name. */
3549
3550 segT sec;
3551 char *sec_name;
3552 symbolS *sec_symbol;
3553 segT current_seg = now_seg;
3554 subsegT current_subseg = now_subseg;
3555 int cur_size;
3556
3557 input_line_pointer++;
3558 SKIP_WHITESPACE ();
3559 sec_name = s_alpha_section_name ();
3560 sec_symbol = symbol_find_or_make (sec_name);
3561 sec = subseg_new (sec_name, 0);
3562 S_SET_SEGMENT (sec_symbol, sec);
3563 symbol_get_bfdsym (sec_symbol)->flags |= BSF_SECTION_SYM;
3564 bfd_vms_set_section_flags (stdoutput, sec,
3565 EGPS_S_V_OVR | EGPS_S_V_GBL | EGPS_S_V_NOMOD);
3566 record_alignment (sec, log_align);
3567
3568 /* Reuse stab_string_size to store the size of the section. */
3569 cur_size = seg_info (sec)->stabu.stab_string_size;
3570 if ((int) size > cur_size)
3571 {
3572 char *pfrag
3573 = frag_var (rs_fill, 1, 1, (relax_substateT)0, NULL,
3574 (valueT)size - (valueT)cur_size, NULL);
3575 *pfrag = 0;
3576 seg_info (sec)->stabu.stab_string_size = (int)size;
3577 }
3578
3579 S_SET_SEGMENT (symbolP, sec);
3580
3581 subseg_set (current_seg, current_subseg);
3582 }
3583 else
3584 {
3585 /* Regular form of the directive
3586
3587 .comm symbol, size, alignment
3588
3589 where the "common" semantics in on the symbol.
3590 These symbols are assembled in the .bss section. */
3591
3592 char *pfrag;
3593 segT current_seg = now_seg;
3594 subsegT current_subseg = now_subseg;
3595
3596 subseg_set (bss_section, 1);
3597 frag_align (log_align, 0, 0);
3598 record_alignment (bss_section, log_align);
3599
3600 symbolP->sy_frag = frag_now;
3601 pfrag = frag_var (rs_org, 1, 1, (relax_substateT)0, symbolP,
3602 size, NULL);
3603 *pfrag = 0;
3604
3605 S_SET_SEGMENT (symbolP, bss_section);
3606
3607 subseg_set (current_seg, current_subseg);
3608 }
3609 #endif
3610
3611 if (S_GET_VALUE (symbolP))
3612 {
3613 if (S_GET_VALUE (symbolP) != (valueT) size)
3614 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
3615 S_GET_NAME (symbolP),
3616 (long) S_GET_VALUE (symbolP),
3617 (long) size);
3618 }
3619 else
3620 {
3621 #ifndef OBJ_EVAX
3622 S_SET_VALUE (symbolP, (valueT) size);
3623 #endif
3624 S_SET_EXTERNAL (symbolP);
3625 }
3626
3627 #ifndef OBJ_EVAX
3628 know (symbolP->sy_frag == &zero_address_frag);
3629 #endif
3630 demand_empty_rest_of_line ();
3631 }
3632
3633 #endif /* ! OBJ_ELF */
3634
3635 #ifdef OBJ_ECOFF
3636
3637 /* Handle the .rdata pseudo-op. This is like the usual one, but it
3638 clears alpha_insn_label and restores auto alignment. */
3639
3640 static void
3641 s_alpha_rdata (int ignore ATTRIBUTE_UNUSED)
3642 {
3643 int temp;
3644
3645 temp = get_absolute_expression ();
3646 subseg_new (".rdata", 0);
3647 demand_empty_rest_of_line ();
3648 alpha_insn_label = NULL;
3649 alpha_auto_align_on = 1;
3650 alpha_current_align = 0;
3651 }
3652
3653 #endif
3654
3655 #ifdef OBJ_ECOFF
3656
3657 /* Handle the .sdata pseudo-op. This is like the usual one, but it
3658 clears alpha_insn_label and restores auto alignment. */
3659
3660 static void
3661 s_alpha_sdata (int ignore ATTRIBUTE_UNUSED)
3662 {
3663 int temp;
3664
3665 temp = get_absolute_expression ();
3666 subseg_new (".sdata", 0);
3667 demand_empty_rest_of_line ();
3668 alpha_insn_label = NULL;
3669 alpha_auto_align_on = 1;
3670 alpha_current_align = 0;
3671 }
3672 #endif
3673
3674 #ifdef OBJ_ELF
3675 struct alpha_elf_frame_data
3676 {
3677 symbolS *func_sym;
3678 symbolS *func_end_sym;
3679 symbolS *prologue_sym;
3680 unsigned int mask;
3681 unsigned int fmask;
3682 int fp_regno;
3683 int ra_regno;
3684 offsetT frame_size;
3685 offsetT mask_offset;
3686 offsetT fmask_offset;
3687
3688 struct alpha_elf_frame_data *next;
3689 };
3690
3691 static struct alpha_elf_frame_data *all_frame_data;
3692 static struct alpha_elf_frame_data **plast_frame_data = &all_frame_data;
3693 static struct alpha_elf_frame_data *cur_frame_data;
3694
3695 /* Handle the .section pseudo-op. This is like the usual one, but it
3696 clears alpha_insn_label and restores auto alignment. */
3697
3698 static void
3699 s_alpha_section (int ignore ATTRIBUTE_UNUSED)
3700 {
3701 obj_elf_section (ignore);
3702
3703 alpha_insn_label = NULL;
3704 alpha_auto_align_on = 1;
3705 alpha_current_align = 0;
3706 }
3707
3708 static void
3709 s_alpha_ent (int dummy ATTRIBUTE_UNUSED)
3710 {
3711 if (ECOFF_DEBUGGING)
3712 ecoff_directive_ent (0);
3713 else
3714 {
3715 char *name, name_end;
3716 name = input_line_pointer;
3717 name_end = get_symbol_end ();
3718
3719 if (! is_name_beginner (*name))
3720 {
3721 as_warn (_(".ent directive has no name"));
3722 *input_line_pointer = name_end;
3723 }
3724 else
3725 {
3726 symbolS *sym;
3727
3728 if (cur_frame_data)
3729 as_warn (_("nested .ent directives"));
3730
3731 sym = symbol_find_or_make (name);
3732 symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION;
3733
3734 cur_frame_data = (struct alpha_elf_frame_data *)
3735 calloc (1, sizeof (*cur_frame_data));
3736 cur_frame_data->func_sym = sym;
3737
3738 /* Provide sensible defaults. */
3739 cur_frame_data->fp_regno = 30; /* sp */
3740 cur_frame_data->ra_regno = 26; /* ra */
3741
3742 *plast_frame_data = cur_frame_data;
3743 plast_frame_data = &cur_frame_data->next;
3744
3745 /* The .ent directive is sometimes followed by a number. Not sure
3746 what it really means, but ignore it. */
3747 *input_line_pointer = name_end;
3748 SKIP_WHITESPACE ();
3749 if (*input_line_pointer == ',')
3750 {
3751 input_line_pointer++;
3752 SKIP_WHITESPACE ();
3753 }
3754 if (ISDIGIT (*input_line_pointer) || *input_line_pointer == '-')
3755 (void) get_absolute_expression ();
3756 }
3757 demand_empty_rest_of_line ();
3758 }
3759 }
3760
3761 static void
3762 s_alpha_end (int dummy ATTRIBUTE_UNUSED)
3763 {
3764 if (ECOFF_DEBUGGING)
3765 ecoff_directive_end (0);
3766 else
3767 {
3768 char *name, name_end;
3769 name = input_line_pointer;
3770 name_end = get_symbol_end ();
3771
3772 if (! is_name_beginner (*name))
3773 {
3774 as_warn (_(".end directive has no name"));
3775 *input_line_pointer = name_end;
3776 }
3777 else
3778 {
3779 symbolS *sym;
3780
3781 sym = symbol_find (name);
3782 if (!cur_frame_data)
3783 as_warn (_(".end directive without matching .ent"));
3784 else if (sym != cur_frame_data->func_sym)
3785 as_warn (_(".end directive names different symbol than .ent"));
3786
3787 /* Create an expression to calculate the size of the function. */
3788 if (sym && cur_frame_data)
3789 {
3790 OBJ_SYMFIELD_TYPE *obj = symbol_get_obj (sym);
3791 expressionS *exp = (expressionS *) xmalloc (sizeof (expressionS));
3792
3793 obj->size = exp;
3794 exp->X_op = O_subtract;
3795 exp->X_add_symbol = symbol_temp_new_now ();
3796 exp->X_op_symbol = sym;
3797 exp->X_add_number = 0;
3798
3799 cur_frame_data->func_end_sym = exp->X_add_symbol;
3800 }
3801
3802 cur_frame_data = NULL;
3803
3804 *input_line_pointer = name_end;
3805 }
3806 demand_empty_rest_of_line ();
3807 }
3808 }
3809
3810 static void
3811 s_alpha_mask (int fp)
3812 {
3813 if (ECOFF_DEBUGGING)
3814 {
3815 if (fp)
3816 ecoff_directive_fmask (0);
3817 else
3818 ecoff_directive_mask (0);
3819 }
3820 else
3821 {
3822 long val;
3823 offsetT offset;
3824
3825 if (!cur_frame_data)
3826 {
3827 if (fp)
3828 as_warn (_(".fmask outside of .ent"));
3829 else
3830 as_warn (_(".mask outside of .ent"));
3831 discard_rest_of_line ();
3832 return;
3833 }
3834
3835 if (get_absolute_expression_and_terminator (&val) != ',')
3836 {
3837 if (fp)
3838 as_warn (_("bad .fmask directive"));
3839 else
3840 as_warn (_("bad .mask directive"));
3841 --input_line_pointer;
3842 discard_rest_of_line ();
3843 return;
3844 }
3845
3846 offset = get_absolute_expression ();
3847 demand_empty_rest_of_line ();
3848
3849 if (fp)
3850 {
3851 cur_frame_data->fmask = val;
3852 cur_frame_data->fmask_offset = offset;
3853 }
3854 else
3855 {
3856 cur_frame_data->mask = val;
3857 cur_frame_data->mask_offset = offset;
3858 }
3859 }
3860 }
3861
3862 static void
3863 s_alpha_frame (int dummy ATTRIBUTE_UNUSED)
3864 {
3865 if (ECOFF_DEBUGGING)
3866 ecoff_directive_frame (0);
3867 else
3868 {
3869 long val;
3870
3871 if (!cur_frame_data)
3872 {
3873 as_warn (_(".frame outside of .ent"));
3874 discard_rest_of_line ();
3875 return;
3876 }
3877
3878 cur_frame_data->fp_regno = tc_get_register (1);
3879
3880 SKIP_WHITESPACE ();
3881 if (*input_line_pointer++ != ','
3882 || get_absolute_expression_and_terminator (&val) != ',')
3883 {
3884 as_warn (_("bad .frame directive"));
3885 --input_line_pointer;
3886 discard_rest_of_line ();
3887 return;
3888 }
3889 cur_frame_data->frame_size = val;
3890
3891 cur_frame_data->ra_regno = tc_get_register (0);
3892
3893 /* Next comes the "offset of saved $a0 from $sp". In gcc terms
3894 this is current_function_pretend_args_size. There's no place
3895 to put this value, so ignore it. */
3896 s_ignore (42);
3897 }
3898 }
3899
3900 static void
3901 s_alpha_prologue (int ignore ATTRIBUTE_UNUSED)
3902 {
3903 symbolS *sym;
3904 int arg;
3905
3906 arg = get_absolute_expression ();
3907 demand_empty_rest_of_line ();
3908 alpha_prologue_label = symbol_new
3909 (FAKE_LABEL_NAME, now_seg, (valueT) frag_now_fix (), frag_now);
3910
3911 if (ECOFF_DEBUGGING)
3912 sym = ecoff_get_cur_proc_sym ();
3913 else
3914 sym = cur_frame_data ? cur_frame_data->func_sym : NULL;
3915
3916 if (sym == NULL)
3917 {
3918 as_bad (_(".prologue directive without a preceding .ent directive"));
3919 return;
3920 }
3921
3922 switch (arg)
3923 {
3924 case 0: /* No PV required. */
3925 S_SET_OTHER (sym, STO_ALPHA_NOPV
3926 | (S_GET_OTHER (sym) & ~STO_ALPHA_STD_GPLOAD));
3927 break;
3928 case 1: /* Std GP load. */
3929 S_SET_OTHER (sym, STO_ALPHA_STD_GPLOAD
3930 | (S_GET_OTHER (sym) & ~STO_ALPHA_STD_GPLOAD));
3931 break;
3932 case 2: /* Non-std use of PV. */
3933 break;
3934
3935 default:
3936 as_bad (_("Invalid argument %d to .prologue."), arg);
3937 break;
3938 }
3939
3940 if (cur_frame_data)
3941 cur_frame_data->prologue_sym = symbol_temp_new_now ();
3942 }
3943
3944 static char *first_file_directive;
3945
3946 static void
3947 s_alpha_file (int ignore ATTRIBUTE_UNUSED)
3948 {
3949 /* Save the first .file directive we see, so that we can change our
3950 minds about whether ecoff debugging should or shouldn't be enabled. */
3951 if (alpha_flag_mdebug < 0 && ! first_file_directive)
3952 {
3953 char *start = input_line_pointer;
3954 size_t len;
3955
3956 discard_rest_of_line ();
3957
3958 len = input_line_pointer - start;
3959 first_file_directive = (char *) xmalloc (len + 1);
3960 memcpy (first_file_directive, start, len);
3961 first_file_directive[len] = '\0';
3962
3963 input_line_pointer = start;
3964 }
3965
3966 if (ECOFF_DEBUGGING)
3967 ecoff_directive_file (0);
3968 else
3969 dwarf2_directive_file (0);
3970 }
3971
3972 static void
3973 s_alpha_loc (int ignore ATTRIBUTE_UNUSED)
3974 {
3975 if (ECOFF_DEBUGGING)
3976 ecoff_directive_loc (0);
3977 else
3978 dwarf2_directive_loc (0);
3979 }
3980
3981 static void
3982 s_alpha_stab (int n)
3983 {
3984 /* If we've been undecided about mdebug, make up our minds in favour. */
3985 if (alpha_flag_mdebug < 0)
3986 {
3987 segT sec = subseg_new (".mdebug", 0);
3988 bfd_set_section_flags (stdoutput, sec, SEC_HAS_CONTENTS | SEC_READONLY);
3989 bfd_set_section_alignment (stdoutput, sec, 3);
3990
3991 ecoff_read_begin_hook ();
3992
3993 if (first_file_directive)
3994 {
3995 char *save_ilp = input_line_pointer;
3996 input_line_pointer = first_file_directive;
3997 ecoff_directive_file (0);
3998 input_line_pointer = save_ilp;
3999 free (first_file_directive);
4000 }
4001
4002 alpha_flag_mdebug = 1;
4003 }
4004 s_stab (n);
4005 }
4006
4007 static void
4008 s_alpha_coff_wrapper (int which)
4009 {
4010 static void (* const fns[]) (int) = {
4011 ecoff_directive_begin,
4012 ecoff_directive_bend,
4013 ecoff_directive_def,
4014 ecoff_directive_dim,
4015 ecoff_directive_endef,
4016 ecoff_directive_scl,
4017 ecoff_directive_tag,
4018 ecoff_directive_val,
4019 };
4020
4021 gas_assert (which >= 0 && which < (int) (sizeof (fns)/sizeof (*fns)));
4022
4023 if (ECOFF_DEBUGGING)
4024 (*fns[which]) (0);
4025 else
4026 {
4027 as_bad (_("ECOFF debugging is disabled."));
4028 ignore_rest_of_line ();
4029 }
4030 }
4031
4032 /* Called at the end of assembly. Here we emit unwind info for frames
4033 unless the compiler has done it for us. */
4034
4035 void
4036 alpha_elf_md_end (void)
4037 {
4038 struct alpha_elf_frame_data *p;
4039
4040 if (cur_frame_data)
4041 as_warn (_(".ent directive without matching .end"));
4042
4043 /* If someone has generated the unwind info themselves, great. */
4044 if (bfd_get_section_by_name (stdoutput, ".eh_frame") != NULL)
4045 return;
4046
4047 /* Generate .eh_frame data for the unwind directives specified. */
4048 for (p = all_frame_data; p ; p = p->next)
4049 if (p->prologue_sym)
4050 {
4051 /* Create a temporary symbol at the same location as our
4052 function symbol. This prevents problems with globals. */
4053 cfi_new_fde (symbol_temp_new (S_GET_SEGMENT (p->func_sym),
4054 S_GET_VALUE (p->func_sym),
4055 symbol_get_frag (p->func_sym)));
4056
4057 cfi_set_return_column (p->ra_regno);
4058 cfi_add_CFA_def_cfa_register (30);
4059 if (p->fp_regno != 30 || p->mask || p->fmask || p->frame_size)
4060 {
4061 unsigned int mask;
4062 offsetT offset;
4063
4064 cfi_add_advance_loc (p->prologue_sym);
4065
4066 if (p->fp_regno != 30)
4067 if (p->frame_size != 0)
4068 cfi_add_CFA_def_cfa (p->fp_regno, p->frame_size);
4069 else
4070 cfi_add_CFA_def_cfa_register (p->fp_regno);
4071 else if (p->frame_size != 0)
4072 cfi_add_CFA_def_cfa_offset (p->frame_size);
4073
4074 mask = p->mask;
4075 offset = p->mask_offset;
4076
4077 /* Recall that $26 is special-cased and stored first. */
4078 if ((mask >> 26) & 1)
4079 {
4080 cfi_add_CFA_offset (26, offset);
4081 offset += 8;
4082 mask &= ~(1 << 26);
4083 }
4084 while (mask)
4085 {
4086 unsigned int i;
4087 i = mask & -mask;
4088 mask ^= i;
4089 i = ffs (i) - 1;
4090
4091 cfi_add_CFA_offset (i, offset);
4092 offset += 8;
4093 }
4094
4095 mask = p->fmask;
4096 offset = p->fmask_offset;
4097 while (mask)
4098 {
4099 unsigned int i;
4100 i = mask & -mask;
4101 mask ^= i;
4102 i = ffs (i) - 1;
4103
4104 cfi_add_CFA_offset (i + 32, offset);
4105 offset += 8;
4106 }
4107 }
4108
4109 cfi_end_fde (p->func_end_sym);
4110 }
4111 }
4112
4113 static void
4114 s_alpha_usepv (int unused ATTRIBUTE_UNUSED)
4115 {
4116 char *name, name_end;
4117 char *which, which_end;
4118 symbolS *sym;
4119 int other;
4120
4121 name = input_line_pointer;
4122 name_end = get_symbol_end ();
4123
4124 if (! is_name_beginner (*name))
4125 {
4126 as_bad (_(".usepv directive has no name"));
4127 *input_line_pointer = name_end;
4128 ignore_rest_of_line ();
4129 return;
4130 }
4131
4132 sym = symbol_find_or_make (name);
4133 *input_line_pointer++ = name_end;
4134
4135 if (name_end != ',')
4136 {
4137 as_bad (_(".usepv directive has no type"));
4138 ignore_rest_of_line ();
4139 return;
4140 }
4141
4142 SKIP_WHITESPACE ();
4143 which = input_line_pointer;
4144 which_end = get_symbol_end ();
4145
4146 if (strcmp (which, "no") == 0)
4147 other = STO_ALPHA_NOPV;
4148 else if (strcmp (which, "std") == 0)
4149 other = STO_ALPHA_STD_GPLOAD;
4150 else
4151 {
4152 as_bad (_("unknown argument for .usepv"));
4153 other = 0;
4154 }
4155
4156 *input_line_pointer = which_end;
4157 demand_empty_rest_of_line ();
4158
4159 S_SET_OTHER (sym, other | (S_GET_OTHER (sym) & ~STO_ALPHA_STD_GPLOAD));
4160 }
4161 #endif /* OBJ_ELF */
4162
4163 /* Standard calling conventions leaves the CFA at $30 on entry. */
4164
4165 void
4166 alpha_cfi_frame_initial_instructions (void)
4167 {
4168 cfi_add_CFA_def_cfa_register (30);
4169 }
4170
4171 #ifdef OBJ_EVAX
4172
4173 /* Get name of section. */
4174 static char *
4175 s_alpha_section_name (void)
4176 {
4177 char *name;
4178
4179 SKIP_WHITESPACE ();
4180 if (*input_line_pointer == '"')
4181 {
4182 int dummy;
4183
4184 name = demand_copy_C_string (&dummy);
4185 if (name == NULL)
4186 {
4187 ignore_rest_of_line ();
4188 return NULL;
4189 }
4190 }
4191 else
4192 {
4193 char *end = input_line_pointer;
4194
4195 while (0 == strchr ("\n\t,; ", *end))
4196 end++;
4197 if (end == input_line_pointer)
4198 {
4199 as_warn (_("missing name"));
4200 ignore_rest_of_line ();
4201 return NULL;
4202 }
4203
4204 name = xmalloc (end - input_line_pointer + 1);
4205 memcpy (name, input_line_pointer, end - input_line_pointer);
4206 name[end - input_line_pointer] = '\0';
4207 input_line_pointer = end;
4208 }
4209 SKIP_WHITESPACE ();
4210 return name;
4211 }
4212
4213 static flagword
4214 s_alpha_section_word (char *str, size_t len)
4215 {
4216 int no = 0;
4217 flagword flag = 0;
4218
4219 if (len == 5 && strncmp (str, "NO", 2) == 0)
4220 {
4221 no = 1;
4222 str += 2;
4223 len -= 2;
4224 }
4225
4226 if (len == 3)
4227 {
4228 if (strncmp (str, "PIC", 3) == 0)
4229 flag = EGPS_S_V_PIC;
4230 else if (strncmp (str, "LIB", 3) == 0)
4231 flag = EGPS_S_V_LIB;
4232 else if (strncmp (str, "OVR", 3) == 0)
4233 flag = EGPS_S_V_OVR;
4234 else if (strncmp (str, "REL", 3) == 0)
4235 flag = EGPS_S_V_REL;
4236 else if (strncmp (str, "GBL", 3) == 0)
4237 flag = EGPS_S_V_GBL;
4238 else if (strncmp (str, "SHR", 3) == 0)
4239 flag = EGPS_S_V_SHR;
4240 else if (strncmp (str, "EXE", 3) == 0)
4241 flag = EGPS_S_V_EXE;
4242 else if (strncmp (str, "WRT", 3) == 0)
4243 flag = EGPS_S_V_WRT;
4244 else if (strncmp (str, "VEC", 3) == 0)
4245 flag = EGPS_S_V_VEC;
4246 else if (strncmp (str, "MOD", 3) == 0)
4247 {
4248 flag = no ? EGPS_S_V_NOMOD : EGPS_S_V_NOMOD << EGPS_S_V_NO_SHIFT;
4249 no = 0;
4250 }
4251 else if (strncmp (str, "COM", 3) == 0)
4252 flag = EGPS_S_V_COM;
4253 }
4254
4255 if (flag == 0)
4256 {
4257 char c = str[len];
4258 str[len] = 0;
4259 as_warn (_("unknown section attribute %s"), str);
4260 str[len] = c;
4261 return 0;
4262 }
4263
4264 if (no)
4265 return flag << EGPS_S_V_NO_SHIFT;
4266 else
4267 return flag;
4268 }
4269
4270 /* Handle the section specific pseudo-op. */
4271
4272 #define EVAX_SECTION_COUNT 5
4273
4274 static char *section_name[EVAX_SECTION_COUNT + 1] =
4275 { "NULL", ".rdata", ".comm", ".link", ".ctors", ".dtors" };
4276
4277 static void
4278 s_alpha_section (int secid)
4279 {
4280 int temp;
4281 char *name, *beg;
4282 segT sec;
4283 flagword vms_flags = 0;
4284 symbolS *symbol;
4285
4286 if (secid == 0)
4287 {
4288 name = s_alpha_section_name ();
4289 if (name == NULL)
4290 return;
4291 sec = subseg_new (name, 0);
4292 if (*input_line_pointer == ',')
4293 {
4294 /* Skip the comma. */
4295 ++input_line_pointer;
4296 SKIP_WHITESPACE ();
4297
4298 do
4299 {
4300 char c;
4301
4302 SKIP_WHITESPACE ();
4303 beg = input_line_pointer;
4304 c = get_symbol_end ();
4305 *input_line_pointer = c;
4306
4307 vms_flags |= s_alpha_section_word (beg, input_line_pointer - beg);
4308
4309 SKIP_WHITESPACE ();
4310 }
4311 while (*input_line_pointer++ == ',');
4312 --input_line_pointer;
4313 }
4314
4315 symbol = symbol_find_or_make (name);
4316 S_SET_SEGMENT (symbol, sec);
4317 symbol_get_bfdsym (symbol)->flags |= BSF_SECTION_SYM;
4318 bfd_vms_set_section_flags (stdoutput, sec, vms_flags);
4319 }
4320 else
4321 {
4322 temp = get_absolute_expression ();
4323 subseg_new (section_name[secid], 0);
4324 }
4325
4326 demand_empty_rest_of_line ();
4327 alpha_insn_label = NULL;
4328 alpha_auto_align_on = 1;
4329 alpha_current_align = 0;
4330 }
4331
4332 static void
4333 s_alpha_literals (int ignore ATTRIBUTE_UNUSED)
4334 {
4335 subseg_new (".literals", 0);
4336 demand_empty_rest_of_line ();
4337 alpha_insn_label = NULL;
4338 alpha_auto_align_on = 1;
4339 alpha_current_align = 0;
4340 }
4341
4342 /* Parse .ent directives. */
4343
4344 static void
4345 s_alpha_ent (int ignore ATTRIBUTE_UNUSED)
4346 {
4347 symbolS *symbol;
4348 expressionS symexpr;
4349
4350 alpha_evax_proc
4351 = (struct alpha_evax_procs *) xmalloc (sizeof (struct alpha_evax_procs));
4352
4353 alpha_evax_proc->pdsckind = 0;
4354 alpha_evax_proc->framereg = -1;
4355 alpha_evax_proc->framesize = 0;
4356 alpha_evax_proc->rsa_offset = 0;
4357 alpha_evax_proc->ra_save = AXP_REG_RA;
4358 alpha_evax_proc->fp_save = -1;
4359 alpha_evax_proc->imask = 0;
4360 alpha_evax_proc->fmask = 0;
4361 alpha_evax_proc->prologue = 0;
4362 alpha_evax_proc->type = 0;
4363 alpha_evax_proc->handler = 0;
4364 alpha_evax_proc->handler_data = 0;
4365
4366 expression (&symexpr);
4367
4368 if (symexpr.X_op != O_symbol)
4369 {
4370 as_fatal (_(".ent directive has no symbol"));
4371 demand_empty_rest_of_line ();
4372 return;
4373 }
4374
4375 symbol = make_expr_symbol (&symexpr);
4376 symbol_get_bfdsym (symbol)->flags |= BSF_FUNCTION;
4377 alpha_evax_proc->symbol = symbol;
4378
4379 (void) hash_insert
4380 (alpha_evax_proc_hash,
4381 symbol_get_bfdsym (alpha_evax_proc->symbol)->name, (PTR)alpha_evax_proc);
4382
4383 demand_empty_rest_of_line ();
4384 }
4385
4386 static void
4387 s_alpha_handler (int is_data)
4388 {
4389 if (is_data)
4390 alpha_evax_proc->handler_data = get_absolute_expression ();
4391 else
4392 {
4393 char *name, name_end;
4394 name = input_line_pointer;
4395 name_end = get_symbol_end ();
4396
4397 if (! is_name_beginner (*name))
4398 {
4399 as_warn (_(".handler directive has no name"));
4400 *input_line_pointer = name_end;
4401 }
4402 else
4403 {
4404 symbolS *sym;
4405
4406 sym = symbol_find_or_make (name);
4407 symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION;
4408 alpha_evax_proc->handler = sym;
4409 *input_line_pointer = name_end;
4410 }
4411 }
4412 demand_empty_rest_of_line ();
4413 }
4414
4415 /* Parse .frame <framreg>,<framesize>,RA,<rsa_offset> directives. */
4416
4417 static void
4418 s_alpha_frame (int ignore ATTRIBUTE_UNUSED)
4419 {
4420 long val;
4421
4422 alpha_evax_proc->framereg = tc_get_register (1);
4423
4424 SKIP_WHITESPACE ();
4425 if (*input_line_pointer++ != ','
4426 || get_absolute_expression_and_terminator (&val) != ',')
4427 {
4428 as_warn (_("Bad .frame directive 1./2. param"));
4429 --input_line_pointer;
4430 demand_empty_rest_of_line ();
4431 return;
4432 }
4433
4434 alpha_evax_proc->framesize = val;
4435
4436 (void) tc_get_register (1);
4437 SKIP_WHITESPACE ();
4438 if (*input_line_pointer++ != ',')
4439 {
4440 as_warn (_("Bad .frame directive 3./4. param"));
4441 --input_line_pointer;
4442 demand_empty_rest_of_line ();
4443 return;
4444 }
4445 alpha_evax_proc->rsa_offset = get_absolute_expression ();
4446 }
4447
4448 static void
4449 s_alpha_prologue (int ignore ATTRIBUTE_UNUSED)
4450 {
4451 int arg;
4452
4453 arg = get_absolute_expression ();
4454 demand_empty_rest_of_line ();
4455 alpha_prologue_label = symbol_new
4456 (FAKE_LABEL_NAME, now_seg, (valueT) frag_now_fix (), frag_now);
4457 }
4458
4459 static void
4460 s_alpha_pdesc (int ignore ATTRIBUTE_UNUSED)
4461 {
4462 char *name;
4463 char name_end;
4464 register char *p;
4465 expressionS exp;
4466 symbolS *entry_sym;
4467 fixS *fixp;
4468 segment_info_type *seginfo = seg_info (alpha_link_section);
4469 const char *entry_sym_name;
4470 char *sym_name;
4471 int len;
4472
4473 if (now_seg != alpha_link_section)
4474 {
4475 as_bad (_(".pdesc directive not in link (.link) section"));
4476 demand_empty_rest_of_line ();
4477 return;
4478 }
4479
4480 expression (&exp);
4481 if (exp.X_op != O_symbol)
4482 {
4483 as_warn (_(".pdesc directive has no entry symbol"));
4484 demand_empty_rest_of_line ();
4485 return;
4486 }
4487
4488 entry_sym = make_expr_symbol (&exp);
4489 entry_sym_name = symbol_get_bfdsym (entry_sym)->name;
4490
4491 len = strlen (entry_sym_name);
4492 sym_name = (char *) xmalloc (len - 4 + 1);
4493 strncpy (sym_name, entry_sym_name, len - 4);
4494 sym_name [len - 4] = 0;
4495
4496 alpha_evax_proc = (struct alpha_evax_procs *)
4497 hash_find (alpha_evax_proc_hash, sym_name);
4498
4499 if (!alpha_evax_proc || !S_IS_DEFINED (alpha_evax_proc->symbol))
4500 {
4501 as_fatal (_(".pdesc has no matching .ent"));
4502 demand_empty_rest_of_line ();
4503 return;
4504 }
4505
4506 *symbol_get_obj (alpha_evax_proc->symbol) =
4507 (valueT) seginfo->literal_pool_size;
4508
4509 alpha_evax_proc->symbol->sy_obj = (valueT)seginfo->literal_pool_size;
4510
4511 /* Save bfd symbol of proc entry in function symbol. */
4512 ((struct evax_private_udata_struct *)
4513 symbol_get_bfdsym (alpha_evax_proc->symbol)->udata.p)->enbsym
4514 = symbol_get_bfdsym (entry_sym);
4515
4516 SKIP_WHITESPACE ();
4517 if (*input_line_pointer++ != ',')
4518 {
4519 as_warn (_("No comma after .pdesc <entryname>"));
4520 demand_empty_rest_of_line ();
4521 return;
4522 }
4523
4524 SKIP_WHITESPACE ();
4525 name = input_line_pointer;
4526 name_end = get_symbol_end ();
4527
4528 if (strncmp (name, "stack", 5) == 0)
4529 alpha_evax_proc->pdsckind = PDSC_S_K_KIND_FP_STACK;
4530
4531 else if (strncmp (name, "reg", 3) == 0)
4532 alpha_evax_proc->pdsckind = PDSC_S_K_KIND_FP_REGISTER;
4533
4534 else if (strncmp (name, "null", 4) == 0)
4535 alpha_evax_proc->pdsckind = PDSC_S_K_KIND_NULL;
4536
4537 else
4538 {
4539 as_fatal (_("unknown procedure kind"));
4540 demand_empty_rest_of_line ();
4541 return;
4542 }
4543
4544 *input_line_pointer = name_end;
4545 demand_empty_rest_of_line ();
4546
4547 #ifdef md_flush_pending_output
4548 md_flush_pending_output ();
4549 #endif
4550
4551 frag_align (3, 0, 0);
4552 p = frag_more (16);
4553 fixp = fix_new (frag_now, p - frag_now->fr_literal, 8, 0, 0, 0, 0);
4554 fixp->fx_done = 1;
4555 seginfo->literal_pool_size += 16;
4556
4557 *p = alpha_evax_proc->pdsckind
4558 | ((alpha_evax_proc->framereg == 29) ? PDSC_S_M_BASE_REG_IS_FP : 0)
4559 | ((alpha_evax_proc->handler) ? PDSC_S_M_HANDLER_VALID : 0)
4560 | ((alpha_evax_proc->handler_data) ? PDSC_S_M_HANDLER_DATA_VALID : 0);
4561 *(p + 1) = PDSC_S_M_NATIVE | PDSC_S_M_NO_JACKET;
4562
4563 switch (alpha_evax_proc->pdsckind)
4564 {
4565 case PDSC_S_K_KIND_NULL:
4566 *(p + 2) = 0;
4567 *(p + 3) = 0;
4568 break;
4569 case PDSC_S_K_KIND_FP_REGISTER:
4570 *(p + 2) = alpha_evax_proc->fp_save;
4571 *(p + 3) = alpha_evax_proc->ra_save;
4572 break;
4573 case PDSC_S_K_KIND_FP_STACK:
4574 md_number_to_chars (p + 2, (valueT) alpha_evax_proc->rsa_offset, 2);
4575 break;
4576 default: /* impossible */
4577 break;
4578 }
4579
4580 *(p + 4) = 0;
4581 *(p + 5) = alpha_evax_proc->type & 0x0f;
4582
4583 /* Signature offset. */
4584 md_number_to_chars (p + 6, (valueT) 0, 2);
4585
4586 fix_new_exp (frag_now, p - frag_now->fr_literal+8, 8, &exp, 0, BFD_RELOC_64);
4587
4588 if (alpha_evax_proc->pdsckind == PDSC_S_K_KIND_NULL)
4589 return;
4590
4591 /* Add dummy fix to make add_to_link_pool work. */
4592 p = frag_more (6);
4593 fixp = fix_new (frag_now, p - frag_now->fr_literal, 6, 0, 0, 0, 0);
4594 fixp->fx_done = 1;
4595 seginfo->literal_pool_size += 6;
4596
4597 /* pdesc+16: Size. */
4598 md_number_to_chars (p, (valueT) alpha_evax_proc->framesize, 4);
4599
4600 md_number_to_chars (p + 4, (valueT) 0, 2);
4601
4602 /* Entry length. */
4603 exp.X_op = O_subtract;
4604 exp.X_add_symbol = alpha_prologue_label;
4605 exp.X_op_symbol = entry_sym;
4606 emit_expr (&exp, 2);
4607
4608 if (alpha_evax_proc->pdsckind == PDSC_S_K_KIND_FP_REGISTER)
4609 return;
4610
4611 /* Add dummy fix to make add_to_link_pool work. */
4612 p = frag_more (8);
4613 fixp = fix_new (frag_now, p - frag_now->fr_literal, 8, 0, 0, 0, 0);
4614 fixp->fx_done = 1;
4615 seginfo->literal_pool_size += 8;
4616
4617 /* pdesc+24: register masks. */
4618
4619 md_number_to_chars (p, alpha_evax_proc->imask, 4);
4620 md_number_to_chars (p + 4, alpha_evax_proc->fmask, 4);
4621
4622 if (alpha_evax_proc->handler)
4623 {
4624 p = frag_more (8);
4625 fixp = fix_new (frag_now, p - frag_now->fr_literal, 8,
4626 alpha_evax_proc->handler, 0, 0, BFD_RELOC_64);
4627 }
4628
4629 if (alpha_evax_proc->handler_data)
4630 {
4631 /* Add dummy fix to make add_to_link_pool work. */
4632 p = frag_more (8);
4633 fixp = fix_new (frag_now, p - frag_now->fr_literal, 8, 0, 0, 0, 0);
4634 fixp->fx_done = 1;
4635 seginfo->literal_pool_size += 8;
4636 md_number_to_chars (p, alpha_evax_proc->handler_data, 8);
4637 }
4638 }
4639
4640 /* Support for crash debug on vms. */
4641
4642 static void
4643 s_alpha_name (int ignore ATTRIBUTE_UNUSED)
4644 {
4645 char *p;
4646 expressionS exp;
4647 segment_info_type *seginfo = seg_info (alpha_link_section);
4648
4649 if (now_seg != alpha_link_section)
4650 {
4651 as_bad (_(".name directive not in link (.link) section"));
4652 demand_empty_rest_of_line ();
4653 return;
4654 }
4655
4656 expression (&exp);
4657 if (exp.X_op != O_symbol)
4658 {
4659 as_warn (_(".name directive has no symbol"));
4660 demand_empty_rest_of_line ();
4661 return;
4662 }
4663
4664 demand_empty_rest_of_line ();
4665
4666 #ifdef md_flush_pending_output
4667 md_flush_pending_output ();
4668 #endif
4669
4670 frag_align (3, 0, 0);
4671 p = frag_more (8);
4672 seginfo->literal_pool_size += 8;
4673
4674 fix_new_exp (frag_now, p - frag_now->fr_literal, 8, &exp, 0, BFD_RELOC_64);
4675 }
4676
4677 static void
4678 s_alpha_linkage (int ignore ATTRIBUTE_UNUSED)
4679 {
4680 expressionS exp;
4681 char *p;
4682 fixS *fixp;
4683
4684 #ifdef md_flush_pending_output
4685 md_flush_pending_output ();
4686 #endif
4687
4688 expression (&exp);
4689 if (exp.X_op != O_symbol)
4690 {
4691 as_fatal (_("No symbol after .linkage"));
4692 }
4693 else
4694 {
4695 struct alpha_linkage_fixups *linkage_fixup;
4696
4697 p = frag_more (LKP_S_K_SIZE);
4698 memset (p, 0, LKP_S_K_SIZE);
4699 fixp = fix_new_exp
4700 (frag_now, p - frag_now->fr_literal, LKP_S_K_SIZE, &exp, 0,\
4701 BFD_RELOC_ALPHA_LINKAGE);
4702
4703 linkage_fixup = (struct alpha_linkage_fixups *)
4704 xmalloc (sizeof (struct alpha_linkage_fixups));
4705
4706 linkage_fixup->fixp = fixp;
4707 linkage_fixup->next = 0;
4708
4709 if (alpha_insn_label == 0)
4710 alpha_insn_label = symbol_new
4711 (FAKE_LABEL_NAME, now_seg, (valueT) frag_now_fix (), frag_now);
4712 linkage_fixup->label = alpha_insn_label;
4713
4714 if (alpha_linkage_fixup_root == 0)
4715 {
4716 alpha_linkage_fixup_root = alpha_linkage_fixup_tail = linkage_fixup;
4717 alpha_linkage_fixup_tail->next = 0;
4718 }
4719 else
4720 {
4721 alpha_linkage_fixup_tail->next = linkage_fixup;
4722 alpha_linkage_fixup_tail = linkage_fixup;
4723 alpha_linkage_fixup_tail->next = 0;
4724 }
4725 }
4726 demand_empty_rest_of_line ();
4727 }
4728
4729 static void
4730 s_alpha_code_address (int ignore ATTRIBUTE_UNUSED)
4731 {
4732 expressionS exp;
4733 char *p;
4734
4735 #ifdef md_flush_pending_output
4736 md_flush_pending_output ();
4737 #endif
4738
4739 expression (&exp);
4740 if (exp.X_op != O_symbol)
4741 as_fatal (_("No symbol after .code_address"));
4742 else
4743 {
4744 p = frag_more (8);
4745 memset (p, 0, 8);
4746 fix_new_exp (frag_now, p - frag_now->fr_literal, 8, &exp, 0,\
4747 BFD_RELOC_ALPHA_CODEADDR);
4748 }
4749 demand_empty_rest_of_line ();
4750 }
4751
4752 static void
4753 s_alpha_fp_save (int ignore ATTRIBUTE_UNUSED)
4754 {
4755
4756 alpha_evax_proc->fp_save = tc_get_register (1);
4757
4758 demand_empty_rest_of_line ();
4759 }
4760
4761 static void
4762 s_alpha_mask (int ignore ATTRIBUTE_UNUSED)
4763 {
4764 long val;
4765
4766 if (get_absolute_expression_and_terminator (&val) != ',')
4767 {
4768 as_warn (_("Bad .mask directive"));
4769 --input_line_pointer;
4770 }
4771 else
4772 {
4773 alpha_evax_proc->imask = val;
4774 (void) get_absolute_expression ();
4775 }
4776 demand_empty_rest_of_line ();
4777 }
4778
4779 static void
4780 s_alpha_fmask (int ignore ATTRIBUTE_UNUSED)
4781 {
4782 long val;
4783
4784 if (get_absolute_expression_and_terminator (&val) != ',')
4785 {
4786 as_warn (_("Bad .fmask directive"));
4787 --input_line_pointer;
4788 }
4789 else
4790 {
4791 alpha_evax_proc->fmask = val;
4792 (void) get_absolute_expression ();
4793 }
4794 demand_empty_rest_of_line ();
4795 }
4796
4797 static void
4798 s_alpha_end (int ignore ATTRIBUTE_UNUSED)
4799 {
4800 char c;
4801
4802 c = get_symbol_end ();
4803 *input_line_pointer = c;
4804 demand_empty_rest_of_line ();
4805 alpha_evax_proc = 0;
4806 }
4807
4808 static void
4809 s_alpha_file (int ignore ATTRIBUTE_UNUSED)
4810 {
4811 symbolS *s;
4812 int length;
4813 static char case_hack[32];
4814
4815 sprintf (case_hack, "<CASE:%01d%01d>",
4816 alpha_flag_hash_long_names, alpha_flag_show_after_trunc);
4817
4818 s = symbol_find_or_make (case_hack);
4819 symbol_get_bfdsym (s)->flags |= BSF_FILE;
4820
4821 get_absolute_expression ();
4822 s = symbol_find_or_make (demand_copy_string (&length));
4823 symbol_get_bfdsym (s)->flags |= BSF_FILE;
4824 demand_empty_rest_of_line ();
4825 }
4826 #endif /* OBJ_EVAX */
4827
4828 /* Handle the .gprel32 pseudo op. */
4829
4830 static void
4831 s_alpha_gprel32 (int ignore ATTRIBUTE_UNUSED)
4832 {
4833 expressionS e;
4834 char *p;
4835
4836 SKIP_WHITESPACE ();
4837 expression (&e);
4838
4839 #ifdef OBJ_ELF
4840 switch (e.X_op)
4841 {
4842 case O_constant:
4843 e.X_add_symbol = section_symbol (absolute_section);
4844 e.X_op = O_symbol;
4845 /* FALLTHRU */
4846 case O_symbol:
4847 break;
4848 default:
4849 abort ();
4850 }
4851 #else
4852 #ifdef OBJ_ECOFF
4853 switch (e.X_op)
4854 {
4855 case O_constant:
4856 e.X_add_symbol = section_symbol (absolute_section);
4857 /* fall through */
4858 case O_symbol:
4859 e.X_op = O_subtract;
4860 e.X_op_symbol = alpha_gp_symbol;
4861 break;
4862 default:
4863 abort ();
4864 }
4865 #endif
4866 #endif
4867
4868 if (alpha_auto_align_on && alpha_current_align < 2)
4869 alpha_align (2, (char *) NULL, alpha_insn_label, 0);
4870 if (alpha_current_align > 2)
4871 alpha_current_align = 2;
4872 alpha_insn_label = NULL;
4873
4874 p = frag_more (4);
4875 memset (p, 0, 4);
4876 fix_new_exp (frag_now, p - frag_now->fr_literal, 4,
4877 &e, 0, BFD_RELOC_GPREL32);
4878 }
4879
4880 /* Handle floating point allocation pseudo-ops. This is like the
4881 generic vresion, but it makes sure the current label, if any, is
4882 correctly aligned. */
4883
4884 static void
4885 s_alpha_float_cons (int type)
4886 {
4887 int log_size;
4888
4889 switch (type)
4890 {
4891 default:
4892 case 'f':
4893 case 'F':
4894 log_size = 2;
4895 break;
4896
4897 case 'd':
4898 case 'D':
4899 case 'G':
4900 log_size = 3;
4901 break;
4902
4903 case 'x':
4904 case 'X':
4905 case 'p':
4906 case 'P':
4907 log_size = 4;
4908 break;
4909 }
4910
4911 if (alpha_auto_align_on && alpha_current_align < log_size)
4912 alpha_align (log_size, (char *) NULL, alpha_insn_label, 0);
4913 if (alpha_current_align > log_size)
4914 alpha_current_align = log_size;
4915 alpha_insn_label = NULL;
4916
4917 float_cons (type);
4918 }
4919
4920 /* Handle the .proc pseudo op. We don't really do much with it except
4921 parse it. */
4922
4923 static void
4924 s_alpha_proc (int is_static ATTRIBUTE_UNUSED)
4925 {
4926 char *name;
4927 char c;
4928 char *p;
4929 symbolS *symbolP;
4930 int temp;
4931
4932 /* Takes ".proc name,nargs". */
4933 SKIP_WHITESPACE ();
4934 name = input_line_pointer;
4935 c = get_symbol_end ();
4936 p = input_line_pointer;
4937 symbolP = symbol_find_or_make (name);
4938 *p = c;
4939 SKIP_WHITESPACE ();
4940 if (*input_line_pointer != ',')
4941 {
4942 *p = 0;
4943 as_warn (_("Expected comma after name \"%s\""), name);
4944 *p = c;
4945 temp = 0;
4946 ignore_rest_of_line ();
4947 }
4948 else
4949 {
4950 input_line_pointer++;
4951 temp = get_absolute_expression ();
4952 }
4953 /* *symbol_get_obj (symbolP) = (signed char) temp; */
4954 as_warn (_("unhandled: .proc %s,%d"), name, temp);
4955 demand_empty_rest_of_line ();
4956 }
4957
4958 /* Handle the .set pseudo op. This is used to turn on and off most of
4959 the assembler features. */
4960
4961 static void
4962 s_alpha_set (int x ATTRIBUTE_UNUSED)
4963 {
4964 char *name, ch, *s;
4965 int yesno = 1;
4966
4967 SKIP_WHITESPACE ();
4968 name = input_line_pointer;
4969 ch = get_symbol_end ();
4970
4971 s = name;
4972 if (s[0] == 'n' && s[1] == 'o')
4973 {
4974 yesno = 0;
4975 s += 2;
4976 }
4977 if (!strcmp ("reorder", s))
4978 /* ignore */ ;
4979 else if (!strcmp ("at", s))
4980 alpha_noat_on = !yesno;
4981 else if (!strcmp ("macro", s))
4982 alpha_macros_on = yesno;
4983 else if (!strcmp ("move", s))
4984 /* ignore */ ;
4985 else if (!strcmp ("volatile", s))
4986 /* ignore */ ;
4987 else
4988 as_warn (_("Tried to .set unrecognized mode `%s'"), name);
4989
4990 *input_line_pointer = ch;
4991 demand_empty_rest_of_line ();
4992 }
4993
4994 /* Handle the .base pseudo op. This changes the assembler's notion of
4995 the $gp register. */
4996
4997 static void
4998 s_alpha_base (int ignore ATTRIBUTE_UNUSED)
4999 {
5000 SKIP_WHITESPACE ();
5001
5002 if (*input_line_pointer == '$')
5003 {
5004 /* $rNN form. */
5005 input_line_pointer++;
5006 if (*input_line_pointer == 'r')
5007 input_line_pointer++;
5008 }
5009
5010 alpha_gp_register = get_absolute_expression ();
5011 if (alpha_gp_register < 0 || alpha_gp_register > 31)
5012 {
5013 alpha_gp_register = AXP_REG_GP;
5014 as_warn (_("Bad base register, using $%d."), alpha_gp_register);
5015 }
5016
5017 demand_empty_rest_of_line ();
5018 }
5019
5020 /* Handle the .align pseudo-op. This aligns to a power of two. It
5021 also adjusts any current instruction label. We treat this the same
5022 way the MIPS port does: .align 0 turns off auto alignment. */
5023
5024 static void
5025 s_alpha_align (int ignore ATTRIBUTE_UNUSED)
5026 {
5027 int align;
5028 char fill, *pfill;
5029 long max_alignment = 16;
5030
5031 align = get_absolute_expression ();
5032 if (align > max_alignment)
5033 {
5034 align = max_alignment;
5035 as_bad (_("Alignment too large: %d. assumed"), align);
5036 }
5037 else if (align < 0)
5038 {
5039 as_warn (_("Alignment negative: 0 assumed"));
5040 align = 0;
5041 }
5042
5043 if (*input_line_pointer == ',')
5044 {
5045 input_line_pointer++;
5046 fill = get_absolute_expression ();
5047 pfill = &fill;
5048 }
5049 else
5050 pfill = NULL;
5051
5052 if (align != 0)
5053 {
5054 alpha_auto_align_on = 1;
5055 alpha_align (align, pfill, alpha_insn_label, 1);
5056 }
5057 else
5058 {
5059 alpha_auto_align_on = 0;
5060 }
5061
5062 demand_empty_rest_of_line ();
5063 }
5064
5065 /* Hook the normal string processor to reset known alignment. */
5066
5067 static void
5068 s_alpha_stringer (int terminate)
5069 {
5070 alpha_current_align = 0;
5071 alpha_insn_label = NULL;
5072 stringer (8 + terminate);
5073 }
5074
5075 /* Hook the normal space processing to reset known alignment. */
5076
5077 static void
5078 s_alpha_space (int ignore)
5079 {
5080 alpha_current_align = 0;
5081 alpha_insn_label = NULL;
5082 s_space (ignore);
5083 }
5084
5085 /* Hook into cons for auto-alignment. */
5086
5087 void
5088 alpha_cons_align (int size)
5089 {
5090 int log_size;
5091
5092 log_size = 0;
5093 while ((size >>= 1) != 0)
5094 ++log_size;
5095
5096 if (alpha_auto_align_on && alpha_current_align < log_size)
5097 alpha_align (log_size, (char *) NULL, alpha_insn_label, 0);
5098 if (alpha_current_align > log_size)
5099 alpha_current_align = log_size;
5100 alpha_insn_label = NULL;
5101 }
5102
5103 /* Here come the .uword, .ulong, and .uquad explicitly unaligned
5104 pseudos. We just turn off auto-alignment and call down to cons. */
5105
5106 static void
5107 s_alpha_ucons (int bytes)
5108 {
5109 int hold = alpha_auto_align_on;
5110 alpha_auto_align_on = 0;
5111 cons (bytes);
5112 alpha_auto_align_on = hold;
5113 }
5114
5115 /* Switch the working cpu type. */
5116
5117 static void
5118 s_alpha_arch (int ignored ATTRIBUTE_UNUSED)
5119 {
5120 char *name, ch;
5121 const struct cpu_type *p;
5122
5123 SKIP_WHITESPACE ();
5124 name = input_line_pointer;
5125 ch = get_symbol_end ();
5126
5127 for (p = cpu_types; p->name; ++p)
5128 if (strcmp (name, p->name) == 0)
5129 {
5130 alpha_target_name = p->name, alpha_target = p->flags;
5131 goto found;
5132 }
5133 as_warn (_("Unknown CPU identifier `%s'"), name);
5134
5135 found:
5136 *input_line_pointer = ch;
5137 demand_empty_rest_of_line ();
5138 }
5139 \f
5140 #ifdef DEBUG1
5141 /* print token expression with alpha specific extension. */
5142
5143 static void
5144 alpha_print_token (FILE *f, const expressionS *exp)
5145 {
5146 switch (exp->X_op)
5147 {
5148 case O_cpregister:
5149 putc (',', f);
5150 /* FALLTHRU */
5151 case O_pregister:
5152 putc ('(', f);
5153 {
5154 expressionS nexp = *exp;
5155 nexp.X_op = O_register;
5156 print_expr_1 (f, &nexp);
5157 }
5158 putc (')', f);
5159 break;
5160 default:
5161 print_expr_1 (f, exp);
5162 break;
5163 }
5164 }
5165 #endif
5166 \f
5167 /* The target specific pseudo-ops which we support. */
5168
5169 const pseudo_typeS md_pseudo_table[] =
5170 {
5171 #ifdef OBJ_ECOFF
5172 {"comm", s_alpha_comm, 0}, /* OSF1 compiler does this. */
5173 {"rdata", s_alpha_rdata, 0},
5174 #endif
5175 {"text", s_alpha_text, 0},
5176 {"data", s_alpha_data, 0},
5177 #ifdef OBJ_ECOFF
5178 {"sdata", s_alpha_sdata, 0},
5179 #endif
5180 #ifdef OBJ_ELF
5181 {"section", s_alpha_section, 0},
5182 {"section.s", s_alpha_section, 0},
5183 {"sect", s_alpha_section, 0},
5184 {"sect.s", s_alpha_section, 0},
5185 #endif
5186 #ifdef OBJ_EVAX
5187 {"section", s_alpha_section, 0},
5188 {"literals", s_alpha_literals, 0},
5189 {"pdesc", s_alpha_pdesc, 0},
5190 {"name", s_alpha_name, 0},
5191 {"linkage", s_alpha_linkage, 0},
5192 {"code_address", s_alpha_code_address, 0},
5193 {"ent", s_alpha_ent, 0},
5194 {"frame", s_alpha_frame, 0},
5195 {"fp_save", s_alpha_fp_save, 0},
5196 {"mask", s_alpha_mask, 0},
5197 {"fmask", s_alpha_fmask, 0},
5198 {"end", s_alpha_end, 0},
5199 {"file", s_alpha_file, 0},
5200 {"rdata", s_alpha_section, 1},
5201 {"comm", s_alpha_comm, 0},
5202 {"link", s_alpha_section, 3},
5203 {"ctors", s_alpha_section, 4},
5204 {"dtors", s_alpha_section, 5},
5205 {"handler", s_alpha_handler, 0},
5206 {"handler_data", s_alpha_handler, 1},
5207 #endif
5208 #ifdef OBJ_ELF
5209 /* Frame related pseudos. */
5210 {"ent", s_alpha_ent, 0},
5211 {"end", s_alpha_end, 0},
5212 {"mask", s_alpha_mask, 0},
5213 {"fmask", s_alpha_mask, 1},
5214 {"frame", s_alpha_frame, 0},
5215 {"prologue", s_alpha_prologue, 0},
5216 {"file", s_alpha_file, 5},
5217 {"loc", s_alpha_loc, 9},
5218 {"stabs", s_alpha_stab, 's'},
5219 {"stabn", s_alpha_stab, 'n'},
5220 {"usepv", s_alpha_usepv, 0},
5221 /* COFF debugging related pseudos. */
5222 {"begin", s_alpha_coff_wrapper, 0},
5223 {"bend", s_alpha_coff_wrapper, 1},
5224 {"def", s_alpha_coff_wrapper, 2},
5225 {"dim", s_alpha_coff_wrapper, 3},
5226 {"endef", s_alpha_coff_wrapper, 4},
5227 {"scl", s_alpha_coff_wrapper, 5},
5228 {"tag", s_alpha_coff_wrapper, 6},
5229 {"val", s_alpha_coff_wrapper, 7},
5230 #else
5231 #ifdef OBJ_EVAX
5232 {"prologue", s_alpha_prologue, 0},
5233 #else
5234 {"prologue", s_ignore, 0},
5235 #endif
5236 #endif
5237 {"gprel32", s_alpha_gprel32, 0},
5238 {"t_floating", s_alpha_float_cons, 'd'},
5239 {"s_floating", s_alpha_float_cons, 'f'},
5240 {"f_floating", s_alpha_float_cons, 'F'},
5241 {"g_floating", s_alpha_float_cons, 'G'},
5242 {"d_floating", s_alpha_float_cons, 'D'},
5243
5244 {"proc", s_alpha_proc, 0},
5245 {"aproc", s_alpha_proc, 1},
5246 {"set", s_alpha_set, 0},
5247 {"reguse", s_ignore, 0},
5248 {"livereg", s_ignore, 0},
5249 {"base", s_alpha_base, 0}, /*??*/
5250 {"option", s_ignore, 0},
5251 {"aent", s_ignore, 0},
5252 {"ugen", s_ignore, 0},
5253 {"eflag", s_ignore, 0},
5254
5255 {"align", s_alpha_align, 0},
5256 {"double", s_alpha_float_cons, 'd'},
5257 {"float", s_alpha_float_cons, 'f'},
5258 {"single", s_alpha_float_cons, 'f'},
5259 {"ascii", s_alpha_stringer, 0},
5260 {"asciz", s_alpha_stringer, 1},
5261 {"string", s_alpha_stringer, 1},
5262 {"space", s_alpha_space, 0},
5263 {"skip", s_alpha_space, 0},
5264 {"zero", s_alpha_space, 0},
5265
5266 /* Unaligned data pseudos. */
5267 {"uword", s_alpha_ucons, 2},
5268 {"ulong", s_alpha_ucons, 4},
5269 {"uquad", s_alpha_ucons, 8},
5270
5271 #ifdef OBJ_ELF
5272 /* Dwarf wants these versions of unaligned. */
5273 {"2byte", s_alpha_ucons, 2},
5274 {"4byte", s_alpha_ucons, 4},
5275 {"8byte", s_alpha_ucons, 8},
5276 #endif
5277
5278 /* We don't do any optimizing, so we can safely ignore these. */
5279 {"noalias", s_ignore, 0},
5280 {"alias", s_ignore, 0},
5281
5282 {"arch", s_alpha_arch, 0},
5283
5284 {NULL, 0, 0},
5285 };
5286 \f
5287 #ifdef OBJ_ECOFF
5288
5289 /* @@@ GP selection voodoo. All of this seems overly complicated and
5290 unnecessary; which is the primary reason it's for ECOFF only. */
5291
5292 static inline void
5293 maybe_set_gp (asection *sec)
5294 {
5295 bfd_vma vma;
5296
5297 if (!sec)
5298 return;
5299 vma = bfd_get_section_vma (foo, sec);
5300 if (vma && vma < alpha_gp_value)
5301 alpha_gp_value = vma;
5302 }
5303
5304 static void
5305 select_gp_value (void)
5306 {
5307 gas_assert (alpha_gp_value == 0);
5308
5309 /* Get minus-one in whatever width... */
5310 alpha_gp_value = 0;
5311 alpha_gp_value--;
5312
5313 /* Select the smallest VMA of these existing sections. */
5314 maybe_set_gp (alpha_lita_section);
5315
5316 /* @@ Will a simple 0x8000 work here? If not, why not? */
5317 #define GP_ADJUSTMENT (0x8000 - 0x10)
5318
5319 alpha_gp_value += GP_ADJUSTMENT;
5320
5321 S_SET_VALUE (alpha_gp_symbol, alpha_gp_value);
5322
5323 #ifdef DEBUG1
5324 printf (_("Chose GP value of %lx\n"), alpha_gp_value);
5325 #endif
5326 }
5327 #endif /* OBJ_ECOFF */
5328
5329 #ifdef OBJ_ELF
5330 /* Map 's' to SHF_ALPHA_GPREL. */
5331
5332 bfd_vma
5333 alpha_elf_section_letter (int letter, char **ptr_msg)
5334 {
5335 if (letter == 's')
5336 return SHF_ALPHA_GPREL;
5337
5338 *ptr_msg = _("Bad .section directive: want a,s,w,x,M,S,G,T in string");
5339 return -1;
5340 }
5341
5342 /* Map SHF_ALPHA_GPREL to SEC_SMALL_DATA. */
5343
5344 flagword
5345 alpha_elf_section_flags (flagword flags, bfd_vma attr, int type ATTRIBUTE_UNUSED)
5346 {
5347 if (attr & SHF_ALPHA_GPREL)
5348 flags |= SEC_SMALL_DATA;
5349 return flags;
5350 }
5351 #endif /* OBJ_ELF */
5352
5353 /* This is called from HANDLE_ALIGN in write.c. Fill in the contents
5354 of an rs_align_code fragment. */
5355
5356 void
5357 alpha_handle_align (fragS *fragp)
5358 {
5359 static char const unop[4] = { 0x00, 0x00, 0xfe, 0x2f };
5360 static char const nopunop[8] =
5361 {
5362 0x1f, 0x04, 0xff, 0x47,
5363 0x00, 0x00, 0xfe, 0x2f
5364 };
5365
5366 int bytes, fix;
5367 char *p;
5368
5369 if (fragp->fr_type != rs_align_code)
5370 return;
5371
5372 bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix;
5373 p = fragp->fr_literal + fragp->fr_fix;
5374 fix = 0;
5375
5376 if (bytes & 3)
5377 {
5378 fix = bytes & 3;
5379 memset (p, 0, fix);
5380 p += fix;
5381 bytes -= fix;
5382 }
5383
5384 if (bytes & 4)
5385 {
5386 memcpy (p, unop, 4);
5387 p += 4;
5388 bytes -= 4;
5389 fix += 4;
5390 }
5391
5392 memcpy (p, nopunop, 8);
5393
5394 fragp->fr_fix += fix;
5395 fragp->fr_var = 8;
5396 }
5397 \f
5398 /* Public interface functions. */
5399
5400 /* This function is called once, at assembler startup time. It sets
5401 up all the tables, etc. that the MD part of the assembler will
5402 need, that can be determined before arguments are parsed. */
5403
5404 void
5405 md_begin (void)
5406 {
5407 unsigned int i;
5408
5409 /* Verify that X_op field is wide enough. */
5410 {
5411 expressionS e;
5412
5413 e.X_op = O_max;
5414 gas_assert (e.X_op == O_max);
5415 }
5416
5417 /* Create the opcode hash table. */
5418 alpha_opcode_hash = hash_new ();
5419
5420 for (i = 0; i < alpha_num_opcodes;)
5421 {
5422 const char *name, *retval, *slash;
5423
5424 name = alpha_opcodes[i].name;
5425 retval = hash_insert (alpha_opcode_hash, name, (void *) &alpha_opcodes[i]);
5426 if (retval)
5427 as_fatal (_("internal error: can't hash opcode `%s': %s"),
5428 name, retval);
5429
5430 /* Some opcodes include modifiers of various sorts with a "/mod"
5431 syntax, like the architecture manual suggests. However, for
5432 use with gcc at least, we also need access to those same opcodes
5433 without the "/". */
5434
5435 if ((slash = strchr (name, '/')) != NULL)
5436 {
5437 char *p = (char *) xmalloc (strlen (name));
5438
5439 memcpy (p, name, slash - name);
5440 strcpy (p + (slash - name), slash + 1);
5441
5442 (void) hash_insert (alpha_opcode_hash, p, (void *) &alpha_opcodes[i]);
5443 /* Ignore failures -- the opcode table does duplicate some
5444 variants in different forms, like "hw_stq" and "hw_st/q". */
5445 }
5446
5447 while (++i < alpha_num_opcodes
5448 && (alpha_opcodes[i].name == name
5449 || !strcmp (alpha_opcodes[i].name, name)))
5450 continue;
5451 }
5452
5453 /* Create the macro hash table. */
5454 alpha_macro_hash = hash_new ();
5455
5456 for (i = 0; i < alpha_num_macros;)
5457 {
5458 const char *name, *retval;
5459
5460 name = alpha_macros[i].name;
5461 retval = hash_insert (alpha_macro_hash, name, (void *) &alpha_macros[i]);
5462 if (retval)
5463 as_fatal (_("internal error: can't hash macro `%s': %s"),
5464 name, retval);
5465
5466 while (++i < alpha_num_macros
5467 && (alpha_macros[i].name == name
5468 || !strcmp (alpha_macros[i].name, name)))
5469 continue;
5470 }
5471
5472 /* Construct symbols for each of the registers. */
5473 for (i = 0; i < 32; ++i)
5474 {
5475 char name[4];
5476
5477 sprintf (name, "$%d", i);
5478 alpha_register_table[i] = symbol_create (name, reg_section, i,
5479 &zero_address_frag);
5480 }
5481
5482 for (; i < 64; ++i)
5483 {
5484 char name[5];
5485
5486 sprintf (name, "$f%d", i - 32);
5487 alpha_register_table[i] = symbol_create (name, reg_section, i,
5488 &zero_address_frag);
5489 }
5490
5491 /* Create the special symbols and sections we'll be using. */
5492
5493 /* So .sbss will get used for tiny objects. */
5494 bfd_set_gp_size (stdoutput, g_switch_value);
5495
5496 #ifdef OBJ_ECOFF
5497 create_literal_section (".lita", &alpha_lita_section, &alpha_lita_symbol);
5498
5499 /* For handling the GP, create a symbol that won't be output in the
5500 symbol table. We'll edit it out of relocs later. */
5501 alpha_gp_symbol = symbol_create ("<GP value>", alpha_lita_section, 0x8000,
5502 &zero_address_frag);
5503 #endif
5504
5505 #ifdef OBJ_EVAX
5506 create_literal_section (".link", &alpha_link_section, &alpha_link_symbol);
5507 alpha_evax_proc_hash = hash_new ();
5508 #endif
5509
5510 #ifdef OBJ_ELF
5511 if (ECOFF_DEBUGGING)
5512 {
5513 segT sec = subseg_new (".mdebug", (subsegT) 0);
5514 bfd_set_section_flags (stdoutput, sec, SEC_HAS_CONTENTS | SEC_READONLY);
5515 bfd_set_section_alignment (stdoutput, sec, 3);
5516 }
5517 #endif
5518
5519 /* Create literal lookup hash table. */
5520 alpha_literal_hash = hash_new ();
5521
5522 subseg_set (text_section, 0);
5523 }
5524
5525 /* The public interface to the instruction assembler. */
5526
5527 void
5528 md_assemble (char *str)
5529 {
5530 /* Current maximum is 13. */
5531 char opname[32];
5532 expressionS tok[MAX_INSN_ARGS];
5533 int ntok, trunclen;
5534 size_t opnamelen;
5535
5536 /* Split off the opcode. */
5537 opnamelen = strspn (str, "abcdefghijklmnopqrstuvwxyz_/46819");
5538 trunclen = (opnamelen < sizeof (opname) - 1
5539 ? opnamelen
5540 : sizeof (opname) - 1);
5541 memcpy (opname, str, trunclen);
5542 opname[trunclen] = '\0';
5543
5544 /* Tokenize the rest of the line. */
5545 if ((ntok = tokenize_arguments (str + opnamelen, tok, MAX_INSN_ARGS)) < 0)
5546 {
5547 if (ntok != TOKENIZE_ERROR_REPORT)
5548 as_bad (_("syntax error"));
5549
5550 return;
5551 }
5552
5553 /* Finish it off. */
5554 assemble_tokens (opname, tok, ntok, alpha_macros_on);
5555 }
5556
5557 /* Round up a section's size to the appropriate boundary. */
5558
5559 valueT
5560 md_section_align (segT seg, valueT size)
5561 {
5562 int align = bfd_get_section_alignment (stdoutput, seg);
5563 valueT mask = ((valueT) 1 << align) - 1;
5564
5565 return (size + mask) & ~mask;
5566 }
5567
5568 /* Turn a string in input_line_pointer into a floating point constant
5569 of type TYPE, and store the appropriate bytes in *LITP. The number
5570 of LITTLENUMS emitted is stored in *SIZEP. An error message is
5571 returned, or NULL on OK. */
5572
5573 char *
5574 md_atof (int type, char *litP, int *sizeP)
5575 {
5576 extern char *vax_md_atof (int, char *, int *);
5577
5578 switch (type)
5579 {
5580 /* VAX floats. */
5581 case 'G':
5582 /* vax_md_atof() doesn't like "G" for some reason. */
5583 type = 'g';
5584 case 'F':
5585 case 'D':
5586 return vax_md_atof (type, litP, sizeP);
5587
5588 default:
5589 return ieee_md_atof (type, litP, sizeP, FALSE);
5590 }
5591 }
5592
5593 /* Take care of the target-specific command-line options. */
5594
5595 int
5596 md_parse_option (int c, char *arg)
5597 {
5598 switch (c)
5599 {
5600 case 'F':
5601 alpha_nofloats_on = 1;
5602 break;
5603
5604 case OPTION_32ADDR:
5605 alpha_addr32_on = 1;
5606 break;
5607
5608 case 'g':
5609 alpha_debug = 1;
5610 break;
5611
5612 case 'G':
5613 g_switch_value = atoi (arg);
5614 break;
5615
5616 case 'm':
5617 {
5618 const struct cpu_type *p;
5619
5620 for (p = cpu_types; p->name; ++p)
5621 if (strcmp (arg, p->name) == 0)
5622 {
5623 alpha_target_name = p->name, alpha_target = p->flags;
5624 goto found;
5625 }
5626 as_warn (_("Unknown CPU identifier `%s'"), arg);
5627 found:;
5628 }
5629 break;
5630
5631 #ifdef OBJ_EVAX
5632 case '+': /* For g++. Hash any name > 63 chars long. */
5633 alpha_flag_hash_long_names = 1;
5634 break;
5635
5636 case 'H': /* Show new symbol after hash truncation. */
5637 alpha_flag_show_after_trunc = 1;
5638 break;
5639
5640 case 'h': /* For gnu-c/vax compatibility. */
5641 break;
5642
5643 case OPTION_REPLACE:
5644 alpha_flag_replace = 1;
5645 break;
5646
5647 case OPTION_NOREPLACE:
5648 alpha_flag_replace = 0;
5649 break;
5650 #endif
5651
5652 case OPTION_RELAX:
5653 alpha_flag_relax = 1;
5654 break;
5655
5656 #ifdef OBJ_ELF
5657 case OPTION_MDEBUG:
5658 alpha_flag_mdebug = 1;
5659 break;
5660 case OPTION_NO_MDEBUG:
5661 alpha_flag_mdebug = 0;
5662 break;
5663 #endif
5664
5665 default:
5666 return 0;
5667 }
5668
5669 return 1;
5670 }
5671
5672 /* Print a description of the command-line options that we accept. */
5673
5674 void
5675 md_show_usage (FILE *stream)
5676 {
5677 fputs (_("\
5678 Alpha options:\n\
5679 -32addr treat addresses as 32-bit values\n\
5680 -F lack floating point instructions support\n\
5681 -mev4 | -mev45 | -mev5 | -mev56 | -mpca56 | -mev6 | -mev67 | -mev68 | -mall\n\
5682 specify variant of Alpha architecture\n\
5683 -m21064 | -m21066 | -m21164 | -m21164a | -m21164pc | -m21264 | -m21264a | -m21264b\n\
5684 these variants include PALcode opcodes\n"),
5685 stream);
5686 #ifdef OBJ_EVAX
5687 fputs (_("\
5688 VMS options:\n\
5689 -+ encode (don't truncate) names longer than 64 characters\n\
5690 -H show new symbol after hash truncation\n\
5691 -replace/-noreplace enable or disable the optimization of procedure calls\n"),
5692 stream);
5693 #endif
5694 }
5695
5696 /* Decide from what point a pc-relative relocation is relative to,
5697 relative to the pc-relative fixup. Er, relatively speaking. */
5698
5699 long
5700 md_pcrel_from (fixS *fixP)
5701 {
5702 valueT addr = fixP->fx_where + fixP->fx_frag->fr_address;
5703
5704 switch (fixP->fx_r_type)
5705 {
5706 case BFD_RELOC_23_PCREL_S2:
5707 case BFD_RELOC_ALPHA_HINT:
5708 case BFD_RELOC_ALPHA_BRSGP:
5709 return addr + 4;
5710 default:
5711 return addr;
5712 }
5713 }
5714
5715 /* Attempt to simplify or even eliminate a fixup. The return value is
5716 ignored; perhaps it was once meaningful, but now it is historical.
5717 To indicate that a fixup has been eliminated, set fixP->fx_done.
5718
5719 For ELF, here it is that we transform the GPDISP_HI16 reloc we used
5720 internally into the GPDISP reloc used externally. We had to do
5721 this so that we'd have the GPDISP_LO16 reloc as a tag to compute
5722 the distance to the "lda" instruction for setting the addend to
5723 GPDISP. */
5724
5725 void
5726 md_apply_fix (fixS *fixP, valueT * valP, segT seg)
5727 {
5728 char * const fixpos = fixP->fx_frag->fr_literal + fixP->fx_where;
5729 valueT value = * valP;
5730 unsigned image, size;
5731
5732 switch (fixP->fx_r_type)
5733 {
5734 /* The GPDISP relocations are processed internally with a symbol
5735 referring to the current function's section; we need to drop
5736 in a value which, when added to the address of the start of
5737 the function, gives the desired GP. */
5738 case BFD_RELOC_ALPHA_GPDISP_HI16:
5739 {
5740 fixS *next = fixP->fx_next;
5741
5742 /* With user-specified !gpdisp relocations, we can be missing
5743 the matching LO16 reloc. We will have already issued an
5744 error message. */
5745 if (next)
5746 fixP->fx_offset = (next->fx_frag->fr_address + next->fx_where
5747 - fixP->fx_frag->fr_address - fixP->fx_where);
5748
5749 value = (value - sign_extend_16 (value)) >> 16;
5750 }
5751 #ifdef OBJ_ELF
5752 fixP->fx_r_type = BFD_RELOC_ALPHA_GPDISP;
5753 #endif
5754 goto do_reloc_gp;
5755
5756 case BFD_RELOC_ALPHA_GPDISP_LO16:
5757 value = sign_extend_16 (value);
5758 fixP->fx_offset = 0;
5759 #ifdef OBJ_ELF
5760 fixP->fx_done = 1;
5761 #endif
5762
5763 do_reloc_gp:
5764 fixP->fx_addsy = section_symbol (seg);
5765 md_number_to_chars (fixpos, value, 2);
5766 break;
5767
5768 case BFD_RELOC_16:
5769 if (fixP->fx_pcrel)
5770 fixP->fx_r_type = BFD_RELOC_16_PCREL;
5771 size = 2;
5772 goto do_reloc_xx;
5773
5774 case BFD_RELOC_32:
5775 if (fixP->fx_pcrel)
5776 fixP->fx_r_type = BFD_RELOC_32_PCREL;
5777 size = 4;
5778 goto do_reloc_xx;
5779
5780 case BFD_RELOC_64:
5781 if (fixP->fx_pcrel)
5782 fixP->fx_r_type = BFD_RELOC_64_PCREL;
5783 size = 8;
5784
5785 do_reloc_xx:
5786 if (fixP->fx_pcrel == 0 && fixP->fx_addsy == 0)
5787 {
5788 md_number_to_chars (fixpos, value, size);
5789 goto done;
5790 }
5791 return;
5792
5793 #ifdef OBJ_ECOFF
5794 case BFD_RELOC_GPREL32:
5795 gas_assert (fixP->fx_subsy == alpha_gp_symbol);
5796 fixP->fx_subsy = 0;
5797 /* FIXME: inherited this obliviousness of `value' -- why? */
5798 md_number_to_chars (fixpos, -alpha_gp_value, 4);
5799 break;
5800 #else
5801 case BFD_RELOC_GPREL32:
5802 #endif
5803 case BFD_RELOC_GPREL16:
5804 case BFD_RELOC_ALPHA_GPREL_HI16:
5805 case BFD_RELOC_ALPHA_GPREL_LO16:
5806 return;
5807
5808 case BFD_RELOC_23_PCREL_S2:
5809 if (fixP->fx_pcrel == 0 && fixP->fx_addsy == 0)
5810 {
5811 image = bfd_getl32 (fixpos);
5812 image = (image & ~0x1FFFFF) | ((value >> 2) & 0x1FFFFF);
5813 goto write_done;
5814 }
5815 return;
5816
5817 case BFD_RELOC_ALPHA_HINT:
5818 if (fixP->fx_pcrel == 0 && fixP->fx_addsy == 0)
5819 {
5820 image = bfd_getl32 (fixpos);
5821 image = (image & ~0x3FFF) | ((value >> 2) & 0x3FFF);
5822 goto write_done;
5823 }
5824 return;
5825
5826 #ifdef OBJ_ELF
5827 case BFD_RELOC_ALPHA_BRSGP:
5828 return;
5829
5830 case BFD_RELOC_ALPHA_TLSGD:
5831 case BFD_RELOC_ALPHA_TLSLDM:
5832 case BFD_RELOC_ALPHA_GOTDTPREL16:
5833 case BFD_RELOC_ALPHA_DTPREL_HI16:
5834 case BFD_RELOC_ALPHA_DTPREL_LO16:
5835 case BFD_RELOC_ALPHA_DTPREL16:
5836 case BFD_RELOC_ALPHA_GOTTPREL16:
5837 case BFD_RELOC_ALPHA_TPREL_HI16:
5838 case BFD_RELOC_ALPHA_TPREL_LO16:
5839 case BFD_RELOC_ALPHA_TPREL16:
5840 if (fixP->fx_addsy)
5841 S_SET_THREAD_LOCAL (fixP->fx_addsy);
5842 return;
5843 #endif
5844
5845 #ifdef OBJ_ECOFF
5846 case BFD_RELOC_ALPHA_LITERAL:
5847 md_number_to_chars (fixpos, value, 2);
5848 return;
5849 #endif
5850 case BFD_RELOC_ALPHA_ELF_LITERAL:
5851 case BFD_RELOC_ALPHA_LITUSE:
5852 case BFD_RELOC_ALPHA_LINKAGE:
5853 case BFD_RELOC_ALPHA_CODEADDR:
5854 return;
5855
5856 #ifdef OBJ_EVAX
5857 case BFD_RELOC_ALPHA_NOP:
5858 value -= (8 + 4); /* PC-relative, base is jsr+4. */
5859
5860 /* From B.4.5.2 of the OpenVMS Linker Utility Manual:
5861 "Finally, the ETIR$C_STC_BSR command passes the same address
5862 as ETIR$C_STC_NOP (so that they will fail or succeed together),
5863 and the same test is done again." */
5864 if (S_GET_SEGMENT (fixP->fx_addsy) == undefined_section)
5865 {
5866 fixP->fx_addnumber = -value;
5867 return;
5868 }
5869
5870 if ((abs (value) >> 2) & ~0xfffff)
5871 goto done;
5872 else
5873 {
5874 /* Change to a nop. */
5875 image = 0x47FF041F;
5876 goto write_done;
5877 }
5878
5879 case BFD_RELOC_ALPHA_LDA:
5880 /* fixup_segment sets fixP->fx_addsy to NULL when it can pre-compute
5881 the value for an O_subtract. */
5882 if (fixP->fx_addsy
5883 && S_GET_SEGMENT (fixP->fx_addsy) == undefined_section)
5884 {
5885 fixP->fx_addnumber = symbol_get_bfdsym (fixP->fx_subsy)->value;
5886 return;
5887 }
5888
5889 if ((abs (value)) & ~0x7fff)
5890 goto done;
5891 else
5892 {
5893 /* Change to an lda. */
5894 image = 0x237B0000 | (value & 0xFFFF);
5895 goto write_done;
5896 }
5897
5898 case BFD_RELOC_ALPHA_BSR:
5899 case BFD_RELOC_ALPHA_BOH:
5900 value -= 4; /* PC-relative, base is jsr+4. */
5901
5902 /* See comment in the BFD_RELOC_ALPHA_NOP case above. */
5903 if (S_GET_SEGMENT (fixP->fx_addsy) == undefined_section)
5904 {
5905 fixP->fx_addnumber = -value;
5906 return;
5907 }
5908
5909 if ((abs (value) >> 2) & ~0xfffff)
5910 {
5911 /* Out of range. */
5912 if (fixP->fx_r_type == BFD_RELOC_ALPHA_BOH)
5913 {
5914 /* Add a hint. */
5915 image = bfd_getl32(fixpos);
5916 image = (image & ~0x3FFF) | ((value >> 2) & 0x3FFF);
5917 goto write_done;
5918 }
5919 goto done;
5920 }
5921 else
5922 {
5923 /* Change to a branch. */
5924 image = 0xD3400000 | ((value >> 2) & 0x1FFFFF);
5925 goto write_done;
5926 }
5927 #endif
5928
5929 case BFD_RELOC_VTABLE_INHERIT:
5930 case BFD_RELOC_VTABLE_ENTRY:
5931 return;
5932
5933 default:
5934 {
5935 const struct alpha_operand *operand;
5936
5937 if ((int) fixP->fx_r_type >= 0)
5938 as_fatal (_("unhandled relocation type %s"),
5939 bfd_get_reloc_code_name (fixP->fx_r_type));
5940
5941 gas_assert (-(int) fixP->fx_r_type < (int) alpha_num_operands);
5942 operand = &alpha_operands[-(int) fixP->fx_r_type];
5943
5944 /* The rest of these fixups only exist internally during symbol
5945 resolution and have no representation in the object file.
5946 Therefore they must be completely resolved as constants. */
5947
5948 if (fixP->fx_addsy != 0
5949 && S_GET_SEGMENT (fixP->fx_addsy) != absolute_section)
5950 as_bad_where (fixP->fx_file, fixP->fx_line,
5951 _("non-absolute expression in constant field"));
5952
5953 image = bfd_getl32 (fixpos);
5954 image = insert_operand (image, operand, (offsetT) value,
5955 fixP->fx_file, fixP->fx_line);
5956 }
5957 goto write_done;
5958 }
5959
5960 if (fixP->fx_addsy != 0 || fixP->fx_pcrel != 0)
5961 return;
5962 else
5963 {
5964 as_warn_where (fixP->fx_file, fixP->fx_line,
5965 _("type %d reloc done?\n"), (int) fixP->fx_r_type);
5966 goto done;
5967 }
5968
5969 write_done:
5970 md_number_to_chars (fixpos, image, 4);
5971
5972 done:
5973 fixP->fx_done = 1;
5974 }
5975
5976 /* Look for a register name in the given symbol. */
5977
5978 symbolS *
5979 md_undefined_symbol (char *name)
5980 {
5981 if (*name == '$')
5982 {
5983 int is_float = 0, num;
5984
5985 switch (*++name)
5986 {
5987 case 'f':
5988 if (name[1] == 'p' && name[2] == '\0')
5989 return alpha_register_table[AXP_REG_FP];
5990 is_float = 32;
5991 /* Fall through. */
5992
5993 case 'r':
5994 if (!ISDIGIT (*++name))
5995 break;
5996 /* Fall through. */
5997
5998 case '0': case '1': case '2': case '3': case '4':
5999 case '5': case '6': case '7': case '8': case '9':
6000 if (name[1] == '\0')
6001 num = name[0] - '0';
6002 else if (name[0] != '0' && ISDIGIT (name[1]) && name[2] == '\0')
6003 {
6004 num = (name[0] - '0') * 10 + name[1] - '0';
6005 if (num >= 32)
6006 break;
6007 }
6008 else
6009 break;
6010
6011 if (!alpha_noat_on && (num + is_float) == AXP_REG_AT)
6012 as_warn (_("Used $at without \".set noat\""));
6013 return alpha_register_table[num + is_float];
6014
6015 case 'a':
6016 if (name[1] == 't' && name[2] == '\0')
6017 {
6018 if (!alpha_noat_on)
6019 as_warn (_("Used $at without \".set noat\""));
6020 return alpha_register_table[AXP_REG_AT];
6021 }
6022 break;
6023
6024 case 'g':
6025 if (name[1] == 'p' && name[2] == '\0')
6026 return alpha_register_table[alpha_gp_register];
6027 break;
6028
6029 case 's':
6030 if (name[1] == 'p' && name[2] == '\0')
6031 return alpha_register_table[AXP_REG_SP];
6032 break;
6033 }
6034 }
6035 return NULL;
6036 }
6037
6038 #ifdef OBJ_ECOFF
6039 /* @@@ Magic ECOFF bits. */
6040
6041 void
6042 alpha_frob_ecoff_data (void)
6043 {
6044 select_gp_value ();
6045 /* $zero and $f31 are read-only. */
6046 alpha_gprmask &= ~1;
6047 alpha_fprmask &= ~1;
6048 }
6049 #endif
6050
6051 /* Hook to remember a recently defined label so that the auto-align
6052 code can adjust the symbol after we know what alignment will be
6053 required. */
6054
6055 void
6056 alpha_define_label (symbolS *sym)
6057 {
6058 alpha_insn_label = sym;
6059 #ifdef OBJ_ELF
6060 dwarf2_emit_label (sym);
6061 #endif
6062 }
6063
6064 /* Return true if we must always emit a reloc for a type and false if
6065 there is some hope of resolving it at assembly time. */
6066
6067 int
6068 alpha_force_relocation (fixS *f)
6069 {
6070 if (alpha_flag_relax)
6071 return 1;
6072
6073 switch (f->fx_r_type)
6074 {
6075 case BFD_RELOC_ALPHA_GPDISP_HI16:
6076 case BFD_RELOC_ALPHA_GPDISP_LO16:
6077 case BFD_RELOC_ALPHA_GPDISP:
6078 case BFD_RELOC_ALPHA_LITERAL:
6079 case BFD_RELOC_ALPHA_ELF_LITERAL:
6080 case BFD_RELOC_ALPHA_LITUSE:
6081 case BFD_RELOC_GPREL16:
6082 case BFD_RELOC_GPREL32:
6083 case BFD_RELOC_ALPHA_GPREL_HI16:
6084 case BFD_RELOC_ALPHA_GPREL_LO16:
6085 case BFD_RELOC_ALPHA_LINKAGE:
6086 case BFD_RELOC_ALPHA_CODEADDR:
6087 case BFD_RELOC_ALPHA_BRSGP:
6088 case BFD_RELOC_ALPHA_TLSGD:
6089 case BFD_RELOC_ALPHA_TLSLDM:
6090 case BFD_RELOC_ALPHA_GOTDTPREL16:
6091 case BFD_RELOC_ALPHA_DTPREL_HI16:
6092 case BFD_RELOC_ALPHA_DTPREL_LO16:
6093 case BFD_RELOC_ALPHA_DTPREL16:
6094 case BFD_RELOC_ALPHA_GOTTPREL16:
6095 case BFD_RELOC_ALPHA_TPREL_HI16:
6096 case BFD_RELOC_ALPHA_TPREL_LO16:
6097 case BFD_RELOC_ALPHA_TPREL16:
6098 #ifdef OBJ_EVAX
6099 case BFD_RELOC_ALPHA_NOP:
6100 case BFD_RELOC_ALPHA_BSR:
6101 case BFD_RELOC_ALPHA_LDA:
6102 case BFD_RELOC_ALPHA_BOH:
6103 #endif
6104 return 1;
6105
6106 default:
6107 break;
6108 }
6109
6110 return generic_force_reloc (f);
6111 }
6112
6113 /* Return true if we can partially resolve a relocation now. */
6114
6115 int
6116 alpha_fix_adjustable (fixS *f)
6117 {
6118 /* Are there any relocation types for which we must generate a
6119 reloc but we can adjust the values contained within it? */
6120 switch (f->fx_r_type)
6121 {
6122 case BFD_RELOC_ALPHA_GPDISP_HI16:
6123 case BFD_RELOC_ALPHA_GPDISP_LO16:
6124 case BFD_RELOC_ALPHA_GPDISP:
6125 return 0;
6126
6127 case BFD_RELOC_ALPHA_LITERAL:
6128 case BFD_RELOC_ALPHA_ELF_LITERAL:
6129 case BFD_RELOC_ALPHA_LITUSE:
6130 case BFD_RELOC_ALPHA_LINKAGE:
6131 case BFD_RELOC_ALPHA_CODEADDR:
6132 return 1;
6133
6134 case BFD_RELOC_VTABLE_ENTRY:
6135 case BFD_RELOC_VTABLE_INHERIT:
6136 return 0;
6137
6138 case BFD_RELOC_GPREL16:
6139 case BFD_RELOC_GPREL32:
6140 case BFD_RELOC_ALPHA_GPREL_HI16:
6141 case BFD_RELOC_ALPHA_GPREL_LO16:
6142 case BFD_RELOC_23_PCREL_S2:
6143 case BFD_RELOC_16:
6144 case BFD_RELOC_32:
6145 case BFD_RELOC_64:
6146 case BFD_RELOC_ALPHA_HINT:
6147 return 1;
6148
6149 case BFD_RELOC_ALPHA_TLSGD:
6150 case BFD_RELOC_ALPHA_TLSLDM:
6151 case BFD_RELOC_ALPHA_GOTDTPREL16:
6152 case BFD_RELOC_ALPHA_DTPREL_HI16:
6153 case BFD_RELOC_ALPHA_DTPREL_LO16:
6154 case BFD_RELOC_ALPHA_DTPREL16:
6155 case BFD_RELOC_ALPHA_GOTTPREL16:
6156 case BFD_RELOC_ALPHA_TPREL_HI16:
6157 case BFD_RELOC_ALPHA_TPREL_LO16:
6158 case BFD_RELOC_ALPHA_TPREL16:
6159 /* ??? No idea why we can't return a reference to .tbss+10, but
6160 we're preventing this in the other assemblers. Follow for now. */
6161 return 0;
6162
6163 #ifdef OBJ_ELF
6164 case BFD_RELOC_ALPHA_BRSGP:
6165 /* If we have a BRSGP reloc to a local symbol, adjust it to BRADDR and
6166 let it get resolved at assembly time. */
6167 {
6168 symbolS *sym = f->fx_addsy;
6169 const char *name;
6170 int offset = 0;
6171
6172 if (generic_force_reloc (f))
6173 return 0;
6174
6175 switch (S_GET_OTHER (sym) & STO_ALPHA_STD_GPLOAD)
6176 {
6177 case STO_ALPHA_NOPV:
6178 break;
6179 case STO_ALPHA_STD_GPLOAD:
6180 offset = 8;
6181 break;
6182 default:
6183 if (S_IS_LOCAL (sym))
6184 name = "<local>";
6185 else
6186 name = S_GET_NAME (sym);
6187 as_bad_where (f->fx_file, f->fx_line,
6188 _("!samegp reloc against symbol without .prologue: %s"),
6189 name);
6190 break;
6191 }
6192 f->fx_r_type = BFD_RELOC_23_PCREL_S2;
6193 f->fx_offset += offset;
6194 return 1;
6195 }
6196 #endif
6197 #ifdef OBJ_EVAX
6198 case BFD_RELOC_ALPHA_NOP:
6199 case BFD_RELOC_ALPHA_BSR:
6200 case BFD_RELOC_ALPHA_LDA:
6201 case BFD_RELOC_ALPHA_BOH:
6202 return 1;
6203 #endif
6204
6205 default:
6206 return 1;
6207 }
6208 }
6209
6210 /* Generate the BFD reloc to be stuck in the object file from the
6211 fixup used internally in the assembler. */
6212
6213 arelent *
6214 tc_gen_reloc (asection *sec ATTRIBUTE_UNUSED,
6215 fixS *fixp)
6216 {
6217 arelent *reloc;
6218
6219 reloc = (arelent *) xmalloc (sizeof (* reloc));
6220 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
6221 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
6222 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
6223
6224 /* Make sure none of our internal relocations make it this far.
6225 They'd better have been fully resolved by this point. */
6226 gas_assert ((int) fixp->fx_r_type > 0);
6227
6228 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
6229 if (reloc->howto == NULL)
6230 {
6231 as_bad_where (fixp->fx_file, fixp->fx_line,
6232 _("cannot represent `%s' relocation in object file"),
6233 bfd_get_reloc_code_name (fixp->fx_r_type));
6234 return NULL;
6235 }
6236
6237 if (!fixp->fx_pcrel != !reloc->howto->pc_relative)
6238 as_fatal (_("internal error? cannot generate `%s' relocation"),
6239 bfd_get_reloc_code_name (fixp->fx_r_type));
6240
6241 gas_assert (!fixp->fx_pcrel == !reloc->howto->pc_relative);
6242
6243 #ifdef OBJ_ECOFF
6244 if (fixp->fx_r_type == BFD_RELOC_ALPHA_LITERAL)
6245 /* Fake out bfd_perform_relocation. sigh. */
6246 reloc->addend = -alpha_gp_value;
6247 else
6248 #endif
6249 {
6250 reloc->addend = fixp->fx_offset;
6251 #ifdef OBJ_ELF
6252 /* Ohhh, this is ugly. The problem is that if this is a local global
6253 symbol, the relocation will entirely be performed at link time, not
6254 at assembly time. bfd_perform_reloc doesn't know about this sort
6255 of thing, and as a result we need to fake it out here. */
6256 if ((S_IS_EXTERNAL (fixp->fx_addsy) || S_IS_WEAK (fixp->fx_addsy)
6257 || (S_GET_SEGMENT (fixp->fx_addsy)->flags & SEC_MERGE)
6258 || (S_GET_SEGMENT (fixp->fx_addsy)->flags & SEC_THREAD_LOCAL))
6259 && !S_IS_COMMON (fixp->fx_addsy))
6260 reloc->addend -= symbol_get_bfdsym (fixp->fx_addsy)->value;
6261 #endif
6262 }
6263
6264 #ifdef OBJ_EVAX
6265 switch (fixp->fx_r_type)
6266 {
6267 struct evax_private_udata_struct *udata;
6268 const char *pname;
6269 int pname_len;
6270
6271 case BFD_RELOC_ALPHA_LINKAGE:
6272 reloc->addend = fixp->fx_addnumber;
6273 break;
6274
6275 case BFD_RELOC_ALPHA_NOP:
6276 case BFD_RELOC_ALPHA_BSR:
6277 case BFD_RELOC_ALPHA_LDA:
6278 case BFD_RELOC_ALPHA_BOH:
6279 pname = symbol_get_bfdsym (fixp->fx_addsy)->name;
6280
6281 /* We need the non-suffixed name of the procedure. Beware that
6282 the main symbol might be equated so look it up and take its name. */
6283 pname_len = strlen (pname);
6284 if (pname_len > 4 && strcmp (pname + pname_len - 4, "..en") == 0)
6285 {
6286 symbolS *sym;
6287 char *my_pname = xstrdup (pname);
6288 my_pname [pname_len - 4] = 0;
6289 sym = symbol_find (my_pname);
6290 if (sym == NULL)
6291 abort ();
6292 while (symbol_equated_reloc_p (sym))
6293 {
6294 symbolS *n = symbol_get_value_expression (sym)->X_add_symbol;
6295
6296 /* We must avoid looping, as that can occur with a badly
6297 written program. */
6298 if (n == sym)
6299 break;
6300 sym = n;
6301 }
6302 pname = symbol_get_bfdsym (sym)->name;
6303 }
6304
6305 udata = (struct evax_private_udata_struct *)
6306 xmalloc (sizeof (struct evax_private_udata_struct));
6307 udata->enbsym = symbol_get_bfdsym (fixp->fx_addsy);
6308 udata->bsym = symbol_get_bfdsym (fixp->tc_fix_data.info->psym);
6309 udata->origname = (char *)pname;
6310 udata->lkindex = ((struct evax_private_udata_struct *)
6311 symbol_get_bfdsym (fixp->tc_fix_data.info->sym)->udata.p)->lkindex;
6312 reloc->sym_ptr_ptr = (void *)udata;
6313 reloc->addend = fixp->fx_addnumber;
6314
6315 default:
6316 break;
6317 }
6318 #endif
6319
6320 return reloc;
6321 }
6322
6323 /* Parse a register name off of the input_line and return a register
6324 number. Gets md_undefined_symbol above to do the register name
6325 matching for us.
6326
6327 Only called as a part of processing the ECOFF .frame directive. */
6328
6329 int
6330 tc_get_register (int frame ATTRIBUTE_UNUSED)
6331 {
6332 int framereg = AXP_REG_SP;
6333
6334 SKIP_WHITESPACE ();
6335 if (*input_line_pointer == '$')
6336 {
6337 char *s = input_line_pointer;
6338 char c = get_symbol_end ();
6339 symbolS *sym = md_undefined_symbol (s);
6340
6341 *strchr (s, '\0') = c;
6342 if (sym && (framereg = S_GET_VALUE (sym)) <= 31)
6343 goto found;
6344 }
6345 as_warn (_("frame reg expected, using $%d."), framereg);
6346
6347 found:
6348 note_gpreg (framereg);
6349 return framereg;
6350 }
6351
6352 /* This is called before the symbol table is processed. In order to
6353 work with gcc when using mips-tfile, we must keep all local labels.
6354 However, in other cases, we want to discard them. If we were
6355 called with -g, but we didn't see any debugging information, it may
6356 mean that gcc is smuggling debugging information through to
6357 mips-tfile, in which case we must generate all local labels. */
6358
6359 #ifdef OBJ_ECOFF
6360
6361 void
6362 alpha_frob_file_before_adjust (void)
6363 {
6364 if (alpha_debug != 0
6365 && ! ecoff_debugging_seen)
6366 flag_keep_locals = 1;
6367 }
6368
6369 #endif /* OBJ_ECOFF */
6370
6371 /* The Alpha has support for some VAX floating point types, as well as for
6372 IEEE floating point. We consider IEEE to be the primary floating point
6373 format, and sneak in the VAX floating point support here. */
6374 #include "config/atof-vax.c"
Patches to binutils for mingw-w64