cpu/3dnow.cc

   1 /////////////////////////////////////////////////////////////////////////
   2 // $Id: 3dnow.cc,v 1.26 2008/10/08 10:51:37 sshwarts Exp $
   3 /////////////////////////////////////////////////////////////////////////
   4 //
   5 //   Copyright (c) 2002 Stanislav Shwartsman
   6 //          Written by Stanislav Shwartsman [sshwarts at sourceforge net]
   7 //
   8 //  This library is free software; you can redistribute it and/or
   9 //  modify it under the terms of the GNU Lesser General Public
  10 //  License as published by the Free Software Foundation; either
  11 //  version 2 of the License, or (at your option) any later version.
  12 //
  13 //  This library is distributed in the hope that it will be useful,
  14 //  but WITHOUT ANY WARRANTY; without even the implied warranty of
  15 //  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  16 //  Lesser General Public License for more details.
  17 //
  18 //  You should have received a copy of the GNU Lesser General Public
  19 //  License along with this library; if not, write to the Free Software
  20 //  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  21 //
  22 /////////////////////////////////////////////////////////////////////////
  23
  24 #define NEED_CPU_REG_SHORTCUTS 1
  25 #include "bochs.h"
  26 #include "cpu.h"
  27 #define LOG_THIS BX_CPU_THIS_PTR
  28
  29 #if BX_SUPPORT_3DNOW
  30
  31 BX_CPP_INLINE void prepare_softfloat_status_word(float_status_t &status, int rounding_mode)
  32 {
  33   status.float_exception_flags = 0; // clear exceptions before execution
  34   status.float_nan_handling_mode = float_first_operand_nan;
  35   status.float_rounding_mode = rounding_mode;
  36   status.flush_underflow_to_zero = 0;
  37 }
  38
  39 void BX_CPP_AttrRegparmN(1) BX_CPU_C::PFPNACC_PqQq(bxInstruction_c *i)
  40 {
  41   BX_PANIC(("PFPNACC_PqQq: 3DNow! instruction still not implemented"));
  42 }
  43
  44 /* 0F 0F /r 0C */
  45 void BX_CPP_AttrRegparmN(1) BX_CPU_C::PI2FW_PqQq(bxInstruction_c *i)
  46 {
  47   BxPackedMmxRegister result, op;
  48
  49   BX_CPU_THIS_PTR prepareMMX();
  50
  51   /* op is a register or memory reference */
  52   if (i->modC0()) {
  53     op = BX_READ_MMX_REG(i->rm());
  54   }
  55   else {
  56     bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
  57     /* pointer, segment address pair */
  58     MMXUQ(op) = read_virtual_qword(i->seg(), eaddr);
  59   }
  60
  61   BX_CPU_THIS_PTR prepareFPU2MMX(); /* FPU2MMX transition */
  62
  63   float_status_t status_word;
  64   prepare_softfloat_status_word(status_word, float_round_to_zero);
  65
  66   MMXUD0(result) =
  67         int32_to_float32((Bit32s)(MMXSW0(op)), status_word);
  68   MMXUD1(result) =
  69         int32_to_float32((Bit32s)(MMXSW2(op)), status_word);
  70
  71   /* now write result back to destination */
  72   BX_WRITE_MMX_REG(i->nnn(), result);
  73 }
  74
  75 /* 0F 0F /r 0D */
  76 void BX_CPP_AttrRegparmN(1) BX_CPU_C::PI2FD_PqQq(bxInstruction_c *i)
  77 {
  78   BxPackedMmxRegister result, op;
  79
  80   BX_CPU_THIS_PTR prepareMMX();
  81
  82   /* op is a register or memory reference */
  83   if (i->modC0()) {
  84     op = BX_READ_MMX_REG(i->rm());
  85   }
  86   else {
  87     bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
  88     /* pointer, segment address pair */
  89     MMXUQ(op) = read_virtual_qword(i->seg(), eaddr);
  90   }
  91
  92   BX_CPU_THIS_PTR prepareFPU2MMX(); /* FPU2MMX transition */
  93
  94   float_status_t status_word;
  95   prepare_softfloat_status_word(status_word, float_round_to_zero);
  96
  97   MMXUD0(result) =
  98         int32_to_float32(MMXSD0(op), status_word);
  99   MMXUD1(result) =
 100         int32_to_float32(MMXSD1(op), status_word);
 101
 102   /* now write result back to destination */
 103   BX_WRITE_MMX_REG(i->nnn(), result);
 104 }
 105
 106 void BX_CPP_AttrRegparmN(1) BX_CPU_C::PF2IW_PqQq(bxInstruction_c *i)
 107 {
 108   BX_PANIC(("PF2IW_PqQq: 3DNow! instruction still not implemented"));
 109 }
 110
 111 /* 0F 0F /r 1D */
 112 void BX_CPP_AttrRegparmN(1) BX_CPU_C::PF2ID_PqQq(bxInstruction_c *i)
 113 {
 114   BxPackedMmxRegister result, op;
 115
 116   BX_CPU_THIS_PTR prepareMMX();
 117
 118   /* op is a register or memory reference */
 119   if (i->modC0()) {
 120     op = BX_READ_MMX_REG(i->rm());
 121   }
 122   else {
 123     bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
 124     /* pointer, segment address pair */
 125     MMXUQ(op) = read_virtual_qword(i->seg(), eaddr);
 126   }
 127
 128   BX_CPU_THIS_PTR prepareFPU2MMX(); /* FPU2MMX transition */
 129
 130   float_status_t status_word;
 131   prepare_softfloat_status_word(status_word, float_round_to_zero);
 132
 133   MMXSD0(result) =
 134         float32_to_int32_round_to_zero(MMXUD0(op), status_word);
 135   MMXSD1(result) =
 136         float32_to_int32_round_to_zero(MMXUD1(op), status_word);
 137
 138   /* now write result back to destination */
 139   BX_WRITE_MMX_REG(i->nnn(), result);
 140 }
 141
 142 void BX_CPP_AttrRegparmN(1) BX_CPU_C::PFNACC_PqQq(bxInstruction_c *i)
 143 {
 144   BX_PANIC(("PFNACC_PqQq: 3DNow! instruction still not implemented"));
 145 }
 146
 147 void BX_CPP_AttrRegparmN(1) BX_CPU_C::PFCMPGE_PqQq(bxInstruction_c *i)
 148 {
 149   BX_PANIC(("PFCMPGE_PqQq: 3DNow! instruction still not implemented"));
 150 }
 151
 152 void BX_CPP_AttrRegparmN(1) BX_CPU_C::PFMIN_PqQq(bxInstruction_c *i)
 153 {
 154   BX_PANIC(("PFMIN_PqQq: 3DNow! instruction still not implemented"));
 155 }
 156
 157 void BX_CPP_AttrRegparmN(1) BX_CPU_C::PFRCP_PqQq(bxInstruction_c *i)
 158 {
 159   BX_PANIC(("PFRCP_PqQq: 3DNow! instruction still not implemented"));
 160 }
 161
 162 void BX_CPP_AttrRegparmN(1) BX_CPU_C::PFRSQRT_PqQq(bxInstruction_c *i)
 163 {
 164   BX_PANIC(("PFRSQRT_PqQq: 3DNow! instruction still not implemented"));
 165 }
 166
 167 void BX_CPP_AttrRegparmN(1) BX_CPU_C::PFSUB_PqQq(bxInstruction_c *i)
 168 {
 169   BX_PANIC(("PFSUB_PqQq: 3DNow! instruction still not implemented"));
 170 }
 171
 172 void BX_CPP_AttrRegparmN(1) BX_CPU_C::PFADD_PqQq(bxInstruction_c *i)
 173 {
 174   BX_PANIC(("PFADD_PqQq: 3DNow! instruction still not implemented"));
 175 }
 176
 177 void BX_CPP_AttrRegparmN(1) BX_CPU_C::PFCMPGT_PqQq(bxInstruction_c *i)
 178 {
 179   BX_PANIC(("PFCMPGT_PqQq: 3DNow! instruction still not implemented"));
 180 }
 181
 182 void BX_CPP_AttrRegparmN(1) BX_CPU_C::PFMAX_PqQq(bxInstruction_c *i)
 183 {
 184   BX_PANIC(("PFMAX_PqQq: 3DNow! instruction still not implemented"));
 185 }
 186
 187 void BX_CPP_AttrRegparmN(1) BX_CPU_C::PFRCPIT1_PqQq(bxInstruction_c *i)
 188 {
 189   BX_PANIC(("PFRCPIT1_PqQq: 3DNow! instruction still not implemented"));
 190 }
 191
 192 void BX_CPP_AttrRegparmN(1) BX_CPU_C::PFRSQIT1_PqQq(bxInstruction_c *i)
 193 {
 194   BX_PANIC(("PFRSQIT1_PqQq: 3DNow! instruction still not implemented"));
 195 }
 196
 197 void BX_CPP_AttrRegparmN(1) BX_CPU_C::PFSUBR_PqQq(bxInstruction_c *i)
 198 {
 199   BX_PANIC(("PFSUBR_PqQq: 3DNow! instruction still not implemented"));
 200 }
 201
 202 void BX_CPP_AttrRegparmN(1) BX_CPU_C::PFACC_PqQq(bxInstruction_c *i)
 203 {
 204   BX_PANIC(("PFACC_PqQq: 3DNow! instruction still not implemented"));
 205 }
 206
 207 void BX_CPP_AttrRegparmN(1) BX_CPU_C::PFCMPEQ_PqQq(bxInstruction_c *i)
 208 {
 209   BX_PANIC(("PFCMPEQ_PqQq: 3DNow! instruction still not implemented"));
 210 }
 211
 212 void BX_CPP_AttrRegparmN(1) BX_CPU_C::PFMUL_PqQq(bxInstruction_c *i)
 213 {
 214   BX_PANIC(("PFMUL_PqQq: 3DNow! instruction still not implemented"));
 215 }
 216
 217 void BX_CPP_AttrRegparmN(1) BX_CPU_C::PFRCPIT2_PqQq(bxInstruction_c *i)
 218 {
 219   BX_PANIC(("PFRCPIT2_PqQq: 3DNow! instruction still not implemented"));
 220 }
 221
 222 /* 0F 0F /r B7 */
 223 void BX_CPP_AttrRegparmN(1) BX_CPU_C::PMULHRW_PqQq(bxInstruction_c *i)
 224 {
 225   BX_CPU_THIS_PTR prepareMMX();
 226
 227   BxPackedMmxRegister op1 = BX_READ_MMX_REG(i->nnn()), op2, result;
 228
 229   /* op2 is a register or memory reference */
 230   if (i->modC0()) {
 231     op2 = BX_READ_MMX_REG(i->rm());
 232   }
 233   else {
 234     bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
 235     /* pointer, segment address pair */
 236     MMXUQ(op2) = read_virtual_qword(i->seg(), eaddr);
 237   }
 238
 239   BX_CPU_THIS_PTR prepareFPU2MMX(); /* FPU2MMX transition */
 240
 241   Bit32s product1 = Bit32s(MMXSW0(op1)) * Bit32s(MMXSW0(op2)) + 0x8000;
 242   Bit32s product2 = Bit32s(MMXSW1(op1)) * Bit32s(MMXSW1(op2)) + 0x8000;
 243   Bit32s product3 = Bit32s(MMXSW2(op1)) * Bit32s(MMXSW2(op2)) + 0x8000;
 244   Bit32s product4 = Bit32s(MMXSW3(op1)) * Bit32s(MMXSW3(op2)) + 0x8000;
 245
 246   MMXUW0(result) = Bit16u(product1 >> 16);
 247   MMXUW1(result) = Bit16u(product2 >> 16);
 248   MMXUW2(result) = Bit16u(product3 >> 16);
 249   MMXUW3(result) = Bit16u(product4 >> 16);
 250
 251   /* now write result back to destination */
 252   BX_WRITE_MMX_REG(i->nnn(), result);
 253 }
 254
 255 /* 0F 0F /r BB */
 256 void BX_CPP_AttrRegparmN(1) BX_CPU_C::PSWAPD_PqQq(bxInstruction_c *i)
 257 {
 258   BX_CPU_THIS_PTR prepareMMX();
 259
 260   BxPackedMmxRegister result, op;
 261
 262   /* op is a register or memory reference */
 263   if (i->modC0()) {
 264     op = BX_READ_MMX_REG(i->rm());
 265   }
 266   else {
 267     bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
 268     /* pointer, segment address pair */
 269     MMXUQ(op) = read_virtual_qword(i->seg(), eaddr);
 270   }
 271
 272   BX_CPU_THIS_PTR prepareFPU2MMX(); /* FPU2MMX transition */
 273
 274   MMXUD0(result) = MMXUD1(op);
 275   MMXUD1(result) = MMXUD0(op);
 276
 277   /* now write result back to destination */
 278   BX_WRITE_MMX_REG(i->nnn(), result);
 279 }
 280
 281 #endif