?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
- update sector count before calling write completion function (SF patch #2144692)
[bochs-mirror.git] / cpu / cpu.h
blob4cbeb649cdced7fcc171b5dc5eaaef33034b4dce
1 /////////////////////////////////////////////////////////////////////////
2 // $Id: cpu.h,v 1.536 2008/11/20 18:44:15 sshwarts Exp $
3 /////////////////////////////////////////////////////////////////////////
4 //
5 // Copyright (C) 2001 MandrakeSoft S.A.
6 //
7 // MandrakeSoft S.A.
8 // 43, rue d'Aboukir
9 // 75002 Paris - France
10 // http://www.linux-mandrake.com/
11 // http://www.mandrakesoft.com/
12 //
13 // This library is free software; you can redistribute it and/or
14 // modify it under the terms of the GNU Lesser General Public
15 // License as published by the Free Software Foundation; either
16 // version 2 of the License, or (at your option) any later version.
17 //
18 // This library is distributed in the hope that it will be useful,
19 // but WITHOUT ANY WARRANTY; without even the implied warranty of
20 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
21 // Lesser General Public License for more details.
22 //
23 // You should have received a copy of the GNU Lesser General Public
24 // License along with this library; if not, write to the Free Software
25 // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
26 /////////////////////////////////////////////////////////////////////////
27
28 #ifndef BX_CPU_H
29 # define BX_CPU_H 1
30
31 #include <setjmp.h>
32
33 #if BX_DISASM
34 # include "disasm/disasm.h"
35 #endif
36
37 // <TAG-DEFINES-DECODE-START>
38 // segment register encoding
39 #define BX_SEG_REG_ES 0
40 #define BX_SEG_REG_CS 1
41 #define BX_SEG_REG_SS 2
42 #define BX_SEG_REG_DS 3
43 #define BX_SEG_REG_FS 4
44 #define BX_SEG_REG_GS 5
45 // NULL now has to fit in 3 bits.
46 #define BX_SEG_REG_NULL 7
47 #define BX_NULL_SEG_REG(seg) ((seg) == BX_SEG_REG_NULL)
48 // <TAG-DEFINES-DECODE-END>
49
50 #define BX_16BIT_REG_AX 0
51 #define BX_16BIT_REG_CX 1
52 #define BX_16BIT_REG_DX 2
53 #define BX_16BIT_REG_BX 3
54 #define BX_16BIT_REG_SP 4
55 #define BX_16BIT_REG_BP 5
56 #define BX_16BIT_REG_SI 6
57 #define BX_16BIT_REG_DI 7
58
59 #define BX_32BIT_REG_EAX 0
60 #define BX_32BIT_REG_ECX 1
61 #define BX_32BIT_REG_EDX 2
62 #define BX_32BIT_REG_EBX 3
63 #define BX_32BIT_REG_ESP 4
64 #define BX_32BIT_REG_EBP 5
65 #define BX_32BIT_REG_ESI 6
66 #define BX_32BIT_REG_EDI 7
67
68 #define BX_64BIT_REG_RAX 0
69 #define BX_64BIT_REG_RCX 1
70 #define BX_64BIT_REG_RDX 2
71 #define BX_64BIT_REG_RBX 3
72 #define BX_64BIT_REG_RSP 4
73 #define BX_64BIT_REG_RBP 5
74 #define BX_64BIT_REG_RSI 6
75 #define BX_64BIT_REG_RDI 7
76
77 #define BX_64BIT_REG_R8 8
78 #define BX_64BIT_REG_R9 9
79 #define BX_64BIT_REG_R10 10
80 #define BX_64BIT_REG_R11 11
81 #define BX_64BIT_REG_R12 12
82 #define BX_64BIT_REG_R13 13
83 #define BX_64BIT_REG_R14 14
84 #define BX_64BIT_REG_R15 15
85
86 #if BX_SUPPORT_X86_64
87 # define BX_GENERAL_REGISTERS 16
88 #else
89 # define BX_GENERAL_REGISTERS 8
90 #endif
91
92 #define BX_16BIT_REG_IP BX_GENERAL_REGISTERS
93 #define BX_32BIT_REG_EIP BX_GENERAL_REGISTERS
94 #define BX_64BIT_REG_RIP BX_GENERAL_REGISTERS
95
96 #define BX_NIL_REGISTER (BX_GENERAL_REGISTERS+1)
97
98 #define BX_TMP_REGISTER (BX_GENERAL_REGISTERS+2)
99
100 #if defined(NEED_CPU_REG_SHORTCUTS)
101
102 /* WARNING:
103 Only BX_CPU_C member functions can use these shortcuts safely!
104 Functions that use the shortcuts outside of BX_CPU_C might work
105 when BX_USE_CPU_SMF=1 but will fail when BX_USE_CPU_SMF=0
106 (for example in SMP mode).
107 */
108
109 // access to 8 bit general registers
110 #define AL (BX_CPU_THIS_PTR gen_reg[0].word.byte.rl)
111 #define CL (BX_CPU_THIS_PTR gen_reg[1].word.byte.rl)
112 #define DL (BX_CPU_THIS_PTR gen_reg[2].word.byte.rl)
113 #define BL (BX_CPU_THIS_PTR gen_reg[3].word.byte.rl)
114 #define AH (BX_CPU_THIS_PTR gen_reg[0].word.byte.rh)
115 #define CH (BX_CPU_THIS_PTR gen_reg[1].word.byte.rh)
116 #define DH (BX_CPU_THIS_PTR gen_reg[2].word.byte.rh)
117 #define BH (BX_CPU_THIS_PTR gen_reg[3].word.byte.rh)
118
119 #define TMP8L (BX_CPU_THIS_PTR gen_reg[BX_TMP_REGISTER].word.byte.rl)
120
121 // access to 16 bit general registers
122 #define AX (BX_CPU_THIS_PTR gen_reg[0].word.rx)
123 #define CX (BX_CPU_THIS_PTR gen_reg[1].word.rx)
124 #define DX (BX_CPU_THIS_PTR gen_reg[2].word.rx)
125 #define BX (BX_CPU_THIS_PTR gen_reg[3].word.rx)
126 #define SP (BX_CPU_THIS_PTR gen_reg[4].word.rx)
127 #define BP (BX_CPU_THIS_PTR gen_reg[5].word.rx)
128 #define SI (BX_CPU_THIS_PTR gen_reg[6].word.rx)
129 #define DI (BX_CPU_THIS_PTR gen_reg[7].word.rx)
130
131 // access to 16 bit instruction pointer
132 #define IP (BX_CPU_THIS_PTR gen_reg[BX_16BIT_REG_IP].word.rx)
133
134 #define TMP16 (BX_CPU_THIS_PTR gen_reg[BX_TMP_REGISTER].word.rx)
135
136 // accesss to 32 bit general registers
137 #define EAX (BX_CPU_THIS_PTR gen_reg[0].dword.erx)
138 #define ECX (BX_CPU_THIS_PTR gen_reg[1].dword.erx)
139 #define EDX (BX_CPU_THIS_PTR gen_reg[2].dword.erx)
140 #define EBX (BX_CPU_THIS_PTR gen_reg[3].dword.erx)
141 #define ESP (BX_CPU_THIS_PTR gen_reg[4].dword.erx)
142 #define EBP (BX_CPU_THIS_PTR gen_reg[5].dword.erx)
143 #define ESI (BX_CPU_THIS_PTR gen_reg[6].dword.erx)
144 #define EDI (BX_CPU_THIS_PTR gen_reg[7].dword.erx)
145
146 // access to 32 bit instruction pointer
147 #define EIP (BX_CPU_THIS_PTR gen_reg[BX_32BIT_REG_EIP].dword.erx)
148
149 #define TMP32 (BX_CPU_THIS_PTR gen_reg[BX_TMP_REGISTER].dword.erx)
150
151 #if BX_SUPPORT_X86_64
152 // accesss to 64 bit general registers
153 #define RAX (BX_CPU_THIS_PTR gen_reg[0].rrx)
154 #define RCX (BX_CPU_THIS_PTR gen_reg[1].rrx)
155 #define RDX (BX_CPU_THIS_PTR gen_reg[2].rrx)
156 #define RBX (BX_CPU_THIS_PTR gen_reg[3].rrx)
157 #define RSP (BX_CPU_THIS_PTR gen_reg[4].rrx)
158 #define RBP (BX_CPU_THIS_PTR gen_reg[5].rrx)
159 #define RSI (BX_CPU_THIS_PTR gen_reg[6].rrx)
160 #define RDI (BX_CPU_THIS_PTR gen_reg[7].rrx)
161 #define R8 (BX_CPU_THIS_PTR gen_reg[8].rrx)
162 #define R9 (BX_CPU_THIS_PTR gen_reg[9].rrx)
163 #define R10 (BX_CPU_THIS_PTR gen_reg[10].rrx)
164 #define R11 (BX_CPU_THIS_PTR gen_reg[11].rrx)
165 #define R12 (BX_CPU_THIS_PTR gen_reg[12].rrx)
166 #define R13 (BX_CPU_THIS_PTR gen_reg[13].rrx)
167 #define R14 (BX_CPU_THIS_PTR gen_reg[14].rrx)
168 #define R15 (BX_CPU_THIS_PTR gen_reg[15].rrx)
169
170 // access to 64 bit instruction pointer
171 #define RIP (BX_CPU_THIS_PTR gen_reg[BX_64BIT_REG_RIP].rrx)
172
173 #define TMP64 (BX_CPU_THIS_PTR gen_reg[BX_TMP_REGISTER].rrx)
174
175 // access to 64 bit MSR registers
176 #define MSR_FSBASE (BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].cache.u.segment.base)
177 #define MSR_GSBASE (BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].cache.u.segment.base)
178 #define MSR_STAR (BX_CPU_THIS_PTR msr.star)
179 #define MSR_LSTAR (BX_CPU_THIS_PTR msr.lstar)
180 #define MSR_CSTAR (BX_CPU_THIS_PTR msr.cstar)
181 #define MSR_FMASK (BX_CPU_THIS_PTR msr.fmask)
182 #define MSR_KERNELGSBASE (BX_CPU_THIS_PTR msr.kernelgsbase)
183 #define MSR_TSC_AUX (BX_CPU_THIS_PTR msr.tsc_aux)
184 #endif
185
186 #if BX_SUPPORT_X86_64
187 #define BX_READ_8BIT_REGx(index,extended) ((((index) & 4) == 0 || (extended)) ? \
188 (BX_CPU_THIS_PTR gen_reg[index].word.byte.rl) : \
189 (BX_CPU_THIS_PTR gen_reg[(index)-4].word.byte.rh))
190 #define BX_READ_64BIT_REG(index) (BX_CPU_THIS_PTR gen_reg[index].rrx)
191 #else
192 #define BX_READ_8BIT_REG(index) (((index) & 4) ? \
193 (BX_CPU_THIS_PTR gen_reg[(index)-4].word.byte.rh) : \
194 (BX_CPU_THIS_PTR gen_reg[index].word.byte.rl))
195 #define BX_READ_8BIT_REGx(index,ext) BX_READ_8BIT_REG(index)
196 #endif
197
198 #define BX_READ_8BIT_REGH(index) (BX_CPU_THIS_PTR gen_reg[index].word.byte.rh)
199 #define BX_READ_16BIT_REG(index) (BX_CPU_THIS_PTR gen_reg[index].word.rx)
200 #define BX_READ_32BIT_REG(index) (BX_CPU_THIS_PTR gen_reg[index].dword.erx)
201
202 #define BX_WRITE_8BIT_REGH(index, val) {\
203 BX_CPU_THIS_PTR gen_reg[index].word.byte.rh = val; \
204 }
205
206 #define BX_WRITE_16BIT_REG(index, val) {\
207 BX_CPU_THIS_PTR gen_reg[index].word.rx = val; \
208 }
209
210 /*
211 #define BX_WRITE_32BIT_REG(index, val) {\
212 BX_CPU_THIS_PTR gen_reg[index].dword.erx = val; \
213 }
214 */
215
216 #if BX_SUPPORT_X86_64
217
218 #define BX_WRITE_8BIT_REGx(index, extended, val) {\
219 if (((index) & 4) == 0 || (extended)) \
220 BX_CPU_THIS_PTR gen_reg[index].word.byte.rl = val; \
221 else \
222 BX_CPU_THIS_PTR gen_reg[(index)-4].word.byte.rh = val; \
223 }
224
225 #define BX_WRITE_32BIT_REGZ(index, val) {\
226 BX_CPU_THIS_PTR gen_reg[index].rrx = (Bit32u) val; \
227 }
228
229 #define BX_WRITE_64BIT_REG(index, val) {\
230 BX_CPU_THIS_PTR gen_reg[index].rrx = val; \
231 }
232 #define BX_CLEAR_64BIT_HIGH(index) {\
233 BX_CPU_THIS_PTR gen_reg[index].dword.hrx = 0; \
234 }
235
236 #else
237
238 #define BX_WRITE_8BIT_REG(index, val) {\
239 if ((index) & 4) \
240 BX_CPU_THIS_PTR gen_reg[(index)-4].word.byte.rh = val; \
241 else \
242 BX_CPU_THIS_PTR gen_reg[index].word.byte.rl = val; \
243 }
244 #define BX_WRITE_8BIT_REGx(index, ext, val) BX_WRITE_8BIT_REG(index, val)
245
246 // For x86-32, I just pretend this one is like the macro above,
247 // so common code can be used.
248 #define BX_WRITE_32BIT_REGZ(index, val) {\
249 BX_CPU_THIS_PTR gen_reg[index].dword.erx = (Bit32u) val; \
250 }
251
252 #define BX_CLEAR_64BIT_HIGH(index)
253
254 #endif
255
256 #define CPL (BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.rpl)
257
258 #define USER_PL (BX_CPU_THIS_PTR user_pl) /* CPL == 3 */
259
260 #if BX_SUPPORT_SMP
261 #define BX_CPU_ID (BX_CPU_THIS_PTR bx_cpuid)
262 #else
263 #define BX_CPU_ID (0)
264 #endif
265
266 #endif // defined(NEED_CPU_REG_SHORTCUTS)
267
268 #define BX_DE_EXCEPTION 0 // Divide Error (fault)
269 #define BX_DB_EXCEPTION 1 // Debug (fault/trap)
270 #define BX_BP_EXCEPTION 3 // Breakpoint (trap)
271 #define BX_OF_EXCEPTION 4 // Overflow (trap)
272 #define BX_BR_EXCEPTION 5 // BOUND (fault)
273 #define BX_UD_EXCEPTION 6
274 #define BX_NM_EXCEPTION 7
275 #define BX_DF_EXCEPTION 8
276 #define BX_TS_EXCEPTION 10
277 #define BX_NP_EXCEPTION 11
278 #define BX_SS_EXCEPTION 12
279 #define BX_GP_EXCEPTION 13
280 #define BX_PF_EXCEPTION 14
281 #define BX_MF_EXCEPTION 16
282 #define BX_AC_EXCEPTION 17
283 #define BX_MC_EXCEPTION 18
284 #define BX_XM_EXCEPTION 19
285
286 /* MSR registers */
287 #define BX_MSR_P5_MC_ADDR 0x0000
288 #define BX_MSR_MC_TYPE 0x0001
289 #define BX_MSR_TSC 0x0010
290 #define BX_MSR_CESR 0x0011
291 #define BX_MSR_CTR0 0x0012
292 #define BX_MSR_CTR1 0x0013
293 #define BX_MSR_APICBASE 0x001b
294
295 #if BX_SUPPORT_SEP
296 # define BX_MSR_SYSENTER_CS 0x0174
297 # define BX_MSR_SYSENTER_ESP 0x0175
298 # define BX_MSR_SYSENTER_EIP 0x0176
299 #endif
300
301 #define BX_MSR_DEBUGCTLMSR 0x01d9
302 #define BX_MSR_LASTBRANCHFROMIP 0x01db
303 #define BX_MSR_LASTBRANCHTOIP 0x01dc
304 #define BX_MSR_LASTINTOIP 0x01dd
305
306 #if BX_SUPPORT_MTRR
307 #define BX_MSR_MTRRCAP 0x00fe
308 #define BX_MSR_MTRRPHYSBASE0 0x0200
309 #define BX_MSR_MTRRPHYSMASK0 0x0201
310 #define BX_MSR_MTRRPHYSBASE1 0x0202
311 #define BX_MSR_MTRRPHYSMASK1 0x0203
312 #define BX_MSR_MTRRPHYSBASE2 0x0204
313 #define BX_MSR_MTRRPHYSMASK2 0x0205
314 #define BX_MSR_MTRRPHYSBASE3 0x0206
315 #define BX_MSR_MTRRPHYSMASK3 0x0207
316 #define BX_MSR_MTRRPHYSBASE4 0x0208
317 #define BX_MSR_MTRRPHYSMASK4 0x0209
318 #define BX_MSR_MTRRPHYSBASE5 0x020a
319 #define BX_MSR_MTRRPHYSMASK5 0x020b
320 #define BX_MSR_MTRRPHYSBASE6 0x020c
321 #define BX_MSR_MTRRPHYSMASK6 0x020d
322 #define BX_MSR_MTRRPHYSBASE7 0x020e
323 #define BX_MSR_MTRRPHYSMASK7 0x020f
324 #define BX_MSR_MTRRFIX64K_00000 0x0250
325 #define BX_MSR_MTRRFIX16K_80000 0x0258
326 #define BX_MSR_MTRRFIX16K_A0000 0x0259
327 #define BX_MSR_MTRRFIX4K_C0000 0x0268
328 #define BX_MSR_MTRRFIX4K_C8000 0x0269
329 #define BX_MSR_MTRRFIX4K_D0000 0x026a
330 #define BX_MSR_MTRRFIX4K_D8000 0x026b
331 #define BX_MSR_MTRRFIX4K_E0000 0x026c
332 #define BX_MSR_MTRRFIX4K_E8000 0x026d
333 #define BX_MSR_MTRRFIX4K_F0000 0x026e
334 #define BX_MSR_MTRRFIX4K_F8000 0x026f
335 #define BX_MSR_PAT 0x0277
336 #define BX_MSR_MTRR_DEFTYPE 0x02ff
337 #endif
338
339 #if BX_SUPPORT_X86_64
340 #define BX_MSR_EFER 0xc0000080
341 #define BX_MSR_STAR 0xc0000081
342 #define BX_MSR_LSTAR 0xc0000082
343 #define BX_MSR_CSTAR 0xc0000083
344 #define BX_MSR_FMASK 0xc0000084
345 #define BX_MSR_FSBASE 0xc0000100
346 #define BX_MSR_GSBASE 0xc0000101
347 #define BX_MSR_KERNELGSBASE 0xc0000102
348 #define BX_MSR_TSC_AUX 0xc0000103
349 #endif
350
351 #define BX_MODE_IA32_REAL 0x0 // CR0.PE=0 |
352 #define BX_MODE_IA32_V8086 0x1 // CR0.PE=1, EFLAGS.VM=1 | EFER.LMA=0
353 #define BX_MODE_IA32_PROTECTED 0x2 // CR0.PE=1, EFLAGS.VM=0 |
354 #define BX_MODE_LONG_COMPAT 0x3 // EFER.LMA = 1, CR0.PE=1, CS.L=0
355 #define BX_MODE_LONG_64 0x4 // EFER.LMA = 1, CR0.PE=1, CS.L=1
356
357 extern const char* cpu_mode_string(unsigned cpu_mode);
358 extern const char* cpu_state_string(Bit32u debug_trap);
359
360 #if BX_SUPPORT_X86_64
361 #define IsCanonical(offset) ((Bit64u)((((Bit64s)(offset)) >> (BX_LIN_ADDRESS_WIDTH-1)) + 1) < 2)
362 #endif
363
364 #if BX_SUPPORT_X86_64
365 #define Is64BitMode() (BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64)
366 #else
367 #define Is64BitMode() (0)
368 #endif
369
370 #define StackAddrSize64() Is64BitMode()
371
372 #if BX_SUPPORT_APIC
373 #define BX_CPU_INTR (BX_CPU_THIS_PTR INTR || BX_CPU_THIS_PTR local_apic.INTR)
374 #else
375 #define BX_CPU_INTR (BX_CPU_THIS_PTR INTR)
376 #endif
377
378 #define CACHE_LINE_SIZE 64
379
380 class BX_CPU_C;
381 class BX_MEM_C;
382
383 #if BX_USE_CPU_SMF == 0
384 // normal member functions. This can ONLY be used within BX_CPU_C classes.
385 // Anyone on the outside should use the BX_CPU macro (defined in bochs.h)
386 // instead.
387 # define BX_CPU_THIS_PTR this->
388 # define BX_CPU_THIS this
389 # define BX_SMF
390 # define BX_CPU_C_PREFIX BX_CPU_C::
391 // with normal member functions, calling a member fn pointer looks like
392 // object->*(fnptr)(arg, ...);
393 // Since this is different from when SMF=1, encapsulate it in a macro.
394 # define BX_CPU_CALL_METHOD(func, args) \
395 (this->*((BxExecutePtr_tR) (func))) args
396 # define BX_CPU_CALL_METHODR(func, args) \
397 (this->*((BxResolvePtr_tR) (func))) args
398 #else
399 // static member functions. With SMF, there is only one CPU by definition.
400 # define BX_CPU_THIS_PTR BX_CPU(0)->
401 # define BX_CPU_THIS BX_CPU(0)
402 # define BX_SMF static
403 # define BX_CPU_C_PREFIX
404 # define BX_CPU_CALL_METHOD(func, args) \
405 ((BxExecutePtr_tR) (func)) args
406 # define BX_CPU_CALL_METHODR(func, args) \
407 ((BxResolvePtr_tR) (func)) args
408 #endif
409
410 #if BX_SUPPORT_SMP
411 // multiprocessor simulation, we need an array of cpus and memories
412 BOCHSAPI extern BX_CPU_C **bx_cpu_array;
413 #else
414 // single processor simulation, so there's one of everything
415 BOCHSAPI extern BX_CPU_C bx_cpu;
416 #endif
417
418 // accessors for all eflags in bx_flags_reg_t
419 // The macro is used once for each flag bit
420 // Do not use for arithmetic flags !
421 #define DECLARE_EFLAG_ACCESSOR(name,bitnum) \
422 BX_SMF BX_CPP_INLINE Bit32u get_##name (); \
423 BX_SMF BX_CPP_INLINE bx_bool getB_##name ();
424
425 #define DECLARE_EFLAG_SET_ACCESSOR(name,bitnum) \
426 BX_SMF BX_CPP_INLINE void assert_##name (); \
427 BX_SMF BX_CPP_INLINE void clear_##name (); \
428 BX_SMF BX_CPP_INLINE void set_##name (bx_bool val);
429
430 #define IMPLEMENT_EFLAG_ACCESSOR(name,bitnum) \
431 BX_CPP_INLINE bx_bool BX_CPU_C::getB_##name () { \
432 return 1 & (BX_CPU_THIS_PTR eflags >> bitnum); \
433 } \
434 BX_CPP_INLINE Bit32u BX_CPU_C::get_##name () { \
435 return BX_CPU_THIS_PTR eflags & (1 << bitnum); \
436 }
437
438 #define IMPLEMENT_EFLAG_SET_ACCESSOR(name,bitnum) \
439 BX_CPP_INLINE void BX_CPU_C::assert_##name () { \
440 BX_CPU_THIS_PTR eflags |= (1<<bitnum); \
441 } \
442 BX_CPP_INLINE void BX_CPU_C::clear_##name () { \
443 BX_CPU_THIS_PTR eflags &= ~(1<<bitnum); \
444 } \
445 BX_CPP_INLINE void BX_CPU_C::set_##name (bx_bool val) { \
446 BX_CPU_THIS_PTR eflags = \
447 (BX_CPU_THIS_PTR eflags&~(1<<bitnum))|((val)<<bitnum); \
448 }
449
450 #if BX_SUPPORT_ALIGNMENT_CHECK && BX_CPU_LEVEL >= 4
451
452 #define DECLARE_EFLAG_SET_ACCESSOR_AC(bitnum) \
453 BX_SMF BX_CPP_INLINE void assert_AC(); \
454 BX_SMF BX_CPP_INLINE void clear_AC(); \
455 BX_SMF BX_CPP_INLINE void set_AC(bx_bool val);
456
457 #define IMPLEMENT_EFLAG_SET_ACCESSOR_AC(bitnum) \
458 BX_CPP_INLINE void BX_CPU_C::assert_AC () { \
459 BX_CPU_THIS_PTR eflags |= (1<<bitnum); \
460 handleAlignmentCheck(); \
461 } \
462 BX_CPP_INLINE void BX_CPU_C::clear_AC() { \
463 BX_CPU_THIS_PTR eflags &= ~(1<<bitnum); \
464 BX_CPU_THIS_PTR alignment_check_mask = 0; \
465 } \
466 BX_CPP_INLINE void BX_CPU_C::set_AC(bx_bool val) { \
467 BX_CPU_THIS_PTR eflags = \
468 (BX_CPU_THIS_PTR eflags&~(1<<bitnum))|((val)<<bitnum); \
469 handleAlignmentCheck(); \
470 }
471
472 #endif
473
474 #define DECLARE_EFLAG_SET_ACCESSOR_VM(bitnum) \
475 BX_SMF BX_CPP_INLINE void assert_VM(); \
476 BX_SMF BX_CPP_INLINE void clear_VM(); \
477 BX_SMF BX_CPP_INLINE void set_VM(bx_bool val);
478
479 #define IMPLEMENT_EFLAG_SET_ACCESSOR_VM(bitnum) \
480 BX_CPP_INLINE void BX_CPU_C::assert_VM() { \
481 set_VM(1); \
482 } \
483 BX_CPP_INLINE void BX_CPU_C::clear_VM() { \
484 set_VM(0); \
485 } \
486 BX_CPP_INLINE void BX_CPU_C::set_VM(bx_bool val) { \
487 if (!long_mode()) { \
488 BX_CPU_THIS_PTR eflags = \
489 (BX_CPU_THIS_PTR eflags&~(1<<bitnum))|((val)<<bitnum); \
490 handleCpuModeChange(); \
491 } \
492 }
493
494 #define DECLARE_EFLAG_SET_ACCESSOR_IF(bitnum) \
495 BX_SMF BX_CPP_INLINE void assert_IF(); \
496 BX_SMF BX_CPP_INLINE void clear_IF(); \
497 BX_SMF BX_CPP_INLINE void set_IF(bx_bool val);
498
499 #define IMPLEMENT_EFLAG_SET_ACCESSOR_IF(bitnum) \
500 BX_CPP_INLINE void BX_CPU_C::assert_IF() { \
501 if (! BX_CPU_THIS_PTR get_IF()) \
502 BX_CPU_THIS_PTR async_event = 1; \
503 BX_CPU_THIS_PTR eflags |= (1<<bitnum); \
504 } \
505 BX_CPP_INLINE void BX_CPU_C::clear_IF() { \
506 BX_CPU_THIS_PTR eflags &= ~(1<<bitnum); \
507 } \
508 BX_CPP_INLINE void BX_CPU_C::set_IF(bx_bool val) { \
509 if (val) assert_IF(); \
510 else clear_IF(); \
511 }
512
513 #define DECLARE_EFLAG_SET_ACCESSOR_TF(bitnum) \
514 BX_SMF BX_CPP_INLINE void assert_TF(); \
515 BX_SMF BX_CPP_INLINE void clear_TF(); \
516 BX_SMF BX_CPP_INLINE void set_TF(bx_bool val);
517
518 #define IMPLEMENT_EFLAG_SET_ACCESSOR_TF(bitnum) \
519 BX_CPP_INLINE void BX_CPU_C::assert_TF() { \
520 BX_CPU_THIS_PTR eflags |= (1<<bitnum); \
521 BX_CPU_THIS_PTR async_event = 1; \
522 } \
523 BX_CPP_INLINE void BX_CPU_C::clear_TF() { \
524 BX_CPU_THIS_PTR eflags &= ~(1<<bitnum); \
525 } \
526 BX_CPP_INLINE void BX_CPU_C::set_TF(bx_bool val) { \
527 if (val) BX_CPU_THIS_PTR async_event = 1; \
528 BX_CPU_THIS_PTR eflags = \
529 (BX_CPU_THIS_PTR eflags&~(1<<bitnum))|((val)<<bitnum); \
530 }
531
532 #define DECLARE_EFLAG_ACCESSOR_IOPL(bitnum) \
533 BX_SMF BX_CPP_INLINE void set_IOPL(Bit32u val); \
534 BX_SMF BX_CPP_INLINE Bit32u get_IOPL(void);
535
536 #define IMPLEMENT_EFLAG_ACCESSOR_IOPL(bitnum) \
537 BX_CPP_INLINE void BX_CPU_C::set_IOPL(Bit32u val) { \
538 BX_CPU_THIS_PTR eflags &= ~(3<<12); \
539 BX_CPU_THIS_PTR eflags |= ((3&val) << 12); \
540 } \
541 BX_CPP_INLINE Bit32u BX_CPU_C::get_IOPL() { \
542 return 3 & (BX_CPU_THIS_PTR eflags >> 12); \
543 }
544
545 #define EFlagsCFMask (1 << 0)
546 #define EFlagsPFMask (1 << 2)
547 #define EFlagsAFMask (1 << 4)
548 #define EFlagsZFMask (1 << 6)
549 #define EFlagsSFMask (1 << 7)
550 #define EFlagsTFMask (1 << 8)
551 #define EFlagsIFMask (1 << 9)
552 #define EFlagsDFMask (1 << 10)
553 #define EFlagsOFMask (1 << 11)
554 #define EFlagsIOPLMask (3 << 12)
555 #define EFlagsNTMask (1 << 14)
556 #define EFlagsRFMask (1 << 16)
557 #define EFlagsVMMask (1 << 17)
558 #define EFlagsACMask (1 << 18)
559 #define EFlagsVIFMask (1 << 19)
560 #define EFlagsVIPMask (1 << 20)
561 #define EFlagsIDMask (1 << 21)
562
563 #define EFlagsOSZAPCMask \
564 (EFlagsCFMask | EFlagsPFMask | EFlagsAFMask | EFlagsZFMask | EFlagsSFMask | EFlagsOFMask)
565
566 #define EFlagsOSZAPMask \
567 (EFlagsPFMask | EFlagsAFMask | EFlagsZFMask | EFlagsSFMask | EFlagsOFMask)
568
569 #define EFlagsValidMask 0x003f7fd5 // only supported bits for EFLAGS
570
571 #if BX_CPU_LEVEL >= 5
572 typedef struct
573 {
574 #if BX_SUPPORT_APIC
575 bx_phy_address apicbase;
576 #endif
577
578 #if BX_SUPPORT_X86_64
579 Bit64u star;
580 Bit64u lstar;
581 Bit64u cstar;
582 Bit32u fmask;
583 Bit64u kernelgsbase;
584 Bit32u tsc_aux;
585 #endif
586
587 // TSC: Time Stamp Counter
588 // Instead of storing a counter and incrementing it every instruction, we
589 // remember the time in ticks that it was reset to zero. With a little
590 // algebra, we can also support setting it to something other than zero.
591 // Don't read this directly; use get_TSC and set_TSC to access the TSC.
592 Bit64u tsc_last_reset;
593
594 // SYSENTER/SYSEXIT instruction msr's
595 #if BX_SUPPORT_SEP
596 Bit32u sysenter_cs_msr;
597 bx_address sysenter_esp_msr;
598 bx_address sysenter_eip_msr;
599 #endif
600
601 #if BX_SUPPORT_MTRR
602 Bit64u mtrrphys[16];
603 Bit64u mtrrfix64k_00000;
604 Bit64u mtrrfix16k_80000;
605 Bit64u mtrrfix16k_a0000;
606 Bit64u mtrrfix4k[8];
607 Bit16u mtrr_deftype;
608 Bit64u pat;
609 #endif
610
611 /* TODO finish of the others */
612 } bx_regs_msr_t;
613 #endif
614
615 #define MAX_STD_CPUID_FUNCTION 14
616 #define MAX_EXT_CPUID_FUNCTION 9
617
618 struct cpuid_function_t {
619 Bit32u eax;
620 Bit32u ebx;
621 Bit32u ecx;
622 Bit32u edx;
623 };
624
625 #include "crregs.h"
626 #include "descriptor.h"
627 #include "instr.h"
628 #include "lazy_flags.h"
629
630 #if BX_SUPPORT_ICACHE
631 #include "icache.h"
632 #endif
633
634 // BX_TLB_SIZE: Number of entries in TLB
635 // BX_TLB_INDEX_OF(lpf): This macro is passed the linear page frame
636 // (top 20 bits of the linear address. It must map these bits to
637 // one of the TLB cache slots, given the size of BX_TLB_SIZE.
638 // There will be a many-to-one mapping to each TLB cache slot.
639 // When there are collisions, the old entry is overwritten with
640 // one for the newest access.
641
642 #define BX_TLB_SIZE 1024
643 #define BX_TLB_MASK ((BX_TLB_SIZE-1) << 12)
644 #define BX_TLB_INDEX_OF(lpf, len) ((((unsigned)(lpf) + (len)) & BX_TLB_MASK) >> 12)
645
646 typedef bx_ptr_equiv_t bx_hostpageaddr_t;
647
648 typedef struct {
649 bx_address lpf; // linear page frame
650 bx_phy_address ppf; // physical page frame
651 Bit32u accessBits;
652 bx_hostpageaddr_t hostPageAddr;
653 } bx_TLB_entry;
654
655 // general purpose register
656 #if BX_SUPPORT_X86_64
657
658 #ifdef BX_BIG_ENDIAN
659 typedef struct {
660 union {
661 struct {
662 Bit32u dword_filler;
663 Bit16u word_filler;
664 union {
665 Bit16u rx;
666 struct {
667 Bit8u rh;
668 Bit8u rl;
669 } byte;
670 };
671 } word;
672 Bit64u rrx;
673 struct {
674 Bit32u hrx; // hi 32 bits
675 Bit32u erx; // lo 32 bits
676 } dword;
677 };
678 } bx_gen_reg_t;
679 #else
680 typedef struct {
681 union {
682 struct {
683 union {
684 Bit16u rx;
685 struct {
686 Bit8u rl;
687 Bit8u rh;
688 } byte;
689 };
690 Bit16u word_filler;
691 Bit32u dword_filler;
692 } word;
693 Bit64u rrx;
694 struct {
695 Bit32u erx; // lo 32 bits
696 Bit32u hrx; // hi 32 bits
697 } dword;
698 };
699 } bx_gen_reg_t;
700
701 #endif
702
703 #else // #if BX_SUPPORT_X86_64
704
705 #ifdef BX_BIG_ENDIAN
706 typedef struct {
707 union {
708 struct {
709 Bit32u erx;
710 } dword;
711 struct {
712 Bit16u word_filler;
713 union {
714 Bit16u rx;
715 struct {
716 Bit8u rh;
717 Bit8u rl;
718 } byte;
719 };
720 } word;
721 };
722 } bx_gen_reg_t;
723 #else
724 typedef struct {
725 union {
726 struct {
727 Bit32u erx;
728 } dword;
729 struct {
730 union {
731 Bit16u rx;
732 struct {
733 Bit8u rl;
734 Bit8u rh;
735 } byte;
736 };
737 Bit16u word_filler;
738 } word;
739 };
740 } bx_gen_reg_t;
741 #endif
742
743 #endif // #if BX_SUPPORT_X86_64
744
745 #if BX_SUPPORT_APIC
746 #define BX_INCLUDE_LOCAL_APIC 1
747 #include "apic.h"
748 #endif
749
750 #if BX_SUPPORT_FPU
751 #include "cpu/i387.h"
752 #include "cpu/xmm.h"
753 #endif
754
755 #if BX_SUPPORT_MONITOR_MWAIT
756 struct monitor_addr_t {
757 bx_phy_address monitor_begin;
758 bx_phy_address monitor_end;
759 bool armed;
760 // avoid false trigger when MONITOR was not set up properly
761 monitor_addr_t():
762 monitor_begin(0xffffffff), monitor_end(0xffffffff), armed(false) {}
763 monitor_addr_t(bx_phy_address addr, unsigned len):
764 monitor_begin(addr), monitor_end(addr+len), armed(true) {}
765
766 void reset_monitor(void) { monitor_begin = monitor_end = 0xffffffff; armed = false; }
767 };
768 #endif
769
770 class BOCHSAPI BX_CPU_C : public logfunctions {
771
772 public: // for now...
773
774 char name[64];
775
776 unsigned bx_cpuid;
777
778 // cpuid
779 cpuid_function_t cpuid_std_function[MAX_STD_CPUID_FUNCTION];
780 cpuid_function_t cpuid_ext_function[MAX_EXT_CPUID_FUNCTION];
781
782 // General register set
783 // rax: accumulator
784 // rbx: base
785 // rcx: count
786 // rdx: data
787 // rbp: base pointer
788 // rsi: source index
789 // rdi: destination index
790 // esp: stack pointer
791 // r8..r15 x86-64 extended registers
792 // rip: instruction pointer
793 // nil: null register
794 // tmp: temp register
795 bx_gen_reg_t gen_reg[BX_GENERAL_REGISTERS+3];
796
797 /* 31|30|29|28| 27|26|25|24| 23|22|21|20| 19|18|17|16
798 * ==|==|=====| ==|==|==|==| ==|==|==|==| ==|==|==|==
799 * 0| 0| 0| 0| 0| 0| 0| 0| 0| 0|ID|VP| VF|AC|VM|RF
800 *
801 * 15|14|13|12| 11|10| 9| 8| 7| 6| 5| 4| 3| 2| 1| 0
802 * ==|==|=====| ==|==|==|==| ==|==|==|==| ==|==|==|==
803 * 0|NT| IOPL| OF|DF|IF|TF| SF|ZF| 0|AF| 0|PF| 1|CF
804 */
805 Bit32u eflags; // Raw 32-bit value in x86 bit position.
806
807 // status and control flags register set
808 Bit32u lf_flags_status;
809 bx_lf_flags_entry oszapc;
810
811 // so that we can back up when handling faults, exceptions, etc.
812 // we need to store the value of the instruction pointer, before
813 // each fetch/execute cycle.
814 bx_address prev_rip;
815 bx_address prev_rsp;
816 bx_bool speculative_rsp;
817
818 #define BX_INHIBIT_INTERRUPTS 0x01
819 #define BX_INHIBIT_DEBUG 0x02
820 // What events to inhibit at any given time. Certain instructions
821 // inhibit interrupts, some debug exceptions and single-step traps.
822 unsigned inhibit_mask;
823
824 /* user segment register set */
825 bx_segment_reg_t sregs[6];
826
827 /* system segment registers */
828 bx_global_segment_reg_t gdtr; /* global descriptor table register */
829 bx_global_segment_reg_t idtr; /* interrupt descriptor table register */
830 bx_segment_reg_t ldtr; /* local descriptor table register */
831 bx_segment_reg_t tr; /* task register */
832
833 /* debug registers DR0-DR7 */
834 #if BX_CPU_LEVEL >= 3
835 bx_address dr[4]; /* DR0-DR3 */
836 Bit32u dr6;
837 Bit32u dr7;
838 #endif
839
840 /* TR3 - TR7 (Test Register 3-7), unimplemented */
841
842 /* Control registers */
843 bx_cr0_t cr0;
844 Bit32u cr1;
845 bx_address cr2;
846 bx_address cr3;
847 bx_phy_address cr3_masked;
848 #if BX_CPU_LEVEL >= 4
849 bx_cr4_t cr4;
850 #endif
851
852 #if BX_SUPPORT_X86_64
853 bx_efer_t efer;
854 #endif
855
856 #if BX_SUPPORT_XSAVE
857 xcr0_t xcr0;
858 #endif
859
860 /* SMM base register */
861 Bit32u smbase;
862
863 #if BX_CPU_LEVEL >= 5
864 bx_regs_msr_t msr;
865 #endif
866
867 #if BX_SUPPORT_FPU || BX_SUPPORT_MMX
868 i387_t the_i387;
869 #endif
870
871 #if BX_SUPPORT_SSE
872 bx_xmm_reg_t xmm[BX_XMM_REGISTERS+1]; // +tmp XMM register
873 bx_mxcsr_t mxcsr;
874 #endif
875
876 #if BX_SUPPORT_MONITOR_MWAIT
877 monitor_addr_t monitor;
878 #endif
879
880 #if BX_SUPPORT_APIC
881 bx_local_apic_c local_apic;
882 #endif
883
884 bx_bool EXT; /* 1 if processing external interrupt or exception
885 * or if not related to current instruction,
886 * 0 if current CS:IP caused exception */
887 unsigned errorno; /* signal exception during instruction emulation */
888
889 #define BX_DEBUG_TRAP_HALT (0x80000000)
890 #define BX_DEBUG_TRAP_SHUTDOWN (0x40000000)
891 #define BX_DEBUG_TRAP_WAIT_FOR_SIPI (0x20000000)
892 #define BX_DEBUG_TRAP_MWAIT (0x10000000)
893 #define BX_DEBUG_TRAP_MWAIT_IF (0x18000000)
894 // combine all possible states
895 #define BX_DEBUG_TRAP_SPECIAL (0xf8000000)
896
897 Bit32u debug_trap; // holds DR6 value (16bit) to be set as well
898 volatile Bit32u async_event;
899
900 #if BX_SUPPORT_TRACE_CACHE
901 #define BX_ASYNC_EVENT_STOP_TRACE (0x80000000)
902 #endif
903
904 volatile bx_bool INTR;
905 volatile bx_bool smi_pending;
906 volatile bx_bool nmi_pending;
907
908 // for exceptions
909 jmp_buf jmp_buf_env;
910 Bit8u curr_exception;
911
912 bx_segment_reg_t save_cs;
913 bx_segment_reg_t save_ss;
914 bx_address save_eip;
915 bx_address save_esp;
916
917 // Boundaries of current page, based on EIP
918 bx_address eipPageBias;
919 Bit32u eipPageWindowSize;
920 const Bit8u *eipFetchPtr;
921 bx_phy_address pAddrA20Page; // Guest physical address of current instruction
922 // page with A20() already applied.
923 unsigned cpu_mode;
924 bx_bool user_pl;
925 bx_bool in_smm;
926 bx_bool nmi_disable;
927 #if BX_CPU_LEVEL >= 4 && BX_SUPPORT_ALIGNMENT_CHECK
928 unsigned alignment_check_mask;
929 #endif
930
931 #if BX_DEBUGGER
932 bx_phy_address watchpoint;
933 Bit8u break_point;
934 Bit8u magic_break;
935 Bit8u stop_reason;
936 bx_bool trace_reg;
937 bx_bool trace_mem;
938 bx_bool mode_break;
939 unsigned show_flag;
940 bx_guard_found_t guard_found;
941 #endif
942 Bit8u trace;
943
944 // for paging
945 struct {
946 bx_TLB_entry entry[BX_TLB_SIZE] BX_CPP_AlignN(16);
947 } TLB;
948
949 #if BX_SUPPORT_PAE
950 struct {
951 bx_bool valid;
952 Bit64u entry[4];
953 } PDPE_CACHE;
954 #endif
955
956 #if BX_SUPPORT_X86_64
957 #define LPF_MASK BX_CONST64(0xfffffffffffff000)
958 #else
959 #define LPF_MASK (0xfffff000)
960 #endif
961
962 #define LPFOf(laddr) ((laddr) & LPF_MASK)
963 #define AlignedAccessLPFOf(laddr, alignment_mask) \
964 ((laddr) & (LPF_MASK | (alignment_mask)))
965 #define PAGE_OFFSET(laddr) ((Bit32u)(laddr) & 0xfff)
966
967 // An instruction cache. Each entry should be exactly 32 bytes, and
968 // this structure should be aligned on a 32-byte boundary to be friendly
969 // with the host cache lines.
970 #if BX_SUPPORT_ICACHE
971 bxICache_c iCache BX_CPP_AlignN(32);
972 Bit32u fetchModeMask;
973 const Bit32u *currPageWriteStampPtr;
974 #endif
975
976 struct {
977 bx_address rm_addr; // The address offset after resolution
978 bx_phy_address paddress1; // physical address after translation of 1st len1 bytes of data
979 bx_phy_address paddress2; // physical address after translation of 2nd len2 bytes of data
980 Bit32u len1; // Number of bytes in page 1
981 Bit32u len2; // Number of bytes in page 2
982 bx_ptr_equiv_t pages; // Number of pages access spans (1 or 2). Also used
983 // for the case when a native host pointer is
984 // available for the R-M-W instructions. The host
985 // pointer is stuffed here. Since this field has
986 // to be checked anyways (and thus cached), if it
987 // is greated than 2 (the maximum possible for
988 // normal cases) it is a native pointer and is used
989 // for a direct write access.
990 } address_xlation;
991
992 BX_SMF void setEFlags(Bit32u val) BX_CPP_AttrRegparmN(1);
993
994 #define ArithmeticalFlag(flag, lfMask, eflagsBitShift) \
995 BX_SMF bx_bool get_##flag##Lazy(void); \
996 BX_SMF bx_bool getB_##flag(void) { \
997 if ((BX_CPU_THIS_PTR lf_flags_status & (lfMask)) == 0) \
998 return (BX_CPU_THIS_PTR eflags >> eflagsBitShift) & 1; \
999 else \
1000 return !!get_##flag##Lazy(); \
1001 } \
1002 BX_SMF bx_bool get_##flag(void) { \
1003 if ((BX_CPU_THIS_PTR lf_flags_status & (lfMask)) == 0) \
1004 return BX_CPU_THIS_PTR eflags & (lfMask); \
1005 else \
1006 return get_##flag##Lazy(); \
1007 } \
1008 BX_SMF void set_##flag(bx_bool val) { \
1009 BX_CPU_THIS_PTR lf_flags_status &= ~(lfMask); \
1010 BX_CPU_THIS_PTR eflags &= ~(lfMask); \
1011 BX_CPU_THIS_PTR eflags |= ((val)<<eflagsBitShift); \
1012 } \
1013 BX_SMF void clear_##flag(void) { \
1014 BX_CPU_THIS_PTR lf_flags_status &= ~(lfMask); \
1015 BX_CPU_THIS_PTR eflags &= ~(lfMask); \
1016 } \
1017 BX_SMF void assert_##flag(void) { \
1018 BX_CPU_THIS_PTR lf_flags_status &= ~(lfMask); \
1019 BX_CPU_THIS_PTR eflags |= (lfMask); \
1020 } \
1021 BX_SMF void force_##flag(void) { \
1022 if ((BX_CPU_THIS_PTR lf_flags_status & (lfMask)) != 0) { \
1023 set_##flag(!!get_##flag##Lazy()); \
1024 } \
1025 }
1026
1027 ArithmeticalFlag(OF, EFlagsOFMask, 11);
1028 ArithmeticalFlag(SF, EFlagsSFMask, 7);
1029 ArithmeticalFlag(ZF, EFlagsZFMask, 6);
1030 ArithmeticalFlag(AF, EFlagsAFMask, 4);
1031 ArithmeticalFlag(PF, EFlagsPFMask, 2);
1032 ArithmeticalFlag(CF, EFlagsCFMask, 0);
1033
1034 BX_SMF BX_CPP_INLINE void set_PF_base(Bit8u val);
1035
1036 // constructors & destructors...
1037 BX_CPU_C(unsigned id = 0);
1038 ~BX_CPU_C();
1039 void initialize(void);
1040 void after_restore_state(void);
1041 void register_state(void);
1042 #if BX_WITH_WX
1043 void register_wx_state(void);
1044 #endif
1045 static Bit64s param_save_handler(void *devptr, bx_param_c *param, Bit64s val);
1046 static Bit64s param_restore_handler(void *devptr, bx_param_c *param, Bit64s val);
1047 #if !BX_USE_CPU_SMF
1048 Bit64s param_save(bx_param_c *param, Bit64s val);
1049 Bit64s param_restore(bx_param_c *param, Bit64s val);
1050 #endif
1051
1052 // <TAG-CLASS-CPU-START>
1053 // prototypes for CPU instructions...
1054 BX_SMF void ADD_ALIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1055 BX_SMF void OR_ALIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1056 BX_SMF void ADC_ALIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1057 BX_SMF void SBB_ALIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1058 BX_SMF void AND_ALIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1059 BX_SMF void SUB_ALIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1060 BX_SMF void XOR_ALIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1061 BX_SMF void CMP_ALIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1062
1063 BX_SMF void ADD_AXIw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1064 BX_SMF void OR_AXIw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1065 BX_SMF void ADC_AXIw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1066 BX_SMF void SBB_AXIw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1067 BX_SMF void AND_AXIw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1068 BX_SMF void SUB_AXIw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1069 BX_SMF void XOR_AXIw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1070 BX_SMF void CMP_AXIw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1071
1072 BX_SMF void ADD_EAXId(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1073 BX_SMF void OR_EAXId(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1074 BX_SMF void ADC_EAXId(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1075 BX_SMF void SBB_EAXId(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1076 BX_SMF void AND_EAXId(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1077 BX_SMF void SUB_EAXId(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1078 BX_SMF void XOR_EAXId(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1079 BX_SMF void CMP_EAXId(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1080
1081 BX_SMF void PUSH16_CS(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1082 BX_SMF void PUSH16_DS(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1083 BX_SMF void POP16_DS(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1084 BX_SMF void PUSH16_ES(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1085 BX_SMF void POP16_ES(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1086 BX_SMF void PUSH16_FS(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1087 BX_SMF void POP16_FS(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1088 BX_SMF void PUSH16_GS(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1089 BX_SMF void POP16_GS(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1090 BX_SMF void PUSH16_SS(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1091 BX_SMF void POP16_SS(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1092
1093 BX_SMF void PUSH32_CS(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1094 BX_SMF void PUSH32_DS(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1095 BX_SMF void POP32_DS(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1096 BX_SMF void PUSH32_ES(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1097 BX_SMF void POP32_ES(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1098 BX_SMF void PUSH32_FS(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1099 BX_SMF void POP32_FS(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1100 BX_SMF void PUSH32_GS(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1101 BX_SMF void POP32_GS(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1102 BX_SMF void PUSH32_SS(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1103 BX_SMF void POP32_SS(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1104
1105 BX_SMF void DAA(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1106 BX_SMF void DAS(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1107 BX_SMF void AAA(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1108 BX_SMF void AAS(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1109 BX_SMF void AAM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1110 BX_SMF void AAD(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1111
1112 BX_SMF void PUSHAD32(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1113 BX_SMF void PUSHAD16(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1114 BX_SMF void POPAD32(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1115 BX_SMF void POPAD16(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1116 BX_SMF void ARPL_EwGw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1117 BX_SMF void PUSH_Id(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1118 BX_SMF void PUSH_Iw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1119
1120 BX_SMF void INSB32_YbDX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1121 BX_SMF void INSB16_YbDX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1122 BX_SMF void INSW32_YwDX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1123 BX_SMF void INSW16_YwDX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1124 BX_SMF void INSD32_YdDX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1125 BX_SMF void INSD16_YdDX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1126 BX_SMF void OUTSB32_DXXb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1127 BX_SMF void OUTSB16_DXXb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1128 BX_SMF void OUTSW32_DXXw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1129 BX_SMF void OUTSW16_DXXw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1130 BX_SMF void OUTSD32_DXXd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1131 BX_SMF void OUTSD16_DXXd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1132
1133 BX_SMF void REP_INSB_YbDX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1134 BX_SMF void REP_INSW_YwDX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1135 BX_SMF void REP_INSD_YdDX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1136 BX_SMF void REP_OUTSB_DXXb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1137 BX_SMF void REP_OUTSW_DXXw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1138 BX_SMF void REP_OUTSD_DXXd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1139
1140 BX_SMF void BOUND_GwMa(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1141 BX_SMF void BOUND_GdMa(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1142
1143 BX_SMF void TEST_EbGbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1144 BX_SMF void TEST_EwGwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1145 BX_SMF void TEST_EdGdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1146
1147 BX_SMF void XCHG_EbGbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1148 BX_SMF void XCHG_EwGwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1149 BX_SMF void XCHG_EdGdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1150
1151 BX_SMF void XCHG_EbGbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1152 BX_SMF void XCHG_EwGwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1153 BX_SMF void XCHG_EdGdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1154
1155 BX_SMF void MOV_EbGbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1156 BX_SMF void MOV_EdGdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1157 BX_SMF void MOV_EwGwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1158 BX_SMF void MOV_GbEbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1159 BX_SMF void MOV_GbEbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1160 BX_SMF void MOV_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1161 BX_SMF void MOV_GwEwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1162 BX_SMF void MOV_GwEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1163
1164 BX_SMF void MOV32_GdEdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1165
1166 BX_SMF void MOV_EwSwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1167 BX_SMF void MOV_EwSwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1168 BX_SMF void MOV_SwEw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1169
1170 BX_SMF void LEA_GdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1171 BX_SMF void LEA_GwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1172
1173 BX_SMF void CBW(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1174 BX_SMF void CWD(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1175 BX_SMF void CALL32_Ap(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1176 BX_SMF void CALL16_Ap(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1177 BX_SMF void PUSHF_Fw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1178 BX_SMF void POPF_Fw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1179 BX_SMF void PUSHF_Fd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1180 BX_SMF void POPF_Fd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1181 BX_SMF void SAHF(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1182 BX_SMF void LAHF(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1183
1184 BX_SMF void MOV_ALOd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1185 BX_SMF void MOV_EAXOd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1186 BX_SMF void MOV_AXOd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1187 BX_SMF void MOV_OdAL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1188 BX_SMF void MOV_OdEAX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1189 BX_SMF void MOV_OdAX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1190 BX_SMF void TEST_ALIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1191 BX_SMF void TEST_EAXId(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1192 BX_SMF void TEST_AXIw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1193
1194 // repeatable instructions
1195 BX_SMF void REP_MOVSB_XbYb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1196 BX_SMF void REP_MOVSW_XwYw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1197 BX_SMF void REP_MOVSD_XdYd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1198 BX_SMF void REP_CMPSB_XbYb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1199 BX_SMF void REP_CMPSW_XwYw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1200 BX_SMF void REP_CMPSD_XdYd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1201 BX_SMF void REP_STOSB_YbAL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1202 BX_SMF void REP_LODSB_ALXb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1203 BX_SMF void REP_SCASB_ALXb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1204 BX_SMF void REP_STOSW_YwAX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1205 BX_SMF void REP_LODSW_AXXw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1206 BX_SMF void REP_SCASW_AXXw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1207 BX_SMF void REP_STOSD_YdEAX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1208 BX_SMF void REP_LODSD_EAXXd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1209 BX_SMF void REP_SCASD_EAXXd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1210
1211 // qualified by address size
1212 BX_SMF void CMPSB16_XbYb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1213 BX_SMF void CMPSW16_XwYw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1214 BX_SMF void CMPSD16_XdYd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1215 BX_SMF void CMPSB32_XbYb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1216 BX_SMF void CMPSW32_XwYw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1217 BX_SMF void CMPSD32_XdYd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1218
1219 BX_SMF void SCASB16_ALXb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1220 BX_SMF void SCASW16_AXXw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1221 BX_SMF void SCASD16_EAXXd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1222 BX_SMF void SCASB32_ALXb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1223 BX_SMF void SCASW32_AXXw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1224 BX_SMF void SCASD32_EAXXd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1225
1226 BX_SMF void LODSB16_ALXb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1227 BX_SMF void LODSW16_AXXw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1228 BX_SMF void LODSD16_EAXXd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1229 BX_SMF void LODSB32_ALXb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1230 BX_SMF void LODSW32_AXXw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1231 BX_SMF void LODSD32_EAXXd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1232
1233 BX_SMF void STOSB16_YbAL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1234 BX_SMF void STOSW16_YwAX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1235 BX_SMF void STOSD16_YdEAX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1236 BX_SMF void STOSB32_YbAL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1237 BX_SMF void STOSW32_YwAX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1238 BX_SMF void STOSD32_YdEAX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1239
1240 BX_SMF void MOVSB16_XbYb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1241 BX_SMF void MOVSW16_XwYw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1242 BX_SMF void MOVSD16_XdYd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1243 BX_SMF void MOVSB32_XbYb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1244 BX_SMF void MOVSW32_XwYw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1245 BX_SMF void MOVSD32_XdYd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1246
1247 BX_SMF void MOV_EdIdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1248 BX_SMF void MOV_EwIwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1249 BX_SMF void MOV_EbIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1250
1251 BX_SMF void ENTER16_IwIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1252 BX_SMF void ENTER32_IwIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1253 BX_SMF void LEAVE16(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1254 BX_SMF void LEAVE32(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1255
1256 BX_SMF void INT1(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1257 BX_SMF void INT3(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1258 BX_SMF void INT_Ib(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1259 BX_SMF void INTO(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1260 BX_SMF void IRET32(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1261 BX_SMF void IRET16(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1262
1263 BX_SMF void SALC(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1264 BX_SMF void XLAT(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1265
1266 BX_SMF void LOOPNE16_Jb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1267 BX_SMF void LOOPE16_Jb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1268 BX_SMF void LOOP16_Jb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1269 BX_SMF void LOOPNE32_Jb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1270 BX_SMF void LOOPE32_Jb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1271 BX_SMF void LOOP32_Jb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1272 BX_SMF void JCXZ_Jb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1273 BX_SMF void JECXZ_Jb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1274 BX_SMF void IN_ALIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1275 BX_SMF void IN_AXIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1276 BX_SMF void IN_EAXIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1277 BX_SMF void OUT_IbAL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1278 BX_SMF void OUT_IbAX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1279 BX_SMF void OUT_IbEAX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1280 BX_SMF void CALL_Jw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1281 BX_SMF void CALL_Jd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1282 BX_SMF void JMP_Jd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1283 BX_SMF void JMP_Jw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1284 BX_SMF void JMP_Ap(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1285 BX_SMF void IN_ALDX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1286 BX_SMF void IN_AXDX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1287 BX_SMF void IN_EAXDX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1288 BX_SMF void OUT_DXAL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1289 BX_SMF void OUT_DXAX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1290 BX_SMF void OUT_DXEAX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1291
1292 BX_SMF void HLT(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1293 BX_SMF void CMC(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1294 BX_SMF void CLC(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1295 BX_SMF void STC(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1296 BX_SMF void CLI(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1297 BX_SMF void STI(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1298 BX_SMF void CLD(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1299 BX_SMF void STD(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1300
1301 BX_SMF void LAR_GvEw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1302 BX_SMF void LSL_GvEw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1303 BX_SMF void CLTS(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1304 BX_SMF void WBINVD(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1305 BX_SMF void CLFLUSH(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1306
1307 BX_SMF void MOV_CdRd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1308 BX_SMF void MOV_DdRd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1309 BX_SMF void MOV_RdCd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1310 BX_SMF void MOV_RdDd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1311 BX_SMF void MOV_TdRd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1312 BX_SMF void MOV_RdTd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1313
1314 BX_SMF void JO_Jw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1315 BX_SMF void JNO_Jw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1316 BX_SMF void JB_Jw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1317 BX_SMF void JNB_Jw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1318 BX_SMF void JZ_Jw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1319 BX_SMF void JNZ_Jw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1320 BX_SMF void JBE_Jw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1321 BX_SMF void JNBE_Jw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1322 BX_SMF void JS_Jw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1323 BX_SMF void JNS_Jw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1324 BX_SMF void JP_Jw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1325 BX_SMF void JNP_Jw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1326 BX_SMF void JL_Jw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1327 BX_SMF void JNL_Jw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1328 BX_SMF void JLE_Jw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1329 BX_SMF void JNLE_Jw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1330
1331 BX_SMF void JO_Jd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1332 BX_SMF void JNO_Jd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1333 BX_SMF void JB_Jd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1334 BX_SMF void JNB_Jd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1335 BX_SMF void JZ_Jd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1336 BX_SMF void JNZ_Jd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1337 BX_SMF void JBE_Jd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1338 BX_SMF void JNBE_Jd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1339 BX_SMF void JS_Jd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1340 BX_SMF void JNS_Jd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1341 BX_SMF void JP_Jd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1342 BX_SMF void JNP_Jd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1343 BX_SMF void JL_Jd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1344 BX_SMF void JNL_Jd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1345 BX_SMF void JLE_Jd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1346 BX_SMF void JNLE_Jd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1347
1348 BX_SMF void SETO_EbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1349 BX_SMF void SETNO_EbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1350 BX_SMF void SETB_EbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1351 BX_SMF void SETNB_EbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1352 BX_SMF void SETZ_EbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1353 BX_SMF void SETNZ_EbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1354 BX_SMF void SETBE_EbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1355 BX_SMF void SETNBE_EbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1356 BX_SMF void SETS_EbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1357 BX_SMF void SETNS_EbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1358 BX_SMF void SETP_EbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1359 BX_SMF void SETNP_EbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1360 BX_SMF void SETL_EbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1361 BX_SMF void SETNL_EbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1362 BX_SMF void SETLE_EbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1363 BX_SMF void SETNLE_EbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1364
1365 BX_SMF void SETO_EbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1366 BX_SMF void SETNO_EbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1367 BX_SMF void SETB_EbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1368 BX_SMF void SETNB_EbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1369 BX_SMF void SETZ_EbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1370 BX_SMF void SETNZ_EbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1371 BX_SMF void SETBE_EbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1372 BX_SMF void SETNBE_EbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1373 BX_SMF void SETS_EbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1374 BX_SMF void SETNS_EbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1375 BX_SMF void SETP_EbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1376 BX_SMF void SETNP_EbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1377 BX_SMF void SETL_EbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1378 BX_SMF void SETNL_EbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1379 BX_SMF void SETLE_EbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1380 BX_SMF void SETNLE_EbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1381
1382 BX_SMF void CPUID(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1383
1384 BX_SMF void SHRD_EwGwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1385 BX_SMF void SHRD_EwGwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1386 BX_SMF void SHLD_EwGwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1387 BX_SMF void SHLD_EwGwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1388 BX_SMF void SHRD_EdGdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1389 BX_SMF void SHRD_EdGdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1390 BX_SMF void SHLD_EdGdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1391 BX_SMF void SHLD_EdGdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1392
1393 BX_SMF void BSF_GwEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1394 BX_SMF void BSF_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1395 BX_SMF void BSR_GwEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1396 BX_SMF void BSR_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1397
1398 BX_SMF void BT_EwGwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1399 BX_SMF void BT_EdGdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1400 BX_SMF void BTS_EwGwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1401 BX_SMF void BTS_EdGdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1402 BX_SMF void BTR_EwGwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1403 BX_SMF void BTR_EdGdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1404 BX_SMF void BTC_EwGwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1405 BX_SMF void BTC_EdGdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1406
1407 BX_SMF void BT_EwGwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1408 BX_SMF void BT_EdGdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1409 BX_SMF void BTS_EwGwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1410 BX_SMF void BTS_EdGdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1411 BX_SMF void BTR_EwGwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1412 BX_SMF void BTR_EdGdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1413 BX_SMF void BTC_EwGwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1414 BX_SMF void BTC_EdGdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1415
1416 BX_SMF void BT_EwIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1417 BX_SMF void BT_EdIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1418 BX_SMF void BTS_EwIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1419 BX_SMF void BTS_EdIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1420 BX_SMF void BTR_EwIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1421 BX_SMF void BTR_EdIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1422 BX_SMF void BTC_EwIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1423 BX_SMF void BTC_EdIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1424
1425 BX_SMF void BT_EwIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1426 BX_SMF void BT_EdIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1427 BX_SMF void BTS_EwIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1428 BX_SMF void BTS_EdIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1429 BX_SMF void BTR_EwIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1430 BX_SMF void BTR_EdIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1431 BX_SMF void BTC_EwIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1432 BX_SMF void BTC_EdIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1433
1434 BX_SMF void LES_GwMp(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1435 BX_SMF void LDS_GwMp(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1436 BX_SMF void LSS_GwMp(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1437 BX_SMF void LFS_GwMp(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1438 BX_SMF void LGS_GwMp(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1439 BX_SMF void LES_GdMp(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1440 BX_SMF void LDS_GdMp(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1441 BX_SMF void LSS_GdMp(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1442 BX_SMF void LFS_GdMp(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1443 BX_SMF void LGS_GdMp(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1444
1445 BX_SMF void MOVZX_GwEbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1446 BX_SMF void MOVZX_GdEbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1447 BX_SMF void MOVZX_GdEwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1448 BX_SMF void MOVSX_GwEbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1449 BX_SMF void MOVSX_GdEbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1450 BX_SMF void MOVSX_GdEwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1451
1452 BX_SMF void MOVZX_GwEbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1453 BX_SMF void MOVZX_GdEbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1454 BX_SMF void MOVZX_GdEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1455 BX_SMF void MOVSX_GwEbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1456 BX_SMF void MOVSX_GdEbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1457 BX_SMF void MOVSX_GdEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1458
1459 BX_SMF void BSWAP_ERX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1460
1461 BX_SMF void ADD_GbEbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1462 BX_SMF void OR_GbEbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1463 BX_SMF void ADC_GbEbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1464 BX_SMF void SBB_GbEbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1465 BX_SMF void AND_GbEbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1466 BX_SMF void SUB_GbEbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1467 BX_SMF void XOR_GbEbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1468 BX_SMF void CMP_GbEbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1469
1470 BX_SMF void ADD_EbIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1471 BX_SMF void OR_EbIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1472 BX_SMF void ADC_EbIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1473 BX_SMF void SBB_EbIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1474 BX_SMF void AND_EbIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1475 BX_SMF void SUB_EbIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1476 BX_SMF void XOR_EbIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1477 BX_SMF void CMP_EbIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1478
1479 BX_SMF void ADD_EbIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1480 BX_SMF void OR_EbIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1481 BX_SMF void ADC_EbIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1482 BX_SMF void SBB_EbIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1483 BX_SMF void AND_EbIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1484 BX_SMF void SUB_EbIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1485 BX_SMF void XOR_EbIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1486 BX_SMF void CMP_EbIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1487
1488 BX_SMF void ADD_EbGbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1489 BX_SMF void OR_EbGbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1490 BX_SMF void ADC_EbGbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1491 BX_SMF void SBB_EbGbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1492 BX_SMF void AND_EbGbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1493 BX_SMF void SUB_EbGbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1494 BX_SMF void XOR_EbGbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1495 BX_SMF void CMP_EbGbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1496
1497 BX_SMF void ADD_EwIwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1498 BX_SMF void OR_EwIwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1499 BX_SMF void ADC_EwIwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1500 BX_SMF void SBB_EwIwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1501 BX_SMF void AND_EwIwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1502 BX_SMF void SUB_EwIwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1503 BX_SMF void XOR_EwIwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1504 BX_SMF void CMP_EwIwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1505
1506 BX_SMF void ADD_EwIwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1507 BX_SMF void OR_EwIwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1508 BX_SMF void ADC_EwIwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1509 BX_SMF void SBB_EwIwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1510 BX_SMF void AND_EwIwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1511 BX_SMF void SUB_EwIwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1512 BX_SMF void XOR_EwIwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1513 BX_SMF void CMP_EwIwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1514
1515 BX_SMF void ADD_EdIdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1516 BX_SMF void OR_EdIdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1517 BX_SMF void ADC_EdIdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1518 BX_SMF void SBB_EdIdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1519 BX_SMF void AND_EdIdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1520 BX_SMF void SUB_EdIdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1521 BX_SMF void XOR_EdIdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1522 BX_SMF void CMP_EdIdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1523
1524 BX_SMF void ADD_EdIdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1525 BX_SMF void OR_EdIdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1526 BX_SMF void ADC_EdIdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1527 BX_SMF void SBB_EdIdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1528 BX_SMF void AND_EdIdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1529 BX_SMF void SUB_EdIdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1530 BX_SMF void XOR_EdIdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1531 BX_SMF void CMP_EdIdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1532
1533 BX_SMF void ADD_EwGwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1534 BX_SMF void OR_EwGwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1535 BX_SMF void ADC_EwGwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1536 BX_SMF void SBB_EwGwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1537 BX_SMF void AND_EwGwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1538 BX_SMF void SUB_EwGwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1539 BX_SMF void XOR_EwGwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1540 BX_SMF void CMP_EwGwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1541
1542 BX_SMF void ADD_EdGdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1543 BX_SMF void OR_EdGdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1544 BX_SMF void ADC_EdGdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1545 BX_SMF void SBB_EdGdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1546 BX_SMF void AND_EdGdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1547 BX_SMF void SUB_EdGdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1548 BX_SMF void XOR_EdGdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1549 BX_SMF void CMP_EdGdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1550
1551 BX_SMF void ADD_GwEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1552 BX_SMF void OR_GwEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1553 BX_SMF void ADC_GwEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1554 BX_SMF void SBB_GwEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1555 BX_SMF void AND_GwEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1556 BX_SMF void SUB_GwEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1557 BX_SMF void XOR_GwEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1558 BX_SMF void CMP_GwEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1559
1560 BX_SMF void ADD_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1561 BX_SMF void OR_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1562 BX_SMF void ADC_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1563 BX_SMF void SBB_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1564 BX_SMF void AND_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1565 BX_SMF void SUB_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1566 BX_SMF void CMP_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1567 BX_SMF void XOR_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1568
1569 BX_SMF void NOT_EbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1570 BX_SMF void NOT_EwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1571 BX_SMF void NOT_EdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1572
1573 BX_SMF void NOT_EbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1574 BX_SMF void NOT_EwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1575 BX_SMF void NOT_EdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1576
1577 BX_SMF void NEG_EbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1578 BX_SMF void NEG_EwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1579 BX_SMF void NEG_EdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1580
1581 BX_SMF void NEG_EbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1582 BX_SMF void NEG_EwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1583 BX_SMF void NEG_EdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1584
1585 BX_SMF void ROL_Eb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1586 BX_SMF void ROR_Eb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1587 BX_SMF void RCL_Eb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1588 BX_SMF void RCR_Eb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1589 BX_SMF void SHL_Eb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1590 BX_SMF void SHR_Eb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1591 BX_SMF void SAR_Eb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1592
1593 BX_SMF void ROL_Ew(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1594 BX_SMF void ROR_Ew(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1595 BX_SMF void RCL_Ew(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1596 BX_SMF void RCR_Ew(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1597 BX_SMF void SHL_Ew(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1598 BX_SMF void SHR_Ew(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1599 BX_SMF void SAR_Ew(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1600
1601 BX_SMF void ROL_EdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1602 BX_SMF void ROR_EdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1603 BX_SMF void RCL_EdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1604 BX_SMF void RCR_EdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1605 BX_SMF void SHL_EdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1606 BX_SMF void SHR_EdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1607 BX_SMF void SAR_EdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1608
1609 BX_SMF void ROL_EdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1610 BX_SMF void ROR_EdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1611 BX_SMF void RCL_EdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1612 BX_SMF void RCR_EdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1613 BX_SMF void SHL_EdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1614 BX_SMF void SHR_EdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1615 BX_SMF void SAR_EdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1616
1617 BX_SMF void TEST_EbIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1618 BX_SMF void TEST_EwIwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1619 BX_SMF void TEST_EdIdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1620
1621 BX_SMF void IMUL_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1622 BX_SMF void IMUL_GdEdIdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1623
1624 BX_SMF void MUL_ALEbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1625 BX_SMF void IMUL_ALEbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1626 BX_SMF void DIV_ALEbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1627 BX_SMF void IDIV_ALEbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1628
1629 BX_SMF void MUL_EAXEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1630 BX_SMF void IMUL_EAXEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1631 BX_SMF void DIV_EAXEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1632 BX_SMF void IDIV_EAXEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1633
1634 BX_SMF void INC_EbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1635 BX_SMF void DEC_EbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1636
1637 BX_SMF void INC_EbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1638 BX_SMF void INC_EwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1639 BX_SMF void INC_EdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1640 BX_SMF void DEC_EbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1641 BX_SMF void DEC_EwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1642 BX_SMF void DEC_EdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1643
1644 BX_SMF void CALL_EdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1645 BX_SMF void CALL_EwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1646
1647 BX_SMF void CALL32_Ep(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1648 BX_SMF void CALL16_Ep(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1649 BX_SMF void JMP32_Ep(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1650 BX_SMF void JMP16_Ep(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1651
1652 BX_SMF void JMP_EdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1653 BX_SMF void JMP_EwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1654
1655 BX_SMF void SLDT_Ew(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1656 BX_SMF void STR_Ew(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1657 BX_SMF void LLDT_Ew(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1658 BX_SMF void LTR_Ew(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1659 BX_SMF void VERR_Ew(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1660 BX_SMF void VERW_Ew(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1661
1662 BX_SMF void SGDT_Ms(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1663 BX_SMF void SIDT_Ms(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1664 BX_SMF void LGDT_Ms(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1665 BX_SMF void LIDT_Ms(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1666 BX_SMF void SMSW_EwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1667 BX_SMF void SMSW_EwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1668 BX_SMF void LMSW_Ew(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1669
1670 // LOAD methods
1671 BX_SMF void LOAD_Eb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1672 BX_SMF void LOAD_Eb_Resolve16BaseIndex(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1673 BX_SMF void LOAD_Eb_Resolve32Base(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1674 BX_SMF void LOAD_Eb_Resolve32BaseIndex(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1675
1676 BX_SMF void LOAD_Ew(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1677 BX_SMF void LOAD_Ew_Resolve16BaseIndex(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1678 BX_SMF void LOAD_Ew_Resolve32Base(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1679 BX_SMF void LOAD_Ew_Resolve32BaseIndex(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1680
1681 BX_SMF void LOAD_Ed(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1682 BX_SMF void LOAD_Ed_Resolve16BaseIndex(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1683 BX_SMF void LOAD_Ed_Resolve32Base(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1684 BX_SMF void LOAD_Ed_Resolve32BaseIndex(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1685
1686 #if BX_SUPPORT_X86_64
1687 BX_SMF void LOAD_Eq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1688 #endif
1689 #if BX_SUPPORT_SSE >= 1
1690 BX_SMF void LOAD_Wss(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1691 BX_SMF void LOAD_Wsd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1692 BX_SMF void LOAD_Wdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1693 #endif
1694
1695 #if BX_SUPPORT_FPU == 0 // if FPU is disabled
1696 BX_SMF void FPU_ESC(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1697 #endif
1698
1699 BX_SMF void FWAIT(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1700
1701 #if BX_SUPPORT_FPU
1702 // load/store
1703 BX_SMF void FLD_STi(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1704 BX_SMF void FLD_SINGLE_REAL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1705 BX_SMF void FLD_DOUBLE_REAL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1706 BX_SMF void FLD_EXTENDED_REAL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1707 BX_SMF void FILD_WORD_INTEGER(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1708 BX_SMF void FILD_DWORD_INTEGER(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1709 BX_SMF void FILD_QWORD_INTEGER(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1710 BX_SMF void FBLD_PACKED_BCD(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1711
1712 BX_SMF void FST_STi(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1713 BX_SMF void FST_SINGLE_REAL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1714 BX_SMF void FST_DOUBLE_REAL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1715 BX_SMF void FSTP_EXTENDED_REAL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1716 BX_SMF void FIST_WORD_INTEGER(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1717 BX_SMF void FIST_DWORD_INTEGER(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1718 BX_SMF void FISTP_QWORD_INTEGER(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1719 BX_SMF void FBSTP_PACKED_BCD(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1720
1721 BX_SMF void FISTTP16(bxInstruction_c *) BX_CPP_AttrRegparmN(1); // SSE3
1722 BX_SMF void FISTTP32(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1723 BX_SMF void FISTTP64(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1724
1725 // control
1726 BX_SMF void FNINIT(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1727 BX_SMF void FNCLEX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1728
1729 BX_SMF void FRSTOR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1730 BX_SMF void FNSAVE(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1731 BX_SMF void FLDENV(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1732 BX_SMF void FNSTENV(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1733
1734 BX_SMF void FLDCW(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1735 BX_SMF void FNSTCW(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1736 BX_SMF void FNSTSW(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1737 BX_SMF void FNSTSW_AX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1738
1739 // const
1740 BX_SMF void FLD1(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1741 BX_SMF void FLDL2T(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1742 BX_SMF void FLDL2E(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1743 BX_SMF void FLDPI(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1744 BX_SMF void FLDLG2(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1745 BX_SMF void FLDLN2(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1746 BX_SMF void FLDZ(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1747
1748 // add
1749 BX_SMF void FADD_ST0_STj(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1750 BX_SMF void FADD_STi_ST0(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1751 BX_SMF void FADD_SINGLE_REAL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1752 BX_SMF void FADD_DOUBLE_REAL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1753 BX_SMF void FIADD_WORD_INTEGER(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1754 BX_SMF void FIADD_DWORD_INTEGER(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1755
1756 // mul
1757 BX_SMF void FMUL_ST0_STj(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1758 BX_SMF void FMUL_STi_ST0(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1759 BX_SMF void FMUL_SINGLE_REAL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1760 BX_SMF void FMUL_DOUBLE_REAL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1761 BX_SMF void FIMUL_WORD_INTEGER (bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1762 BX_SMF void FIMUL_DWORD_INTEGER(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1763
1764 // sub
1765 BX_SMF void FSUB_ST0_STj(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1766 BX_SMF void FSUBR_ST0_STj(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1767 BX_SMF void FSUB_STi_ST0(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1768 BX_SMF void FSUBR_STi_ST0(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1769 BX_SMF void FSUB_SINGLE_REAL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1770 BX_SMF void FSUBR_SINGLE_REAL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1771 BX_SMF void FSUB_DOUBLE_REAL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1772 BX_SMF void FSUBR_DOUBLE_REAL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1773
1774 BX_SMF void FISUB_WORD_INTEGER(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1775 BX_SMF void FISUBR_WORD_INTEGER(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1776 BX_SMF void FISUB_DWORD_INTEGER(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1777 BX_SMF void FISUBR_DWORD_INTEGER(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1778
1779 // div
1780 BX_SMF void FDIV_ST0_STj(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1781 BX_SMF void FDIVR_ST0_STj(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1782 BX_SMF void FDIV_STi_ST0(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1783 BX_SMF void FDIVR_STi_ST0(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1784 BX_SMF void FDIV_SINGLE_REAL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1785 BX_SMF void FDIVR_SINGLE_REAL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1786 BX_SMF void FDIV_DOUBLE_REAL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1787 BX_SMF void FDIVR_DOUBLE_REAL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1788
1789 BX_SMF void FIDIV_WORD_INTEGER(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1790 BX_SMF void FIDIVR_WORD_INTEGER(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1791 BX_SMF void FIDIV_DWORD_INTEGER(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1792 BX_SMF void FIDIVR_DWORD_INTEGER(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1793
1794 // compare
1795 BX_SMF void FCOM_STi(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1796 BX_SMF void FUCOM_STi(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1797 BX_SMF void FCOMI_ST0_STj(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1798 BX_SMF void FUCOMI_ST0_STj(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1799 BX_SMF void FCOM_SINGLE_REAL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1800 BX_SMF void FCOM_DOUBLE_REAL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1801 BX_SMF void FICOM_WORD_INTEGER(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1802 BX_SMF void FICOM_DWORD_INTEGER(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1803 BX_SMF void FCMOV_ST0_STj(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1804
1805 BX_SMF void FCOMPP(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1806 BX_SMF void FUCOMPP(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1807
1808 // misc
1809 BX_SMF void FXCH_STi(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1810 BX_SMF void FNOP(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1811 BX_SMF void FPLEGACY(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1812 BX_SMF void FCHS(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1813 BX_SMF void FABS(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1814 BX_SMF void FTST(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1815 BX_SMF void FXAM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1816 BX_SMF void FDECSTP(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1817 BX_SMF void FINCSTP(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1818 BX_SMF void FFREE_STi(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1819 BX_SMF void FFREEP_STi(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1820
1821 BX_SMF void F2XM1(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1822 BX_SMF void FYL2X(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1823 BX_SMF void FPTAN(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1824 BX_SMF void FPATAN(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1825 BX_SMF void FXTRACT(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1826 BX_SMF void FPREM1(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1827 BX_SMF void FPREM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1828 BX_SMF void FYL2XP1(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1829 BX_SMF void FSQRT(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1830 BX_SMF void FSINCOS(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1831 BX_SMF void FRNDINT(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1832 #undef FSCALE // <sys/param.h> is #included on Mac OS X from bochs.h
1833 BX_SMF void FSCALE(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1834 BX_SMF void FSIN(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1835 BX_SMF void FCOS(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1836 #endif
1837
1838 /* MMX */
1839 BX_SMF void PUNPCKLBW_PqQd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1840 BX_SMF void PUNPCKLWD_PqQd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1841 BX_SMF void PUNPCKLDQ_PqQd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1842 BX_SMF void PACKSSWB_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1843 BX_SMF void PCMPGTB_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1844 BX_SMF void PCMPGTW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1845 BX_SMF void PCMPGTD_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1846 BX_SMF void PACKUSWB_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1847 BX_SMF void PUNPCKHBW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1848 BX_SMF void PUNPCKHWD_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1849 BX_SMF void PUNPCKHDQ_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1850 BX_SMF void PACKSSDW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1851 BX_SMF void MOVD_PqEd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1852 BX_SMF void MOVQ_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1853 BX_SMF void PCMPEQB_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1854 BX_SMF void PCMPEQW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1855 BX_SMF void PCMPEQD_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1856 BX_SMF void EMMS(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1857 BX_SMF void MOVD_EdPd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1858 BX_SMF void MOVQ_QqPq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1859 BX_SMF void PSRLW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1860 BX_SMF void PSRLD_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1861 BX_SMF void PSRLQ_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1862 BX_SMF void PMULLW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1863 BX_SMF void PSUBUSB_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1864 BX_SMF void PSUBUSW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1865 BX_SMF void PAND_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1866 BX_SMF void PADDUSB_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1867 BX_SMF void PADDUSW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1868 BX_SMF void PANDN_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1869 BX_SMF void PSRAW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1870 BX_SMF void PSRAD_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1871 BX_SMF void PMULHW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1872 BX_SMF void PSUBSB_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1873 BX_SMF void PSUBSW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1874 BX_SMF void POR_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1875 BX_SMF void PADDSB_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1876 BX_SMF void PADDSW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1877 BX_SMF void PXOR_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1878 BX_SMF void PSLLW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1879 BX_SMF void PSLLD_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1880 BX_SMF void PSLLQ_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1881 BX_SMF void PMADDWD_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1882 BX_SMF void PSUBB_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1883 BX_SMF void PSUBW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1884 BX_SMF void PSUBD_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1885 BX_SMF void PADDB_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1886 BX_SMF void PADDW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1887 BX_SMF void PADDD_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1888 BX_SMF void PSRLW_PqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1889 BX_SMF void PSRAW_PqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1890 BX_SMF void PSLLW_PqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1891 BX_SMF void PSRLD_PqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1892 BX_SMF void PSRAD_PqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1893 BX_SMF void PSLLD_PqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1894 BX_SMF void PSRLQ_PqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1895 BX_SMF void PSLLQ_PqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1896 /* MMX */
1897
1898 #if BX_SUPPORT_3DNOW
1899 BX_SMF void PFPNACC_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1900 BX_SMF void PI2FW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1901 BX_SMF void PI2FD_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1902 BX_SMF void PF2IW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1903 BX_SMF void PF2ID_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1904 BX_SMF void PFNACC_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1905 BX_SMF void PFCMPGE_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1906 BX_SMF void PFMIN_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1907 BX_SMF void PFRCP_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1908 BX_SMF void PFRSQRT_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1909 BX_SMF void PFSUB_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1910 BX_SMF void PFADD_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1911 BX_SMF void PFCMPGT_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1912 BX_SMF void PFMAX_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1913 BX_SMF void PFRCPIT1_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1914 BX_SMF void PFRSQIT1_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1915 BX_SMF void PFSUBR_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1916 BX_SMF void PFACC_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1917 BX_SMF void PFCMPEQ_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1918 BX_SMF void PFMUL_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1919 BX_SMF void PFRCPIT2_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1920 BX_SMF void PMULHRW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1921 BX_SMF void PSWAPD_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1922 #endif
1923
1924 /* SSE */
1925 BX_SMF void FXSAVE(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1926 BX_SMF void FXRSTOR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1927 BX_SMF void LDMXCSR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1928 BX_SMF void STMXCSR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1929 BX_SMF void PREFETCH(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1930 /* SSE */
1931
1932 /* SSE */
1933 BX_SMF void ANDPS_VpsWps(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1934 BX_SMF void ORPS_VpsWps(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1935 BX_SMF void XORPS_VpsWps(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1936 BX_SMF void ANDNPS_VpsWps(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1937 BX_SMF void MOVUPS_VpsWps(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1938 BX_SMF void MOVSS_VssWss(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1939 BX_SMF void MOVUPS_WpsVps(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1940 BX_SMF void MOVSS_WssVss(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1941 BX_SMF void MOVLPS_VpsMq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1942 BX_SMF void MOVLPS_MqVps(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1943 BX_SMF void MOVHPS_VpsMq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1944 BX_SMF void MOVHPS_MqVps(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1945 BX_SMF void MOVAPS_VpsWps(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1946 BX_SMF void MOVAPS_WpsVps(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1947 BX_SMF void CVTPI2PS_VpsQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1948 BX_SMF void CVTSI2SS_VssEd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1949 BX_SMF void MOVNTPS_MpsVps(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1950 BX_SMF void CVTTPS2PI_PqWps(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1951 BX_SMF void CVTTSS2SI_GdWss(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1952 BX_SMF void CVTPS2PI_PqWps(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1953 BX_SMF void CVTSS2SI_GdWss(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1954 BX_SMF void UCOMISS_VssWss(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1955 BX_SMF void COMISS_VpsWps(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1956 BX_SMF void MOVMSKPS_GdVRps(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1957 BX_SMF void SQRTPS_VpsWps(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1958 BX_SMF void SQRTSS_VssWss(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1959 BX_SMF void RSQRTPS_VpsWps(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1960 BX_SMF void RSQRTSS_VssWss(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1961 BX_SMF void RCPPS_VpsWps(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1962 BX_SMF void RCPSS_VssWss(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1963 BX_SMF void ADDPS_VpsWps(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1964 BX_SMF void ADDSS_VssWss(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1965 BX_SMF void MULPS_VpsWps(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1966 BX_SMF void MULSS_VssWss(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1967 BX_SMF void SUBPS_VpsWps(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1968 BX_SMF void SUBSS_VssWss(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1969 BX_SMF void MINPS_VpsWps(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1970 BX_SMF void MINSS_VssWss(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1971 BX_SMF void DIVPS_VpsWps(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1972 BX_SMF void DIVSS_VssWss(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1973 BX_SMF void MAXPS_VpsWps(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1974 BX_SMF void MAXSS_VssWss(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1975 BX_SMF void PSHUFW_PqQqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1976 BX_SMF void PSHUFLW_VdqWdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1977 BX_SMF void CMPPS_VpsWpsIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1978 BX_SMF void CMPSS_VssWssIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1979 BX_SMF void PINSRW_PqEwIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1980 BX_SMF void PEXTRW_GdPqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1981 BX_SMF void SHUFPS_VpsWpsIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1982 BX_SMF void PMOVMSKB_GdPRq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1983 BX_SMF void PMINUB_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1984 BX_SMF void PMAXUB_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1985 BX_SMF void PAVGB_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1986 BX_SMF void PAVGW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1987 BX_SMF void PMULHUW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1988 BX_SMF void MOVNTQ_MqPq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1989 BX_SMF void PMINSW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1990 BX_SMF void PMAXSW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1991 BX_SMF void PSADBW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1992 BX_SMF void MASKMOVQ_PqPRq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1993 /* SSE */
1994
1995 /* SSE2 */
1996 BX_SMF void MOVSD_VsdWsd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1997 BX_SMF void MOVSD_WsdVsd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1998 BX_SMF void CVTPI2PD_VpdQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1999 BX_SMF void CVTSI2SD_VsdEd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2000 BX_SMF void CVTTPD2PI_PqWpd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2001 BX_SMF void CVTTSD2SI_GdWsd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2002 BX_SMF void CVTPD2PI_PqWpd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2003 BX_SMF void CVTSD2SI_GdWsd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2004 BX_SMF void UCOMISD_VsdWsd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2005 BX_SMF void COMISD_VpdWpd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2006 BX_SMF void MOVMSKPD_GdVRpd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2007 BX_SMF void SQRTPD_VpdWpd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2008 BX_SMF void SQRTSD_VsdWsd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2009 BX_SMF void ADDPD_VpdWpd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2010 BX_SMF void ADDSD_VsdWsd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2011 BX_SMF void MULPD_VpdWpd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2012 BX_SMF void MULSD_VsdWsd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2013 BX_SMF void CVTPS2PD_VpsWps(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2014 BX_SMF void CVTPD2PS_VpdWpd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2015 BX_SMF void CVTSD2SS_VsdWsd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2016 BX_SMF void CVTSS2SD_VssWss(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2017 BX_SMF void CVTDQ2PS_VpsWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2018 BX_SMF void CVTPS2DQ_VdqWps(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2019 BX_SMF void CVTTPS2DQ_VdqWps(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2020 BX_SMF void SUBPD_VpdWpd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2021 BX_SMF void SUBSD_VsdWsd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2022 BX_SMF void MINPD_VpdWpd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2023 BX_SMF void MINSD_VsdWsd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2024 BX_SMF void DIVPD_VpdWpd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2025 BX_SMF void DIVSD_VsdWsd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2026 BX_SMF void MAXPD_VpdWpd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2027 BX_SMF void MAXSD_VsdWsd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2028 BX_SMF void PUNPCKLBW_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2029 BX_SMF void PUNPCKLWD_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2030 BX_SMF void UNPCKLPS_VpsWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2031 BX_SMF void PACKSSWB_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2032 BX_SMF void PCMPGTB_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2033 BX_SMF void PCMPGTW_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2034 BX_SMF void PCMPGTD_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2035 BX_SMF void PACKUSWB_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2036 BX_SMF void PUNPCKHBW_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2037 BX_SMF void PUNPCKHWD_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2038 BX_SMF void UNPCKHPS_VpsWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2039 BX_SMF void PACKSSDW_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2040 BX_SMF void PUNPCKLQDQ_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2041 BX_SMF void PUNPCKHQDQ_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2042 BX_SMF void MOVD_VdqEd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2043 BX_SMF void PSHUFD_VdqWdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2044 BX_SMF void PSHUFHW_VdqWdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2045 BX_SMF void PCMPEQB_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2046 BX_SMF void PCMPEQW_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2047 BX_SMF void PCMPEQD_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2048 BX_SMF void MOVD_EdVd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2049 BX_SMF void MOVQ_VqWq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2050 BX_SMF void CMPPD_VpdWpdIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2051 BX_SMF void CMPSD_VsdWsdIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2052 BX_SMF void MOVNTI_MdGd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2053 BX_SMF void PINSRW_VdqEwIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2054 BX_SMF void PEXTRW_GdUdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2055 BX_SMF void SHUFPD_VpdWpdIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2056 BX_SMF void PSRLW_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2057 BX_SMF void PSRLD_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2058 BX_SMF void PSRLQ_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2059 BX_SMF void PADDQ_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2060 BX_SMF void PADDQ_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2061 BX_SMF void PMULLW_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2062 BX_SMF void MOVQ_WqVq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2063 BX_SMF void MOVDQ2Q_PqVRq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2064 BX_SMF void MOVQ2DQ_VdqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2065 BX_SMF void PMOVMSKB_GdUdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2066 BX_SMF void PSUBUSB_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2067 BX_SMF void PSUBUSW_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2068 BX_SMF void PMINUB_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2069 BX_SMF void PADDUSB_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2070 BX_SMF void PADDUSW_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2071 BX_SMF void PMAXUB_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2072 BX_SMF void PAVGB_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2073 BX_SMF void PSRAW_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2074 BX_SMF void PSRAD_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2075 BX_SMF void PAVGW_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2076 BX_SMF void PMULHUW_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2077 BX_SMF void PMULHW_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2078 BX_SMF void CVTTPD2DQ_VqWpd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2079 BX_SMF void CVTPD2DQ_VqWpd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2080 BX_SMF void CVTDQ2PD_VpdWq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2081 BX_SMF void PSUBSB_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2082 BX_SMF void PSUBSW_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2083 BX_SMF void PMINSW_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2084 BX_SMF void PADDSB_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2085 BX_SMF void PADDSW_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2086 BX_SMF void PMAXSW_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2087 BX_SMF void PSLLW_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2088 BX_SMF void PSLLD_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2089 BX_SMF void PSLLQ_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2090 BX_SMF void PMULUDQ_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2091 BX_SMF void PMULUDQ_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2092 BX_SMF void PMADDWD_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2093 BX_SMF void PSADBW_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2094 BX_SMF void MASKMOVDQU_VdqUdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2095 BX_SMF void PSUBB_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2096 BX_SMF void PSUBW_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2097 BX_SMF void PSUBD_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2098 BX_SMF void PSUBQ_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2099 BX_SMF void PSUBQ_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2100 BX_SMF void PADDB_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2101 BX_SMF void PADDW_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2102 BX_SMF void PADDD_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2103 BX_SMF void PSRLW_UdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2104 BX_SMF void PSRAW_UdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2105 BX_SMF void PSLLW_UdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2106 BX_SMF void PSRLD_UdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2107 BX_SMF void PSRAD_UdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2108 BX_SMF void PSLLD_UdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2109 BX_SMF void PSRLQ_UdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2110 BX_SMF void PSRLDQ_UdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2111 BX_SMF void PSLLQ_UdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2112 BX_SMF void PSLLDQ_UdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2113 /* SSE2 */
2114
2115 /* SSE3 */
2116 BX_SMF void MOVDDUP_VpdWq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2117 BX_SMF void MOVSLDUP_VpsWps(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2118 BX_SMF void MOVSHDUP_VpsWps(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2119 BX_SMF void HADDPD_VpdWpd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2120 BX_SMF void HADDPS_VpsWps(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2121 BX_SMF void HSUBPD_VpdWpd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2122 BX_SMF void HSUBPS_VpsWps(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2123 BX_SMF void ADDSUBPD_VpdWpd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2124 BX_SMF void ADDSUBPS_VpsWps(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2125 BX_SMF void LDDQU_VdqMdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2126 /* SSE3 */
2127
2128 // 3-byte opcodes
2129 #if (BX_SUPPORT_SSE >= 4) || (BX_SUPPORT_SSE >= 3 && BX_SUPPORT_SSE_EXTENSION > 0)
2130 /* SSE3E */
2131 BX_SMF void PSHUFB_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2132 BX_SMF void PHADDW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2133 BX_SMF void PHADDD_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2134 BX_SMF void PHADDSW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2135 BX_SMF void PMADDUBSW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2136 BX_SMF void PHSUBSW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2137 BX_SMF void PHSUBW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2138 BX_SMF void PHSUBD_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2139 BX_SMF void PSIGNB_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2140 BX_SMF void PSIGNW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2141 BX_SMF void PSIGND_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2142 BX_SMF void PMULHRSW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2143 BX_SMF void PABSB_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2144 BX_SMF void PABSW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2145 BX_SMF void PABSD_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2146 BX_SMF void PALIGNR_PqQqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2147
2148 BX_SMF void PSHUFB_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2149 BX_SMF void PHADDW_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2150 BX_SMF void PHADDD_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2151 BX_SMF void PHADDSW_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2152 BX_SMF void PMADDUBSW_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2153 BX_SMF void PHSUBSW_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2154 BX_SMF void PHSUBW_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2155 BX_SMF void PHSUBD_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2156 BX_SMF void PSIGNB_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2157 BX_SMF void PSIGNW_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2158 BX_SMF void PSIGND_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2159 BX_SMF void PMULHRSW_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2160 BX_SMF void PABSB_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2161 BX_SMF void PABSW_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2162 BX_SMF void PABSD_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2163 BX_SMF void PALIGNR_VdqWdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2164 /* SSE3E */
2165
2166 /* SSE4.1 */
2167 BX_SMF void PBLENDVB_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2168 BX_SMF void BLENDVPS_VpsWps(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2169 BX_SMF void BLENDVPD_VpdWpd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2170 BX_SMF void PTEST_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2171 BX_SMF void PMULDQ_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2172 BX_SMF void PCMPEQQ_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2173 BX_SMF void PACKUSDW_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2174 BX_SMF void PMOVSXBW_VdqWq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2175 BX_SMF void PMOVSXBD_VdqWd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2176 BX_SMF void PMOVSXBQ_VdqWw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2177 BX_SMF void PMOVSXWD_VdqWq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2178 BX_SMF void PMOVSXWQ_VdqWd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2179 BX_SMF void PMOVSXDQ_VdqWq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2180 BX_SMF void PMOVZXBW_VdqWq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2181 BX_SMF void PMOVZXBD_VdqWd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2182 BX_SMF void PMOVZXBQ_VdqWw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2183 BX_SMF void PMOVZXWD_VdqWq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2184 BX_SMF void PMOVZXWQ_VdqWd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2185 BX_SMF void PMOVZXDQ_VdqWq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2186 BX_SMF void PMINSB_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2187 BX_SMF void PMINSD_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2188 BX_SMF void PMINUW_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2189 BX_SMF void PMINUD_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2190 BX_SMF void PMAXSB_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2191 BX_SMF void PMAXSD_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2192 BX_SMF void PMAXUW_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2193 BX_SMF void PMAXUD_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2194 BX_SMF void PMULLD_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2195 BX_SMF void PHMINPOSUW_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2196 BX_SMF void ROUNDPS_VpsWpsIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2197 BX_SMF void ROUNDPD_VpdWpdIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2198 BX_SMF void ROUNDSS_VssWssIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2199 BX_SMF void ROUNDSD_VsdWsdIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2200 BX_SMF void BLENDPS_VpsWpsIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2201 BX_SMF void BLENDPD_VpdWpdIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2202 BX_SMF void PBLENDW_VdqWdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2203 BX_SMF void PEXTRB_HbdUdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2204 BX_SMF void PEXTRW_HwdUdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2205 BX_SMF void PEXTRD_HdUdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2206 BX_SMF void EXTRACTPS_HdUpsIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2207 BX_SMF void PINSRB_VdqEbIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2208 BX_SMF void INSERTPS_VpsWssIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2209 BX_SMF void PINSRD_VdqEdIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2210 BX_SMF void DPPS_VpsWpsIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2211 BX_SMF void DPPD_VpdWpdIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2212 BX_SMF void MPSADBW_VdqWdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2213 BX_SMF void MOVNTDQA_VdqMdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2214 /* SSE4.1 */
2215
2216 /* SSE4.2 */
2217 BX_SMF void CRC32_GdEb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2218 BX_SMF void CRC32_GdEw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2219 BX_SMF void CRC32_GdEd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2220 #if BX_SUPPORT_X86_64
2221 BX_SMF void CRC32_GdEq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2222 #endif
2223 BX_SMF void PCMPGTQ_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2224 BX_SMF void PCMPESTRM_VdqWdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2225 BX_SMF void PCMPESTRI_VdqWdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2226 BX_SMF void PCMPISTRM_VdqWdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2227 BX_SMF void PCMPISTRI_VdqWdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2228 /* SSE4.2 */
2229 #endif
2230
2231 /* MOVBE Intel Atom(R) instruction */
2232 BX_SMF void MOVBE_GwEw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2233 BX_SMF void MOVBE_GdEd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2234 BX_SMF void MOVBE_EwGw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2235 BX_SMF void MOVBE_EdGd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2236 #if BX_SUPPORT_X86_64
2237 BX_SMF void MOVBE_GqEq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2238 BX_SMF void MOVBE_EqGq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2239 #endif
2240
2241 /* XSAVE/XRSTOR extensions */
2242 BX_SMF void XSAVE(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2243 BX_SMF void XRSTOR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2244 BX_SMF void XGETBV(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2245 BX_SMF void XSETBV(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2246 /* XSAVE/XRSTOR extensions */
2247
2248 /* AES instructions */
2249 BX_SMF void AESIMC_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2250 BX_SMF void AESENC_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2251 BX_SMF void AESENCLAST_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2252 BX_SMF void AESDEC_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2253 BX_SMF void AESDECLAST_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2254 BX_SMF void AESKEYGENASSIST_VdqWdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2255 /* AES instructions */
2256
2257 /*** Duplicate SSE instructions ***/
2258 // Although in implementation, these instructions are aliased to the
2259 // another function, it's nice to have them call a separate function when
2260 // the decoder is being tested in stand-alone mode.
2261 #ifdef STAND_ALONE_DECODER
2262 BX_SMF void MOVUPD_VpdWpd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2263 BX_SMF void MOVUPD_WpdVpd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2264 BX_SMF void MOVAPD_VpdWpd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2265 BX_SMF void MOVAPD_WpdVpd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2266 BX_SMF void MOVDQU_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2267 BX_SMF void MOVDQU_WdqVdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2268 BX_SMF void MOVDQA_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2269 BX_SMF void MOVDQA_WdqVdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2270 BX_SMF void PUNPCKHDQ_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2271 BX_SMF void PUNPCKLDQ_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2272 BX_SMF void ANDPD_VpdWpd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2273 BX_SMF void ANDNPD_VpdWpd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2274 BX_SMF void ORPD_VpdWpd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2275 BX_SMF void XORPD_VpdWpd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2276 BX_SMF void PAND_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2277 BX_SMF void PANDN_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2278 BX_SMF void POR_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2279 BX_SMF void PXOR_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2280 BX_SMF void UNPCKHPD_VpdWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2281 BX_SMF void UNPCKLPD_VpdWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2282 BX_SMF void MOVLPD_VsdMq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2283 BX_SMF void MOVLPD_MqVsd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2284 BX_SMF void MOVHPD_VsdMq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2285 BX_SMF void MOVHPD_MqVsd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2286 BX_SMF void MOVNTPD_MdqVpd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2287 BX_SMF void MOVNTDQ_MdqVdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2288 #endif
2289
2290 #if BX_SUPPORT_SSE >= 2
2291 #define BX_SSE2_ALIAS(i) i
2292 #else
2293 #define BX_SSE2_ALIAS(i) &BX_CPU_C::BxError
2294 #endif
2295
2296 #if BX_SUPPORT_3DNOW
2297 #define BX_3DNOW_ALIAS(i) i
2298 #else
2299 #define BX_3DNOW_ALIAS(i) &BX_CPU_C::BxError
2300 #endif
2301
2302 BX_SMF void CMPXCHG_XBTS(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2303 BX_SMF void CMPXCHG_IBTS(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2304 BX_SMF void CMPXCHG8B(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2305 BX_SMF void RETnear32_Iw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2306 BX_SMF void RETnear32(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2307 BX_SMF void RETnear16_Iw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2308 BX_SMF void RETnear16(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2309 BX_SMF void RETfar32_Iw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2310 BX_SMF void RETfar32(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2311 BX_SMF void RETfar16_Iw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2312 BX_SMF void RETfar16(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2313
2314 BX_SMF void XADD_EbGbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2315 BX_SMF void XADD_EwGwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2316 BX_SMF void XADD_EdGdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2317
2318 BX_SMF void XADD_EbGbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2319 BX_SMF void XADD_EwGwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2320 BX_SMF void XADD_EdGdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2321
2322 #if BX_CPU_LEVEL == 2
2323 BX_SMF void LOADALL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2324 #endif
2325
2326 BX_SMF void CMOVO_GwEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2327 BX_SMF void CMOVNO_GwEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2328 BX_SMF void CMOVB_GwEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2329 BX_SMF void CMOVNB_GwEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2330 BX_SMF void CMOVZ_GwEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2331 BX_SMF void CMOVNZ_GwEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2332 BX_SMF void CMOVBE_GwEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2333 BX_SMF void CMOVNBE_GwEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2334 BX_SMF void CMOVS_GwEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2335 BX_SMF void CMOVNS_GwEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2336 BX_SMF void CMOVP_GwEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2337 BX_SMF void CMOVNP_GwEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2338 BX_SMF void CMOVL_GwEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2339 BX_SMF void CMOVNL_GwEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2340 BX_SMF void CMOVLE_GwEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2341 BX_SMF void CMOVNLE_GwEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2342
2343 BX_SMF void CMOVO_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2344 BX_SMF void CMOVNO_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2345 BX_SMF void CMOVB_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2346 BX_SMF void CMOVNB_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2347 BX_SMF void CMOVZ_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2348 BX_SMF void CMOVNZ_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2349 BX_SMF void CMOVBE_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2350 BX_SMF void CMOVNBE_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2351 BX_SMF void CMOVS_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2352 BX_SMF void CMOVNS_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2353 BX_SMF void CMOVP_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2354 BX_SMF void CMOVNP_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2355 BX_SMF void CMOVL_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2356 BX_SMF void CMOVNL_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2357 BX_SMF void CMOVLE_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2358 BX_SMF void CMOVNLE_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2359
2360 BX_SMF void CWDE(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2361 BX_SMF void CDQ(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2362
2363 BX_SMF void CMPXCHG_EbGbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2364 BX_SMF void CMPXCHG_EwGwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2365 BX_SMF void CMPXCHG_EdGdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2366
2367 BX_SMF void CMPXCHG_EbGbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2368 BX_SMF void CMPXCHG_EwGwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2369 BX_SMF void CMPXCHG_EdGdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2370
2371 BX_SMF void MUL_AXEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2372 BX_SMF void IMUL_AXEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2373 BX_SMF void DIV_AXEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2374 BX_SMF void IDIV_AXEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2375 BX_SMF void IMUL_GwEwIwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2376 BX_SMF void IMUL_GwEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2377
2378 BX_SMF void NOP(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2379 BX_SMF void MOV_RLIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2380 BX_SMF void MOV_RHIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2381 BX_SMF void MOV_RXIw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2382 BX_SMF void MOV_ERXId(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2383 BX_SMF void INC_RX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2384 BX_SMF void DEC_RX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2385 BX_SMF void INC_ERX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2386 BX_SMF void DEC_ERX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2387 BX_SMF void XCHG_RXAX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2388 BX_SMF void XCHG_ERXEAX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2389
2390 BX_SMF void PUSH_RX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2391 BX_SMF void PUSH_EwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2392 BX_SMF void PUSH_ERX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2393 BX_SMF void PUSH_EdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2394
2395 BX_SMF void POP_RX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2396 BX_SMF void POP_EwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2397 BX_SMF void POP_ERX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2398 BX_SMF void POP_EdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2399
2400 BX_SMF void POPCNT_GwEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2401 BX_SMF void POPCNT_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2402
2403 #if BX_SUPPORT_X86_64
2404 // 64 bit extensions
2405 BX_SMF void ADD_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2406 BX_SMF void OR_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2407 BX_SMF void ADC_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2408 BX_SMF void SBB_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2409 BX_SMF void AND_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2410 BX_SMF void SUB_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2411 BX_SMF void XOR_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2412 BX_SMF void CMP_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2413
2414 BX_SMF void ADD_RAXId(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2415 BX_SMF void OR_RAXId(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2416 BX_SMF void ADC_RAXId(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2417 BX_SMF void SBB_RAXId(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2418 BX_SMF void AND_RAXId(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2419 BX_SMF void SUB_RAXId(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2420 BX_SMF void XOR_RAXId(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2421 BX_SMF void CMP_RAXId(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2422
2423 BX_SMF void ADD_EqGqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2424 BX_SMF void OR_EqGqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2425 BX_SMF void ADC_EqGqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2426 BX_SMF void SBB_EqGqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2427 BX_SMF void AND_EqGqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2428 BX_SMF void SUB_EqGqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2429 BX_SMF void XOR_EqGqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2430 BX_SMF void CMP_EqGqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2431
2432 BX_SMF void ADD_EqIdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2433 BX_SMF void OR_EqIdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2434 BX_SMF void ADC_EqIdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2435 BX_SMF void SBB_EqIdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2436 BX_SMF void AND_EqIdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2437 BX_SMF void SUB_EqIdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2438 BX_SMF void XOR_EqIdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2439 BX_SMF void CMP_EqIdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2440
2441 BX_SMF void ADD_EqIdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2442 BX_SMF void OR_EqIdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2443 BX_SMF void ADC_EqIdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2444 BX_SMF void SBB_EqIdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2445 BX_SMF void AND_EqIdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2446 BX_SMF void SUB_EqIdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2447 BX_SMF void XOR_EqIdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2448 BX_SMF void CMP_EqIdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2449
2450 BX_SMF void TEST_EqGqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2451 BX_SMF void TEST_RAXId(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2452
2453 BX_SMF void XCHG_EqGqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2454 BX_SMF void XCHG_EqGqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2455
2456 BX_SMF void LEA_GqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2457
2458 BX_SMF void MOV_RAXOq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2459 BX_SMF void MOV_OqRAX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2460 BX_SMF void MOV_EAXOq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2461 BX_SMF void MOV_OqEAX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2462 BX_SMF void MOV_AXOq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2463 BX_SMF void MOV_OqAX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2464 BX_SMF void MOV_ALOq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2465 BX_SMF void MOV_OqAL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2466
2467 BX_SMF void MOV_EqGqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2468 BX_SMF void MOV_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2469 BX_SMF void MOV_GqEqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2470 BX_SMF void MOV_EqIdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2471 BX_SMF void MOV_EqIdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2472
2473 // repeatable instructions
2474 BX_SMF void REP_MOVSQ_XqYq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2475 BX_SMF void REP_CMPSQ_XqYq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2476 BX_SMF void REP_STOSQ_YqRAX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2477 BX_SMF void REP_LODSQ_RAXXq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2478 BX_SMF void REP_SCASQ_RAXXq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2479
2480 // qualified by address size
2481 BX_SMF void CMPSB64_XbYb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2482 BX_SMF void CMPSW64_XwYw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2483 BX_SMF void CMPSD64_XdYd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2484 BX_SMF void SCASB64_ALXb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2485 BX_SMF void SCASW64_AXXw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2486 BX_SMF void SCASD64_EAXXd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2487 BX_SMF void LODSB64_ALXb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2488 BX_SMF void LODSW64_AXXw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2489 BX_SMF void LODSD64_EAXXd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2490 BX_SMF void STOSB64_YbAL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2491 BX_SMF void STOSW64_YwAX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2492 BX_SMF void STOSD64_YdEAX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2493 BX_SMF void MOVSB64_XbYb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2494 BX_SMF void MOVSW64_XwYw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2495 BX_SMF void MOVSD64_XdYd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2496
2497 BX_SMF void CMPSQ32_XqYq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2498 BX_SMF void CMPSQ64_XqYq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2499 BX_SMF void SCASQ32_RAXXq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2500 BX_SMF void SCASQ64_RAXXq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2501 BX_SMF void LODSQ32_RAXXq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2502 BX_SMF void LODSQ64_RAXXq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2503 BX_SMF void STOSQ32_YqRAX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2504 BX_SMF void STOSQ64_YqRAX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2505 BX_SMF void MOVSQ32_XqYq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2506 BX_SMF void MOVSQ64_XqYq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2507
2508 BX_SMF void INSB64_YbDX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2509 BX_SMF void INSW64_YwDX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2510 BX_SMF void INSD64_YdDX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2511
2512 BX_SMF void OUTSB64_DXXb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2513 BX_SMF void OUTSW64_DXXw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2514 BX_SMF void OUTSD64_DXXd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2515
2516 BX_SMF void CALL_Jq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2517 BX_SMF void JMP_Jq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2518
2519 BX_SMF void JO_Jq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2520 BX_SMF void JNO_Jq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2521 BX_SMF void JB_Jq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2522 BX_SMF void JNB_Jq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2523 BX_SMF void JZ_Jq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2524 BX_SMF void JNZ_Jq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2525 BX_SMF void JBE_Jq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2526 BX_SMF void JNBE_Jq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2527 BX_SMF void JS_Jq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2528 BX_SMF void JNS_Jq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2529 BX_SMF void JP_Jq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2530 BX_SMF void JNP_Jq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2531 BX_SMF void JL_Jq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2532 BX_SMF void JNL_Jq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2533 BX_SMF void JLE_Jq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2534 BX_SMF void JNLE_Jq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2535
2536 BX_SMF void ENTER64_IwIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2537 BX_SMF void LEAVE64(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2538 BX_SMF void IRET64(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2539
2540 BX_SMF void MOV_CqRq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2541 BX_SMF void MOV_DqRq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2542 BX_SMF void MOV_RqCq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2543 BX_SMF void MOV_RqDq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2544
2545 BX_SMF void SHLD_EqGqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2546 BX_SMF void SHLD_EqGqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2547 BX_SMF void SHRD_EqGqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2548 BX_SMF void SHRD_EqGqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2549
2550 BX_SMF void MOV64_GdEdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2551
2552 BX_SMF void MOVZX_GqEbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2553 BX_SMF void MOVZX_GqEwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2554 BX_SMF void MOVSX_GqEbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2555 BX_SMF void MOVSX_GqEwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2556 BX_SMF void MOVSX_GqEdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2557
2558 BX_SMF void MOVZX_GqEbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2559 BX_SMF void MOVZX_GqEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2560 BX_SMF void MOVSX_GqEbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2561 BX_SMF void MOVSX_GqEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2562 BX_SMF void MOVSX_GqEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2563
2564 BX_SMF void BSF_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2565 BX_SMF void BSR_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2566
2567 BX_SMF void BT_EqGqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2568 BX_SMF void BTS_EqGqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2569 BX_SMF void BTR_EqGqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2570 BX_SMF void BTC_EqGqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2571
2572 BX_SMF void BT_EqGqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2573 BX_SMF void BTS_EqGqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2574 BX_SMF void BTR_EqGqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2575 BX_SMF void BTC_EqGqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2576
2577 BX_SMF void BT_EqIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2578 BX_SMF void BTS_EqIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2579 BX_SMF void BTR_EqIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2580 BX_SMF void BTC_EqIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2581
2582 BX_SMF void BT_EqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2583 BX_SMF void BTS_EqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2584 BX_SMF void BTR_EqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2585 BX_SMF void BTC_EqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2586
2587 BX_SMF void BSWAP_RRX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2588
2589 BX_SMF void ROL_EqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2590 BX_SMF void ROR_EqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2591 BX_SMF void RCL_EqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2592 BX_SMF void RCR_EqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2593 BX_SMF void SHL_EqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2594 BX_SMF void SHR_EqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2595 BX_SMF void SAR_EqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2596
2597 BX_SMF void ROL_EqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2598 BX_SMF void ROR_EqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2599 BX_SMF void RCL_EqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2600 BX_SMF void RCR_EqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2601 BX_SMF void SHL_EqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2602 BX_SMF void SHR_EqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2603 BX_SMF void SAR_EqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2604
2605 BX_SMF void NOT_EqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2606 BX_SMF void NEG_EqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2607 BX_SMF void NOT_EqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2608 BX_SMF void NEG_EqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2609
2610 BX_SMF void TEST_EqIdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2611
2612 BX_SMF void MUL_RAXEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2613 BX_SMF void IMUL_RAXEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2614 BX_SMF void DIV_RAXEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2615 BX_SMF void IDIV_RAXEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2616 BX_SMF void IMUL_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2617 BX_SMF void IMUL_GqEqIdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2618
2619 BX_SMF void INC_EqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2620 BX_SMF void DEC_EqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2621 BX_SMF void INC_EqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2622 BX_SMF void DEC_EqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2623 BX_SMF void CALL_EqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2624 BX_SMF void CALL64_Ep(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2625 BX_SMF void JMP_EqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2626 BX_SMF void JMP64_Ep(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2627 BX_SMF void PUSHF_Fq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2628 BX_SMF void POPF_Fq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2629
2630 BX_SMF void CMPXCHG_EqGqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2631 BX_SMF void CMPXCHG_EqGqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2632
2633 BX_SMF void CDQE(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2634 BX_SMF void CQO(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2635
2636 BX_SMF void XADD_EqGqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2637 BX_SMF void XADD_EqGqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2638
2639 BX_SMF void RETnear64_Iw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2640 BX_SMF void RETnear64(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2641 BX_SMF void RETfar64_Iw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2642 BX_SMF void RETfar64(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2643
2644 BX_SMF void CMOVO_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2645 BX_SMF void CMOVNO_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2646 BX_SMF void CMOVB_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2647 BX_SMF void CMOVNB_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2648 BX_SMF void CMOVZ_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2649 BX_SMF void CMOVNZ_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2650 BX_SMF void CMOVBE_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2651 BX_SMF void CMOVNBE_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2652 BX_SMF void CMOVS_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2653 BX_SMF void CMOVNS_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2654 BX_SMF void CMOVP_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2655 BX_SMF void CMOVNP_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2656 BX_SMF void CMOVL_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2657 BX_SMF void CMOVNL_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2658 BX_SMF void CMOVLE_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2659 BX_SMF void CMOVNLE_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2660
2661 BX_SMF void MOV_RRXIq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2662 BX_SMF void PUSH_EqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2663 BX_SMF void PUSH_RRX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2664 BX_SMF void POP_EqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2665 BX_SMF void POP_RRX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2666 BX_SMF void XCHG_RRXRAX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2667
2668 BX_SMF void PUSH64_Id(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2669 BX_SMF void PUSH64_FS(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2670 BX_SMF void POP64_FS(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2671 BX_SMF void PUSH64_GS(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2672 BX_SMF void POP64_GS(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2673
2674 BX_SMF void LSS_GqMp(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2675 BX_SMF void LFS_GqMp(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2676 BX_SMF void LGS_GqMp(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2677
2678 BX_SMF void SGDT64_Ms(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2679 BX_SMF void SIDT64_Ms(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2680 BX_SMF void LGDT64_Ms(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2681 BX_SMF void LIDT64_Ms(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2682
2683 BX_SMF void SYSCALL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2684 BX_SMF void SYSRET(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2685 BX_SMF void SWAPGS(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2686 BX_SMF void RDTSCP(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2687 BX_SMF void CMPXCHG16B(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2688
2689 BX_SMF void LOOPNE64_Jb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2690 BX_SMF void LOOPE64_Jb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2691 BX_SMF void LOOP64_Jb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2692 BX_SMF void JRCXZ_Jb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2693
2694 BX_SMF void MOVQ_EqPq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2695 BX_SMF void MOVQ_EqVq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2696 BX_SMF void MOVQ_PqEq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2697 BX_SMF void MOVQ_VdqEq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2698 BX_SMF void MOVNTI_MqGq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2699 BX_SMF void POPCNT_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2700 #endif // #if BX_SUPPORT_X86_64
2701
2702 BX_SMF void INVLPG(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2703 BX_SMF void RSM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2704
2705 BX_SMF void WRMSR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2706 BX_SMF void RDTSC(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2707 BX_SMF void RDPMC(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2708 BX_SMF void RDMSR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2709 BX_SMF void SYSENTER(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2710 BX_SMF void SYSEXIT(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2711
2712 BX_SMF void MONITOR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2713 BX_SMF void MWAIT(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2714
2715 BX_SMF void UndefinedOpcode(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2716 BX_SMF void BxError(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2717
2718 BX_SMF bx_address BxResolve16BaseIndex(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2719 BX_SMF bx_address BxResolve32Base(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2720 BX_SMF bx_address BxResolve32BaseIndex(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2721 #if BX_SUPPORT_X86_64
2722 BX_SMF bx_address BxResolve64Base(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2723 BX_SMF bx_address BxResolve64BaseIndex(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2724 #endif
2725 // <TAG-CLASS-CPU-END>
2726
2727 #if BX_DEBUGGER
2728 BX_SMF void dbg_take_irq(void);
2729 BX_SMF void dbg_force_interrupt(unsigned vector);
2730 BX_SMF void dbg_take_dma(void);
2731 BX_SMF bx_bool dbg_set_reg(unsigned reg, Bit32u val);
2732 BX_SMF Bit32u dbg_get_reg(unsigned reg);
2733 BX_SMF bx_bool dbg_get_sreg(bx_dbg_sreg_t *sreg, unsigned sreg_no);
2734 BX_SMF void dbg_get_tr(bx_dbg_sreg_t *sreg);
2735 BX_SMF void dbg_get_ldtr(bx_dbg_sreg_t *sreg);
2736 BX_SMF void dbg_get_gdtr(bx_dbg_global_sreg_t *sreg);
2737 BX_SMF void dbg_get_idtr(bx_dbg_global_sreg_t *sreg);
2738 BX_SMF unsigned dbg_query_pending(void);
2739 BX_SMF bx_bool dbg_check_begin_instr_bpoint(void);
2740 BX_SMF bx_bool dbg_check_end_instr_bpoint(void);
2741 #endif
2742 #if BX_DEBUGGER || BX_GDBSTUB
2743 BX_SMF bx_bool dbg_instruction_prolog(void);
2744 BX_SMF bx_bool dbg_instruction_epilog(void);
2745 #endif
2746 #if BX_DEBUGGER || BX_DISASM || BX_INSTRUMENTATION || BX_GDBSTUB
2747 BX_SMF bx_bool dbg_xlate_linear2phy(bx_address linear, bx_phy_address *phy);
2748 #endif
2749 BX_SMF void atexit(void);
2750
2751 // now for some ancillary functions...
2752 BX_SMF void cpu_loop(Bit32u max_instr_count);
2753 BX_SMF unsigned handleAsyncEvent(void);
2754
2755 BX_SMF unsigned fetchDecode32(const Bit8u *fetchPtr, bxInstruction_c *i, unsigned remainingInPage) BX_CPP_AttrRegparmN(3);
2756 BX_SMF void optimize32(bxInstruction_c *i, unsigned resolve) BX_CPP_AttrRegparmN(2);
2757 #if BX_SUPPORT_X86_64
2758 BX_SMF unsigned fetchDecode64(const Bit8u *fetchPtr, bxInstruction_c *i, unsigned remainingInPage) BX_CPP_AttrRegparmN(3);
2759 BX_SMF void optimize64(bxInstruction_c *i, unsigned resolve) BX_CPP_AttrRegparmN(2);
2760 #endif
2761 BX_SMF bx_bool fetchInstruction(bxInstruction_c *iStorage, Bit32u eipBiased);
2762 BX_SMF void boundaryFetch(const Bit8u *fetchPtr, unsigned remainingInPage, bxInstruction_c *);
2763 #if BX_SUPPORT_ICACHE
2764 BX_SMF void serveICacheMiss(bxICacheEntry_c *entry, Bit32u eipBiased, bx_phy_address pAddr);
2765 #if BX_SUPPORT_TRACE_CACHE
2766 BX_SMF bx_bool mergeTraces(bxICacheEntry_c *entry, bxInstruction_c *i, bx_phy_address pAddr);
2767 #endif
2768 #endif
2769 BX_SMF void prefetch(void);
2770 BX_SMF void updateFetchModeMask(void);
2771 BX_SMF BX_CPP_INLINE void invalidate_prefetch_q(void)
2772 {
2773 BX_CPU_THIS_PTR eipPageWindowSize = 0;
2774 }
2775
2776 BX_SMF bx_bool write_virtual_checks(bx_segment_reg_t *seg, Bit32u offset, unsigned len) BX_CPP_AttrRegparmN(3);
2777 BX_SMF bx_bool read_virtual_checks(bx_segment_reg_t *seg, Bit32u offset, unsigned len) BX_CPP_AttrRegparmN(3);
2778 BX_SMF bx_bool execute_virtual_checks(bx_segment_reg_t *seg, Bit32u offset, unsigned len) BX_CPP_AttrRegparmN(3);
2779
2780 BX_SMF Bit8u read_virtual_byte_32(unsigned seg, Bit32u offset) BX_CPP_AttrRegparmN(2);
2781 BX_SMF Bit16u read_virtual_word_32(unsigned seg, Bit32u offset) BX_CPP_AttrRegparmN(2);
2782 BX_SMF Bit32u read_virtual_dword_32(unsigned seg, Bit32u offset) BX_CPP_AttrRegparmN(2);
2783 BX_SMF Bit64u read_virtual_qword_32(unsigned seg, Bit32u offset) BX_CPP_AttrRegparmN(2);
2784 #if BX_CPU_LEVEL >= 6
2785 BX_SMF void read_virtual_dqword_32(unsigned seg, Bit32u off, BxPackedXmmRegister *data) BX_CPP_AttrRegparmN(3);
2786 BX_SMF void read_virtual_dqword_aligned_32(unsigned seg, Bit32u off, BxPackedXmmRegister *data) BX_CPP_AttrRegparmN(3);
2787 #endif
2788
2789 BX_SMF void write_virtual_byte_32(unsigned seg, Bit32u offset, Bit8u data) BX_CPP_AttrRegparmN(3);
2790 BX_SMF void write_virtual_word_32(unsigned seg, Bit32u offset, Bit16u data) BX_CPP_AttrRegparmN(3);
2791 BX_SMF void write_virtual_dword_32(unsigned seg, Bit32u offset, Bit32u data) BX_CPP_AttrRegparmN(3);
2792 BX_SMF void write_virtual_qword_32(unsigned seg, Bit32u offset, Bit64u data) BX_CPP_AttrRegparmN(3);
2793 #if BX_CPU_LEVEL >= 6
2794 BX_SMF void write_virtual_dqword_32(unsigned seg, Bit32u offset, const BxPackedXmmRegister *data) BX_CPP_AttrRegparmN(3);
2795 BX_SMF void write_virtual_dqword_aligned_32(unsigned seg, Bit32u offset, const BxPackedXmmRegister *data) BX_CPP_AttrRegparmN(3);
2796 #endif
2797
2798 BX_SMF Bit8u read_RMW_virtual_byte_32(unsigned seg, Bit32u offset) BX_CPP_AttrRegparmN(2);
2799 BX_SMF Bit16u read_RMW_virtual_word_32(unsigned seg, Bit32u offset) BX_CPP_AttrRegparmN(2);
2800 BX_SMF Bit32u read_RMW_virtual_dword_32(unsigned seg, Bit32u offset) BX_CPP_AttrRegparmN(2);
2801 BX_SMF Bit64u read_RMW_virtual_qword_32(unsigned seg, Bit32u offset) BX_CPP_AttrRegparmN(2);
2802
2803 BX_SMF void write_RMW_virtual_byte(Bit8u val8) BX_CPP_AttrRegparmN(1);
2804 BX_SMF void write_RMW_virtual_word(Bit16u val16) BX_CPP_AttrRegparmN(1);
2805 BX_SMF void write_RMW_virtual_dword(Bit32u val32) BX_CPP_AttrRegparmN(1);
2806 BX_SMF void write_RMW_virtual_qword(Bit64u val64) BX_CPP_AttrRegparmN(1);
2807
2808 #if BX_SUPPORT_X86_64
2809 BX_SMF void write_virtual_byte_64(unsigned seg, Bit64u offset, Bit8u data) BX_CPP_AttrRegparmN(3);
2810 BX_SMF void write_virtual_word_64(unsigned seg, Bit64u offset, Bit16u data) BX_CPP_AttrRegparmN(3);
2811 BX_SMF void write_virtual_dword_64(unsigned seg, Bit64u offset, Bit32u data) BX_CPP_AttrRegparmN(3);
2812 BX_SMF void write_virtual_qword_64(unsigned seg, Bit64u offset, Bit64u data) BX_CPP_AttrRegparmN(3);
2813 BX_SMF void write_virtual_dqword_64(unsigned seg, Bit64u offset, const BxPackedXmmRegister *data) BX_CPP_AttrRegparmN(3);
2814 BX_SMF void write_virtual_dqword_aligned_64(unsigned seg, Bit64u offset, const BxPackedXmmRegister *data) BX_CPP_AttrRegparmN(3);
2815
2816 BX_SMF Bit8u read_virtual_byte_64(unsigned seg, Bit64u offset) BX_CPP_AttrRegparmN(2);
2817 BX_SMF Bit16u read_virtual_word_64(unsigned seg, Bit64u offset) BX_CPP_AttrRegparmN(2);
2818 BX_SMF Bit32u read_virtual_dword_64(unsigned seg, Bit64u offset) BX_CPP_AttrRegparmN(2);
2819 BX_SMF Bit64u read_virtual_qword_64(unsigned seg, Bit64u offset) BX_CPP_AttrRegparmN(2);
2820 BX_SMF void read_virtual_dqword_64(unsigned seg, Bit64u off, BxPackedXmmRegister *data) BX_CPP_AttrRegparmN(3);
2821 BX_SMF void read_virtual_dqword_aligned_64(unsigned seg, Bit64u off, BxPackedXmmRegister *data) BX_CPP_AttrRegparmN(3);
2822
2823 BX_SMF Bit8u read_RMW_virtual_byte_64(unsigned seg, Bit64u offset) BX_CPP_AttrRegparmN(2);
2824 BX_SMF Bit16u read_RMW_virtual_word_64(unsigned seg, Bit64u offset) BX_CPP_AttrRegparmN(2);
2825 BX_SMF Bit32u read_RMW_virtual_dword_64(unsigned seg, Bit64u offset) BX_CPP_AttrRegparmN(2);
2826 BX_SMF Bit64u read_RMW_virtual_qword_64(unsigned seg, Bit64u offset) BX_CPP_AttrRegparmN(2);
2827 #endif
2828
2829 #if BX_SUPPORT_MISALIGNED_SSE
2830
2831 #define readVirtualDQwordAligned(s, off, data) \
2832 if (! MXCSR.get_misaligned_exception_mask()) { \
2833 read_virtual_dqword_aligned(s, off, data); \
2834 } \
2835 else { \
2836 read_virtual_dqword(s, off, data); \
2837 }
2838
2839 #else // BX_SUPPORT_MISALIGNED_SSE = 0
2840
2841 #define readVirtualDQwordAligned(s, off, data) { \
2842 read_virtual_dqword_aligned(s, off, data); \
2843 }
2844
2845 #endif
2846
2847 // write of word/dword to new stack could happen only in legacy mode
2848 BX_SMF void write_new_stack_word_32(bx_segment_reg_t *seg, Bit32u offset, unsigned curr_pl, Bit16u data);
2849 BX_SMF void write_new_stack_dword_32(bx_segment_reg_t *seg, Bit32u offset, unsigned curr_pl, Bit32u data);
2850 BX_SMF void write_new_stack_qword_32(bx_segment_reg_t *seg, Bit32u offset, unsigned curr_pl, Bit64u data);
2851 #if BX_SUPPORT_X86_64
2852 BX_SMF void write_new_stack_word_64(Bit64u offset, unsigned curr_pl, Bit16u data);
2853 BX_SMF void write_new_stack_dword_64(Bit64u offset, unsigned curr_pl, Bit32u data);
2854 BX_SMF void write_new_stack_qword_64(Bit64u offset, unsigned curr_pl, Bit64u data);
2855 #endif
2856
2857 #if BX_SUPPORT_X86_64
2858
2859 // write
2860 #define write_virtual_byte(seg, offset, data) \
2861 (BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64) ? \
2862 write_virtual_byte_64(seg, offset, data) : \
2863 write_virtual_byte_32(seg, offset, data)
2864
2865 #define write_virtual_word(seg, offset, data) \
2866 (BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64) ? \
2867 write_virtual_word_64(seg, offset, data) : \
2868 write_virtual_word_32(seg, offset, data)
2869
2870 #define write_virtual_dword(seg, offset, data) \
2871 (BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64) ? \
2872 write_virtual_dword_64(seg, offset, data) : \
2873 write_virtual_dword_32(seg, offset, data)
2874
2875 #define write_virtual_qword(seg, offset, data) \
2876 (BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64) ? \
2877 write_virtual_qword_64(seg, offset, data) : \
2878 write_virtual_qword_32(seg, offset, data)
2879
2880 #define write_virtual_dqword(seg, offset, data) \
2881 (BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64) ? \
2882 write_virtual_dqword_64(seg, offset, (const BxPackedXmmRegister*)(data)) : \
2883 write_virtual_dqword_32(seg, offset, (const BxPackedXmmRegister*)(data))
2884
2885 #define write_virtual_dqword_aligned(seg, offset, data) \
2886 (BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64) ? \
2887 write_virtual_dqword_aligned_64(seg, offset, (const BxPackedXmmRegister*)(data)) : \
2888 write_virtual_dqword_aligned_32(seg, offset, (const BxPackedXmmRegister*)(data))
2889
2890 // read
2891 #define read_virtual_byte(seg, offset) \
2892 (BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64) ? \
2893 read_virtual_byte_64(seg, offset) : \
2894 read_virtual_byte_32(seg, offset)
2895
2896 #define read_virtual_word(seg, offset) \
2897 (BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64) ? \
2898 read_virtual_word_64(seg, offset) : \
2899 read_virtual_word_32(seg, offset)
2900
2901 #define read_virtual_dword(seg, offset) \
2902 (BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64) ? \
2903 read_virtual_dword_64(seg, offset) : \
2904 read_virtual_dword_32(seg, offset)
2905
2906 #define read_virtual_qword(seg, offset) \
2907 (BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64) ? \
2908 read_virtual_qword_64(seg, offset) : \
2909 read_virtual_qword_32(seg, offset)
2910
2911 #define read_virtual_dqword(seg, offset, data) \
2912 (BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64) ? \
2913 read_virtual_dqword_64(seg, offset, (BxPackedXmmRegister*)(data)) : \
2914 read_virtual_dqword_32(seg, offset, (BxPackedXmmRegister*)(data))
2915
2916 #define read_virtual_dqword_aligned(seg, offset, data) \
2917 (BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64) ? \
2918 read_virtual_dqword_aligned_64(seg, offset, (BxPackedXmmRegister*)(data)) : \
2919 read_virtual_dqword_aligned_32(seg, offset, (BxPackedXmmRegister*)(data))
2920
2921 // RMW
2922 #define read_RMW_virtual_byte(seg, offset) \
2923 (BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64) ? \
2924 read_RMW_virtual_byte_64(seg, offset) : \
2925 read_RMW_virtual_byte_32(seg, offset)
2926
2927 #define read_RMW_virtual_word(seg, offset) \
2928 (BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64) ? \
2929 read_RMW_virtual_word_64(seg, offset) : \
2930 read_RMW_virtual_word_32(seg, offset)
2931
2932 #define read_RMW_virtual_dword(seg, offset) \
2933 (BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64) ? \
2934 read_RMW_virtual_dword_64(seg, offset) : \
2935 read_RMW_virtual_dword_32(seg, offset)
2936
2937 #define read_RMW_virtual_qword(seg, offset) \
2938 (BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64) ? \
2939 read_RMW_virtual_qword_64(seg, offset) : \
2940 read_RMW_virtual_qword_32(seg, offset)
2941
2942 #else
2943
2944 // write
2945 #define write_virtual_byte(seg, offset, data) \
2946 write_virtual_byte_32(seg, offset, data)
2947 #define write_virtual_word(seg, offset, data) \
2948 write_virtual_word_32(seg, offset, data)
2949 #define write_virtual_dword(seg, offset, data) \
2950 write_virtual_dword_32(seg, offset, data)
2951 #define write_virtual_qword(seg, offset, data) \
2952 write_virtual_qword_32(seg, offset, data)
2953 #define write_virtual_dqword(seg, offset, data) \
2954 write_virtual_dqword_32(seg, offset, (const BxPackedXmmRegister*)(data))
2955 #define write_virtual_dqword_aligned(seg, offset, data) \
2956 write_virtual_dqword_aligned_32(seg, offset, (const BxPackedXmmRegister*)(data))
2957
2958 // read
2959 #define read_virtual_byte(seg, offset) \
2960 read_virtual_byte_32(seg, offset)
2961 #define read_virtual_word(seg, offset) \
2962 read_virtual_word_32(seg, offset)
2963 #define read_virtual_dword(seg, offset) \
2964 read_virtual_dword_32(seg, offset)
2965 #define read_virtual_qword(seg, offset) \
2966 read_virtual_qword_32(seg, offset)
2967 #define read_virtual_dqword(seg, offset, data) \
2968 read_virtual_dqword_32(seg, offset, (BxPackedXmmRegister*)(data))
2969 #define read_virtual_dqword_aligned(seg, offset, data) \
2970 read_virtual_dqword_aligned_32(seg, offset, (BxPackedXmmRegister*)(data))
2971
2972 // RMW
2973 #define read_RMW_virtual_byte(seg, offset) \
2974 read_RMW_virtual_byte_32(seg, offset)
2975 #define read_RMW_virtual_word(seg, offset) \
2976 read_RMW_virtual_word_32(seg, offset)
2977 #define read_RMW_virtual_dword(seg, offset) \
2978 read_RMW_virtual_dword_32(seg, offset)
2979 #define read_RMW_virtual_qword(seg, offset) \
2980 read_RMW_virtual_qword_32(seg, offset)
2981
2982 #endif
2983
2984 BX_SMF Bit8u system_read_byte(bx_address laddr) BX_CPP_AttrRegparmN(1);
2985 BX_SMF Bit16u system_read_word(bx_address laddr) BX_CPP_AttrRegparmN(1);
2986 BX_SMF Bit32u system_read_dword(bx_address laddr) BX_CPP_AttrRegparmN(1);
2987 BX_SMF Bit64u system_read_qword(bx_address laddr) BX_CPP_AttrRegparmN(1);
2988
2989 #if BX_SupportGuest2HostTLB
2990 BX_SMF Bit8u* v2h_read_byte(bx_address laddr, bx_bool user) BX_CPP_AttrRegparmN(2);
2991 BX_SMF Bit8u* v2h_write_byte(bx_address laddr, bx_bool user) BX_CPP_AttrRegparmN(2);
2992 #endif
2993
2994 BX_SMF void branch_near16(Bit16u new_IP) BX_CPP_AttrRegparmN(1);
2995 BX_SMF void branch_near32(Bit32u new_EIP) BX_CPP_AttrRegparmN(1);
2996 #if BX_SUPPORT_X86_64
2997 BX_SMF void branch_near64(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2998 #endif
2999 BX_SMF void branch_far32(bx_selector_t *selector,
3000 bx_descriptor_t *descriptor, Bit32u eip, Bit8u cpl);
3001 BX_SMF void branch_far64(bx_selector_t *selector,
3002 bx_descriptor_t *descriptor, bx_address rip, Bit8u cpl);
3003
3004 #if BX_SupportRepeatSpeedups
3005 BX_SMF Bit32u FastRepMOVSB(bxInstruction_c *, unsigned srcSeg, bx_address srcOff,
3006 unsigned dstSeg, bx_address dstOff, Bit32u byteCount);
3007 BX_SMF Bit32u FastRepMOVSW(bxInstruction_c *, unsigned srcSeg, bx_address srcOff,
3008 unsigned dstSeg, bx_address dstOff, Bit32u wordCount);
3009 BX_SMF Bit32u FastRepMOVSD(bxInstruction_c *, unsigned srcSeg, bx_address srcOff,
3010 unsigned dstSeg, bx_address dstOff, Bit32u dwordCount);
3011
3012 BX_SMF Bit32u FastRepSTOSB(bxInstruction_c *, unsigned dstSeg, bx_address dstOff,
3013 Bit8u val, Bit32u byteCount);
3014 BX_SMF Bit32u FastRepSTOSW(bxInstruction_c *, unsigned dstSeg, bx_address dstOff,
3015 Bit16u val, Bit32u wordCount);
3016 BX_SMF Bit32u FastRepSTOSD(bxInstruction_c *, unsigned dstSeg, bx_address dstOff,
3017 Bit32u val, Bit32u dwordCount);
3018
3019 BX_SMF Bit32u FastRepINSW(bxInstruction_c *, bx_address dstOff,
3020 Bit16u port, Bit32u wordCount);
3021 BX_SMF Bit32u FastRepOUTSW(bxInstruction_c *, unsigned srcSeg, bx_address srcOff,
3022 Bit16u port, Bit32u wordCount);
3023 #endif
3024
3025 BX_SMF void repeat(bxInstruction_c *i, BxExecutePtr_tR execute) BX_CPP_AttrRegparmN(2);
3026 BX_SMF void repeat_ZF(bxInstruction_c *i, BxExecutePtr_tR execute) BX_CPP_AttrRegparmN(2);
3027
3028 // linear address for access_linear expected to be canonical !
3029 BX_SMF void access_read_linear(bx_address address, unsigned length, unsigned curr_pl,
3030 unsigned rw, void *data);
3031 BX_SMF void access_write_linear(bx_address address, unsigned length, unsigned curr_pl,
3032 void *data);
3033 BX_SMF void page_fault(unsigned fault, bx_address laddr, unsigned user, unsigned rw, unsigned access_type);
3034
3035 // linear address for translate_linear expected to be canonical !
3036 BX_SMF bx_phy_address translate_linear(bx_address laddr, unsigned curr_pl, unsigned rw, unsigned access_type);
3037 #if BX_SUPPORT_PAE
3038 BX_SMF bx_phy_address translate_linear_PAE(bx_address laddr, Bit32u &combined_access, unsigned curr_pl, unsigned rw, unsigned access_type);
3039 #endif
3040
3041 BX_SMF BX_CPP_INLINE bx_phy_address dtranslate_linear(bx_address laddr, unsigned curr_pl, unsigned rw)
3042 {
3043 return translate_linear(laddr, curr_pl, rw, DATA_ACCESS);
3044 }
3045
3046 #if BX_SUPPORT_GLOBAL_PAGES
3047 BX_SMF void TLB_flushNonGlobal(void);
3048 #endif
3049 BX_SMF void TLB_flush(void);
3050 BX_SMF void TLB_invlpg(bx_address laddr);
3051 BX_SMF void TLB_init(void);
3052 BX_SMF void set_INTR(bx_bool value);
3053 BX_SMF const char *strseg(bx_segment_reg_t *seg);
3054 BX_SMF void interrupt(Bit8u vector, bx_bool is_INT, bx_bool is_error_code,
3055 Bit16u error_code);
3056 BX_SMF void real_mode_int(Bit8u vector, bx_bool is_INT, bx_bool is_error_code,
3057 Bit16u error_code);
3058 BX_SMF void protected_mode_int(Bit8u vector, bx_bool is_INT, bx_bool is_error_code,
3059 Bit16u error_code);
3060 #if BX_SUPPORT_X86_64
3061 BX_SMF void long_mode_int(Bit8u vector, bx_bool is_INT, bx_bool is_error_code,
3062 Bit16u error_code);
3063 #endif
3064 BX_SMF void exception(unsigned vector, Bit16u error_code, bx_bool trap)
3065 BX_CPP_AttrNoReturn();
3066 BX_SMF void smram_save_state(Bit32u *smm_saved_state);
3067 BX_SMF bx_bool smram_restore_state(const Bit32u *smm_saved_state);
3068 BX_SMF int int_number(unsigned s);
3069 BX_SMF void SetCR0(Bit32u val_32) BX_CPP_AttrRegparmN(1);
3070 BX_SMF void SetCR3(bx_address value) BX_CPP_AttrRegparmN(1);
3071 #if BX_CPU_LEVEL >= 4
3072 BX_SMF bx_bool SetCR4(bx_address val) BX_CPP_AttrRegparmN(1);
3073 #endif
3074 BX_SMF void pagingCR0Changed(Bit32u oldCR0, Bit32u newCR0) BX_CPP_AttrRegparmN(2);
3075 BX_SMF void pagingCR4Changed(Bit32u oldCR4, Bit32u newCR4) BX_CPP_AttrRegparmN(2);
3076
3077 BX_SMF void reset(unsigned source);
3078 BX_SMF void shutdown(void);
3079 BX_SMF void handleCpuModeChange(void);
3080 #if BX_CPU_LEVEL >= 4 && BX_SUPPORT_ALIGNMENT_CHECK
3081 BX_SMF void handleAlignmentCheck(void);
3082 #endif
3083
3084 BX_SMF void jump_protected(bxInstruction_c *, Bit16u cs, bx_address disp) BX_CPP_AttrRegparmN(3);
3085 BX_SMF void jmp_task_gate(bx_descriptor_t *gate_descriptor) BX_CPP_AttrRegparmN(1);
3086 BX_SMF void jmp_call_gate(bx_descriptor_t *gate_descriptor) BX_CPP_AttrRegparmN(1);
3087 #if BX_SUPPORT_X86_64
3088 BX_SMF void jmp_call_gate64(bx_selector_t *selector) BX_CPP_AttrRegparmN(1);
3089 #endif
3090 BX_SMF void call_protected(bxInstruction_c *, Bit16u cs, bx_address disp) BX_CPP_AttrRegparmN(3);
3091 #if BX_SUPPORT_X86_64
3092 BX_SMF void call_gate64(bx_selector_t *selector) BX_CPP_AttrRegparmN(1);
3093 #endif
3094 BX_SMF void return_protected(bxInstruction_c *, Bit16u pop_bytes) BX_CPP_AttrRegparmN(2);
3095 BX_SMF void iret_protected(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3096 #if BX_SUPPORT_X86_64
3097 BX_SMF void long_iret(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3098 #endif
3099 BX_SMF void validate_seg_reg(unsigned seg);
3100 BX_SMF void validate_seg_regs(void);
3101 BX_SMF void stack_return_to_v86(Bit32u new_eip, Bit32u raw_cs_selector, Bit32u flags32);
3102 BX_SMF void iret16_stack_return_from_v86(bxInstruction_c *);
3103 BX_SMF void iret32_stack_return_from_v86(bxInstruction_c *);
3104 #if BX_SUPPORT_VME
3105 BX_SMF void v86_redirect_interrupt(Bit32u vector);
3106 #endif
3107 BX_SMF void init_v8086_mode(void);
3108 BX_SMF void task_switch_load_selector(bx_segment_reg_t *seg,
3109 bx_selector_t *selector, Bit16u raw_selector, Bit8u cs_rpl);
3110 BX_SMF void task_switch(bx_selector_t *selector, bx_descriptor_t *descriptor,
3111 unsigned source, Bit32u dword1, Bit32u dword2);
3112 BX_SMF void get_SS_ESP_from_TSS(unsigned pl, Bit16u *ss, Bit32u *esp);
3113 #if BX_SUPPORT_X86_64
3114 BX_SMF Bit64u get_RSP_from_TSS(unsigned pl);
3115 #endif
3116 BX_SMF void write_flags(Bit16u flags, bx_bool change_IOPL, bx_bool change_IF) BX_CPP_AttrRegparmN(3);
3117 BX_SMF void writeEFlags(Bit32u eflags, Bit32u changeMask) BX_CPP_AttrRegparmN(2); // Newer variant.
3118 #if BX_SUPPORT_FPU || BX_SUPPORT_SSE >= 1
3119 BX_SMF void write_eflags_fpu_compare(int float_relation);
3120 #endif
3121 BX_SMF Bit32u force_flags(void);
3122 BX_SMF Bit32u read_eflags(void) { return BX_CPU_THIS_PTR force_flags(); }
3123
3124 BX_SMF Bit8u inp8(Bit16u addr) BX_CPP_AttrRegparmN(1);
3125 BX_SMF void outp8(Bit16u addr, Bit8u value) BX_CPP_AttrRegparmN(2);
3126 BX_SMF Bit16u inp16(Bit16u addr) BX_CPP_AttrRegparmN(1);
3127 BX_SMF void outp16(Bit16u addr, Bit16u value) BX_CPP_AttrRegparmN(2);
3128 BX_SMF Bit32u inp32(Bit16u addr) BX_CPP_AttrRegparmN(1);
3129 BX_SMF void outp32(Bit16u addr, Bit32u value) BX_CPP_AttrRegparmN(2);
3130 BX_SMF bx_bool allow_io(Bit16u addr, unsigned len);
3131 BX_SMF void parse_selector(Bit16u raw_selector, bx_selector_t *selector) BX_CPP_AttrRegparmN(2);
3132 BX_SMF void parse_descriptor(Bit32u dword1, Bit32u dword2, bx_descriptor_t *temp) BX_CPP_AttrRegparmN(3);
3133 BX_SMF Bit8u ar_byte(const bx_descriptor_t *d) BX_CPP_AttrRegparmN(1);
3134 BX_SMF void set_ar_byte(bx_descriptor_t *d, Bit8u ar_byte) BX_CPP_AttrRegparmN(2);
3135 BX_SMF Bit32u get_descriptor_l(const bx_descriptor_t *) BX_CPP_AttrRegparmN(1);
3136 BX_SMF Bit32u get_descriptor_h(const bx_descriptor_t *) BX_CPP_AttrRegparmN(1);
3137 BX_SMF Bit16u get_segment_ar_data(const bx_descriptor_t *d) BX_CPP_AttrRegparmN(1);
3138 BX_SMF bx_bool set_segment_ar_data(bx_segment_reg_t *seg, Bit16u raw_selector,
3139 bx_address base, Bit32u limit, Bit16u ar_data);
3140 BX_SMF void check_cs(bx_descriptor_t *descriptor, Bit16u cs_raw, Bit8u check_rpl, Bit8u check_cpl);
3141 // the basic assumption of the code that load_cs and load_ss cannot fail !
3142 BX_SMF void load_cs(bx_selector_t *selector, bx_descriptor_t *descriptor, Bit8u cpl) BX_CPP_AttrRegparmN(3);
3143 BX_SMF void load_ss(bx_selector_t *selector, bx_descriptor_t *descriptor, Bit8u cpl) BX_CPP_AttrRegparmN(3);
3144 BX_SMF void fetch_raw_descriptor(const bx_selector_t *selector,
3145 Bit32u *dword1, Bit32u *dword2, unsigned exception);
3146 BX_SMF bx_bool fetch_raw_descriptor2(const bx_selector_t *selector,
3147 Bit32u *dword1, Bit32u *dword2) BX_CPP_AttrRegparmN(3);
3148 BX_SMF void load_seg_reg(bx_segment_reg_t *seg, Bit16u new_value) BX_CPP_AttrRegparmN(2);
3149 BX_SMF void load_null_selector(bx_segment_reg_t *seg) BX_CPP_AttrRegparmN(1);
3150 #if BX_SUPPORT_X86_64
3151 BX_SMF void fetch_raw_descriptor_64(const bx_selector_t *selector,
3152 Bit32u *dword1, Bit32u *dword2, Bit32u *dword3, unsigned exception_no);
3153 BX_SMF void loadSRegLMNominal(unsigned seg, unsigned selector, unsigned dpl);
3154 #endif
3155 BX_SMF void push_16(Bit16u value16) BX_CPP_AttrRegparmN(1);
3156 BX_SMF void push_32(Bit32u value32) BX_CPP_AttrRegparmN(1);
3157 BX_SMF Bit16u pop_16(void);
3158 BX_SMF Bit32u pop_32(void);
3159 #if BX_SUPPORT_X86_64
3160 BX_SMF void push_64(Bit64u value64) BX_CPP_AttrRegparmN(1);
3161 BX_SMF Bit64u pop_64(void);
3162 #endif
3163 BX_SMF void sanity_checks(void);
3164 BX_SMF void assert_checks(void);
3165 BX_SMF void enter_system_management_mode(void);
3166 BX_SMF void deliver_INIT(void);
3167 BX_SMF void deliver_NMI(void);
3168 BX_SMF void deliver_SMI(void);
3169 BX_SMF void debug(bx_address offset);
3170 #if BX_DISASM
3171 BX_SMF void debug_disasm_instruction(bx_address offset);
3172 #endif
3173
3174 #if BX_X86_DEBUGGER
3175 // x86 hardware debug support
3176 BX_SMF bx_bool hwbreakpoint_check(bx_address laddr);
3177 BX_SMF void iobreakpoint_match(unsigned port, unsigned len);
3178 BX_SMF void hwbreakpoint_match(bx_address laddr, unsigned len, unsigned rw);
3179 BX_SMF Bit32u hwdebug_compare(bx_address laddr, unsigned len,
3180 unsigned opa, unsigned opb);
3181 #endif
3182
3183 BX_SMF Bit32u get_cpu_version_information(void);
3184 BX_SMF Bit32u get_extended_cpuid_features(void);
3185 BX_SMF Bit32u get_std_cpuid_features(void);
3186 BX_SMF void set_cpuid_defaults(void);
3187
3188 BX_SMF BX_CPP_INLINE unsigned which_cpu(void) { return BX_CPU_THIS_PTR bx_cpuid; }
3189 BX_SMF BX_CPP_INLINE const bx_gen_reg_t *get_gen_regfile() { return BX_CPU_THIS_PTR gen_reg; }
3190
3191 BX_SMF BX_CPP_INLINE bx_address get_instruction_pointer(void);
3192
3193 BX_SMF BX_CPP_INLINE Bit32u get_eip(void) { return (BX_CPU_THIS_PTR gen_reg[BX_32BIT_REG_EIP].dword.erx); }
3194 BX_SMF BX_CPP_INLINE Bit16u get_ip (void) { return (BX_CPU_THIS_PTR gen_reg[BX_16BIT_REG_IP].word.rx); }
3195 #if BX_SUPPORT_X86_64
3196 BX_SMF BX_CPP_INLINE Bit64u get_rip(void) { return (BX_CPU_THIS_PTR gen_reg[BX_64BIT_REG_RIP].rrx); }
3197 #endif
3198
3199 BX_SMF BX_CPP_INLINE Bit8u get_reg8l(unsigned reg);
3200 BX_SMF BX_CPP_INLINE Bit8u get_reg8h(unsigned reg);
3201 BX_SMF BX_CPP_INLINE void set_reg8l(unsigned reg, Bit8u val);
3202 BX_SMF BX_CPP_INLINE void set_reg8h(unsigned reg, Bit8u val);
3203
3204 BX_SMF BX_CPP_INLINE Bit16u get_reg16(unsigned reg);
3205 BX_SMF BX_CPP_INLINE void set_reg16(unsigned reg, Bit16u val);
3206 BX_SMF BX_CPP_INLINE Bit32u get_reg32(unsigned reg);
3207 BX_SMF BX_CPP_INLINE void set_reg32(unsigned reg, Bit32u val);
3208 #if BX_SUPPORT_X86_64
3209 BX_SMF BX_CPP_INLINE Bit64u get_reg64(unsigned reg);
3210 BX_SMF BX_CPP_INLINE void set_reg64(unsigned reg, Bit64u val);
3211 #endif
3212
3213 BX_SMF bx_address get_segment_base(unsigned seg);
3214
3215 // The linear address must be truncated to the 32-bit when CPU is not
3216 // executing in long64 mode. The function must be used to compute
3217 // linear address everywhere when a code is shared between long64 and
3218 // legacy mode. For legacy mode only just use Bit32u to store linear
3219 // address value.
3220 BX_SMF bx_address get_laddr(unsigned seg, bx_address offset);
3221
3222 BX_SMF Bit32u get_laddr32(unsigned seg, Bit32u offset);
3223 #if BX_SUPPORT_X86_64
3224 BX_SMF Bit64u get_laddr64(unsigned seg, Bit64u offset);
3225 #endif
3226
3227 DECLARE_EFLAG_ACCESSOR (ID, 21)
3228 DECLARE_EFLAG_ACCESSOR (VIP, 20)
3229 DECLARE_EFLAG_ACCESSOR (VIF, 19)
3230 DECLARE_EFLAG_ACCESSOR (AC, 18)
3231 DECLARE_EFLAG_ACCESSOR (VM, 17)
3232 DECLARE_EFLAG_ACCESSOR (RF, 16)
3233 DECLARE_EFLAG_ACCESSOR (NT, 14)
3234 DECLARE_EFLAG_ACCESSOR_IOPL( 12)
3235 DECLARE_EFLAG_ACCESSOR (DF, 10)
3236 DECLARE_EFLAG_ACCESSOR (IF, 9)
3237 DECLARE_EFLAG_ACCESSOR (TF, 8)
3238
3239 DECLARE_EFLAG_SET_ACCESSOR (ID, 21)
3240 DECLARE_EFLAG_SET_ACCESSOR (VIP, 20)
3241 DECLARE_EFLAG_SET_ACCESSOR (VIF, 19)
3242 #if BX_SUPPORT_ALIGNMENT_CHECK && BX_CPU_LEVEL >= 4
3243 DECLARE_EFLAG_SET_ACCESSOR_AC( 18)
3244 #else
3245 DECLARE_EFLAG_SET_ACCESSOR (AC, 18)
3246 #endif
3247 DECLARE_EFLAG_SET_ACCESSOR_VM( 17)
3248 DECLARE_EFLAG_SET_ACCESSOR (RF, 16)
3249 DECLARE_EFLAG_SET_ACCESSOR (NT, 14)
3250 DECLARE_EFLAG_SET_ACCESSOR (DF, 10)
3251 DECLARE_EFLAG_SET_ACCESSOR_IF( 9)
3252 DECLARE_EFLAG_SET_ACCESSOR_TF( 8)
3253
3254 BX_SMF BX_CPP_INLINE bx_bool real_mode(void);
3255 BX_SMF BX_CPP_INLINE bx_bool smm_mode(void);
3256 BX_SMF BX_CPP_INLINE bx_bool protected_mode(void);
3257 BX_SMF BX_CPP_INLINE bx_bool v8086_mode(void);
3258 BX_SMF BX_CPP_INLINE bx_bool long_mode(void);
3259 BX_SMF BX_CPP_INLINE unsigned get_cpu_mode(void);
3260
3261 #if BX_SUPPORT_ALIGNMENT_CHECK && BX_CPU_LEVEL >= 4
3262 BX_SMF BX_CPP_INLINE bx_bool alignment_check(void);
3263 #endif
3264
3265 #if BX_CPU_LEVEL >= 5
3266 BX_SMF Bit64u get_TSC();
3267 BX_SMF void set_TSC(Bit64u tsc);
3268 #endif
3269
3270 #if BX_SUPPORT_FPU
3271 BX_SMF void print_state_FPU(void);
3272 BX_SMF void prepareFPU(bxInstruction_c *i, bx_bool = 1, bx_bool = 1);
3273 BX_SMF void FPU_check_pending_exceptions(void);
3274 BX_SMF void FPU_stack_underflow(int stnr, int pop_stack = 0);
3275 BX_SMF void FPU_stack_overflow(void);
3276 BX_SMF unsigned FPU_exception(unsigned exception, bx_bool is_mem = 0);
3277 BX_SMF bx_address fpu_save_environment(bxInstruction_c *i);
3278 BX_SMF bx_address fpu_load_environment(bxInstruction_c *i);
3279 BX_SMF Bit8u pack_FPU_TW(Bit16u tag_word);
3280 BX_SMF Bit16u unpack_FPU_TW(Bit16u tag_byte);
3281 #endif
3282
3283 #if BX_SUPPORT_MMX || BX_SUPPORT_SSE
3284 BX_SMF void prepareMMX(void);
3285 BX_SMF void prepareFPU2MMX(void); /* cause transition from FPU to MMX technology state */
3286 BX_SMF void print_state_MMX(void);
3287 #endif
3288
3289 #if BX_SUPPORT_SSE
3290 BX_SMF void prepareSSE(void);
3291 BX_SMF void check_exceptionsSSE(int);
3292 BX_SMF void print_state_SSE(void);
3293 #endif
3294
3295 #if BX_SUPPORT_XSAVE
3296 BX_SMF void prepareXSAVE(void);
3297 #endif
3298
3299 #if BX_SUPPORT_MONITOR_MWAIT
3300 BX_SMF bx_bool is_monitor(bx_phy_address addr, unsigned len);
3301 BX_SMF void check_monitor(bx_phy_address addr, unsigned len);
3302 #endif
3303 };
3304
3305 #if BX_SUPPORT_MMX
3306 BX_CPP_INLINE void BX_CPU_C::prepareMMX(void)
3307 {
3308 if(BX_CPU_THIS_PTR cr0.get_EM())
3309 exception(BX_UD_EXCEPTION, 0, 0);
3310
3311 if(BX_CPU_THIS_PTR cr0.get_TS())
3312 exception(BX_NM_EXCEPTION, 0, 0);
3313
3314 /* check floating point status word for a pending FPU exceptions */
3315 FPU_check_pending_exceptions();
3316 }
3317 #endif
3318
3319 #if BX_SUPPORT_SSE
3320 BX_CPP_INLINE void BX_CPU_C::prepareSSE(void)
3321 {
3322 if(BX_CPU_THIS_PTR cr0.get_EM() || !BX_CPU_THIS_PTR cr4.get_OSFXSR())
3323 exception(BX_UD_EXCEPTION, 0, 0);
3324
3325 if(BX_CPU_THIS_PTR cr0.get_TS())
3326 exception(BX_NM_EXCEPTION, 0, 0);
3327 }
3328 #endif
3329
3330 #if BX_SUPPORT_XSAVE
3331 BX_CPP_INLINE void BX_CPU_C::prepareXSAVE(void)
3332 {
3333 if(! (BX_CPU_THIS_PTR cr4.get_OSXSAVE()))
3334 exception(BX_UD_EXCEPTION, 0, 0);
3335
3336 if(BX_CPU_THIS_PTR cr0.get_TS())
3337 exception(BX_NM_EXCEPTION, 0, 0);
3338 }
3339 #endif
3340
3341 // Can be used as LHS or RHS.
3342 #define RMAddr(i) (BX_CPU_THIS_PTR address_xlation.rm_addr)
3343
3344 #if defined(NEED_CPU_REG_SHORTCUTS)
3345 #include "stack.h"
3346 #endif
3347
3348 BX_CPP_INLINE void BX_CPU_C::updateFetchModeMask(void)
3349 {
3350 #if BX_SUPPORT_ICACHE
3351 BX_CPU_THIS_PTR fetchModeMask =
3352 #if BX_SUPPORT_X86_64
3353 ((BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64)<<30) |
3354 #endif
3355 (BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.d_b << 31);
3356 #endif
3357
3358 BX_CPU_THIS_PTR user_pl = // CPL == 3
3359 (BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.rpl == 3);
3360 }
3361
3362 #if BX_X86_DEBUGGER
3363 #define BX_HWDebugInstruction 0x00
3364 #define BX_HWDebugMemW 0x01
3365 #define BX_HWDebugIO 0x02
3366 #define BX_HWDebugMemRW 0x03
3367 #endif
3368
3369 BX_CPP_INLINE bx_address BX_CPU_C::get_segment_base(unsigned seg)
3370 {
3371 #if BX_SUPPORT_X86_64
3372 if (BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64) {
3373 if (seg < BX_SEG_REG_FS) return 0;
3374 }
3375 #endif
3376 return BX_CPU_THIS_PTR sregs[seg].cache.u.segment.base;
3377 }
3378
3379 BX_CPP_INLINE Bit32u BX_CPU_C::get_laddr32(unsigned seg, Bit32u offset)
3380 {
3381 return (Bit32u) BX_CPU_THIS_PTR sregs[seg].cache.u.segment.base + offset;
3382 }
3383
3384 #if BX_SUPPORT_X86_64
3385 BX_CPP_INLINE Bit64u BX_CPU_C::get_laddr64(unsigned seg, Bit64u offset)
3386 {
3387 if (seg < BX_SEG_REG_FS)
3388 return offset;
3389 else
3390 return BX_CPU_THIS_PTR sregs[seg].cache.u.segment.base + offset;
3391 }
3392 #endif
3393
3394 BX_CPP_INLINE bx_address BX_CPU_C::get_laddr(unsigned seg, bx_address offset)
3395 {
3396 #if BX_SUPPORT_X86_64
3397 if (BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64) {
3398 return get_laddr64(seg, offset);
3399 }
3400 #endif
3401 return get_laddr32(seg, (Bit32u) offset);
3402 }
3403
3404 BX_CPP_INLINE Bit8u BX_CPU_C::get_reg8l(unsigned reg)
3405 {
3406 assert(reg < BX_GENERAL_REGISTERS);
3407 return (BX_CPU_THIS_PTR gen_reg[reg].word.byte.rl);
3408 }
3409
3410 BX_CPP_INLINE void BX_CPU_C::set_reg8l(unsigned reg, Bit8u val)
3411 {
3412 assert(reg < BX_GENERAL_REGISTERS);
3413 BX_CPU_THIS_PTR gen_reg[reg].word.byte.rl = val;
3414 }
3415
3416 BX_CPP_INLINE Bit8u BX_CPU_C::get_reg8h(unsigned reg)
3417 {
3418 assert(reg < BX_GENERAL_REGISTERS);
3419 return (BX_CPU_THIS_PTR gen_reg[reg].word.byte.rh);
3420 }
3421
3422 BX_CPP_INLINE void BX_CPU_C::set_reg8h(unsigned reg, Bit8u val)
3423 {
3424 assert(reg < BX_GENERAL_REGISTERS);
3425 BX_CPU_THIS_PTR gen_reg[reg].word.byte.rh = val;
3426 }
3427
3428 #if BX_SUPPORT_X86_64
3429 BX_CPP_INLINE bx_address BX_CPU_C::get_instruction_pointer(void)
3430 {
3431 return BX_CPU_THIS_PTR get_rip();
3432 }
3433 #else
3434 BX_CPP_INLINE bx_address BX_CPU_C::get_instruction_pointer(void)
3435 {
3436 return BX_CPU_THIS_PTR get_eip();
3437 }
3438 #endif
3439
3440 BX_CPP_INLINE Bit16u BX_CPU_C::get_reg16(unsigned reg)
3441 {
3442 assert(reg < BX_GENERAL_REGISTERS);
3443 return (BX_CPU_THIS_PTR gen_reg[reg].word.rx);
3444 }
3445
3446 BX_CPP_INLINE void BX_CPU_C::set_reg16(unsigned reg, Bit16u val)
3447 {
3448 assert(reg < BX_GENERAL_REGISTERS);
3449 BX_CPU_THIS_PTR gen_reg[reg].word.rx = val;
3450 }
3451
3452 BX_CPP_INLINE Bit32u BX_CPU_C::get_reg32(unsigned reg)
3453 {
3454 assert(reg < BX_GENERAL_REGISTERS);
3455 return (BX_CPU_THIS_PTR gen_reg[reg].dword.erx);
3456 }
3457
3458 BX_CPP_INLINE void BX_CPU_C::set_reg32(unsigned reg, Bit32u val)
3459 {
3460 assert(reg < BX_GENERAL_REGISTERS);
3461 BX_CPU_THIS_PTR gen_reg[reg].dword.erx = val;
3462 }
3463
3464 #if BX_SUPPORT_X86_64
3465 BX_CPP_INLINE Bit64u BX_CPU_C::get_reg64(unsigned reg)
3466 {
3467 assert(reg < BX_GENERAL_REGISTERS);
3468 return (BX_CPU_THIS_PTR gen_reg[reg].rrx);
3469 }
3470
3471 BX_CPP_INLINE void BX_CPU_C::set_reg64(unsigned reg, Bit64u val)
3472 {
3473 assert(reg < BX_GENERAL_REGISTERS);
3474 BX_CPU_THIS_PTR gen_reg[reg].rrx = val;
3475 }
3476 #endif
3477
3478 BX_CPP_INLINE bx_bool BX_CPU_C::real_mode(void)
3479 {
3480 return (BX_CPU_THIS_PTR cpu_mode == BX_MODE_IA32_REAL);
3481 }
3482
3483 BX_CPP_INLINE bx_bool BX_CPU_C::smm_mode(void)
3484 {
3485 return (BX_CPU_THIS_PTR in_smm);
3486 }
3487
3488 BX_CPP_INLINE bx_bool BX_CPU_C::v8086_mode(void)
3489 {
3490 return (BX_CPU_THIS_PTR cpu_mode == BX_MODE_IA32_V8086);
3491 }
3492
3493 BX_CPP_INLINE bx_bool BX_CPU_C::protected_mode(void)
3494 {
3495 return (BX_CPU_THIS_PTR cpu_mode >= BX_MODE_IA32_PROTECTED);
3496 }
3497
3498 BX_CPP_INLINE bx_bool BX_CPU_C::long_mode(void)
3499 {
3500 #if BX_SUPPORT_X86_64
3501 return BX_CPU_THIS_PTR efer.get_LMA();
3502 #else
3503 return 0;
3504 #endif
3505 }
3506
3507 BX_CPP_INLINE unsigned BX_CPU_C::get_cpu_mode(void)
3508 {
3509 return (BX_CPU_THIS_PTR cpu_mode);
3510 }
3511
3512 #if BX_SUPPORT_ALIGNMENT_CHECK && BX_CPU_LEVEL >= 4
3513 BX_CPP_INLINE bx_bool BX_CPU_C::alignment_check(void)
3514 {
3515 return BX_CPU_THIS_PTR alignment_check_mask;
3516 }
3517 #endif
3518
3519 BOCHSAPI extern const Bit8u bx_parity_lookup[256];
3520
3521 BX_CPP_INLINE void BX_CPU_C::set_PF_base(Bit8u val)
3522 {
3523 BX_CPU_THIS_PTR lf_flags_status &= ~EFlagsPFMask;
3524 val = bx_parity_lookup[val]; // Always returns 0 or 1.
3525 BX_CPU_THIS_PTR eflags &= ~(1<<2);
3526 BX_CPU_THIS_PTR eflags |= val<<2;
3527 }
3528
3529 //
3530 // inline simple lazy flags implementation methods
3531 //
3532 BX_CPP_INLINE bx_bool BX_CPU_C::get_ZFLazy(void)
3533 {
3534 return (BX_CPU_THIS_PTR oszapc.result == 0);
3535 }
3536
3537 BX_CPP_INLINE bx_bool BX_CPU_C::get_SFLazy(void)
3538 {
3539 return (BX_CPU_THIS_PTR oszapc.result >> BX_LF_SIGN_BIT);
3540 }
3541
3542 BX_CPP_INLINE bx_bool BX_CPU_C::get_PFLazy(void)
3543 {
3544 return bx_parity_lookup[(Bit8u) BX_CPU_THIS_PTR oszapc.result];
3545 }
3546
3547 // *******************
3548 // OSZAPC
3549 // *******************
3550
3551 /* op1, op2, result */
3552 #define SET_FLAGS_OSZAPC_SIZE(size, lf_op1, lf_op2, lf_result, ins) { \
3553 BX_CPU_THIS_PTR oszapc.op1 = (bx_address)(Bit##size##s)(lf_op1); \
3554 BX_CPU_THIS_PTR oszapc.op2 = (bx_address)(Bit##size##s)(lf_op2); \
3555 BX_CPU_THIS_PTR oszapc.result = (bx_address)(Bit##size##s)(lf_result); \
3556 BX_CPU_THIS_PTR oszapc.instr = (ins); \
3557 BX_CPU_THIS_PTR lf_flags_status = EFlagsOSZAPCMask; \
3558 }
3559
3560 #define SET_FLAGS_OSZAPC_8(op1, op2, result, ins) \
3561 SET_FLAGS_OSZAPC_SIZE(8, op1, op2, result, ins)
3562 #define SET_FLAGS_OSZAPC_16(op1, op2, result, ins) \
3563 SET_FLAGS_OSZAPC_SIZE(16, op1, op2, result, ins)
3564 #define SET_FLAGS_OSZAPC_32(op1, op2, result, ins) \
3565 SET_FLAGS_OSZAPC_SIZE(32, op1, op2, result, ins)
3566 #if BX_SUPPORT_X86_64
3567 #define SET_FLAGS_OSZAPC_64(op1, op2, result, ins) \
3568 SET_FLAGS_OSZAPC_SIZE(64, op1, op2, result, ins)
3569 #endif
3570
3571 /* op1 and result only */
3572 #define SET_FLAGS_OSZAPC_S1_SIZE(size, lf_op1, lf_result, ins) { \
3573 BX_CPU_THIS_PTR oszapc.op1 = (bx_address)(Bit##size##s)(lf_op1); \
3574 BX_CPU_THIS_PTR oszapc.result = (Bit##size##s)(lf_result); \
3575 BX_CPU_THIS_PTR oszapc.instr = (ins); \
3576 BX_CPU_THIS_PTR lf_flags_status = EFlagsOSZAPCMask; \
3577 }
3578
3579 #define SET_FLAGS_OSZAPC_S1_8(op1, result, ins) \
3580 SET_FLAGS_OSZAPC_S1_SIZE(8, op1, result, ins)
3581 #define SET_FLAGS_OSZAPC_S1_16(op1, result, ins) \
3582 SET_FLAGS_OSZAPC_S1_SIZE(16, op1, result, ins)
3583 #define SET_FLAGS_OSZAPC_S1_32(op1, result, ins) \
3584 SET_FLAGS_OSZAPC_S1_SIZE(32, op1, result, ins)
3585 #if BX_SUPPORT_X86_64
3586 #define SET_FLAGS_OSZAPC_S1_64(op1, result, ins) \
3587 SET_FLAGS_OSZAPC_S1_SIZE(64, op1, result, ins)
3588 #endif
3589
3590 /* op2 and result only */
3591 #define SET_FLAGS_OSZAPC_S2_SIZE(size, lf_op2, lf_result, ins) { \
3592 BX_CPU_THIS_PTR oszapc.op2 = (bx_address)(Bit##size##s)(lf_op2); \
3593 BX_CPU_THIS_PTR oszapc.result = (Bit##size##s)(lf_result); \
3594 BX_CPU_THIS_PTR oszapc.instr = (ins); \
3595 BX_CPU_THIS_PTR lf_flags_status = EFlagsOSZAPCMask; \
3596 }
3597
3598 #define SET_FLAGS_OSZAPC_S2_8(op2, result, ins) \
3599 SET_FLAGS_OSZAPC_S2_SIZE(8, op2, result, ins)
3600 #define SET_FLAGS_OSZAPC_S2_16(op2, result, ins) \
3601 SET_FLAGS_OSZAPC_S2_SIZE(16, op2, result, ins)
3602 #define SET_FLAGS_OSZAPC_S2_32(op2, result, ins) \
3603 SET_FLAGS_OSZAPC_S2_SIZE(32, op2, result, ins)
3604 #if BX_SUPPORT_X86_64
3605 #define SET_FLAGS_OSZAPC_S2_64(op2, result, ins) \
3606 SET_FLAGS_OSZAPC_S2_SIZE(64, op2, result, ins)
3607 #endif
3608
3609 /* result only */
3610 #define SET_FLAGS_OSZAPC_RESULT_SIZE(size, lf_result, ins) { \
3611 BX_CPU_THIS_PTR oszapc.result = (Bit##size##s)(lf_result); \
3612 BX_CPU_THIS_PTR oszapc.instr = (ins); \
3613 BX_CPU_THIS_PTR lf_flags_status = EFlagsOSZAPCMask; \
3614 }
3615
3616 #define SET_FLAGS_OSZAPC_RESULT_8(result, ins) \
3617 SET_FLAGS_OSZAPC_RESULT_SIZE(8, result, ins)
3618 #define SET_FLAGS_OSZAPC_RESULT_16(result, ins) \
3619 SET_FLAGS_OSZAPC_RESULT_SIZE(16, result, ins)
3620 #define SET_FLAGS_OSZAPC_RESULT_32(result, ins) \
3621 SET_FLAGS_OSZAPC_RESULT_SIZE(32, result, ins)
3622 #if BX_SUPPORT_X86_64
3623 #define SET_FLAGS_OSZAPC_RESULT_64(result, ins) \
3624 SET_FLAGS_OSZAPC_RESULT_SIZE(64, result, ins)
3625 #endif
3626
3627 // *******************
3628 // OSZAP
3629 // *******************
3630
3631 /* result only */
3632 #define SET_FLAGS_OSZAP_RESULT_SIZE(size, lf_result, ins) { \
3633 force_CF(); \
3634 BX_CPU_THIS_PTR oszapc.result = (Bit##size##s)(lf_result); \
3635 BX_CPU_THIS_PTR oszapc.instr = (ins); \
3636 BX_CPU_THIS_PTR lf_flags_status = EFlagsOSZAPMask; \
3637 }
3638
3639 #define SET_FLAGS_OSZAP_RESULT_8(result, ins) \
3640 SET_FLAGS_OSZAP_RESULT_SIZE(8, result, ins)
3641 #define SET_FLAGS_OSZAP_RESULT_16(result, ins) \
3642 SET_FLAGS_OSZAP_RESULT_SIZE(16, result, ins)
3643 #define SET_FLAGS_OSZAP_RESULT_32(result, ins) \
3644 SET_FLAGS_OSZAP_RESULT_SIZE(32, result, ins)
3645 #if BX_SUPPORT_X86_64
3646 #define SET_FLAGS_OSZAP_RESULT_64(result, ins) \
3647 SET_FLAGS_OSZAP_RESULT_SIZE(64, result, ins)
3648 #endif
3649
3650 // transition to new lazy flags code
3651 #define SET_FLAGS_OSZAPC_LOGIC_8(result_8) \
3652 SET_FLAGS_OSZAPC_RESULT_8((result_8), BX_LF_INSTR_LOGIC8)
3653 #define SET_FLAGS_OSZAPC_LOGIC_16(result_16) \
3654 SET_FLAGS_OSZAPC_RESULT_16((result_16), BX_LF_INSTR_LOGIC16)
3655 #define SET_FLAGS_OSZAPC_LOGIC_32(result_32) \
3656 SET_FLAGS_OSZAPC_RESULT_32((result_32), BX_LF_INSTR_LOGIC32)
3657 #if BX_SUPPORT_X86_64
3658 #define SET_FLAGS_OSZAPC_LOGIC_64(result_64) \
3659 SET_FLAGS_OSZAPC_RESULT_64((result_64), BX_LF_INSTR_LOGIC64)
3660 #endif
3661
3662 #define SET_FLAGS_OSZAPC_ADD_8(op1_8, op2_8, sum_8) \
3663 SET_FLAGS_OSZAPC_8((op1_8), (op2_8), (sum_8), BX_LF_INSTR_ADD8)
3664 #define SET_FLAGS_OSZAPC_ADD_16(op1_16, op2_16, sum_16) \
3665 SET_FLAGS_OSZAPC_16((op1_16), (op2_16), (sum_16), BX_LF_INSTR_ADD16)
3666 #define SET_FLAGS_OSZAPC_ADD_32(op1_32, op2_32, sum_32) \
3667 SET_FLAGS_OSZAPC_32((op1_32), (op2_32), (sum_32), BX_LF_INSTR_ADD32)
3668 #if BX_SUPPORT_X86_64
3669 #define SET_FLAGS_OSZAPC_ADD_64(op1_64, op2_64, sum_64) \
3670 SET_FLAGS_OSZAPC_64((op1_64), (op2_64), (sum_64), BX_LF_INSTR_ADD64)
3671 #endif
3672
3673 #define SET_FLAGS_OSZAPC_SUB_8(op1_8, op2_8, diff_8) \
3674 SET_FLAGS_OSZAPC_8((op1_8), (op2_8), (diff_8), BX_LF_INSTR_SUB8)
3675 #define SET_FLAGS_OSZAPC_SUB_16(op1_16, op2_16, diff_16) \
3676 SET_FLAGS_OSZAPC_16((op1_16), (op2_16), (diff_16), BX_LF_INSTR_SUB16)
3677 #define SET_FLAGS_OSZAPC_SUB_32(op1_32, op2_32, diff_32) \
3678 SET_FLAGS_OSZAPC_32((op1_32), (op2_32), (diff_32), BX_LF_INSTR_SUB32)
3679 #if BX_SUPPORT_X86_64
3680 #define SET_FLAGS_OSZAPC_SUB_64(op1_64, op2_64, diff_64) \
3681 SET_FLAGS_OSZAPC_64((op1_64), (op2_64), (diff_64), BX_LF_INSTR_SUB64)
3682 #endif
3683
3684 #define SET_FLAGS_OSZAPC_INC_8(result) \
3685 SET_FLAGS_OSZAP_RESULT_SIZE(8, (result), BX_LF_INSTR_INC8)
3686 #define SET_FLAGS_OSZAPC_INC_16(result) \
3687 SET_FLAGS_OSZAP_RESULT_SIZE(16, (result), BX_LF_INSTR_INC16)
3688 #define SET_FLAGS_OSZAPC_INC_32(result) \
3689 SET_FLAGS_OSZAP_RESULT_SIZE(32, (result), BX_LF_INSTR_INC32)
3690 #if BX_SUPPORT_X86_64
3691 #define SET_FLAGS_OSZAPC_INC_64(result) \
3692 SET_FLAGS_OSZAP_RESULT_SIZE(64, (result), BX_LF_INSTR_INC64)
3693 #endif
3694
3695 #define SET_FLAGS_OSZAPC_DEC_8(result) \
3696 SET_FLAGS_OSZAP_RESULT_SIZE(8, (result), BX_LF_INSTR_DEC8)
3697 #define SET_FLAGS_OSZAPC_DEC_16(result) \
3698 SET_FLAGS_OSZAP_RESULT_SIZE(16, (result), BX_LF_INSTR_DEC16)
3699 #define SET_FLAGS_OSZAPC_DEC_32(result) \
3700 SET_FLAGS_OSZAP_RESULT_SIZE(32, (result), BX_LF_INSTR_DEC32)
3701 #if BX_SUPPORT_X86_64
3702 #define SET_FLAGS_OSZAPC_DEC_64(result) \
3703 SET_FLAGS_OSZAP_RESULT_SIZE(64, (result), BX_LF_INSTR_DEC64)
3704 #endif
3705
3706 IMPLEMENT_EFLAG_ACCESSOR (ID, 21)
3707 IMPLEMENT_EFLAG_ACCESSOR (VIP, 20)
3708 IMPLEMENT_EFLAG_ACCESSOR (VIF, 19)
3709 IMPLEMENT_EFLAG_ACCESSOR (AC, 18)
3710 IMPLEMENT_EFLAG_ACCESSOR (VM, 17)
3711 IMPLEMENT_EFLAG_ACCESSOR (RF, 16)
3712 IMPLEMENT_EFLAG_ACCESSOR (NT, 14)
3713 IMPLEMENT_EFLAG_ACCESSOR_IOPL( 12)
3714 IMPLEMENT_EFLAG_ACCESSOR (DF, 10)
3715 IMPLEMENT_EFLAG_ACCESSOR (IF, 9)
3716 IMPLEMENT_EFLAG_ACCESSOR (TF, 8)
3717
3718 IMPLEMENT_EFLAG_SET_ACCESSOR (ID, 21)
3719 IMPLEMENT_EFLAG_SET_ACCESSOR (VIP, 20)
3720 IMPLEMENT_EFLAG_SET_ACCESSOR (VIF, 19)
3721 #if BX_SUPPORT_ALIGNMENT_CHECK && BX_CPU_LEVEL >= 4
3722 IMPLEMENT_EFLAG_SET_ACCESSOR_AC( 18)
3723 #else
3724 IMPLEMENT_EFLAG_SET_ACCESSOR (AC, 18)
3725 #endif
3726 IMPLEMENT_EFLAG_SET_ACCESSOR_VM( 17)
3727 IMPLEMENT_EFLAG_SET_ACCESSOR (RF, 16)
3728 IMPLEMENT_EFLAG_SET_ACCESSOR (NT, 14)
3729 IMPLEMENT_EFLAG_SET_ACCESSOR (DF, 10)
3730 IMPLEMENT_EFLAG_SET_ACCESSOR_IF( 9)
3731 IMPLEMENT_EFLAG_SET_ACCESSOR_TF( 8)
3732
3733 #define BX_TASK_FROM_JUMP 10
3734 #define BX_TASK_FROM_CALL_OR_INT 11
3735 #define BX_TASK_FROM_IRET 12
3736
3737 // <TAG-DEFINES-DECODE-START>
3738
3739 //
3740 // For decoding...
3741 //
3742
3743 // If the BxImmediate mask is set, the lowest 4 bits of the attribute
3744 // specify which kinds of immediate data a required by instruction.
3745
3746 #define BxImmediate 0x000f // bits 3..0: any immediate
3747 #define BxImmediate_I1 0x0001 // imm8 = 1
3748 #define BxImmediate_Ib 0x0002 // 8 bit
3749 #define BxImmediate_Ib_SE 0x0003 // sign extend to OS size
3750 #define BxImmediate_Iw 0x0004 // 16 bit
3751 #define BxImmediate_IbIb 0x0005 // SSE4A
3752 #define BxImmediate_IwIb 0x0006 // enter_IwIb
3753 #define BxImmediate_IwIw 0x0007 // call_Ap, not encodable in 64-bit mode
3754 #define BxImmediate_IdIw 0x0008 // call_Ap, not encodable in 64-bit mode
3755 #define BxImmediate_Id 0x0009 // 32 bit
3756 #define BxImmediate_O 0x000A // MOV_ALOd, mov_OdAL, mov_eAXOv, mov_OveAX
3757 #define BxImmediate_BrOff8 0x000B // Relative branch offset byte
3758 #if BX_SUPPORT_X86_64
3759 #define BxImmediate_Iq 0x000C // 64 bit override
3760 #endif
3761
3762 #define BxImmediate_BrOff16 BxImmediate_Iw // Relative branch offset word, not encodable in 64-bit mode
3763 #define BxImmediate_BrOff32 BxImmediate_Id // Relative branch offset dword
3764
3765 // Lookup for opcode and attributes in another opcode tables
3766 // Totally 7 opcode groups supported
3767 #define BxGroupX 0x0070 // bits 6..4: opcode groups definition
3768 #define BxGroupN 0x0010 // Group encoding: 001
3769 #define BxPrefixSSE 0x0020 // Group encoding: 010
3770 #define BxFPEscape 0x0030 // Group encoding: 011
3771 #define BxRMGroup 0x0040 // Group encoding: 100
3772 #define Bx3ByteOp 0x0050 // Group encoding: 101
3773 #define BxOSizeGrp 0x0060 // Group encoding: 110
3774 // Group encoding: 111
3775
3776 #define BxLockable 0x0080 // bit 7
3777 #define BxArithDstRM 0x0100 // bit 8
3778
3779 #if BX_SUPPORT_TRACE_CACHE
3780 #define BxTraceEnd 0x0200 // bit 9
3781 #else
3782 #define BxTraceEnd 0
3783 #endif
3784
3785 #ifdef BX_TRACE_CACHE_NO_SPECULATIVE_TRACING
3786 #define BxTraceJCC BxTraceEnd
3787 #else
3788 #define BxTraceJCC 0
3789 #endif
3790
3791 #define BxGroup1 BxGroupN
3792 #define BxGroup1A BxGroupN
3793 #define BxGroup2 BxGroupN
3794 #define BxGroup3 BxGroupN
3795 #define BxGroup4 BxGroupN
3796 #define BxGroup5 BxGroupN
3797 #define BxGroup6 BxGroupN
3798 #define BxGroup7 BxGroupN
3799 #define BxGroup8 BxGroupN
3800 #define BxGroup9 BxGroupN
3801
3802 #define BxGroup11 BxGroupN
3803 #define BxGroup12 BxGroupN
3804 #define BxGroup13 BxGroupN
3805 #define BxGroup14 BxGroupN
3806 #define BxGroup15 BxGroupN
3807 #define BxGroup16 BxGroupN
3808
3809 #define BxGroupFP BxGroupN
3810
3811 // <TAG-DEFINES-DECODE-END>
3812
3813 #define setEFlagsOSZAPC(flags32) { \
3814 BX_CPU_THIS_PTR eflags = (BX_CPU_THIS_PTR eflags & ~EFlagsOSZAPCMask) \
3815 | (flags32 & EFlagsOSZAPCMask); \
3816 BX_CPU_THIS_PTR lf_flags_status = 0; \
3817 }
3818
3819 #define ASSERT_FLAGS_OxxxxC() { \
3820 BX_CPU_THIS_PTR eflags |= (EFlagsOFMask | EFlagsCFMask); \
3821 BX_CPU_THIS_PTR lf_flags_status &= ~(EFlagsOFMask | EFlagsCFMask); \
3822 }
3823
3824 #define SET_FLAGS_OxxxxC(new_of, new_cf) { \
3825 BX_CPU_THIS_PTR eflags &= ~((EFlagsOFMask | EFlagsCFMask)); \
3826 BX_CPU_THIS_PTR eflags |= ((new_of)<<11) | (new_cf); \
3827 BX_CPU_THIS_PTR lf_flags_status &= ~((EFlagsOFMask | EFlagsCFMask)); \
3828 }
3829
3830 #endif // #ifndef BX_CPU_H
Mirror of Bochs CVS