cpu/logical16.cc

   1 /////////////////////////////////////////////////////////////////////////
   2 // $Id: logical16.cc,v 1.42 2008/08/11 20:34:05 sshwarts Exp $
   3 /////////////////////////////////////////////////////////////////////////
   4 //
   5 //  Copyright (C) 2001  MandrakeSoft S.A.
   6 //
   7 //    MandrakeSoft S.A.
   8 //    43, rue d'Aboukir
   9 //    75002 Paris - France
  10 //    http://www.linux-mandrake.com/
  11 //    http://www.mandrakesoft.com/
  12 //
  13 //  This library is free software; you can redistribute it and/or
  14 //  modify it under the terms of the GNU Lesser General Public
  15 //  License as published by the Free Software Foundation; either
  16 //  version 2 of the License, or (at your option) any later version.
  17 //
  18 //  This library is distributed in the hope that it will be useful,
  19 //  but WITHOUT ANY WARRANTY; without even the implied warranty of
  20 //  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  21 //  Lesser General Public License for more details.
  22 //
  23 //  You should have received a copy of the GNU Lesser General Public
  24 //  License along with this library; if not, write to the Free Software
  25 //  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  26 /////////////////////////////////////////////////////////////////////////
  27
  28 #define NEED_CPU_REG_SHORTCUTS 1
  29 #include "bochs.h"
  30 #include "cpu.h"
  31 #define LOG_THIS BX_CPU_THIS_PTR
  32
  33 void BX_CPP_AttrRegparmN(1) BX_CPU_C::XOR_EwGwM(bxInstruction_c *i)
  34 {
  35   Bit16u op1_16, op2_16;
  36
  37   bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
  38
  39   op1_16 = read_RMW_virtual_word(i->seg(), eaddr);
  40   op2_16 = BX_READ_16BIT_REG(i->nnn());
  41   op1_16 ^= op2_16;
  42   write_RMW_virtual_word(op1_16);
  43
  44   SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
  45 }
  46
  47 void BX_CPP_AttrRegparmN(1) BX_CPU_C::XOR_GwEwR(bxInstruction_c *i)
  48 {
  49   Bit16u op1_16, op2_16;
  50
  51   op1_16 = BX_READ_16BIT_REG(i->nnn());
  52   op2_16 = BX_READ_16BIT_REG(i->rm());
  53   op1_16 ^= op2_16;
  54   BX_WRITE_16BIT_REG(i->nnn(), op1_16);
  55
  56   SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
  57 }
  58
  59 void BX_CPP_AttrRegparmN(1) BX_CPU_C::XOR_AXIw(bxInstruction_c *i)
  60 {
  61   Bit16u op1_16;
  62
  63   op1_16 = AX;
  64   op1_16 ^= i->Iw();
  65   AX = op1_16;
  66
  67   SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
  68 }
  69
  70 void BX_CPP_AttrRegparmN(1) BX_CPU_C::XOR_EwIwM(bxInstruction_c *i)
  71 {
  72   Bit16u op1_16;
  73
  74   bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
  75
  76   op1_16 = read_RMW_virtual_word(i->seg(), eaddr);
  77   op1_16 ^= i->Iw();
  78   write_RMW_virtual_word(op1_16);
  79
  80   SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
  81 }
  82
  83 void BX_CPP_AttrRegparmN(1) BX_CPU_C::XOR_EwIwR(bxInstruction_c *i)
  84 {
  85   Bit16u op1_16 = BX_READ_16BIT_REG(i->rm());
  86   op1_16 ^= i->Iw();
  87   BX_WRITE_16BIT_REG(i->rm(), op1_16);
  88
  89   SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
  90 }
  91
  92 void BX_CPP_AttrRegparmN(1) BX_CPU_C::OR_EwIwM(bxInstruction_c *i)
  93 {
  94   Bit16u op1_16;
  95
  96   bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
  97
  98   op1_16 = read_RMW_virtual_word(i->seg(), eaddr);
  99   op1_16 |= i->Iw();
 100   write_RMW_virtual_word(op1_16);
 101
 102   SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
 103 }
 104
 105 void BX_CPP_AttrRegparmN(1) BX_CPU_C::OR_EwIwR(bxInstruction_c *i)
 106 {
 107   Bit16u op1_16 = BX_READ_16BIT_REG(i->rm());
 108   op1_16 |= i->Iw();
 109   BX_WRITE_16BIT_REG(i->rm(), op1_16);
 110
 111   SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
 112 }
 113
 114 void BX_CPP_AttrRegparmN(1) BX_CPU_C::NOT_EwM(bxInstruction_c *i)
 115 {
 116   Bit16u op1_16;
 117
 118   bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
 119
 120   op1_16 = read_RMW_virtual_word(i->seg(), eaddr);
 121   op1_16 = ~op1_16;
 122   write_RMW_virtual_word(op1_16);
 123 }
 124
 125 void BX_CPP_AttrRegparmN(1) BX_CPU_C::NOT_EwR(bxInstruction_c *i)
 126 {
 127   Bit16u op1_16 = BX_READ_16BIT_REG(i->rm());
 128   op1_16 = ~op1_16;
 129   BX_WRITE_16BIT_REG(i->rm(), op1_16);
 130 }
 131
 132 void BX_CPP_AttrRegparmN(1) BX_CPU_C::OR_EwGwM(bxInstruction_c *i)
 133 {
 134   Bit16u op1_16, op2_16;
 135
 136   bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
 137
 138   op1_16 = read_RMW_virtual_word(i->seg(), eaddr);
 139   op2_16 = BX_READ_16BIT_REG(i->nnn());
 140   op1_16 |= op2_16;
 141   write_RMW_virtual_word(op1_16);
 142
 143   SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
 144 }
 145
 146 void BX_CPP_AttrRegparmN(1) BX_CPU_C::OR_GwEwR(bxInstruction_c *i)
 147 {
 148   Bit16u op1_16, op2_16;
 149
 150   op1_16 = BX_READ_16BIT_REG(i->nnn());
 151   op2_16 = BX_READ_16BIT_REG(i->rm());
 152   op1_16 |= op2_16;
 153   BX_WRITE_16BIT_REG(i->nnn(), op1_16);
 154
 155   SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
 156 }
 157
 158 void BX_CPP_AttrRegparmN(1) BX_CPU_C::OR_AXIw(bxInstruction_c *i)
 159 {
 160   Bit16u op1_16, op2_16;
 161
 162   op1_16 = AX;
 163   op2_16 = i->Iw();
 164   op1_16 |= op2_16;
 165   AX = op1_16;
 166
 167   SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
 168 }
 169
 170 void BX_CPP_AttrRegparmN(1) BX_CPU_C::AND_EwGwM(bxInstruction_c *i)
 171 {
 172   Bit16u op1_16, op2_16;
 173
 174   bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
 175
 176   op1_16 = read_RMW_virtual_word(i->seg(), eaddr);
 177   op2_16 = BX_READ_16BIT_REG(i->nnn());
 178   op1_16 &= op2_16;
 179   write_RMW_virtual_word(op1_16);
 180
 181   SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
 182 }
 183
 184 void BX_CPP_AttrRegparmN(1) BX_CPU_C::AND_GwEwR(bxInstruction_c *i)
 185 {
 186   Bit16u op1_16, op2_16;
 187
 188   op1_16 = BX_READ_16BIT_REG(i->nnn());
 189   op2_16 = BX_READ_16BIT_REG(i->rm());
 190   op1_16 &= op2_16;
 191   BX_WRITE_16BIT_REG(i->nnn(), op1_16);
 192
 193   SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
 194 }
 195
 196 void BX_CPP_AttrRegparmN(1) BX_CPU_C::AND_AXIw(bxInstruction_c *i)
 197 {
 198   Bit16u op1_16, op2_16;
 199
 200   op1_16 = AX;
 201   op2_16 = i->Iw();
 202   op1_16 &= op2_16;
 203   AX = op1_16;
 204
 205   SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
 206 }
 207
 208 void BX_CPP_AttrRegparmN(1) BX_CPU_C::AND_EwIwM(bxInstruction_c *i)
 209 {
 210   Bit16u op1_16;
 211
 212   bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
 213
 214   op1_16 = read_RMW_virtual_word(i->seg(), eaddr);
 215   op1_16 &= i->Iw();
 216   write_RMW_virtual_word(op1_16);
 217
 218   SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
 219 }
 220
 221 void BX_CPP_AttrRegparmN(1) BX_CPU_C::AND_EwIwR(bxInstruction_c *i)
 222 {
 223   Bit16u op1_16 = BX_READ_16BIT_REG(i->rm());
 224   op1_16 &= i->Iw();
 225   BX_WRITE_16BIT_REG(i->rm(), op1_16);
 226
 227   SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
 228 }
 229
 230 void BX_CPP_AttrRegparmN(1) BX_CPU_C::TEST_EwGwR(bxInstruction_c *i)
 231 {
 232   Bit16u op1_16, op2_16;
 233
 234   op1_16 = BX_READ_16BIT_REG(i->rm());
 235   op2_16 = BX_READ_16BIT_REG(i->nnn());
 236   op1_16 &= op2_16;
 237   SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
 238 }
 239
 240 void BX_CPP_AttrRegparmN(1) BX_CPU_C::TEST_AXIw(bxInstruction_c *i)
 241 {
 242   Bit16u op1_16, op2_16;
 243
 244   op1_16 = AX;
 245   op2_16 = i->Iw();
 246   op1_16 &= op2_16;
 247
 248   SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
 249 }
 250
 251 void BX_CPP_AttrRegparmN(1) BX_CPU_C::TEST_EwIwR(bxInstruction_c *i)
 252 {
 253   Bit16u op1_16 = BX_READ_16BIT_REG(i->rm());
 254   op1_16 &= i->Iw();
 255   SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
 256 }