cpu/flag_ctrl.cc

   1 /////////////////////////////////////////////////////////////////////////
   2 // $Id: flag_ctrl.cc,v 1.26 2006/06/09 22:29:07 sshwarts Exp $
   3 /////////////////////////////////////////////////////////////////////////
   4 //
   5 //  Copyright (C) 2002  MandrakeSoft S.A.
   6 //
   7 //    MandrakeSoft S.A.
   8 //    43, rue d'Aboukir
   9 //    75002 Paris - France
  10 //    http://www.linux-mandrake.com/
  11 //    http://www.mandrakesoft.com/
  12 //
  13 //  This library is free software; you can redistribute it and/or
  14 //  modify it under the terms of the GNU Lesser General Public
  15 //  License as published by the Free Software Foundation; either
  16 //  version 2 of the License, or (at your option) any later version.
  17 //
  18 //  This library is distributed in the hope that it will be useful,
  19 //  but WITHOUT ANY WARRANTY; without even the implied warranty of
  20 //  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  21 //  Lesser General Public License for more details.
  22 //
  23 //  You should have received a copy of the GNU Lesser General Public
  24 //  License along with this library; if not, write to the Free Software
  25 //  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  26
  27
  28
  29 #define NEED_CPU_REG_SHORTCUTS 1
  30 #include "bochs.h"
  31 #include "cpu.h"
  32 #define LOG_THIS BX_CPU_THIS_PTR
  33
  34
  35 void BX_CPU_C::SAHF(bxInstruction_c *i)
  36 {
  37   set_SF((AH & 0x80) >> 7);
  38   set_ZF((AH & 0x40) >> 6);
  39   set_AF((AH & 0x10) >> 4);
  40   set_CF(AH & 0x01);
  41   set_PF((AH & 0x04) >> 2);
  42 }
  43
  44 void BX_CPU_C::LAHF(bxInstruction_c *i)
  45 {
  46   AH = (get_SF() ? 0x80 : 0) |
  47        (get_ZF() ? 0x40 : 0) |
  48        (get_AF() ? 0x10 : 0) |
  49        (get_PF() ? 0x04 : 0) |
  50        (0x02) |
  51        (get_CF() ? 0x01 : 0);
  52 }
  53
  54 void BX_CPU_C::CLC(bxInstruction_c *i)
  55 {
  56   clear_CF();
  57 }
  58
  59 void BX_CPU_C::STC(bxInstruction_c *i)
  60 {
  61   assert_CF();
  62 }
  63
  64 void BX_CPU_C::CLI(bxInstruction_c *i)
  65 {
  66   Bit32u IOPL = BX_CPU_THIS_PTR get_IOPL();
  67   Bit32u  cpl = CPL;
  68
  69 #if BX_CPU_LEVEL >= 2
  70   if (protected_mode())
  71   {
  72 #if BX_SUPPORT_VME
  73     if (BX_CPU_THIS_PTR cr4.get_PVI() && (cpl == 3))
  74     {
  75       if (IOPL < 3) {
  76         BX_CPU_THIS_PTR clear_VIF();
  77         return;
  78       }
  79     }
  80     else
  81 #endif
  82     {
  83       if (IOPL < cpl) {
  84         BX_DEBUG(("CLI: IOPL < CPL in protected mode"));
  85         exception(BX_GP_EXCEPTION, 0, 0);
  86       }
  87     }
  88   }
  89 #if BX_CPU_LEVEL >= 3
  90   else if (v8086_mode())
  91   {
  92     if (IOPL != 3) {
  93 #if BX_SUPPORT_VME
  94       if (CR4_VME_ENABLED) {
  95         BX_CPU_THIS_PTR clear_VIF();
  96         return;
  97       }
  98 #endif
  99       BX_DEBUG(("CLI: IOPL != 3 in v8086 mode"));
 100       exception(BX_GP_EXCEPTION, 0, 0);
 101     }
 102   }
 103 #endif
 104 #endif
 105
 106   BX_CPU_THIS_PTR clear_IF();
 107 }
 108
 109 void BX_CPU_C::STI(bxInstruction_c *i)
 110 {
 111   Bit32u IOPL = BX_CPU_THIS_PTR get_IOPL();
 112   Bit32u  cpl = CPL;
 113
 114 #if BX_CPU_LEVEL >= 2
 115   if (protected_mode())
 116   {
 117 #if BX_SUPPORT_VME
 118     if (BX_CPU_THIS_PTR cr4.get_PVI())
 119     {
 120       if (cpl == 3 && IOPL < 3) {
 121         if (! BX_CPU_THIS_PTR get_VIP())
 122         {
 123           BX_CPU_THIS_PTR assert_VIF();
 124           return;
 125         }
 126
 127         BX_DEBUG(("STI: #GP(0) in VME mode"));
 128         exception(BX_GP_EXCEPTION, 0, 0);
 129       }
 130     }
 131 #endif
 132     if (cpl > IOPL) {
 133       BX_DEBUG(("STI: CPL > IOPL in protected mode"));
 134       exception(BX_GP_EXCEPTION, 0, 0);
 135     }
 136   }
 137 #if BX_CPU_LEVEL >= 3
 138   else if (v8086_mode())
 139   {
 140     if (IOPL != 3) {
 141 #if BX_SUPPORT_VME
 142       if (CR4_VME_ENABLED && BX_CPU_THIS_PTR get_VIP() == 0)
 143       {
 144         BX_CPU_THIS_PTR assert_VIF();
 145         return;
 146       }
 147 #endif
 148       BX_DEBUG(("STI: IOPL != 3 in v8086 mode"));
 149       exception(BX_GP_EXCEPTION, 0, 0);
 150     }
 151   }
 152 #endif
 153 #endif
 154
 155   if (!BX_CPU_THIS_PTR get_IF()) {
 156     BX_CPU_THIS_PTR assert_IF();
 157     BX_CPU_THIS_PTR inhibit_mask |= BX_INHIBIT_INTERRUPTS;
 158     BX_CPU_THIS_PTR async_event = 1;
 159   }
 160 }
 161
 162 void BX_CPU_C::CLD(bxInstruction_c *i)
 163 {
 164   BX_CPU_THIS_PTR clear_DF();
 165 }
 166
 167 void BX_CPU_C::STD(bxInstruction_c *i)
 168 {
 169   BX_CPU_THIS_PTR assert_DF();
 170 }
 171
 172 void BX_CPU_C::CMC(bxInstruction_c *i)
 173 {
 174   set_CF(! get_CF());
 175 }
 176
 177 void BX_CPU_C::PUSHF_Fw(bxInstruction_c *i)
 178 {
 179   Bit16u flags = read_flags();
 180
 181   if (v8086_mode()) {
 182     if ((BX_CPU_THIS_PTR get_IOPL() < 3) && (CR4_VME_ENABLED == 0)) {
 183       BX_DEBUG(("PUSHFW: #GP(0) in v8086 (no VME) mode"));
 184       exception(BX_GP_EXCEPTION, 0, 0);
 185       return;
 186     }
 187 #if BX_SUPPORT_VME
 188     if (CR4_VME_ENABLED && BX_CPU_THIS_PTR get_IOPL() < 3) {
 189       flags |= EFlagsIOPLMask;
 190       if (BX_CPU_THIS_PTR get_VIF())
 191         flags |=  EFlagsIFMask;
 192       else
 193         flags &= ~EFlagsIFMask;
 194     }
 195 #endif
 196   }
 197
 198   push_16(flags);
 199 }
 200
 201 void BX_CPU_C::POPF_Fw(bxInstruction_c *i)
 202 {
 203   // Build a mask of the following bits:
 204   // x,NT,IOPL,OF,DF,IF,TF,SF,ZF,x,AF,x,PF,x,CF
 205   Bit32u changeMask = EFlagsOSZAPCMask | EFlagsTFMask | EFlagsDFMask;
 206 #if BX_CPU_LEVEL >= 3
 207   changeMask |= EFlagsNTMask;     // NT could be modified
 208 #endif
 209   Bit16u flags16;
 210
 211   if (protected_mode()) {
 212     pop_16(&flags16);
 213     if (CPL==0)
 214       changeMask |= EFlagsIOPLMask;
 215     if (CPL <= BX_CPU_THIS_PTR get_IOPL())
 216       changeMask |= EFlagsIFMask;
 217   }
 218   else if (v8086_mode()) {
 219     if ((BX_CPU_THIS_PTR get_IOPL() < 3) && (CR4_VME_ENABLED == 0)) {
 220       BX_DEBUG(("POPFW: #GP(0) in v8086 (no VME) mode"));
 221       exception(BX_GP_EXCEPTION, 0, 0);
 222       return;
 223     }
 224     pop_16(&flags16);
 225 #if BX_SUPPORT_VME
 226     if (CR4_VME_ENABLED && BX_CPU_THIS_PTR get_IOPL() < 3) {
 227       if (((flags16 & EFlagsIFMask) && BX_CPU_THIS_PTR get_VIP()) ||
 228            (flags16 & EFlagsTFMask))
 229       {
 230         BX_DEBUG(("POPFW: #GP(0) in VME mode"));
 231         exception(BX_GP_EXCEPTION, 0, 0);
 232       }
 233
 234       // IF, IOPL unchanged, EFLAGS.VIF = TMP_FLAGS.IF
 235       changeMask |= EFlagsVIFMask;
 236       Bit32u flags32 = (Bit32u) flags16;
 237       if (BX_CPU_THIS_PTR get_IF()) flags32 |= EFlagsVIFMask;
 238       writeEFlags(flags32, changeMask);
 239       return;
 240     }
 241 #endif
 242     changeMask |= EFlagsIFMask;
 243   }
 244   else {
 245     pop_16(&flags16);
 246     // All non-reserved flags can be modified
 247     changeMask |= (EFlagsIOPLMask | EFlagsIFMask);
 248   }
 249
 250   writeEFlags((Bit32u) flags16, changeMask);
 251 }
 252
 253 #if BX_CPU_LEVEL >= 3
 254
 255 void BX_CPU_C::PUSHF_Fd(bxInstruction_c *i)
 256 {
 257   if (v8086_mode() && (BX_CPU_THIS_PTR get_IOPL()<3)) {
 258     BX_DEBUG(("PUSHFD: #GP(0) in v8086 mode"));
 259     exception(BX_GP_EXCEPTION, 0, 0);
 260     return;
 261   }
 262
 263   // VM & RF flags cleared in image stored on the stack
 264   push_32(read_eflags() & 0x00fcffff);
 265 }
 266
 267 void BX_CPU_C::POPF_Fd(bxInstruction_c *i)
 268 {
 269   // Build a mask of the following bits:
 270   // ID,VIP,VIF,AC,VM,RF,x,NT,IOPL,OF,DF,IF,TF,SF,ZF,x,AF,x,PF,x,CF
 271   Bit32u changeMask = EFlagsOSZAPCMask | EFlagsTFMask |
 272                           EFlagsDFMask | EFlagsNTMask | EFlagsRFMask;
 273 #if BX_CPU_LEVEL >= 4
 274   changeMask |= (EFlagsIDMask | EFlagsACMask);  // ID/AC
 275 #endif
 276   Bit32u flags32;
 277
 278   if (protected_mode()) {
 279     pop_32(&flags32);
 280     // IOPL changed only if (CPL == 0),
 281     // IF changed only if (CPL <= EFLAGS.IOPL),
 282     // VIF, VIP, VM are unaffected
 283     if (CPL==0)
 284       changeMask |= EFlagsIOPLMask;
 285     if (CPL <= BX_CPU_THIS_PTR get_IOPL())
 286       changeMask |= EFlagsIFMask;
 287   }
 288   else if (v8086_mode()) {
 289     if (BX_CPU_THIS_PTR get_IOPL() < 3) {
 290       BX_DEBUG(("POPFD: #GP(0) in v8086 mode"));
 291       exception(BX_GP_EXCEPTION, 0, 0);
 292       return;
 293     }
 294     pop_32(&flags32);
 295     // v8086-mode: VM, IOPL, VIP, VIF are unaffected
 296     changeMask |= EFlagsIFMask;
 297   }
 298   else { // Real-mode
 299     pop_32(&flags32);
 300     // VIF, VIP, VM are unaffected
 301     changeMask |= (EFlagsIOPLMask | EFlagsIFMask);
 302   }
 303
 304   writeEFlags(flags32, changeMask);
 305 }
 306
 307 #if BX_SUPPORT_X86_64
 308 void BX_CPU_C::PUSHF_Fq(bxInstruction_c *i)
 309 {
 310   // VM & RF flags cleared in image stored on the stack
 311   push_64(read_eflags() & 0x00fcffff);
 312 }
 313
 314 void BX_CPU_C::POPF_Fq(bxInstruction_c *i)
 315 {
 316   // Build a mask of the following bits:
 317   // ID,VIP,VIF,AC,VM,RF,x,NT,IOPL,OF,DF,IF,TF,SF,ZF,x,AF,x,PF,x,CF
 318   Bit32u changeMask = EFlagsOSZAPCMask | EFlagsTFMask | EFlagsDFMask
 319                         | EFlagsNTMask | EFlagsRFMask | EFlagsACMask
 320                         | EFlagsIDMask;
 321   Bit64u flags64;
 322
 323   BX_ASSERT (protected_mode());
 324
 325   pop_64(&flags64);
 326   Bit32u flags32 = (Bit32u) flags64;
 327   if (CPL==0)
 328     changeMask |= EFlagsIOPLMask;
 329   if (CPL <= BX_CPU_THIS_PTR get_IOPL())
 330     changeMask |= EFlagsIFMask;
 331
 332   // VIF, VIP, VM are unaffected
 333   writeEFlags(flags32, changeMask);
 334 }
 335 #endif
 336
 337 #endif  // BX_CPU_LEVEL >= 3
 338
 339 void BX_CPU_C::SALC(bxInstruction_c *i)
 340 {
 341   if (get_CF()) {
 342     AL = 0xff;
 343   }
 344   else {
 345     AL = 0x00;
 346   }
 347 }