fpu/fpu_compare.cc

   1 /////////////////////////////////////////////////////////////////////////
   2 // $Id: fpu_compare.cc,v 1.18 2008/07/13 15:35:10 sshwarts Exp $
   3 /////////////////////////////////////////////////////////////////////////
   4 //
   5 //   Copyright (c) 2003 Stanislav Shwartsman
   6 //          Written by Stanislav Shwartsman [sshwarts at sourceforge net]
   7 //
   8 //  This library is free software; you can redistribute it and/or
   9 //  modify it under the terms of the GNU Lesser General Public
  10 //  License as published by the Free Software Foundation; either
  11 //  version 2 of the License, or (at your option) any later version.
  12 //
  13 //  This library is distributed in the hope that it will be useful,
  14 //  but WITHOUT ANY WARRANTY; without even the implied warranty of
  15 //  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  16 //  Lesser General Public License for more details.
  17 //
  18 //  You should have received a copy of the GNU Lesser General Public
  19 //  License along with this library; if not, write to the Free Software
  20 //  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  21 //
  22 /////////////////////////////////////////////////////////////////////////
  23
  24 #define NEED_CPU_REG_SHORTCUTS 1
  25 #include "bochs.h"
  26 #include "cpu/cpu.h"
  27 #define LOG_THIS BX_CPU_THIS_PTR
  28
  29 #if BX_SUPPORT_FPU
  30
  31 extern float_status_t FPU_pre_exception_handling(Bit16u control_word);
  32
  33 #include "softfloatx80.h"
  34
  35 static int status_word_flags_fpu_compare(int float_relation)
  36 {
  37   switch(float_relation) {
  38      case float_relation_unordered:
  39          return (FPU_SW_C0|FPU_SW_C2|FPU_SW_C3);
  40
  41      case float_relation_greater:
  42          return (0);
  43
  44      case float_relation_less:
  45          return (FPU_SW_C0);
  46
  47      case float_relation_equal:
  48          return (FPU_SW_C3);
  49   }
  50
  51   return (-1);  // should never get here
  52 }
  53
  54 #if BX_SUPPORT_FPU || BX_SUPPORT_SSE >= 1
  55 void BX_CPU_C::write_eflags_fpu_compare(int float_relation)
  56 {
  57   switch(float_relation) {
  58    case float_relation_unordered:
  59       setEFlagsOSZAPC(EFlagsZFMask | EFlagsPFMask | EFlagsCFMask);
  60       break;
  61
  62    case float_relation_greater:
  63       setEFlagsOSZAPC(0);
  64       break;
  65
  66    case float_relation_less:
  67       setEFlagsOSZAPC(EFlagsCFMask);
  68       break;
  69
  70    case float_relation_equal:
  71       setEFlagsOSZAPC(EFlagsZFMask);
  72       break;
  73
  74    default:
  75       BX_PANIC(("write_eflags: unknown floating point compare relation"));
  76   }
  77 }
  78 #endif
  79
  80 void BX_CPP_AttrRegparmN(1) BX_CPU_C::FCOM_STi(bxInstruction_c *i)
  81 {
  82 #if BX_SUPPORT_FPU
  83   BX_CPU_THIS_PTR prepareFPU(i);
  84
  85   int pop_stack = i->nnn() & 1;
  86   // handle special case of FSTP opcode @ 0xDE 0xD0..D7
  87   if (i->b1() == 0xde)
  88     pop_stack = 1;
  89
  90   clear_C1();
  91
  92   if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(i->rm()))
  93   {
  94       BX_CPU_THIS_PTR FPU_exception(FPU_EX_Stack_Underflow);
  95
  96       if(BX_CPU_THIS_PTR the_i387.is_IA_masked())
  97       {
  98           /* the masked response */
  99           setcc(FPU_SW_C0|FPU_SW_C2|FPU_SW_C3);
 100           if (pop_stack)
 101               BX_CPU_THIS_PTR the_i387.FPU_pop();
 102       }
 103       return;
 104   }
 105
 106   float_status_t status =
 107       FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
 108
 109   int rc = floatx80_compare(BX_READ_FPU_REG(0), BX_READ_FPU_REG(i->rm()), status);
 110
 111   if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
 112       return;
 113
 114   setcc(status_word_flags_fpu_compare(rc));
 115
 116   if (pop_stack)
 117       BX_CPU_THIS_PTR the_i387.FPU_pop();
 118 #else
 119   BX_INFO(("FCOM(P)_STi: required FPU, configure --enable-fpu"));
 120 #endif
 121 }
 122
 123 void BX_CPP_AttrRegparmN(1) BX_CPU_C::FCOMI_ST0_STj(bxInstruction_c *i)
 124 {
 125 #if (BX_CPU_LEVEL >= 6) || (BX_CPU_LEVEL_HACKED >= 6)
 126   BX_CPU_THIS_PTR prepareFPU(i);
 127
 128   int pop_stack = i->b1() & 4;
 129
 130   clear_C1();
 131
 132   if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(i->rm()))
 133   {
 134       BX_CPU_THIS_PTR FPU_exception(FPU_EX_Stack_Underflow);
 135
 136       if(BX_CPU_THIS_PTR the_i387.is_IA_masked())
 137       {
 138           /* the masked response */
 139           setEFlagsOSZAPC(EFlagsZFMask | EFlagsPFMask | EFlagsCFMask);
 140           if (pop_stack)
 141               BX_CPU_THIS_PTR the_i387.FPU_pop();
 142       }
 143       return;
 144   }
 145
 146   float_status_t status =
 147       FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
 148
 149   int rc = floatx80_compare(BX_READ_FPU_REG(0), BX_READ_FPU_REG(i->rm()), status);
 150
 151   if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
 152       return;
 153
 154   BX_CPU_THIS_PTR write_eflags_fpu_compare(rc);
 155
 156   if (pop_stack)
 157       BX_CPU_THIS_PTR the_i387.FPU_pop();
 158 #else
 159   BX_INFO(("FCOMI(P)_ST0_STj: required P6 FPU, configure --enable-fpu, cpu-level=6"));
 160   exception(BX_UD_EXCEPTION, 0, 0);
 161 #endif
 162 }
 163
 164 void BX_CPP_AttrRegparmN(1) BX_CPU_C::FUCOMI_ST0_STj(bxInstruction_c *i)
 165 {
 166 #if (BX_CPU_LEVEL >= 6) || (BX_CPU_LEVEL_HACKED >= 6)
 167   BX_CPU_THIS_PTR prepareFPU(i);
 168
 169   int pop_stack = i->b1() & 4;
 170
 171   clear_C1();
 172
 173   if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(i->rm()))
 174   {
 175       BX_CPU_THIS_PTR FPU_exception(FPU_EX_Stack_Underflow);
 176
 177       if(BX_CPU_THIS_PTR the_i387.is_IA_masked())
 178       {
 179           /* the masked response */
 180           setEFlagsOSZAPC(EFlagsZFMask | EFlagsPFMask | EFlagsCFMask);
 181           if (pop_stack)
 182               BX_CPU_THIS_PTR the_i387.FPU_pop();
 183       }
 184       return;
 185   }
 186
 187   float_status_t status =
 188       FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
 189
 190   int rc = floatx80_compare_quiet(BX_READ_FPU_REG(0), BX_READ_FPU_REG(i->rm()), status);
 191
 192   if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
 193       return;
 194
 195   BX_CPU_THIS_PTR write_eflags_fpu_compare(rc);
 196
 197   if (pop_stack)
 198       BX_CPU_THIS_PTR the_i387.FPU_pop();
 199 #else
 200   BX_INFO(("FUCOMI(P)_ST0_STj: required P6 FPU, configure --enable-fpu, cpu-level=6"));
 201   exception(BX_UD_EXCEPTION, 0, 0);
 202 #endif
 203 }
 204
 205 void BX_CPP_AttrRegparmN(1) BX_CPU_C::FUCOM_STi(bxInstruction_c *i)
 206 {
 207 #if BX_SUPPORT_FPU
 208   BX_CPU_THIS_PTR prepareFPU(i);
 209
 210   int pop_stack = i->nnn() & 1;
 211
 212   if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(i->rm()))
 213   {
 214       BX_CPU_THIS_PTR FPU_exception(FPU_EX_Stack_Underflow);
 215
 216       if(BX_CPU_THIS_PTR the_i387.is_IA_masked())
 217       {
 218           /* the masked response */
 219           setcc(FPU_SW_C0|FPU_SW_C2|FPU_SW_C3);
 220           if (pop_stack)
 221               BX_CPU_THIS_PTR the_i387.FPU_pop();
 222       }
 223       return;
 224   }
 225
 226   float_status_t status =
 227       FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
 228
 229   int rc = floatx80_compare_quiet(BX_READ_FPU_REG(0), BX_READ_FPU_REG(i->rm()), status);
 230
 231   if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
 232       return;
 233
 234   setcc(status_word_flags_fpu_compare(rc));
 235
 236   if (pop_stack)
 237       BX_CPU_THIS_PTR the_i387.FPU_pop();
 238 #else
 239   BX_INFO(("FUCOM(P)_STi: required FPU, configure --enable-fpu"));
 240 #endif
 241 }
 242
 243 void BX_CPP_AttrRegparmN(1) BX_CPU_C::FCOM_SINGLE_REAL(bxInstruction_c *i)
 244 {
 245 #if BX_SUPPORT_FPU
 246   BX_CPU_THIS_PTR prepareFPU(i);
 247
 248   int pop_stack = i->nnn() & 1;
 249
 250   float32 load_reg = read_virtual_dword(i->seg(), RMAddr(i));
 251
 252   clear_C1();
 253
 254   if (IS_TAG_EMPTY(0))
 255   {
 256       BX_CPU_THIS_PTR FPU_exception(FPU_EX_Stack_Underflow);
 257
 258       if(BX_CPU_THIS_PTR the_i387.is_IA_masked())
 259       {
 260           /* the masked response */
 261           setcc(FPU_SW_C0|FPU_SW_C2|FPU_SW_C3);
 262           if (pop_stack)
 263               BX_CPU_THIS_PTR the_i387.FPU_pop();
 264       }
 265       return;
 266   }
 267
 268   float_status_t status =
 269       FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
 270
 271   int rc = floatx80_compare(BX_READ_FPU_REG(0),
 272         float32_to_floatx80(load_reg, status), status);
 273
 274   if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
 275       return;
 276
 277   setcc(status_word_flags_fpu_compare(rc));
 278
 279   if (pop_stack)
 280       BX_CPU_THIS_PTR the_i387.FPU_pop();
 281 #else
 282   BX_INFO(("FCOM(P)_SINGLE_REAL: required FPU, configure --enable-fpu"));
 283 #endif
 284 }
 285
 286 void BX_CPP_AttrRegparmN(1) BX_CPU_C::FCOM_DOUBLE_REAL(bxInstruction_c *i)
 287 {
 288 #if BX_SUPPORT_FPU
 289   BX_CPU_THIS_PTR prepareFPU(i);
 290
 291   int pop_stack = i->nnn() & 1;
 292
 293   float64 load_reg = read_virtual_qword(i->seg(), RMAddr(i));
 294
 295   clear_C1();
 296
 297   if (IS_TAG_EMPTY(0))
 298   {
 299       BX_CPU_THIS_PTR FPU_exception(FPU_EX_Stack_Underflow);
 300
 301       if(BX_CPU_THIS_PTR the_i387.is_IA_masked())
 302       {
 303           /* the masked response */
 304           setcc(FPU_SW_C0|FPU_SW_C2|FPU_SW_C3);
 305           if (pop_stack)
 306               BX_CPU_THIS_PTR the_i387.FPU_pop();
 307       }
 308       return;
 309   }
 310
 311   float_status_t status =
 312       FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
 313
 314   int rc = floatx80_compare(BX_READ_FPU_REG(0),
 315         float64_to_floatx80(load_reg, status), status);
 316
 317   if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
 318       return;
 319
 320   setcc(status_word_flags_fpu_compare(rc));
 321
 322   if (pop_stack)
 323       BX_CPU_THIS_PTR the_i387.FPU_pop();
 324 #else
 325   BX_INFO(("FCOM(P)_DOUBLE_REAL: required FPU, configure --enable-fpu"));
 326 #endif
 327 }
 328
 329 void BX_CPP_AttrRegparmN(1) BX_CPU_C::FICOM_WORD_INTEGER(bxInstruction_c *i)
 330 {
 331 #if BX_SUPPORT_FPU
 332   BX_CPU_THIS_PTR prepareFPU(i);
 333
 334   int pop_stack = i->nnn() & 1;
 335
 336   Bit16s load_reg = (Bit16s) read_virtual_word(i->seg(), RMAddr(i));
 337
 338   clear_C1();
 339
 340   if (IS_TAG_EMPTY(0))
 341   {
 342       BX_CPU_THIS_PTR FPU_exception(FPU_EX_Stack_Underflow);
 343
 344       if(BX_CPU_THIS_PTR the_i387.is_IA_masked())
 345       {
 346           /* the masked response */
 347           setcc(FPU_SW_C0|FPU_SW_C2|FPU_SW_C3);
 348           if (pop_stack)
 349               BX_CPU_THIS_PTR the_i387.FPU_pop();
 350       }
 351       return;
 352   }
 353
 354   float_status_t status =
 355       FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
 356
 357   int rc = floatx80_compare(BX_READ_FPU_REG(0),
 358         int32_to_floatx80((Bit32s)(load_reg)), status);
 359
 360   if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
 361       return;
 362
 363   setcc(status_word_flags_fpu_compare(rc));
 364
 365   if (pop_stack)
 366       BX_CPU_THIS_PTR the_i387.FPU_pop();
 367 #else
 368   BX_INFO(("FICOM(P)_WORD_INTEGER: required FPU, configure --enable-fpu"));
 369 #endif
 370 }
 371
 372 void BX_CPP_AttrRegparmN(1) BX_CPU_C::FICOM_DWORD_INTEGER(bxInstruction_c *i)
 373 {
 374 #if BX_SUPPORT_FPU
 375   BX_CPU_THIS_PTR prepareFPU(i);
 376
 377   int pop_stack = i->nnn() & 1;
 378
 379   Bit32s load_reg = (Bit32s) read_virtual_dword(i->seg(), RMAddr(i));
 380
 381   clear_C1();
 382
 383   if (IS_TAG_EMPTY(0))
 384   {
 385       BX_CPU_THIS_PTR FPU_exception(FPU_EX_Stack_Underflow);
 386
 387       if(BX_CPU_THIS_PTR the_i387.is_IA_masked())
 388       {
 389           /* the masked response */
 390           setcc(FPU_SW_C0|FPU_SW_C2|FPU_SW_C3);
 391           if (pop_stack)
 392               BX_CPU_THIS_PTR the_i387.FPU_pop();
 393       }
 394       return;
 395   }
 396
 397   float_status_t status =
 398       FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
 399
 400   int rc = floatx80_compare(BX_READ_FPU_REG(0),
 401         int32_to_floatx80(load_reg), status);
 402
 403   if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
 404       return;
 405
 406   setcc(status_word_flags_fpu_compare(rc));
 407
 408   if (pop_stack)
 409       BX_CPU_THIS_PTR the_i387.FPU_pop();
 410 #else
 411   BX_INFO(("FICOM(P)_DWORD_INTEGER: required FPU, configure --enable-fpu"));
 412 #endif
 413 }
 414
 415 /* DE D9 */
 416 void BX_CPP_AttrRegparmN(1) BX_CPU_C::FCOMPP(bxInstruction_c *i)
 417 {
 418 #if BX_SUPPORT_FPU
 419   BX_CPU_THIS_PTR prepareFPU(i);
 420
 421   clear_C1();
 422
 423   if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(1))
 424   {
 425       BX_CPU_THIS_PTR FPU_exception(FPU_EX_Stack_Underflow);
 426
 427       if(BX_CPU_THIS_PTR the_i387.is_IA_masked())
 428       {
 429           /* the masked response */
 430           setcc(FPU_SW_C0|FPU_SW_C2|FPU_SW_C3);
 431
 432           BX_CPU_THIS_PTR the_i387.FPU_pop();
 433           BX_CPU_THIS_PTR the_i387.FPU_pop();
 434       }
 435       return;
 436   }
 437
 438   float_status_t status =
 439       FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
 440
 441   int rc = floatx80_compare(BX_READ_FPU_REG(0), BX_READ_FPU_REG(1), status);
 442
 443   if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
 444       return;
 445
 446   setcc(status_word_flags_fpu_compare(rc));
 447
 448   BX_CPU_THIS_PTR the_i387.FPU_pop();
 449   BX_CPU_THIS_PTR the_i387.FPU_pop();
 450 #else
 451   BX_INFO(("FCOMPP: required FPU, configure --enable-fpu"));
 452 #endif
 453 }
 454
 455 /* DA E9 */
 456 void BX_CPP_AttrRegparmN(1) BX_CPU_C::FUCOMPP(bxInstruction_c *i)
 457 {
 458 #if BX_SUPPORT_FPU
 459   BX_CPU_THIS_PTR prepareFPU(i);
 460
 461   if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(1))
 462   {
 463       BX_CPU_THIS_PTR FPU_exception(FPU_EX_Stack_Underflow);
 464
 465       if(BX_CPU_THIS_PTR the_i387.is_IA_masked())
 466       {
 467           /* the masked response */
 468           setcc(FPU_SW_C0|FPU_SW_C2|FPU_SW_C3);
 469
 470           BX_CPU_THIS_PTR the_i387.FPU_pop();
 471           BX_CPU_THIS_PTR the_i387.FPU_pop();
 472       }
 473       return;
 474   }
 475
 476   float_status_t status =
 477       FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
 478
 479   int rc = floatx80_compare_quiet(BX_READ_FPU_REG(0), BX_READ_FPU_REG(1), status);
 480
 481   if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
 482       return;
 483
 484   setcc(status_word_flags_fpu_compare(rc));
 485
 486   BX_CPU_THIS_PTR the_i387.FPU_pop();
 487   BX_CPU_THIS_PTR the_i387.FPU_pop();
 488 #else
 489   BX_INFO(("FUCOMPP: required FPU, configure --enable-fpu"));
 490 #endif
 491 }
 492
 493 void BX_CPP_AttrRegparmN(1) BX_CPU_C::FCMOV_ST0_STj(bxInstruction_c *i)
 494 {
 495 #if (BX_CPU_LEVEL >= 6) || (BX_CPU_LEVEL_HACKED >= 6)
 496   BX_CPU_THIS_PTR prepareFPU(i);
 497
 498   if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(i->rm()))
 499   {
 500      BX_CPU_THIS_PTR FPU_stack_underflow(0);
 501      return;
 502   }
 503
 504   floatx80 sti_reg = BX_READ_FPU_REG(i->rm());
 505
 506   bx_bool condition = 0;
 507   switch(i->nnn())
 508   {
 509      case 0: condition = get_CF(); break;
 510      case 1: condition = get_ZF(); break;
 511      case 2: condition = get_CF() || get_ZF(); break;
 512      case 3: condition = get_PF(); break;
 513      default:
 514         BX_PANIC(("FCMOV_ST0_STj: default case"));
 515   }
 516   if (i->b1() & 1)
 517      condition = !condition;
 518
 519   if (condition)
 520      BX_WRITE_FPU_REG(sti_reg, 0);
 521
 522 #else
 523   BX_INFO(("FCMOV_ST0_STj: required P6 FPU, configure --enable-fpu, cpu-level=6"));
 524   exception(BX_UD_EXCEPTION, 0, 0);
 525 #endif
 526 }
 527
 528 /* D9 E4 */
 529 void BX_CPP_AttrRegparmN(1) BX_CPU_C::FTST(bxInstruction_c *i)
 530 {
 531 #if BX_SUPPORT_FPU
 532   BX_CPU_THIS_PTR prepareFPU(i);
 533
 534   clear_C1();
 535
 536   if (IS_TAG_EMPTY(0))
 537   {
 538       BX_CPU_THIS_PTR FPU_exception(FPU_EX_Stack_Underflow);
 539
 540       if(BX_CPU_THIS_PTR the_i387.is_IA_masked())
 541       {
 542           /* the masked response */
 543           setcc(FPU_SW_C0|FPU_SW_C2|FPU_SW_C3);
 544       }
 545       return;
 546   }
 547
 548   extern const floatx80 Const_Z;
 549
 550   float_status_t status =
 551       FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
 552
 553   int rc = floatx80_compare(BX_READ_FPU_REG(0), Const_Z, status);
 554
 555   if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
 556       return;
 557
 558   setcc(status_word_flags_fpu_compare(rc));
 559 #else
 560   BX_INFO(("FTST: required FPU, configure --enable-fpu"));
 561 #endif
 562 }
 563
 564 /* D9 E5 */
 565 void BX_CPP_AttrRegparmN(1) BX_CPU_C::FXAM(bxInstruction_c *i)
 566 {
 567 #if BX_SUPPORT_FPU
 568   BX_CPU_THIS_PTR prepareFPU(i);
 569
 570   floatx80 reg = BX_READ_FPU_REG(0);
 571   int sign = floatx80_sign(reg);
 572
 573   /*
 574    * Examine the contents of the ST(0) register and sets the condition
 575    * code flags C0, C2 and C3 in the FPU status word to indicate the
 576    * class of value or number in the register.
 577    */
 578
 579   if (IS_TAG_EMPTY(0))
 580   {
 581       setcc(FPU_SW_C3|FPU_SW_C1|FPU_SW_C0);
 582   }
 583   else
 584   {
 585       float_class_t aClass = floatx80_class(reg);
 586
 587       switch(aClass)
 588       {
 589         case float_zero:
 590            setcc(FPU_SW_C3|FPU_SW_C1);
 591            break;
 592
 593         case float_NaN:
 594            // unsupported handled as NaNs
 595            if (floatx80_is_unsupported(reg)) {
 596                setcc(FPU_SW_C1);
 597            } else {
 598                setcc(FPU_SW_C1|FPU_SW_C0);
 599            }
 600            break;
 601
 602         case float_negative_inf:
 603         case float_positive_inf:
 604            setcc(FPU_SW_C2|FPU_SW_C1|FPU_SW_C0);
 605            break;
 606
 607         case float_denormal:
 608            setcc(FPU_SW_C3|FPU_SW_C2|FPU_SW_C1);
 609            break;
 610
 611         case float_normalized:
 612            setcc(FPU_SW_C2|FPU_SW_C1);
 613            break;
 614       }
 615   }
 616
 617   /*
 618    * The C1 flag is set to the sign of the value in ST(0), regardless
 619    * of whether the register is empty or full.
 620    */
 621   if (! sign)
 622     clear_C1();
 623
 624 #else
 625   BX_INFO(("FXAM: required FPU, configure --enable-fpu"));
 626 #endif
 627 }
 628
 629 #endif