memory/misc_mem.cc

   1 /////////////////////////////////////////////////////////////////////////
   2 // $Id: misc_mem.cc,v 1.105 2007/11/02 23:30:07 vruppert Exp $
   3 /////////////////////////////////////////////////////////////////////////
   4 //
   5 //  Copyright (C) 2002  MandrakeSoft S.A.
   6 //
   7 //    MandrakeSoft S.A.
   8 //    43, rue d'Aboukir
   9 //    75002 Paris - France
  10 //    http://www.linux-mandrake.com/
  11 //    http://www.mandrakesoft.com/
  12 //
  13 //  I/O memory handlers API Copyright (C) 2003 by Frank Cornelis
  14 //
  15 //  This library is free software; you can redistribute it and/or
  16 //  modify it under the terms of the GNU Lesser General Public
  17 //  License as published by the Free Software Foundation; either
  18 //  version 2 of the License, or (at your option) any later version.
  19 //
  20 //  This library is distributed in the hope that it will be useful,
  21 //  but WITHOUT ANY WARRANTY; without even the implied warranty of
  22 //  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  23 //  Lesser General Public License for more details.
  24 //
  25 //  You should have received a copy of the GNU Lesser General Public
  26 //  License along with this library; if not, write to the Free Software
  27 //  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  28
  29 #include "bochs.h"
  30 #include "cpu/cpu.h"
  31 #include "iodev/iodev.h"
  32 #define LOG_THIS BX_MEM(0)->
  33
  34 #if BX_PROVIDE_CPU_MEMORY
  35
  36 Bit32u BX_MEM_C::get_memory_in_k(void)
  37 {
  38   return(BX_MEM_THIS megabytes * 1024);
  39 }
  40
  41 Bit32u BX_MEM_C::get_num_allocated_pages(void)
  42 {
  43   return(BX_MEM_THIS len / 4096);
  44 }
  45
  46 BX_MEM_C::BX_MEM_C()
  47 {
  48   char mem[6];
  49   snprintf(mem, 6, "MEM0");
  50   put(mem);
  51   settype(MEMLOG);
  52
  53   vector = NULL;
  54   actual_vector = NULL;
  55   len    = 0;
  56   megabytes = 0;
  57
  58   memory_handlers = NULL;
  59 }
  60
  61 void BX_CPP_AttrRegparmN(2)
  62 BX_MEM_C::alloc_vector_aligned (size_t bytes, size_t alignment)
  63 {
  64   if (BX_MEM_THIS actual_vector != NULL) {
  65     BX_INFO (("freeing existing memory vector"));
  66     delete [] BX_MEM_THIS actual_vector;
  67     BX_MEM_THIS actual_vector = NULL;
  68     BX_MEM_THIS vector = NULL;
  69   }
  70   Bit64u test_mask = alignment - 1;
  71   BX_MEM_THIS actual_vector = new Bit8u [(unsigned int)(bytes+test_mask)];
  72   // round address forward to nearest multiple of alignment.  Alignment
  73   // MUST BE a power of two for this to work.
  74   Bit64u masked = ((Bit64u)(BX_MEM_THIS actual_vector + test_mask)) & ~test_mask;
  75   BX_MEM_THIS vector = (Bit8u *)masked;
  76   // sanity check: no lost bits during pointer conversion
  77   BX_ASSERT (sizeof(masked) >= sizeof(BX_MEM_THIS vector));
  78   // sanity check: after realignment, everything fits in allocated space
  79   BX_ASSERT (BX_MEM_THIS vector+bytes <= BX_MEM_THIS actual_vector+bytes+test_mask);
  80   BX_INFO (("allocated memory at %p. after alignment, vector=%p",
  81         BX_MEM_THIS actual_vector, BX_MEM_THIS vector));
  82 }
  83
  84 BX_MEM_C::~BX_MEM_C()
  85 {
  86   cleanup_memory();
  87 }
  88
  89 void BX_MEM_C::init_memory(int memsize)
  90 {
  91   unsigned idx;
  92
  93   BX_DEBUG(("Init $Id: misc_mem.cc,v 1.105 2007/11/02 23:30:07 vruppert Exp $"));
  94
  95   alloc_vector_aligned(memsize+ BIOSROMSZ + EXROMSIZE  + 4096, BX_MEM_VECTOR_ALIGN);
  96   BX_MEM_THIS len  = memsize;
  97   BX_MEM_THIS megabytes = memsize / (1024*1024);
  98   BX_MEM_THIS memory_handlers = new struct memory_handler_struct *[4096];
  99   BX_MEM_THIS rom = &BX_MEM_THIS vector[memsize];
 100   BX_MEM_THIS bogus = &BX_MEM_THIS vector[memsize + BIOSROMSZ + EXROMSIZE];
 101 #if BX_DEBUGGER
 102   unsigned pages = get_num_allocated_pages();
 103   BX_MEM_THIS dbg_dirty_pages = new Bit8u[pages];
 104   memset(BX_MEM_THIS dbg_dirty_pages, 0, pages);
 105 #endif
 106   memset(BX_MEM_THIS rom, 0xff, BIOSROMSZ + EXROMSIZE);
 107   memset(BX_MEM_THIS bogus, 0xff, 4096);
 108   for (idx = 0; idx < 4096; idx++)
 109     BX_MEM_THIS memory_handlers[idx] = NULL;
 110   for (idx = 0; idx < 65; idx++)
 111     BX_MEM_THIS rom_present[idx] = 0;
 112   BX_MEM_THIS pci_enabled = SIM->get_param_bool(BXPN_I440FX_SUPPORT)->get();
 113   BX_MEM_THIS smram_available = 0;
 114   BX_MEM_THIS smram_enable = 0;
 115   BX_MEM_THIS smram_restricted = 0;
 116
 117   // accept only memory size which is multiply of 1M
 118   BX_ASSERT((BX_MEM_THIS len & 0xfffff) == 0);
 119   BX_INFO(("%.2fMB", (float)(BX_MEM_THIS megabytes)));
 120
 121 #if BX_SUPPORT_MONITOR_MWAIT
 122   BX_MEM_THIS monitor_active = new bx_bool[BX_SMP_PROCESSORS];
 123   for (int i=0; i<BX_SMP_PROCESSORS;i++) {
 124     BX_MEM_THIS monitor_active[i] = 0;
 125   }
 126   BX_MEM_THIS n_monitors = 0;
 127 #endif
 128
 129   register_state();
 130 }
 131
 132 void BX_MEM_C::register_state()
 133 {
 134   bx_list_c *list = new bx_list_c(SIM->get_bochs_root(), "memory", "Memory State", 3);
 135   new bx_shadow_data_c(list, "ram", BX_MEM_THIS vector, BX_MEM_THIS len);
 136   BXRS_DEC_PARAM_FIELD(list, len, BX_MEM_THIS len);
 137 #if BX_SUPPORT_MONITOR_MWAIT
 138   bx_list_c *monitors = new bx_list_c(list, "monitors", BX_SMP_PROCESSORS+1);
 139   BXRS_PARAM_BOOL(monitors, n_monitors, BX_MEM_THIS n_monitors);
 140   for (int i=0;i<BX_SMP_PROCESSORS;i++) {
 141     char param_name[15];
 142     sprintf(param_name, "cpu%d_monitor", i);
 143     new bx_shadow_bool_c(monitors, param_name, &BX_MEM_THIS monitor_active[i]);
 144   }
 145 #endif
 146 }
 147
 148 void BX_MEM_C::cleanup_memory()
 149 {
 150   unsigned idx;
 151
 152   if (BX_MEM_THIS vector != NULL) {
 153     delete [] BX_MEM_THIS actual_vector;
 154     BX_MEM_THIS actual_vector = NULL;
 155     BX_MEM_THIS vector = NULL;
 156     if (BX_MEM_THIS memory_handlers != NULL) {
 157       for (idx = 0; idx < 4096; idx++) {
 158         struct memory_handler_struct *memory_handler = BX_MEM_THIS memory_handlers[idx];
 159         struct memory_handler_struct *prev = NULL;
 160         while (memory_handler) {
 161           prev = memory_handler;
 162           memory_handler = memory_handler->next;
 163           delete prev;
 164         }
 165       }
 166       delete [] BX_MEM_THIS memory_handlers;
 167       BX_MEM_THIS memory_handlers = NULL;
 168     }
 169 #if BX_DEBUGGER
 170     delete [] BX_MEM_THIS dbg_dirty_pages;
 171 #endif
 172   }
 173 }
 174
 175 //
 176 // Values for type:
 177 //   0 : System Bios
 178 //   1 : VGA Bios
 179 //   2 : Optional ROM Bios
 180 //
 181 void BX_MEM_C::load_ROM(const char *path, bx_phy_address romaddress, Bit8u type)
 182 {
 183   struct stat stat_buf;
 184   int fd, ret, i, start_idx, end_idx;
 185   unsigned long size, max_size, offset;
 186   bx_bool is_bochs_bios = 0;
 187
 188   if (*path == '\0') {
 189     if (type == 2) {
 190       BX_PANIC(( "ROM: Optional ROM image undefined"));
 191     }
 192     else if (type == 1) {
 193       BX_PANIC(( "ROM: VGA BIOS image undefined"));
 194     }
 195     else {
 196       BX_PANIC(( "ROM: System BIOS image undefined"));
 197     }
 198     return;
 199   }
 200   // read in ROM BIOS image file
 201   fd = open(path, O_RDONLY
 202 #ifdef O_BINARY
 203             | O_BINARY
 204 #endif
 205            );
 206   if (fd < 0) {
 207     if (type < 2) {
 208       BX_PANIC(( "ROM: couldn't open ROM image file '%s'.", path));
 209     }
 210     else {
 211       BX_ERROR(( "ROM: couldn't open ROM image file '%s'.", path));
 212     }
 213     return;
 214   }
 215   ret = fstat(fd, &stat_buf);
 216   if (ret) {
 217     if (type < 2) {
 218       BX_PANIC(( "ROM: couldn't stat ROM image file '%s'.", path));
 219     }
 220     else {
 221       BX_ERROR(( "ROM: couldn't stat ROM image file '%s'.", path));
 222     }
 223     return;
 224   }
 225
 226   size = (unsigned long)stat_buf.st_size;
 227
 228   if (type > 0) {
 229     max_size = 0x10000;
 230   } else {
 231     max_size = BIOSROMSZ;
 232   }
 233   if (size > max_size) {
 234     close(fd);
 235     BX_PANIC(("ROM: ROM image too large"));
 236     return;
 237   }
 238   if (type == 0) {
 239     if (romaddress > 0) {
 240       if ((romaddress + size) != 0x100000 && (romaddress + size)) {
 241         close(fd);
 242         BX_PANIC(("ROM: System BIOS must end at 0xfffff"));
 243         return;
 244       }
 245     } else {
 246       romaddress = (bx_phy_address)-size;
 247     }
 248     offset = romaddress & BIOS_MASK;
 249     if ((romaddress & 0xf0000) < 0xf0000) {
 250       BX_MEM_THIS rom_present[64] = 1;
 251     }
 252     is_bochs_bios = (strstr(path, "BIOS-bochs-latest") != NULL);
 253   } else {
 254     if ((size % 512) != 0) {
 255       close(fd);
 256       BX_PANIC(("ROM: ROM image size must be multiple of 512 (size = %ld)", size));
 257       return;
 258     }
 259     if ((romaddress % 2048) != 0) {
 260       close(fd);
 261       BX_PANIC(("ROM: ROM image must start at a 2k boundary"));
 262       return;
 263     }
 264     if ((romaddress < 0xc0000) ||
 265         (((romaddress + size - 1) > 0xdffff) && (romaddress < 0xe0000))) {
 266       close(fd);
 267       BX_PANIC(("ROM: ROM address space out of range"));
 268       return;
 269     }
 270     if (romaddress < 0xe0000) {
 271       offset = (romaddress & EXROM_MASK) + BIOSROMSZ;
 272       start_idx = ((romaddress - 0xc0000) >> 11);
 273       end_idx = start_idx + (size >> 11) + (((size % 2048) > 0) ? 1 : 0);
 274     } else {
 275       offset = romaddress & BIOS_MASK;
 276       start_idx = 64;
 277       end_idx = 64;
 278     }
 279     for (i = start_idx; i < end_idx; i++) {
 280       if (BX_MEM_THIS rom_present[i]) {
 281         close(fd);
 282         BX_PANIC(("ROM: address space 0x%x already in use", (i * 2048) + 0xc0000));
 283         return;
 284       } else {
 285         BX_MEM_THIS rom_present[i] = 1;
 286       }
 287     }
 288   }
 289   while (size > 0) {
 290     ret = read(fd, (bx_ptr_t) &BX_MEM_THIS rom[offset], size);
 291     if (ret <= 0) {
 292       BX_PANIC(( "ROM: read failed on BIOS image: '%s'",path));
 293     }
 294     size -= ret;
 295     offset += ret;
 296   }
 297   close(fd);
 298   offset -= (unsigned long)stat_buf.st_size;
 299   if (((romaddress & 0xfffff) != 0xe0000) ||
 300       ((BX_MEM_THIS rom[offset] == 0x55) && (BX_MEM_THIS rom[offset+1] == 0xaa))) {
 301     Bit8u checksum = 0;
 302     for (i = 0; i < stat_buf.st_size; i++) {
 303       checksum += BX_MEM_THIS rom[offset + i];
 304     }
 305     if (checksum != 0) {
 306       if (type == 1) {
 307         BX_PANIC(( "ROM: checksum error in VGABIOS image: '%s'", path));
 308       } else if (is_bochs_bios) {
 309         BX_ERROR(( "ROM: checksum error in BIOS image: '%s'", path));
 310       }
 311     }
 312   }
 313   BX_INFO(("rom at 0x%05x/%u ('%s')",
 314                         (unsigned) romaddress,
 315                         (unsigned) stat_buf.st_size,
 316                         path));
 317 }
 318
 319 void BX_MEM_C::load_RAM(const char *path, bx_phy_address ramaddress, Bit8u type)
 320 {
 321   struct stat stat_buf;
 322   int fd, ret;
 323   unsigned long size, offset;
 324
 325   if (*path == '\0') {
 326     BX_PANIC(( "RAM: Optional RAM image undefined"));
 327     return;
 328   }
 329   // read in RAM BIOS image file
 330   fd = open(path, O_RDONLY
 331 #ifdef O_BINARY
 332             | O_BINARY
 333 #endif
 334            );
 335   if (fd < 0) {
 336     BX_PANIC(( "RAM: couldn't open RAM image file '%s'.", path));
 337     return;
 338   }
 339   ret = fstat(fd, &stat_buf);
 340   if (ret) {
 341     BX_PANIC(( "RAM: couldn't stat RAM image file '%s'.", path));
 342     return;
 343   }
 344
 345   size = (unsigned long)stat_buf.st_size;
 346
 347   offset = ramaddress;
 348   while (size > 0) {
 349     ret = read(fd, (bx_ptr_t) &BX_MEM_THIS vector[offset], size);
 350     if (ret <= 0) {
 351       BX_PANIC(( "RAM: read failed on RAM image: '%s'",path));
 352     }
 353     size -= ret;
 354     offset += ret;
 355   }
 356   close(fd);
 357   BX_INFO(("ram at 0x%05x/%u ('%s')",
 358                         (unsigned) ramaddress,
 359                         (unsigned) stat_buf.st_size,
 360                         path));
 361 }
 362 #endif // #if BX_PROVIDE_CPU_MEMORY
 363
 364
 365 #if ( BX_DEBUGGER || BX_DISASM || BX_GDBSTUB)
 366 bx_bool BX_MEM_C::dbg_fetch_mem(BX_CPU_C *cpu, bx_phy_address addr, unsigned len, Bit8u *buf)
 367 {
 368   bx_bool ret = 1;
 369
 370   for (; len>0; len--) {
 371     // Reading standard PCI/ISA Video Mem / SMMRAM
 372     if ((addr & 0xfffe0000) == 0x000a0000) {
 373       if (BX_MEM_THIS smram_enable || cpu->smm_mode())
 374         *buf = BX_MEM_THIS vector[addr];
 375       else
 376         *buf = DEV_vga_mem_read(addr);
 377     }
 378 #if BX_SUPPORT_PCI
 379     else if (BX_MEM_THIS pci_enabled && ((addr & 0xfffc0000) == 0x000c0000))
 380     {
 381       switch (DEV_pci_rd_memtype (addr)) {
 382         case 0x0:  // Read from ROM
 383           if ((addr & 0xfffe0000) == 0x000e0000)
 384           {
 385             *buf = BX_MEM_THIS rom[addr & BIOS_MASK];
 386           }
 387           else
 388           {
 389             *buf = BX_MEM_THIS rom[(addr & EXROM_MASK) + BIOSROMSZ];
 390           }
 391           break;
 392         case 0x1:  // Read from ShadowRAM
 393           *buf = BX_MEM_THIS vector[addr];
 394           break;
 395         default:
 396           BX_PANIC(("dbg_fetch_mem: default case"));
 397       }
 398     }
 399 #endif  // #if BX_SUPPORT_PCI
 400     else if (addr < BX_MEM_THIS len)
 401     {
 402       if ((addr & 0xfffc0000) != 0x000c0000) {
 403         *buf = BX_MEM_THIS vector[addr];
 404       }
 405       else if ((addr & 0xfffe0000) == 0x000e0000)
 406       {
 407         *buf = BX_MEM_THIS rom[addr & BIOS_MASK];
 408       }
 409       else
 410       {
 411         *buf = BX_MEM_THIS rom[(addr & EXROM_MASK) + BIOSROMSZ];
 412       }
 413     }
 414     else if (addr >= (bx_phy_address)~BIOS_MASK)
 415     {
 416       *buf = BX_MEM_THIS rom[addr & BIOS_MASK];
 417     }
 418     else
 419     {
 420       *buf = 0xff;
 421       ret = 0; // error, beyond limits of memory
 422     }
 423     buf++;
 424     addr++;
 425   }
 426   return ret;
 427 }
 428 #endif
 429
 430 #if BX_DEBUGGER || BX_GDBSTUB
 431 bx_bool BX_MEM_C::dbg_set_mem(bx_phy_address addr, unsigned len, Bit8u *buf)
 432 {
 433   if ((addr + len - 1) > BX_MEM_THIS len) {
 434     return(0); // error, beyond limits of memory
 435   }
 436   for (; len>0; len--) {
 437     // Write to standard PCI/ISA Video Mem / SMMRAM
 438     if ((addr & 0xfffe0000) == 0x000a0000) {
 439       if (BX_MEM_THIS smram_enable)
 440         BX_MEM_THIS vector[addr] = *buf;
 441       else
 442         DEV_vga_mem_write(addr, *buf);
 443     }
 444 #if BX_SUPPORT_PCI
 445     else if (BX_MEM_THIS pci_enabled && ((addr & 0xfffc0000) == 0x000c0000))
 446     {
 447       switch (DEV_pci_wr_memtype (addr)) {
 448         case 0x0:  // Ignore write to ROM
 449           break;
 450         case 0x1:  // Write to ShadowRAM
 451           BX_MEM_THIS vector[addr] = *buf;
 452           break;
 453         default:
 454           BX_PANIC(("dbg_fetch_mem: default case"));
 455       }
 456     }
 457 #endif  // #if BX_SUPPORT_PCI
 458     else if ((addr & 0xfffc0000) != 0x000c0000 && (addr < (bx_phy_address)(~BIOS_MASK)))
 459     {
 460       BX_MEM_THIS vector[addr] = *buf;
 461     }
 462     buf++;
 463     addr++;
 464   }
 465   return(1);
 466 }
 467 #endif
 468
 469 bx_bool BX_MEM_C::dbg_crc32(bx_phy_address addr1, bx_phy_address addr2, Bit32u *crc)
 470 {
 471   *crc = 0;
 472   if (addr1 > addr2)
 473     return(0);
 474
 475   if (addr2 >= BX_MEM_THIS len)
 476     return(0); // error, specified address past last phy mem addr
 477
 478   unsigned len = 1 + addr2 - addr1;
 479   *crc = crc32(BX_MEM_THIS vector + addr1, len);
 480
 481   return(1);
 482 }
 483
 484 //
 485 // Return a host address corresponding to the guest physical memory
 486 // address (with A20 already applied), given that the calling
 487 // code will perform an 'op' operation.  This address will be
 488 // used for direct access to guest memory as an acceleration by
 489 // a few instructions, like REP {MOV, INS, OUTS, etc}.
 490 // Values of 'op' are { BX_READ, BX_WRITE, BX_RW }.
 491 //
 492 // The other assumption is that the calling code _only_ accesses memory
 493 // directly within the page that encompasses the address requested.
 494 //
 495
 496 //
 497 // Memory map inside the 1st megabyte:
 498 //
 499 // 0x00000 - 0x7ffff    DOS area (512K)
 500 // 0x80000 - 0x9ffff    Optional fixed memory hole (128K)
 501 // 0xa0000 - 0xbffff    Standard PCI/ISA Video Mem / SMMRAM (128K)
 502 // 0xc0000 - 0xdffff    Expansion Card BIOS and Buffer Area (128K)
 503 // 0xe0000 - 0xeffff    Lower BIOS Area (64K)
 504 // 0xf0000 - 0xfffff    Upper BIOS Area (64K)
 505 //
 506
 507 Bit8u *BX_MEM_C::getHostMemAddr(BX_CPU_C *cpu, bx_phy_address a20Addr, unsigned op, unsigned access_type)
 508 {
 509   BX_ASSERT(cpu != 0); // getHostMemAddr could be used only inside the CPU
 510
 511 #if BX_SUPPORT_APIC
 512   bx_generic_apic_c *local_apic = &cpu->local_apic;
 513   if (local_apic->get_base() == (a20Addr & ~0xfff))
 514     return(NULL); // Vetoed!  APIC address space
 515 #endif
 516
 517   // allow direct access to SMRAM memory space for code and veto data
 518   if (access_type == CODE_ACCESS) {
 519     // reading from SMRAM memory space
 520     if ((a20Addr & 0xfffe0000) == 0x000a0000 && (BX_MEM_THIS smram_available))
 521     {
 522       if (BX_MEM_THIS smram_enable || cpu->smm_mode())
 523         return (Bit8u *) &BX_MEM_THIS vector[a20Addr];
 524     }
 525   }
 526
 527 #if BX_SUPPORT_MONITOR_MWAIT
 528   if (BX_MEM_THIS is_monitor(a20Addr & ~0xfff, 0x1000)) {
 529      // Vetoed! Write monitored page !
 530      if (op != BX_READ) return(NULL);
 531   }
 532 #endif
 533
 534   struct memory_handler_struct *memory_handler = BX_MEM_THIS memory_handlers[a20Addr >> 20];
 535   while (memory_handler) {
 536     if (memory_handler->begin <= a20Addr &&
 537         memory_handler->end >= a20Addr) {
 538       return(NULL); // Vetoed! memory handler for i/o apic, vram, mmio and PCI PnP
 539     }
 540     memory_handler = memory_handler->next;
 541   }
 542
 543   if (op == BX_READ) {
 544     if ((a20Addr & 0xfffe0000) == 0x000a0000)
 545       return(NULL); // Vetoed!  Mem mapped IO (VGA)
 546 #if BX_SUPPORT_PCI
 547     else if (BX_MEM_THIS pci_enabled && ((a20Addr & 0xfffc0000) == 0x000c0000))
 548     {
 549       switch (DEV_pci_rd_memtype (a20Addr)) {
 550         case 0x0:   // Read from ROM
 551           if ((a20Addr & 0xfffe0000) == 0x000e0000)
 552           {
 553             return (Bit8u *) &BX_MEM_THIS rom[a20Addr & BIOS_MASK];
 554           }
 555           else
 556           {
 557             return (Bit8u *) &BX_MEM_THIS rom[(a20Addr & EXROM_MASK) + BIOSROMSZ];
 558           }
 559           break;
 560         case 0x1:   // Read from ShadowRAM
 561           return (Bit8u *) &BX_MEM_THIS vector[a20Addr];
 562         default:
 563           BX_PANIC(("getHostMemAddr(): default case"));
 564           return(NULL);
 565       }
 566     }
 567 #endif
 568     else if(a20Addr < BX_MEM_THIS len)
 569     {
 570       if ((a20Addr & 0xfffc0000) != 0x000c0000) {
 571         return (Bit8u *) &BX_MEM_THIS vector[a20Addr];
 572       }
 573       else if ((a20Addr & 0xfffe0000) == 0x000e0000)
 574       {
 575         return (Bit8u *) &BX_MEM_THIS rom[a20Addr & BIOS_MASK];
 576       }
 577       else
 578       {
 579         return( (Bit8u *) &BX_MEM_THIS rom[(a20Addr & EXROM_MASK) + BIOSROMSZ]);
 580       }
 581     }
 582     else if (a20Addr >= (bx_phy_address)~BIOS_MASK)
 583     {
 584       return (Bit8u *) &BX_MEM_THIS rom[a20Addr & BIOS_MASK];
 585     }
 586     else
 587     {
 588       // Error, requested addr is out of bounds.
 589       return (Bit8u *) &BX_MEM_THIS bogus[a20Addr & 0x0fff];
 590     }
 591   }
 592   else
 593   { // op == {BX_WRITE, BX_RW}
 594     Bit8u *retAddr;
 595     if (a20Addr >= BX_MEM_THIS len)
 596       return(NULL); // Error, requested addr is out of bounds.
 597     else if ((a20Addr & 0xfffe0000) == 0x000a0000)
 598       return(NULL); // Vetoed!  Mem mapped IO (VGA)
 599     else if (a20Addr >= (bx_phy_address)~BIOS_MASK)
 600       return(NULL); // Vetoed!  ROMs
 601 #if BX_SUPPORT_PCI
 602     else if (BX_MEM_THIS pci_enabled && ((a20Addr & 0xfffc0000) == 0x000c0000))
 603     {
 604       // Veto direct writes to this area. Otherwise, there is a chance
 605       // for Guest2HostTLB and memory consistency problems, for example
 606       // when some 16K block marked as write-only using PAM registers.
 607       return(NULL);
 608     }
 609 #endif
 610     else
 611     {
 612       if ((a20Addr & 0xfffc0000) != 0x000c0000) {
 613         retAddr = (Bit8u *) &BX_MEM_THIS vector[a20Addr];
 614       }
 615       else
 616       {
 617         return(NULL);  // Vetoed!  ROMs
 618       }
 619     }
 620
 621 #if BX_SUPPORT_ICACHE
 622     pageWriteStampTable.decWriteStamp(a20Addr);
 623 #endif
 624
 625     return retAddr;
 626   }
 627 }
 628
 629 /*
 630  * One needs to provide both a read_handler and a write_handler.
 631  * XXX: maybe we should check for overlapping memory handlers
 632  */
 633   bx_bool
 634 BX_MEM_C::registerMemoryHandlers(void *param, memory_handler_t read_handler,
 635                 memory_handler_t write_handler, bx_phy_address begin_addr, bx_phy_address end_addr)
 636 {
 637   if (end_addr < begin_addr)
 638     return 0;
 639   if (!read_handler || !write_handler)
 640     return 0;
 641   BX_INFO(("Register memory access handlers: %08x-%08x", begin_addr, end_addr));
 642   for (unsigned page_idx = begin_addr >> 20; page_idx <= end_addr >> 20; page_idx++) {
 643     struct memory_handler_struct *memory_handler = new struct memory_handler_struct;
 644     memory_handler->next = BX_MEM_THIS memory_handlers[page_idx];
 645     BX_MEM_THIS memory_handlers[page_idx] = memory_handler;
 646     memory_handler->read_handler = read_handler;
 647     memory_handler->write_handler = write_handler;
 648     memory_handler->param = param;
 649     memory_handler->begin = begin_addr;
 650     memory_handler->end = end_addr;
 651   }
 652   return 1;
 653 }
 654
 655   bx_bool
 656 BX_MEM_C::unregisterMemoryHandlers(memory_handler_t read_handler, memory_handler_t write_handler,
 657                 bx_phy_address begin_addr, bx_phy_address end_addr)
 658 {
 659   bx_bool ret = 1;
 660   BX_INFO(("Memory access handlers unregistered: %08x-%08x", begin_addr, end_addr));
 661   for (unsigned page_idx = begin_addr >> 20; page_idx <= end_addr >> 20; page_idx++) {
 662     struct memory_handler_struct *memory_handler = BX_MEM_THIS memory_handlers[page_idx];
 663     struct memory_handler_struct *prev = NULL;
 664     while (memory_handler &&
 665          memory_handler->read_handler != read_handler &&
 666          memory_handler->write_handler != write_handler &&
 667          memory_handler->begin != begin_addr &&
 668          memory_handler->end != end_addr)
 669     {
 670       prev = memory_handler;
 671       memory_handler = memory_handler->next;
 672     }
 673     if (!memory_handler) {
 674       ret = 0;  // we should have found it
 675       continue; // anyway, try the other pages
 676     }
 677     if (prev)
 678       prev->next = memory_handler->next;
 679     else
 680       BX_MEM_THIS memory_handlers[page_idx] = memory_handler->next;
 681     delete memory_handler;
 682   }
 683   return ret;
 684 }
 685
 686 void BX_MEM_C::enable_smram(bx_bool enable, bx_bool restricted)
 687 {
 688   BX_MEM_THIS smram_available = 1;
 689   BX_MEM_THIS smram_enable = (enable > 0);
 690   BX_MEM_THIS smram_restricted = (restricted > 0);
 691 }
 692
 693 void BX_MEM_C::disable_smram(void)
 694 {
 695   BX_MEM_THIS smram_available  = 0;
 696   BX_MEM_THIS smram_enable     = 0;
 697   BX_MEM_THIS smram_restricted = 0;
 698 }
 699
 700 // check if SMRAM is aavailable for CPU data accesses
 701 bx_bool BX_MEM_C::is_smram_accessible(void)
 702 {
 703   return(BX_MEM_THIS smram_available) &&
 704         (BX_MEM_THIS smram_enable || !BX_MEM_THIS smram_restricted);
 705 }
 706
 707 #if BX_SUPPORT_MONITOR_MWAIT
 708
 709 //
 710 // MONITOR/MWAIT - x86arch way to optimize idle loops in CPU
 711 //
 712
 713 void BX_MEM_C::set_monitor(unsigned cpu)
 714 {
 715   BX_ASSERT(cpu < BX_SMP_PROCESSORS);
 716   if (! BX_MEM_THIS monitor_active[cpu]) {
 717     BX_MEM_THIS monitor_active[cpu] = 1;
 718     BX_MEM_THIS n_monitors++;
 719     BX_DEBUG(("activate monitor for cpu=%d", cpu));
 720   }
 721   else {
 722     BX_DEBUG(("monitor for cpu=%d already active !", cpu));
 723   }
 724 }
 725
 726 void BX_MEM_C::clear_monitor(unsigned cpu)
 727 {
 728   BX_ASSERT(cpu < BX_SMP_PROCESSORS);
 729   BX_MEM_THIS monitor_active[cpu] = 0;
 730   BX_MEM_THIS n_monitors--;
 731   BX_DEBUG(("deactivate monitor for cpu=%d", cpu));
 732 }
 733
 734 bx_bool BX_MEM_C::is_monitor(bx_phy_address begin_addr, unsigned len)
 735 {
 736   if (BX_MEM_THIS n_monitors == 0) return 0;
 737
 738   for (int i=0; i<BX_SMP_PROCESSORS;i++) {
 739     if (BX_MEM_THIS monitor_active[i]) {
 740       if (BX_CPU(i)->is_monitor(begin_addr, len))
 741         return 1;
 742     }
 743   }
 744
 745   return 0; // // this is NOT monitored page
 746 }
 747
 748 void BX_MEM_C::check_monitor(bx_phy_address begin_addr, unsigned len)
 749 {
 750   if (BX_MEM_THIS n_monitors == 0) return;
 751
 752   for (int i=0; i<BX_SMP_PROCESSORS;i++) {
 753     if (BX_MEM_THIS monitor_active[i]) {
 754       BX_CPU(i)->check_monitor(begin_addr, len);
 755     }
 756   }
 757 }
 758
 759 #endif