cpu/bit64.cc

   1 /////////////////////////////////////////////////////////////////////////
   2 // $Id: bit64.cc,v 1.19 2008/08/11 18:53:23 sshwarts Exp $
   3 /////////////////////////////////////////////////////////////////////////
   4 //
   5 //  Copyright (C) 2001  MandrakeSoft S.A.
   6 //
   7 //    MandrakeSoft S.A.
   8 //    43, rue d'Aboukir
   9 //    75002 Paris - France
  10 //    http://www.linux-mandrake.com/
  11 //    http://www.mandrakesoft.com/
  12 //
  13 //  This library is free software; you can redistribute it and/or
  14 //  modify it under the terms of the GNU Lesser General Public
  15 //  License as published by the Free Software Foundation; either
  16 //  version 2 of the License, or (at your option) any later version.
  17 //
  18 //  This library is distributed in the hope that it will be useful,
  19 //  but WITHOUT ANY WARRANTY; without even the implied warranty of
  20 //  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  21 //  Lesser General Public License for more details.
  22 //
  23 //  You should have received a copy of the GNU Lesser General Public
  24 //  License along with this library; if not, write to the Free Software
  25 //  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  26 /////////////////////////////////////////////////////////////////////////
  27
  28 #define NEED_CPU_REG_SHORTCUTS 1
  29 #include "bochs.h"
  30 #include "cpu.h"
  31 #define LOG_THIS BX_CPU_THIS_PTR
  32
  33 #if BX_SUPPORT_X86_64
  34
  35 void BX_CPP_AttrRegparmN(1) BX_CPU_C::BSF_GqEqR(bxInstruction_c *i)
  36 {
  37   Bit64u op2_64 = BX_READ_64BIT_REG(i->rm());
  38
  39   if (op2_64 == 0) {
  40     assert_ZF(); /* op1_64 undefined */
  41   }
  42   else {
  43     Bit64u op1_64 = 0;
  44     while ((op2_64 & 0x01) == 0) {
  45       op1_64++;
  46       op2_64 >>= 1;
  47     }
  48
  49     SET_FLAGS_OSZAPC_LOGIC_64(op1_64);
  50     clear_ZF();
  51
  52     /* now write result back to destination */
  53     BX_WRITE_64BIT_REG(i->nnn(), op1_64);
  54   }
  55 }
  56
  57 void BX_CPP_AttrRegparmN(1) BX_CPU_C::BSR_GqEqR(bxInstruction_c *i)
  58 {
  59   Bit64u op2_64 = BX_READ_64BIT_REG(i->rm());
  60
  61   if (op2_64 == 0) {
  62     assert_ZF(); /* op1_64 undefined */
  63   }
  64   else {
  65     Bit64u op1_64 = 63;
  66     while ((op2_64 & BX_CONST64(0x8000000000000000)) == 0) {
  67       op1_64--;
  68       op2_64 <<= 1;
  69     }
  70
  71     SET_FLAGS_OSZAPC_LOGIC_64(op1_64);
  72     clear_ZF();
  73
  74     /* now write result back to destination */
  75     BX_WRITE_64BIT_REG(i->nnn(), op1_64);
  76   }
  77 }
  78
  79 void BX_CPP_AttrRegparmN(1) BX_CPU_C::BT_EqGqM(bxInstruction_c *i)
  80 {
  81   bx_address op1_addr;
  82   Bit64u op1_64, op2_64;
  83   Bit64s displacement64;
  84   Bit64u index;
  85
  86   bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
  87
  88   op2_64 = BX_READ_64BIT_REG(i->nnn());
  89   index = op2_64 & 0x3f;
  90   displacement64 = ((Bit64s) (op2_64 & BX_CONST64(0xffffffffffffffc0))) / 64;
  91   op1_addr = eaddr + 8 * displacement64;
  92   if (! i->as64L())
  93     op1_addr = (Bit32u) op1_addr;
  94
  95   /* pointer, segment address pair */
  96   op1_64 = read_virtual_qword_64(i->seg(), op1_addr);
  97
  98   set_CF((op1_64 >> index) & 0x01);
  99 }
 100
 101 void BX_CPP_AttrRegparmN(1) BX_CPU_C::BT_EqGqR(bxInstruction_c *i)
 102 {
 103   Bit64u op1_64, op2_64;
 104
 105   op1_64 = BX_READ_64BIT_REG(i->rm());
 106   op2_64 = BX_READ_64BIT_REG(i->nnn());
 107   op2_64 &= 0x3f;
 108   set_CF((op1_64 >> op2_64) & 0x01);
 109 }
 110
 111 void BX_CPP_AttrRegparmN(1) BX_CPU_C::BTS_EqGqM(bxInstruction_c *i)
 112 {
 113   bx_address op1_addr;
 114   Bit64u op1_64, op2_64, index;
 115   Bit64s displacement64;
 116   bx_bool bit_i;
 117
 118   bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
 119
 120   op2_64 = BX_READ_64BIT_REG(i->nnn());
 121   index = op2_64 & 0x3f;
 122   displacement64 = ((Bit64s) (op2_64 & BX_CONST64(0xffffffffffffffc0))) / 64;
 123   op1_addr = eaddr + 8 * displacement64;
 124   if (! i->as64L())
 125     op1_addr = (Bit32u) op1_addr;
 126
 127   /* pointer, segment address pair */
 128   op1_64 = read_RMW_virtual_qword_64(i->seg(), op1_addr);
 129   bit_i = (op1_64 >> index) & 0x01;
 130   op1_64 |= (((Bit64u) 1) << index);
 131   write_RMW_virtual_qword(op1_64);
 132
 133   set_CF(bit_i);
 134 }
 135
 136 void BX_CPP_AttrRegparmN(1) BX_CPU_C::BTS_EqGqR(bxInstruction_c *i)
 137 {
 138   Bit64u op1_64, op2_64;
 139
 140   op1_64 = BX_READ_64BIT_REG(i->rm());
 141   op2_64 = BX_READ_64BIT_REG(i->nnn());
 142   op2_64 &= 0x3f;
 143   set_CF((op1_64 >> op2_64) & 0x01);
 144   op1_64 |= (((Bit64u) 1) << op2_64);
 145
 146   /* now write result back to the destination */
 147   BX_WRITE_64BIT_REG(i->rm(), op1_64);
 148 }
 149
 150 void BX_CPP_AttrRegparmN(1) BX_CPU_C::BTR_EqGqM(bxInstruction_c *i)
 151 {
 152   bx_address op1_addr;
 153   Bit64u op1_64, op2_64, index;
 154   Bit64s displacement64;
 155
 156   bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
 157
 158   op2_64 = BX_READ_64BIT_REG(i->nnn());
 159   index = op2_64 & 0x3f;
 160   displacement64 = ((Bit64s) (op2_64 & BX_CONST64(0xffffffffffffffc0))) / 64;
 161   op1_addr = eaddr + 8 * displacement64;
 162   if (! i->as64L())
 163     op1_addr = (Bit32u) op1_addr;
 164
 165   /* pointer, segment address pair */
 166   op1_64 = read_RMW_virtual_qword_64(i->seg(), op1_addr);
 167   bx_bool temp_cf = (op1_64 >> index) & 0x01;
 168   op1_64 &= ~(((Bit64u) 1) << index);
 169   /* now write back to destination */
 170   write_RMW_virtual_qword(op1_64);
 171
 172   set_CF(temp_cf);
 173 }
 174
 175 void BX_CPP_AttrRegparmN(1) BX_CPU_C::BTR_EqGqR(bxInstruction_c *i)
 176 {
 177   Bit64u op1_64, op2_64;
 178
 179   op1_64 = BX_READ_64BIT_REG(i->rm());
 180   op2_64 = BX_READ_64BIT_REG(i->nnn());
 181   op2_64 &= 0x3f;
 182   set_CF((op1_64 >> op2_64) & 0x01);
 183   op1_64 &= ~(((Bit64u) 1) << op2_64);
 184
 185   /* now write result back to the destination */
 186   BX_WRITE_64BIT_REG(i->rm(), op1_64);
 187 }
 188
 189 void BX_CPP_AttrRegparmN(1) BX_CPU_C::BTC_EqGqM(bxInstruction_c *i)
 190 {
 191   bx_address op1_addr;
 192   Bit64u op1_64, op2_64;
 193   Bit64s displacement64;
 194   Bit64u index;
 195
 196   bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
 197
 198   op2_64 = BX_READ_64BIT_REG(i->nnn());
 199   index = op2_64 & 0x3f;
 200   displacement64 = ((Bit64s) (op2_64 & BX_CONST64(0xffffffffffffffc0))) / 64;
 201   op1_addr = eaddr + 8 * displacement64;
 202   if (! i->as64L())
 203     op1_addr = (Bit32u) op1_addr;
 204
 205   op1_64 = read_RMW_virtual_qword_64(i->seg(), op1_addr);
 206   bx_bool temp_CF = (op1_64 >> index) & 0x01;
 207   op1_64 ^= (((Bit64u) 1) << index);  /* toggle bit */
 208   set_CF(temp_CF);
 209
 210   write_RMW_virtual_qword(op1_64);
 211 }
 212
 213 void BX_CPP_AttrRegparmN(1) BX_CPU_C::BTC_EqGqR(bxInstruction_c *i)
 214 {
 215   Bit64u op1_64, op2_64;
 216
 217   op1_64 = BX_READ_64BIT_REG(i->rm());
 218   op2_64 = BX_READ_64BIT_REG(i->nnn());
 219   op2_64 &= 0x3f;
 220
 221   bx_bool temp_CF = (op1_64 >> op2_64) & 0x01;
 222   op1_64 ^= (((Bit64u) 1) << op2_64);  /* toggle bit */
 223   set_CF(temp_CF);
 224
 225   BX_WRITE_64BIT_REG(i->rm(), op1_64);
 226 }
 227
 228 void BX_CPP_AttrRegparmN(1) BX_CPU_C::BT_EqIbM(bxInstruction_c *i)
 229 {
 230   bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
 231
 232   Bit64u op1_64 = read_virtual_qword_64(i->seg(), eaddr);
 233   Bit8u  op2_8  = i->Ib() & 0x3f;
 234
 235   set_CF((op1_64 >> op2_8) & 0x01);
 236 }
 237
 238 void BX_CPP_AttrRegparmN(1) BX_CPU_C::BT_EqIbR(bxInstruction_c *i)
 239 {
 240   Bit64u op1_64 = BX_READ_64BIT_REG(i->rm());
 241   Bit8u  op2_8  = i->Ib() & 0x3f;
 242
 243   set_CF((op1_64 >> op2_8) & 0x01);
 244 }
 245
 246 void BX_CPP_AttrRegparmN(1) BX_CPU_C::BTS_EqIbM(bxInstruction_c *i)
 247 {
 248   Bit8u op2_8 = i->Ib() & 0x3f;
 249
 250   bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
 251
 252   Bit64u op1_64 = read_RMW_virtual_qword_64(i->seg(), eaddr);
 253   bx_bool temp_CF = (op1_64 >> op2_8) & 0x01;
 254   op1_64 |= (((Bit64u) 1) << op2_8);
 255   write_RMW_virtual_qword(op1_64);
 256
 257   set_CF(temp_CF);
 258 }
 259
 260 void BX_CPP_AttrRegparmN(1) BX_CPU_C::BTS_EqIbR(bxInstruction_c *i)
 261 {
 262   Bit8u op2_8 = i->Ib() & 0x3f;
 263
 264   Bit64u op1_64 = BX_READ_64BIT_REG(i->rm());
 265   bx_bool temp_CF = (op1_64 >> op2_8) & 0x01;
 266   op1_64 |= (((Bit64u) 1) << op2_8);
 267   BX_WRITE_64BIT_REG(i->rm(), op1_64);
 268
 269   set_CF(temp_CF);
 270 }
 271
 272 void BX_CPP_AttrRegparmN(1) BX_CPU_C::BTC_EqIbM(bxInstruction_c *i)
 273 {
 274   Bit8u op2_8 = i->Ib() & 0x3f;
 275
 276   bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
 277
 278   Bit64u op1_64 = read_RMW_virtual_qword_64(i->seg(), eaddr);
 279   bx_bool temp_CF = (op1_64 >> op2_8) & 0x01;
 280   op1_64 ^= (((Bit64u) 1) << op2_8);  /* toggle bit */
 281   write_RMW_virtual_qword(op1_64);
 282
 283   set_CF(temp_CF);
 284 }
 285
 286 void BX_CPP_AttrRegparmN(1) BX_CPU_C::BTC_EqIbR(bxInstruction_c *i)
 287 {
 288   Bit8u op2_8 = i->Ib() & 0x3f;
 289
 290   Bit64u op1_64 = BX_READ_64BIT_REG(i->rm());
 291   bx_bool temp_CF = (op1_64 >> op2_8) & 0x01;
 292   op1_64 ^= (((Bit64u) 1) << op2_8);  /* toggle bit */
 293   BX_WRITE_64BIT_REG(i->rm(), op1_64);
 294
 295   set_CF(temp_CF);
 296 }
 297
 298 void BX_CPP_AttrRegparmN(1) BX_CPU_C::BTR_EqIbM(bxInstruction_c *i)
 299 {
 300   Bit8u op2_8 = i->Ib() & 0x3f;
 301
 302   bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
 303
 304   Bit64u op1_64 = read_RMW_virtual_qword_64(i->seg(), eaddr);
 305   bx_bool temp_CF = (op1_64 >> op2_8) & 0x01;
 306   op1_64 &= ~(((Bit64u) 1) << op2_8);
 307   write_RMW_virtual_qword(op1_64);
 308
 309   set_CF(temp_CF);
 310 }
 311
 312 void BX_CPP_AttrRegparmN(1) BX_CPU_C::BTR_EqIbR(bxInstruction_c *i)
 313 {
 314   Bit8u op2_8 = i->Ib() & 0x3f;
 315
 316   Bit64u op1_64 = BX_READ_64BIT_REG(i->rm());
 317   bx_bool temp_CF = (op1_64 >> op2_8) & 0x01;
 318   op1_64 &= ~(((Bit64u) 1) << op2_8);
 319   BX_WRITE_64BIT_REG(i->rm(), op1_64);
 320
 321   set_CF(temp_CF);
 322 }
 323
 324 /* 0F B8 */
 325 void BX_CPP_AttrRegparmN(1) BX_CPU_C::POPCNT_GqEqR(bxInstruction_c *i)
 326 {
 327 #if BX_SUPPORT_POPCNT || (BX_SUPPORT_SSE > 4) || (BX_SUPPORT_SSE >= 4 && BX_SUPPORT_SSE_EXTENSION > 0)
 328   Bit64u op2_64 = BX_READ_64BIT_REG(i->rm());
 329
 330   Bit64u op1_64 = 0;
 331   while (op2_64 != 0) {
 332     if (op2_64 & 1) op1_64++;
 333     op2_64 >>= 1;
 334   }
 335
 336   Bit32u flags = op1_64 ? 0 : EFlagsZFMask;
 337   setEFlagsOSZAPC(flags);
 338
 339   /* now write result back to destination */
 340   BX_WRITE_64BIT_REG(i->nnn(), op1_64);
 341 #else
 342   BX_INFO(("POPCNT_GqEq: required POPCNT support, use --enable-popcnt option"));
 343   exception(BX_UD_EXCEPTION, 0, 0);
 344 #endif
 345 }
 346
 347 #endif // BX_SUPPORT_X86_64