iodev/serial.h

   1 /////////////////////////////////////////////////////////////////////////
   2 // $Id: serial.h,v 1.34 2008/05/22 08:13:22 vruppert Exp $
   3 /////////////////////////////////////////////////////////////////////////
   4 //
   5 //  Copyright (C) 2004  MandrakeSoft S.A.
   6 //
   7 //    MandrakeSoft S.A.
   8 //    43, rue d'Aboukir
   9 //    75002 Paris - France
  10 //    http://www.linux-mandrake.com/
  11 //    http://www.mandrakesoft.com/
  12 //
  13 //  This library is free software; you can redistribute it and/or
  14 //  modify it under the terms of the GNU Lesser General Public
  15 //  License as published by the Free Software Foundation; either
  16 //  version 2 of the License, or (at your option) any later version.
  17 //
  18 //  This library is distributed in the hope that it will be useful,
  19 //  but WITHOUT ANY WARRANTY; without even the implied warranty of
  20 //  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  21 //  Lesser General Public License for more details.
  22 //
  23 //  You should have received a copy of the GNU Lesser General Public
  24 //  License along with this library; if not, write to the Free Software
  25 //  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  26
  27
  28 #ifndef BX_IODEV_SERIAL_H
  29 #define BX_IODEV_SERIAL_H
  30
  31 // Peter Grehan (grehan@iprg.nokia.com) coded most of this
  32 // serial emulation.
  33
  34 #if BX_USE_SER_SMF
  35 #  define BX_SER_SMF  static
  36 #  define BX_SER_THIS theSerialDevice->
  37 #else
  38 #  define BX_SER_SMF
  39 #  define BX_SER_THIS this->
  40 #endif
  41
  42 #if defined(WIN32)
  43 #define SERIAL_ENABLE
  44 #endif
  45
  46 #if defined(__NetBSD__) || defined(__FreeBSD__) || defined(__OpenBSD__) || defined(__linux__) || defined(__GNU__) || defined(__GLIBC__) || defined(__APPLE__) || defined(__sun__)
  47 #define SERIAL_ENABLE
  48 extern "C" {
  49 #include <termios.h>
  50 };
  51 #endif
  52
  53 #define BX_SERIAL_MAXDEV   4
  54
  55 #define  BX_PC_CLOCK_XTL   1843200.0
  56
  57 #define  BX_SER_RXIDLE  0
  58 #define  BX_SER_RXPOLL  1
  59 #define  BX_SER_RXWAIT  2
  60
  61 #define BX_SER_THR  0
  62 #define BX_SER_RBR  0
  63 #define BX_SER_IER  1
  64 #define BX_SER_IIR  2
  65 #define BX_SER_FCR  2
  66 #define BX_SER_LCR  3
  67 #define BX_SER_MCR  4
  68 #define BX_SER_LSR  5
  69 #define BX_SER_MSR  6
  70 #define BX_SER_SCR  7
  71
  72 #define BX_SER_MODE_NULL  0
  73 #define BX_SER_MODE_FILE  1
  74 #define BX_SER_MODE_TERM  2
  75 #define BX_SER_MODE_RAW   3
  76 #define BX_SER_MODE_MOUSE 4
  77 #define BX_SER_MODE_SOCKET 5
  78 #define BX_SER_MODE_PIPE  6
  79
  80 enum {
  81   BX_SER_INT_IER,
  82   BX_SER_INT_RXDATA,
  83   BX_SER_INT_TXHOLD,
  84   BX_SER_INT_RXLSTAT,
  85   BX_SER_INT_MODSTAT,
  86   BX_SER_INT_FIFO
  87 };
  88
  89 #if USE_RAW_SERIAL
  90 class serial_raw;
  91 #endif
  92
  93 typedef struct {
  94   /*
  95    * UART internal state
  96    */
  97   bx_bool  ls_interrupt;
  98   bx_bool  ms_interrupt;
  99   bx_bool  rx_interrupt;
 100   bx_bool  tx_interrupt;
 101   bx_bool  fifo_interrupt;
 102   bx_bool  ls_ipending;
 103   bx_bool  ms_ipending;
 104   bx_bool  rx_ipending;
 105   bx_bool  fifo_ipending;
 106
 107   Bit8u IRQ;
 108
 109   Bit8u rx_fifo_end;
 110   Bit8u tx_fifo_end;
 111
 112   int  baudrate;
 113   int  tx_timer_index;
 114
 115   int  rx_pollstate;
 116   int  rx_timer_index;
 117   int  fifo_timer_index;
 118
 119   int io_mode;
 120   int tty_id;
 121   int socket_id;
 122   FILE *output;
 123 #ifdef WIN32
 124   HANDLE pipe;
 125 #endif
 126
 127 #if USE_RAW_SERIAL
 128   serial_raw* raw;
 129 #endif
 130 #if defined(SERIAL_ENABLE) && !defined(WIN32)
 131   struct termios term_orig, term_new;
 132 #endif
 133
 134   /*
 135    * Register definitions
 136    */
 137   Bit8u     rxbuffer;     /* receiver buffer register (r/o) */
 138   Bit8u     thrbuffer;    /* transmit holding register (w/o) */
 139   /* Interrupt Enable Register */
 140   struct {
 141     bx_bool    rxdata_enable;      /* 1=enable receive data interrupts */
 142     bx_bool    txhold_enable;      /* 1=enable tx. holding reg. empty ints */
 143     bx_bool    rxlstat_enable;     /* 1=enable rx line status interrupts */
 144     bx_bool    modstat_enable;     /* 1=enable modem status interrupts */
 145   } int_enable;
 146   /* Interrupt Identification Register (r/o) */
 147   struct {
 148     bx_bool    ipending;           /* 0=interrupt pending */
 149     Bit8u      int_ID;             /* 3-bit interrupt ID */
 150   } int_ident;
 151   /* FIFO Control Register (w/o) */
 152   struct {
 153     bx_bool    enable;             /* 1=enable tx and rx FIFOs */
 154     Bit8u      rxtrigger;          /* 2-bit code for rx fifo trigger level */
 155   } fifo_cntl;
 156   /* Line Control Register (r/w) */
 157   struct {
 158     Bit8u      wordlen_sel;        /* 2-bit code for char length */
 159     bx_bool    stopbits;           /* select stop bit len */
 160     bx_bool    parity_enable;      /* ... */
 161     bx_bool    evenparity_sel;     /* ... */
 162     bx_bool    stick_parity;       /* ... */
 163     bx_bool    break_cntl;         /* 1=send break signal */
 164     bx_bool    dlab;               /* divisor latch access bit */
 165   } line_cntl;
 166   /* MODEM Control Register (r/w) */
 167   struct {
 168     bx_bool    dtr;                /* DTR output value */
 169     bx_bool    rts;                /* RTS output value */
 170     bx_bool    out1;               /* OUTPUT1 value */
 171     bx_bool    out2;               /* OUTPUT2 value */
 172     bx_bool    local_loopback;     /* 1=loopback mode */
 173   } modem_cntl;
 174   /* Line Status Register (r/w) */
 175   struct {
 176     bx_bool    rxdata_ready;       /* 1=receiver data ready */
 177     bx_bool    overrun_error;      /* 1=receive overrun detected */
 178     bx_bool    parity_error;       /* 1=rx char has a bad parity bit */
 179     bx_bool    framing_error;      /* 1=no stop bit detected for rx char */
 180     bx_bool    break_int;          /* 1=break signal detected */
 181     bx_bool    thr_empty;          /* 1=tx hold register (or fifo) is empty */
 182     bx_bool    tsr_empty;          /* 1=shift reg and hold reg empty */
 183     bx_bool    fifo_error;         /* 1=at least 1 err condition in fifo */
 184   } line_status;
 185   /* Modem Status Register (r/w) */
 186   struct {
 187     bx_bool    delta_cts;          /* 1=CTS changed since last read */
 188     bx_bool    delta_dsr;          /* 1=DSR changed since last read */
 189     bx_bool    ri_trailedge;       /* 1=RI moved from low->high */
 190     bx_bool    delta_dcd;          /* 1=CD changed since last read */
 191     bx_bool    cts;                /* CTS input value */
 192     bx_bool    dsr;                /* DSR input value */
 193     bx_bool    ri;                 /* RI input value */
 194     bx_bool    dcd;                /* DCD input value */
 195   } modem_status;
 196
 197   Bit8u  scratch;       /* Scratch Register (r/w) */
 198   Bit8u  tsrbuffer;     /* transmit shift register (internal) */
 199   Bit8u  rx_fifo[16];   /* receive FIFO (internal) */
 200   Bit8u  tx_fifo[16];   /* transmit FIFO (internal) */
 201   Bit8u  divisor_lsb;   /* Divisor latch, least-sig. byte */
 202   Bit8u  divisor_msb;   /* Divisor latch, most-sig. byte */
 203 } bx_serial_t;
 204
 205
 206
 207 class bx_serial_c : public bx_serial_stub_c {
 208 public:
 209   bx_serial_c();
 210   virtual ~bx_serial_c();
 211   virtual void init(void);
 212   virtual void reset(unsigned type);
 213   virtual void serial_mouse_enq(int delta_x, int delta_y, int delta_z, unsigned button_state);
 214   virtual void register_state(void);
 215
 216 private:
 217   bx_serial_t s[BX_SERIAL_MAXDEV];
 218
 219   int   detect_mouse;
 220   int   mouse_port;
 221   int   mouse_type;
 222   int   mouse_delayed_dx;
 223   int   mouse_delayed_dy;
 224   int   mouse_delayed_dz;
 225   struct {
 226     int     num_elements;
 227     Bit8u   buffer[BX_MOUSE_BUFF_SIZE];
 228     int     head;
 229   } mouse_internal_buffer;
 230
 231   static void lower_interrupt(Bit8u port);
 232   static void raise_interrupt(Bit8u port, int type);
 233
 234   static void rx_fifo_enq(Bit8u port, Bit8u data);
 235
 236   static void tx_timer_handler(void *);
 237   BX_SER_SMF void tx_timer(void);
 238
 239   static void rx_timer_handler(void *);
 240   BX_SER_SMF void rx_timer(void);
 241
 242   static void fifo_timer_handler(void *);
 243   BX_SER_SMF void fifo_timer(void);
 244
 245   static Bit32u read_handler(void *this_ptr, Bit32u address, unsigned io_len);
 246   static void   write_handler(void *this_ptr, Bit32u address, Bit32u value, unsigned io_len);
 247 #if !BX_USE_SER_SMF
 248   Bit32u read(Bit32u address, unsigned io_len);
 249   void   write(Bit32u address, Bit32u value, unsigned io_len);
 250 #endif
 251 };
 252
 253 #endif