cpu/bit16.cc

   1 /////////////////////////////////////////////////////////////////////////
   2 // $Id: bit16.cc,v 1.15 2008/08/11 18:53:23 sshwarts Exp $
   3 /////////////////////////////////////////////////////////////////////////
   4 //
   5 //  Copyright (C) 2001  MandrakeSoft S.A.
   6 //
   7 //    MandrakeSoft S.A.
   8 //    43, rue d'Aboukir
   9 //    75002 Paris - France
  10 //    http://www.linux-mandrake.com/
  11 //    http://www.mandrakesoft.com/
  12 //
  13 //  This library is free software; you can redistribute it and/or
  14 //  modify it under the terms of the GNU Lesser General Public
  15 //  License as published by the Free Software Foundation; either
  16 //  version 2 of the License, or (at your option) any later version.
  17 //
  18 //  This library is distributed in the hope that it will be useful,
  19 //  but WITHOUT ANY WARRANTY; without even the implied warranty of
  20 //  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  21 //  Lesser General Public License for more details.
  22 //
  23 //  You should have received a copy of the GNU Lesser General Public
  24 //  License along with this library; if not, write to the Free Software
  25 //  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  26 /////////////////////////////////////////////////////////////////////////
  27
  28 #define NEED_CPU_REG_SHORTCUTS 1
  29 #include "bochs.h"
  30 #include "cpu.h"
  31 #define LOG_THIS BX_CPU_THIS_PTR
  32
  33 #if BX_CPU_LEVEL >= 3
  34
  35 void BX_CPP_AttrRegparmN(1) BX_CPU_C::BSF_GwEwR(bxInstruction_c *i)
  36 {
  37   Bit16u op2_16 = BX_READ_16BIT_REG(i->rm());
  38
  39   if (op2_16 == 0) {
  40     assert_ZF(); /* op1_16 undefined */
  41   }
  42   else {
  43     Bit16u op1_16 = 0;
  44     while ((op2_16 & 0x01) == 0) {
  45       op1_16++;
  46       op2_16 >>= 1;
  47     }
  48
  49     SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
  50     clear_ZF();
  51
  52     /* now write result back to destination */
  53     BX_WRITE_16BIT_REG(i->nnn(), op1_16);
  54   }
  55 }
  56
  57 void BX_CPP_AttrRegparmN(1) BX_CPU_C::BSR_GwEwR(bxInstruction_c *i)
  58 {
  59   Bit16u op2_16 = BX_READ_16BIT_REG(i->rm());
  60
  61   if (op2_16 == 0) {
  62     assert_ZF(); /* op1_16 undefined */
  63   }
  64   else {
  65     Bit16u op1_16 = 15;
  66     while ((op2_16 & 0x8000) == 0) {
  67       op1_16--;
  68       op2_16 <<= 1;
  69     }
  70
  71     SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
  72     clear_ZF();
  73
  74     /* now write result back to destination */
  75     BX_WRITE_16BIT_REG(i->nnn(), op1_16);
  76   }
  77 }
  78
  79 void BX_CPP_AttrRegparmN(1) BX_CPU_C::BT_EwGwM(bxInstruction_c *i)
  80 {
  81   bx_address op1_addr;
  82   Bit16u op1_16, op2_16, index;
  83   Bit32s displacement32;
  84
  85   bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
  86
  87   op2_16 = BX_READ_16BIT_REG(i->nnn());
  88   index = op2_16 & 0x0f;
  89   displacement32 = ((Bit16s) (op2_16&0xfff0)) / 16;
  90   op1_addr = eaddr + 2 * displacement32;
  91   if (! i->as32L())
  92     op1_addr = (Bit16u) op1_addr;
  93 #if BX_SUPPORT_X86_64
  94   else if (! i->as64L())
  95     op1_addr = (Bit32u) op1_addr;
  96 #endif
  97
  98   /* pointer, segment address pair */
  99   op1_16 = read_virtual_word(i->seg(), op1_addr);
 100
 101   set_CF((op1_16 >> index) & 0x01);
 102 }
 103
 104 void BX_CPP_AttrRegparmN(1) BX_CPU_C::BT_EwGwR(bxInstruction_c *i)
 105 {
 106   Bit16u op1_16, op2_16;
 107
 108   op1_16 = BX_READ_16BIT_REG(i->rm());
 109   op2_16 = BX_READ_16BIT_REG(i->nnn());
 110   op2_16 &= 0x0f;
 111   set_CF((op1_16 >> op2_16) & 0x01);
 112 }
 113
 114 void BX_CPP_AttrRegparmN(1) BX_CPU_C::BTS_EwGwM(bxInstruction_c *i)
 115 {
 116   bx_address op1_addr;
 117   Bit16u op1_16, op2_16, index;
 118   Bit32s displacement32;
 119   bx_bool bit_i;
 120
 121   bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
 122
 123   op2_16 = BX_READ_16BIT_REG(i->nnn());
 124   index = op2_16 & 0x0f;
 125   displacement32 = ((Bit16s) (op2_16 & 0xfff0)) / 16;
 126   op1_addr = eaddr + 2 * displacement32;
 127   if (! i->as32L())
 128     op1_addr = (Bit16u) op1_addr;
 129 #if BX_SUPPORT_X86_64
 130   else if (! i->as64L())
 131     op1_addr = (Bit32u) op1_addr;
 132 #endif
 133
 134   /* pointer, segment address pair */
 135   op1_16 = read_RMW_virtual_word(i->seg(), op1_addr);
 136   bit_i = (op1_16 >> index) & 0x01;
 137   op1_16 |= (((Bit16u) 1) << index);
 138   write_RMW_virtual_word(op1_16);
 139
 140   set_CF(bit_i);
 141 }
 142
 143 void BX_CPP_AttrRegparmN(1) BX_CPU_C::BTS_EwGwR(bxInstruction_c *i)
 144 {
 145   Bit16u op1_16, op2_16;
 146
 147   op1_16 = BX_READ_16BIT_REG(i->rm());
 148   op2_16 = BX_READ_16BIT_REG(i->nnn());
 149   op2_16 &= 0x0f;
 150   set_CF((op1_16 >> op2_16) & 0x01);
 151   op1_16 |= (((Bit16u) 1) << op2_16);
 152
 153   /* now write result back to the destination */
 154   BX_WRITE_16BIT_REG(i->rm(), op1_16);
 155 }
 156
 157 void BX_CPP_AttrRegparmN(1) BX_CPU_C::BTR_EwGwM(bxInstruction_c *i)
 158 {
 159   bx_address op1_addr;
 160   Bit16u op1_16, op2_16, index;
 161   Bit32s displacement32;
 162
 163   bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
 164
 165   op2_16 = BX_READ_16BIT_REG(i->nnn());
 166   index = op2_16 & 0x0f;
 167   displacement32 = ((Bit16s) (op2_16&0xfff0)) / 16;
 168   op1_addr = eaddr + 2 * displacement32;
 169   if (! i->as32L())
 170     op1_addr = (Bit16u) op1_addr;
 171 #if BX_SUPPORT_X86_64
 172   else if (! i->as64L())
 173     op1_addr = (Bit32u) op1_addr;
 174 #endif
 175
 176   /* pointer, segment address pair */
 177   op1_16 = read_RMW_virtual_word(i->seg(), op1_addr);
 178   bx_bool temp_cf = (op1_16 >> index) & 0x01;
 179   op1_16 &= ~(((Bit16u) 1) << index);
 180
 181   /* now write back to destination */
 182   write_RMW_virtual_word(op1_16);
 183
 184   set_CF(temp_cf);
 185 }
 186
 187 void BX_CPP_AttrRegparmN(1) BX_CPU_C::BTR_EwGwR(bxInstruction_c *i)
 188 {
 189   Bit16u op1_16, op2_16;
 190
 191   op1_16 = BX_READ_16BIT_REG(i->rm());
 192   op2_16 = BX_READ_16BIT_REG(i->nnn());
 193   op2_16 &= 0x0f;
 194   set_CF((op1_16 >> op2_16) & 0x01);
 195   op1_16 &= ~(((Bit16u) 1) << op2_16);
 196
 197   /* now write result back to the destination */
 198   BX_WRITE_16BIT_REG(i->rm(), op1_16);
 199 }
 200
 201 void BX_CPP_AttrRegparmN(1) BX_CPU_C::BTC_EwGwM(bxInstruction_c *i)
 202 {
 203   bx_address op1_addr;
 204   Bit16u op1_16, op2_16, index_16;
 205   Bit16s displacement16;
 206
 207   bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
 208
 209   op2_16 = BX_READ_16BIT_REG(i->nnn());
 210   index_16 = op2_16 & 0x0f;
 211   displacement16 = ((Bit16s) (op2_16 & 0xfff0)) / 16;
 212   op1_addr = eaddr + 2 * displacement16;
 213   if (! i->as32L())
 214     op1_addr = (Bit16u) op1_addr;
 215 #if BX_SUPPORT_X86_64
 216   else if (! i->as64L())
 217     op1_addr = (Bit32u) op1_addr;
 218 #endif
 219
 220   op1_16 = read_RMW_virtual_word(i->seg(), op1_addr);
 221   bx_bool temp_CF = (op1_16 >> index_16) & 0x01;
 222   op1_16 ^= (((Bit16u) 1) << index_16);  /* toggle bit */
 223   write_RMW_virtual_word(op1_16);
 224
 225   set_CF(temp_CF);
 226 }
 227
 228 void BX_CPP_AttrRegparmN(1) BX_CPU_C::BTC_EwGwR(bxInstruction_c *i)
 229 {
 230   Bit16u op1_16, op2_16;
 231
 232   op1_16 = BX_READ_16BIT_REG(i->rm());
 233   op2_16 = BX_READ_16BIT_REG(i->nnn());
 234   op2_16 &= 0x0f;
 235
 236   bx_bool temp_CF = (op1_16 >> op2_16) & 0x01;
 237   op1_16 ^= (((Bit16u) 1) << op2_16);  /* toggle bit */
 238   BX_WRITE_16BIT_REG(i->rm(), op1_16);
 239
 240   set_CF(temp_CF);
 241 }
 242
 243 void BX_CPP_AttrRegparmN(1) BX_CPU_C::BT_EwIbM(bxInstruction_c *i)
 244 {
 245   bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
 246
 247   Bit16u op1_16 = read_virtual_word(i->seg(), eaddr);
 248   Bit8u  op2_8  = i->Ib() & 0xf;
 249
 250   set_CF((op1_16 >> op2_8) & 0x01);
 251 }
 252
 253 void BX_CPP_AttrRegparmN(1) BX_CPU_C::BT_EwIbR(bxInstruction_c *i)
 254 {
 255   Bit16u op1_16 = BX_READ_16BIT_REG(i->rm());
 256   Bit8u  op2_8  = i->Ib() & 0xf;
 257
 258   set_CF((op1_16 >> op2_8) & 0x01);
 259 }
 260
 261 void BX_CPP_AttrRegparmN(1) BX_CPU_C::BTS_EwIbM(bxInstruction_c *i)
 262 {
 263   Bit8u op2_8 = i->Ib() & 0xf;
 264
 265   bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
 266
 267   Bit16u op1_16 = read_RMW_virtual_word(i->seg(), eaddr);
 268   bx_bool temp_CF = (op1_16 >> op2_8) & 0x01;
 269   op1_16 |= (((Bit16u) 1) << op2_8);
 270   write_RMW_virtual_word(op1_16);
 271
 272   set_CF(temp_CF);
 273 }
 274
 275 void BX_CPP_AttrRegparmN(1) BX_CPU_C::BTS_EwIbR(bxInstruction_c *i)
 276 {
 277   Bit8u op2_8 = i->Ib() & 0xf;
 278
 279   Bit16u op1_16 = BX_READ_16BIT_REG(i->rm());
 280   bx_bool temp_CF = (op1_16 >> op2_8) & 0x01;
 281   op1_16 |= (((Bit16u) 1) << op2_8);
 282   BX_WRITE_16BIT_REG(i->rm(), op1_16);
 283
 284   set_CF(temp_CF);
 285 }
 286
 287 void BX_CPP_AttrRegparmN(1) BX_CPU_C::BTC_EwIbM(bxInstruction_c *i)
 288 {
 289   Bit8u op2_8 = i->Ib() & 0xf;
 290
 291   bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
 292
 293   Bit16u op1_16 = read_RMW_virtual_word(i->seg(), eaddr);
 294   bx_bool temp_CF = (op1_16 >> op2_8) & 0x01;
 295   op1_16 ^= (((Bit16u) 1) << op2_8);  /* toggle bit */
 296   write_RMW_virtual_word(op1_16);
 297
 298   set_CF(temp_CF);
 299 }
 300
 301 void BX_CPP_AttrRegparmN(1) BX_CPU_C::BTC_EwIbR(bxInstruction_c *i)
 302 {
 303   Bit8u op2_8 = i->Ib() & 0xf;
 304
 305   Bit16u op1_16 = BX_READ_16BIT_REG(i->rm());
 306   bx_bool temp_CF = (op1_16 >> op2_8) & 0x01;
 307   op1_16 ^= (((Bit16u) 1) << op2_8);  /* toggle bit */
 308   BX_WRITE_16BIT_REG(i->rm(), op1_16);
 309
 310   set_CF(temp_CF);
 311 }
 312
 313 void BX_CPP_AttrRegparmN(1) BX_CPU_C::BTR_EwIbM(bxInstruction_c *i)
 314 {
 315   Bit8u op2_8 = i->Ib() & 0xf;
 316
 317   bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
 318
 319   Bit16u op1_16 = read_RMW_virtual_word(i->seg(), eaddr);
 320   bx_bool temp_CF = (op1_16 >> op2_8) & 0x01;
 321   op1_16 &= ~(((Bit16u) 1) << op2_8);
 322   write_RMW_virtual_word(op1_16);
 323
 324   set_CF(temp_CF);
 325 }
 326
 327 void BX_CPP_AttrRegparmN(1) BX_CPU_C::BTR_EwIbR(bxInstruction_c *i)
 328 {
 329   Bit8u op2_8 = i->Ib() & 0xf;
 330
 331   Bit16u op1_16 = BX_READ_16BIT_REG(i->rm());
 332   bx_bool temp_CF = (op1_16 >> op2_8) & 0x01;
 333   op1_16 &= ~(((Bit16u) 1) << op2_8);
 334   BX_WRITE_16BIT_REG(i->rm(), op1_16);
 335
 336   set_CF(temp_CF);
 337 }
 338
 339 /* 0F B8 */
 340 void BX_CPP_AttrRegparmN(1) BX_CPU_C::POPCNT_GwEwR(bxInstruction_c *i)
 341 {
 342 #if BX_SUPPORT_POPCNT || (BX_SUPPORT_SSE > 4) || (BX_SUPPORT_SSE >= 4 && BX_SUPPORT_SSE_EXTENSION > 0)
 343   Bit16u op2_16 = BX_READ_16BIT_REG(i->rm());
 344
 345   Bit16u op1_16 = 0;
 346   while (op2_16 != 0) {
 347     if (op2_16 & 1) op1_16++;
 348     op2_16 >>= 1;
 349   }
 350
 351   Bit32u flags = op1_16 ? 0 : EFlagsZFMask;
 352   setEFlagsOSZAPC(flags);
 353
 354   /* now write result back to destination */
 355   BX_WRITE_16BIT_REG(i->nnn(), op1_16);
 356 #else
 357   BX_INFO(("POPCNT_GwEw: required POPCNT support, use --enable-popcnt option"));
 358   exception(BX_UD_EXCEPTION, 0, 0);
 359 #endif
 360 }
 361
 362 #endif // (BX_CPU_LEVEL >= 3)