cpu/crc32.cc

   1 /////////////////////////////////////////////////////////////////////////
   2 // $Id: crc32.cc,v 1.1 2008/08/12 04:57:59 sshwarts Exp $
   3 /////////////////////////////////////////////////////////////////////////
   4 //
   5 //   Copyright (c) 2008 Stanislav Shwartsman
   6 //          Written by Stanislav Shwartsman [sshwarts at sourceforge net]
   7 //
   8 //  This library is free software; you can redistribute it and/or
   9 //  modify it under the terms of the GNU Lesser General Public
  10 //  License as published by the Free Software Foundation; either
  11 //  version 2 of the License, or (at your option) any later version.
  12 //
  13 //  This library is distributed in the hope that it will be useful,
  14 //  but WITHOUT ANY WARRANTY; without even the implied warranty of
  15 //  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  16 //  Lesser General Public License for more details.
  17 //
  18 //  You should have received a copy of the GNU Lesser General Public
  19 //  License along with this library; if not, write to the Free Software
  20 //  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  21 //
  22 /////////////////////////////////////////////////////////////////////////
  23
  24 #define NEED_CPU_REG_SHORTCUTS 1
  25 #include "bochs.h"
  26 #include "cpu.h"
  27 #define LOG_THIS BX_CPU_THIS_PTR
  28
  29 // 3-byte opcodes
  30 #if (BX_SUPPORT_SSE >= 4) || (BX_SUPPORT_SSE >= 3 && BX_SUPPORT_SSE_EXTENSION > 0)
  31
  32 #define CRC32_POLYNOMIAL BX_CONST64(0x11edc6f41)
  33
  34 #if (BX_SUPPORT_SSE > 4) || (BX_SUPPORT_SSE >= 4 && BX_SUPPORT_SSE_EXTENSION > 0)
  35 // primitives for CRC32 usage
  36 BX_CPP_INLINE Bit8u BitReflect8(Bit8u val8)
  37 {
  38   return ((val8 & 0x80) >> 7) |
  39          ((val8 & 0x40) >> 5) |
  40          ((val8 & 0x20) >> 3) |
  41          ((val8 & 0x10) >> 1) |
  42          ((val8 & 0x08) << 1) |
  43          ((val8 & 0x04) << 3) |
  44          ((val8 & 0x02) << 5) |
  45          ((val8 & 0x01) << 7);
  46 }
  47
  48 BX_CPP_INLINE Bit16u BitReflect16(Bit16u val16)
  49 {
  50   return ((Bit16u)(BitReflect8(val16 & 0xff)) << 8) | BitReflect8(val16 >> 8);
  51 }
  52
  53 BX_CPP_INLINE Bit32u BitReflect32(Bit32u val32)
  54 {
  55   return ((Bit32u)(BitReflect16(val32 & 0xffff)) << 16) | BitReflect16(val32 >> 16);
  56 }
  57
  58 static Bit32u mod2_64bit(Bit64u divisor, Bit64u dividend)
  59 {
  60   Bit64u remainder = dividend >> 32;
  61
  62   for (int bitpos=31; bitpos>=0; bitpos--) {
  63     // copy one more bit from the dividend
  64     remainder = (remainder << 1) | ((dividend >> bitpos) & 1);
  65
  66     // if MSB is set, then XOR divisor and get new remainder
  67     if (((remainder >> 32) & 1) == 1) {
  68       remainder ^= divisor;
  69     }
  70   }
  71
  72   return remainder;
  73 }
  74 #endif // (BX_SUPPORT_SSE > 4) || (BX_SUPPORT_SSE >= 4 && BX_SUPPORT_SSE_EXTENSION > 0)
  75
  76 void BX_CPP_AttrRegparmN(1) BX_CPU_C::CRC32_GdEb(bxInstruction_c *i)
  77 {
  78 #if (BX_SUPPORT_SSE > 4) || (BX_SUPPORT_SSE >= 4 && BX_SUPPORT_SSE_EXTENSION > 0)
  79   Bit8u op1;
  80
  81   if (i->modC0()) {
  82     op1 = BX_READ_8BIT_REGx(i->rm(),i->extend8bitL());
  83   }
  84   else {
  85     bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
  86
  87     op1 = read_virtual_byte(i->seg(), eaddr);
  88   }
  89
  90   Bit32u op2 = BX_READ_32BIT_REG(i->nnn());
  91   op2 = BitReflect32(op2);
  92
  93   Bit64u tmp1 = ((Bit64u) BitReflect8 (op1)) << 32;
  94   Bit64u tmp2 = ((Bit64u) op2) <<  8;
  95   Bit64u tmp3 = tmp1 ^ tmp2;
  96   op2 = mod2_64bit(CRC32_POLYNOMIAL, tmp3);
  97
  98   /* now write result back to destination */
  99   BX_WRITE_32BIT_REGZ(i->nnn(), BitReflect32(op2));
 100 #else
 101   BX_INFO(("CRC32_GdEb: required SSE4_2 support, use --enable-sse and --enable-sse-extension options"));
 102   exception(BX_UD_EXCEPTION, 0, 0);
 103 #endif
 104 }
 105
 106 void BX_CPP_AttrRegparmN(1) BX_CPU_C::CRC32_GdEw(bxInstruction_c *i)
 107 {
 108 #if (BX_SUPPORT_SSE > 4) || (BX_SUPPORT_SSE >= 4 && BX_SUPPORT_SSE_EXTENSION > 0)
 109   Bit32u op2 = BX_READ_32BIT_REG(i->nnn());
 110   op2 = BitReflect32(op2);
 111   Bit16u op1;
 112
 113   if (i->modC0()) {
 114     op1 = BX_READ_16BIT_REG(i->rm());
 115   }
 116   else {
 117     bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
 118     op1 = read_virtual_word(i->seg(), eaddr);
 119   }
 120
 121   Bit64u tmp1 = ((Bit64u) BitReflect16(op1)) << 32;
 122   Bit64u tmp2 = ((Bit64u) op2) << 16;
 123   Bit64u tmp3 = tmp1 ^ tmp2;
 124   op2 = mod2_64bit(CRC32_POLYNOMIAL, tmp3);
 125
 126   /* now write result back to destination */
 127   BX_WRITE_32BIT_REGZ(i->nnn(), BitReflect32(op2));
 128
 129 #else
 130   BX_INFO(("CRC32_GdEw: required SSE4_2 support, use --enable-sse and --enable-sse-extension options"));
 131   exception(BX_UD_EXCEPTION, 0, 0);
 132 #endif
 133 }
 134
 135 void BX_CPP_AttrRegparmN(1) BX_CPU_C::CRC32_GdEd(bxInstruction_c *i)
 136 {
 137 #if (BX_SUPPORT_SSE > 4) || (BX_SUPPORT_SSE >= 4 && BX_SUPPORT_SSE_EXTENSION > 0)
 138   Bit32u op2 = BX_READ_32BIT_REG(i->nnn());
 139   op2 = BitReflect32(op2);
 140   Bit32u op1;
 141
 142   if (i->modC0()) {
 143     op1 = BX_READ_32BIT_REG(i->rm());
 144   }
 145   else {
 146     bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
 147     op1 = read_virtual_dword(i->seg(), eaddr);
 148   }
 149
 150   Bit64u tmp1 = ((Bit64u) BitReflect32(op1)) << 32;
 151   Bit64u tmp2 = ((Bit64u) op2) << 32;
 152   Bit64u tmp3 = tmp1 ^ tmp2;
 153   op2 = mod2_64bit(CRC32_POLYNOMIAL, tmp3);
 154
 155   /* now write result back to destination */
 156   BX_WRITE_32BIT_REGZ(i->nnn(), BitReflect32(op2));
 157
 158 #else
 159   BX_INFO(("CRC32_GdEd: required SSE4_2 support, use --enable-sse and --enable-sse-extension options"));
 160   exception(BX_UD_EXCEPTION, 0, 0);
 161 #endif
 162 }
 163
 164 #if BX_SUPPORT_X86_64
 165
 166 void BX_CPP_AttrRegparmN(1) BX_CPU_C::CRC32_GdEq(bxInstruction_c *i)
 167 {
 168 #if (BX_SUPPORT_SSE > 4) || (BX_SUPPORT_SSE >= 4 && BX_SUPPORT_SSE_EXTENSION > 0)
 169   Bit32u op2 = BX_READ_32BIT_REG(i->nnn());
 170   op2 = BitReflect32(op2);
 171   Bit64u op1;
 172
 173   if (i->modC0()) {
 174     op1 = BX_READ_64BIT_REG(i->rm());
 175   }
 176   else {
 177     bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
 178     op1 = read_virtual_qword_64(i->seg(), eaddr);
 179   }
 180
 181   Bit64u tmp1 = ((Bit64u) BitReflect32(op1 & 0xffffffff)) << 32;
 182   Bit64u tmp2 = ((Bit64u) op2) << 32;
 183   Bit64u tmp3 = tmp1 ^ tmp2;
 184   op2  = mod2_64bit(CRC32_POLYNOMIAL, tmp3);
 185   tmp1 = ((Bit64u) BitReflect32(op1 >> 32)) << 32;
 186   tmp2 = ((Bit64u) op2) << 32;
 187   tmp3 = tmp1 ^ tmp2;
 188   op2  = mod2_64bit(CRC32_POLYNOMIAL, tmp3);
 189
 190   /* now write result back to destination */
 191   BX_WRITE_32BIT_REGZ(i->nnn(), BitReflect32(op2));
 192
 193 #else
 194   BX_INFO(("CRC32_GdEq: required SSE4_2 support, use --enable-sse and --enable-sse-extension options"));
 195   exception(BX_UD_EXCEPTION, 0, 0);
 196 #endif
 197 }
 198
 199 #endif // BX_SUPPORT_X86_64
 200
 201 #endif // (BX_SUPPORT_SSE >= 4) || (BX_SUPPORT_SSE >= 3 && BX_SUPPORT_SSE_EXTENSION > 0)