cpu/shift32.cc

   1 /////////////////////////////////////////////////////////////////////////
   2 // $Id: shift32.cc,v 1.47 2008/09/19 19:18:57 sshwarts Exp $
   3 /////////////////////////////////////////////////////////////////////////
   4 //
   5 //  Copyright (C) 2001  MandrakeSoft S.A.
   6 //
   7 //    MandrakeSoft S.A.
   8 //    43, rue d'Aboukir
   9 //    75002 Paris - France
  10 //    http://www.linux-mandrake.com/
  11 //    http://www.mandrakesoft.com/
  12 //
  13 //  This library is free software; you can redistribute it and/or
  14 //  modify it under the terms of the GNU Lesser General Public
  15 //  License as published by the Free Software Foundation; either
  16 //  version 2 of the License, or (at your option) any later version.
  17 //
  18 //  This library is distributed in the hope that it will be useful,
  19 //  but WITHOUT ANY WARRANTY; without even the implied warranty of
  20 //  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  21 //  Lesser General Public License for more details.
  22 //
  23 //  You should have received a copy of the GNU Lesser General Public
  24 //  License along with this library; if not, write to the Free Software
  25 //  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  26 /////////////////////////////////////////////////////////////////////////
  27
  28 #define NEED_CPU_REG_SHORTCUTS 1
  29 #include "bochs.h"
  30 #include "cpu.h"
  31 #define LOG_THIS BX_CPU_THIS_PTR
  32
  33 void BX_CPP_AttrRegparmN(1) BX_CPU_C::SHLD_EdGdM(bxInstruction_c *i)
  34 {
  35   Bit32u op1_32, op2_32, result_32;
  36   unsigned count;
  37   unsigned of, cf;
  38
  39   bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
  40
  41   /* pointer, segment address pair */
  42   op1_32 = read_RMW_virtual_dword(i->seg(), eaddr);
  43
  44   if (i->b1() == 0xa4) // 0x1a4
  45     count = i->Ib();
  46   else // 0x1a5
  47     count = CL;
  48
  49   count &= 0x1f; // use only 5 LSB's
  50   if (!count) return;
  51
  52   op2_32 = BX_READ_32BIT_REG(i->nnn());
  53
  54   result_32 = (op1_32 << count) | (op2_32 >> (32 - count));
  55
  56   write_RMW_virtual_dword(result_32);
  57
  58   SET_FLAGS_OSZAPC_LOGIC_32(result_32); /* handle SF, ZF and AF flags */
  59
  60   cf = (op1_32 >> (32 - count)) & 0x1;
  61   of = cf ^ (result_32 >> 31); // of = cf ^ result31
  62   SET_FLAGS_OxxxxC(of, cf);
  63 }
  64
  65 void BX_CPP_AttrRegparmN(1) BX_CPU_C::SHLD_EdGdR(bxInstruction_c *i)
  66 {
  67   Bit32u op1_32, op2_32, result_32;
  68   unsigned count;
  69   unsigned of, cf;
  70
  71   if (i->b1() == 0xa4) // 0x1a4
  72     count = i->Ib();
  73   else // 0x1a5
  74     count = CL;
  75
  76   count &= 0x1f; // use only 5 LSB's
  77   if (!count) return;
  78
  79   op1_32 = BX_READ_32BIT_REG(i->rm());
  80   op2_32 = BX_READ_32BIT_REG(i->nnn());
  81
  82   result_32 = (op1_32 << count) | (op2_32 >> (32 - count));
  83
  84   BX_WRITE_32BIT_REGZ(i->rm(), result_32);
  85
  86   SET_FLAGS_OSZAPC_LOGIC_32(result_32); /* handle SF, ZF and AF flags */
  87
  88   cf = (op1_32 >> (32 - count)) & 0x1;
  89   of = cf ^ (result_32 >> 31); // of = cf ^ result31
  90   SET_FLAGS_OxxxxC(of, cf);
  91 }
  92
  93 void BX_CPP_AttrRegparmN(1) BX_CPU_C::SHRD_EdGdM(bxInstruction_c *i)
  94 {
  95   Bit32u op1_32, op2_32, result_32;
  96   unsigned count;
  97   unsigned cf, of;
  98
  99   bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
 100
 101   /* pointer, segment address pair */
 102   op1_32 = read_RMW_virtual_dword(i->seg(), eaddr);
 103
 104   if (i->b1() == 0xac) // 0x1ac
 105     count = i->Ib();
 106   else // 0x1ad
 107     count = CL;
 108
 109   count &= 0x1f; // use only 5 LSB's
 110   if (!count) return;
 111
 112   op2_32 = BX_READ_32BIT_REG(i->nnn());
 113
 114   result_32 = (op2_32 << (32 - count)) | (op1_32 >> count);
 115
 116   write_RMW_virtual_dword(result_32);
 117
 118   SET_FLAGS_OSZAPC_LOGIC_32(result_32); /* handle SF, ZF and AF flags */
 119
 120   cf = (op1_32 >> (count - 1)) & 0x1;
 121   of = ((result_32 << 1) ^ result_32) >> 31; // of = result30 ^ result31
 122   SET_FLAGS_OxxxxC(of, cf);
 123 }
 124
 125 void BX_CPP_AttrRegparmN(1) BX_CPU_C::SHRD_EdGdR(bxInstruction_c *i)
 126 {
 127   Bit32u op1_32, op2_32, result_32;
 128   unsigned count;
 129   unsigned cf, of;
 130
 131   if (i->b1() == 0xac) // 0x1ac
 132     count = i->Ib();
 133   else // 0x1ad
 134     count = CL;
 135
 136   count &= 0x1f; // use only 5 LSB's
 137   if (!count) return;
 138
 139   op1_32 = BX_READ_32BIT_REG(i->rm());
 140   op2_32 = BX_READ_32BIT_REG(i->nnn());
 141
 142   result_32 = (op2_32 << (32 - count)) | (op1_32 >> count);
 143
 144   BX_WRITE_32BIT_REGZ(i->rm(), result_32);
 145
 146   SET_FLAGS_OSZAPC_LOGIC_32(result_32); /* handle SF, ZF and AF flags */
 147
 148   cf = (op1_32 >> (count - 1)) & 0x1;
 149   of = ((result_32 << 1) ^ result_32) >> 31; // of = result30 ^ result31
 150   SET_FLAGS_OxxxxC(of, cf);
 151 }
 152
 153 void BX_CPP_AttrRegparmN(1) BX_CPU_C::ROL_EdM(bxInstruction_c *i)
 154 {
 155   Bit32u op1_32, result_32;
 156   unsigned count;
 157
 158   bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
 159
 160   /* pointer, segment address pair */
 161   op1_32 = read_RMW_virtual_dword(i->seg(), eaddr);
 162
 163   if (i->b1() == 0xd3)
 164     count = CL;
 165   else // 0xc1 or 0xd1
 166     count = i->Ib();
 167
 168   count &= 0x1f;
 169   if (! count) return;
 170
 171   result_32 = (op1_32 << count) | (op1_32 >> (32 - count));
 172
 173   write_RMW_virtual_dword(result_32);
 174
 175   unsigned bit0  = (result_32 & 0x1);
 176   unsigned bit31 = (result_32 >> 31);
 177   // of = cf ^ result31
 178   SET_FLAGS_OxxxxC(bit0 ^ bit31, bit0);
 179 }
 180
 181 void BX_CPP_AttrRegparmN(1) BX_CPU_C::ROL_EdR(bxInstruction_c *i)
 182 {
 183   Bit32u op1_32, result_32;
 184   unsigned count;
 185   unsigned bit0, bit31;
 186
 187   if (i->b1() == 0xd3)
 188     count = CL;
 189   else // 0xc1 or 0xd1
 190     count = i->Ib();
 191
 192   count &= 0x1f;
 193   if (! count) return;
 194
 195   op1_32 = BX_READ_32BIT_REG(i->rm());
 196   result_32 = (op1_32 << count) | (op1_32 >> (32 - count));
 197   BX_WRITE_32BIT_REGZ(i->rm(), result_32);
 198
 199   bit0  = (result_32 & 0x1);
 200   bit31 = (result_32 >> 31);
 201   // of = cf ^ result31
 202   SET_FLAGS_OxxxxC(bit0 ^ bit31, bit0);
 203 }
 204
 205 void BX_CPP_AttrRegparmN(1) BX_CPU_C::ROR_EdM(bxInstruction_c *i)
 206 {
 207   Bit32u op1_32, result_32;
 208   unsigned count;
 209   unsigned bit31, bit30;
 210
 211   bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
 212
 213   /* pointer, segment address pair */
 214   op1_32 = read_RMW_virtual_dword(i->seg(), eaddr);
 215
 216   if (i->b1() == 0xd3)
 217     count = CL;
 218   else // 0xc1 or 0xd1
 219     count = i->Ib();
 220
 221   count &= 0x1f;
 222   if (! count) return;
 223
 224   result_32 = (op1_32 >> count) | (op1_32 << (32 - count));
 225
 226   write_RMW_virtual_dword(result_32);
 227
 228   bit31 = (result_32 >> 31) & 1;
 229   bit30 = (result_32 >> 30) & 1;
 230   // of = result30 ^ result31
 231   SET_FLAGS_OxxxxC(bit30 ^ bit31, bit31);
 232 }
 233
 234 void BX_CPP_AttrRegparmN(1) BX_CPU_C::ROR_EdR(bxInstruction_c *i)
 235 {
 236   Bit32u op1_32, result_32;
 237   unsigned count;
 238   unsigned bit31, bit30;
 239
 240   if (i->b1() == 0xd3)
 241     count = CL;
 242   else // 0xc1 or 0xd1
 243     count = i->Ib();
 244
 245   count &= 0x1f;
 246   if (! count) return;
 247
 248   op1_32 = BX_READ_32BIT_REG(i->rm());
 249   result_32 = (op1_32 >> count) | (op1_32 << (32 - count));
 250   BX_WRITE_32BIT_REGZ(i->rm(), result_32);
 251
 252   bit31 = (result_32 >> 31) & 1;
 253   bit30 = (result_32 >> 30) & 1;
 254   // of = result30 ^ result31
 255   SET_FLAGS_OxxxxC(bit30 ^ bit31, bit31);
 256 }
 257
 258 void BX_CPP_AttrRegparmN(1) BX_CPU_C::RCL_EdM(bxInstruction_c *i)
 259 {
 260   Bit32u op1_32, result_32;
 261   unsigned count;
 262   unsigned cf, of;
 263
 264   bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
 265
 266   /* pointer, segment address pair */
 267   op1_32 = read_RMW_virtual_dword(i->seg(), eaddr);
 268
 269   if (i->b1() == 0xd3)
 270     count = CL;
 271   else // 0xc1 or 0xd1
 272     count = i->Ib();
 273
 274   count &= 0x1f;
 275   if (!count) return;
 276
 277   if (count==1) {
 278     result_32 = (op1_32 << 1) | getB_CF();
 279   }
 280   else {
 281     result_32 = (op1_32 << count) | (getB_CF() << (count - 1)) |
 282                 (op1_32 >> (33 - count));
 283   }
 284
 285   write_RMW_virtual_dword(result_32);
 286
 287   cf = (op1_32 >> (32 - count)) & 0x1;
 288   of = cf ^ (result_32 >> 31); // of = cf ^ result31
 289   SET_FLAGS_OxxxxC(of, cf);
 290 }
 291
 292 void BX_CPP_AttrRegparmN(1) BX_CPU_C::RCL_EdR(bxInstruction_c *i)
 293 {
 294   Bit32u op1_32, result_32;
 295   unsigned count;
 296   unsigned cf, of;
 297
 298   if (i->b1() == 0xd3)
 299     count = CL;
 300   else // 0xc1 or 0xd1
 301     count = i->Ib();
 302
 303   count &= 0x1f;
 304   if (!count) return;
 305
 306   op1_32 = BX_READ_32BIT_REG(i->rm());
 307
 308   if (count==1) {
 309     result_32 = (op1_32 << 1) | getB_CF();
 310   }
 311   else {
 312     result_32 = (op1_32 << count) | (getB_CF() << (count - 1)) |
 313                 (op1_32 >> (33 - count));
 314   }
 315
 316   BX_WRITE_32BIT_REGZ(i->rm(), result_32);
 317
 318   cf = (op1_32 >> (32 - count)) & 0x1;
 319   of = cf ^ (result_32 >> 31); // of = cf ^ result31
 320   SET_FLAGS_OxxxxC(of, cf);
 321 }
 322
 323 void BX_CPP_AttrRegparmN(1) BX_CPU_C::RCR_EdM(bxInstruction_c *i)
 324 {
 325   Bit32u op1_32, result_32;
 326   unsigned count;
 327   unsigned cf, of;
 328
 329   bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
 330
 331   /* pointer, segment address pair */
 332   op1_32 = read_RMW_virtual_dword(i->seg(), eaddr);
 333
 334   if (i->b1() == 0xd3)
 335     count = CL;
 336   else // 0xc1 or 0xd1
 337     count = i->Ib();
 338
 339   count &= 0x1f;
 340   if (!count) return;
 341
 342   if (count==1) {
 343     result_32 = (op1_32 >> 1) | (getB_CF() << 31);
 344   }
 345   else {
 346     result_32 = (op1_32 >> count) | (getB_CF() << (32 - count)) |
 347                 (op1_32 << (33 - count));
 348   }
 349
 350   write_RMW_virtual_dword(result_32);
 351
 352   cf = (op1_32 >> (count - 1)) & 0x1;
 353   of = ((result_32 << 1) ^ result_32) >> 31; // of = result30 ^ result31
 354   SET_FLAGS_OxxxxC(of, cf);
 355 }
 356
 357 void BX_CPP_AttrRegparmN(1) BX_CPU_C::RCR_EdR(bxInstruction_c *i)
 358 {
 359   Bit32u op1_32, result_32;
 360   unsigned count;
 361   unsigned cf, of;
 362
 363   if (i->b1() == 0xd3)
 364     count = CL;
 365   else // 0xc1 or 0xd1
 366     count = i->Ib();
 367
 368   count &= 0x1f;
 369   if (!count) return;
 370
 371   op1_32 = BX_READ_32BIT_REG(i->rm());
 372
 373   if (count==1) {
 374     result_32 = (op1_32 >> 1) | (getB_CF() << 31);
 375   }
 376   else {
 377     result_32 = (op1_32 >> count) | (getB_CF() << (32 - count)) |
 378                 (op1_32 << (33 - count));
 379   }
 380
 381   BX_WRITE_32BIT_REGZ(i->rm(), result_32);
 382
 383   cf = (op1_32 >> (count - 1)) & 0x1;
 384   of = ((result_32 << 1) ^ result_32) >> 31; // of = result30 ^ result31
 385   SET_FLAGS_OxxxxC(of, cf);
 386 }
 387
 388 void BX_CPP_AttrRegparmN(1) BX_CPU_C::SHL_EdM(bxInstruction_c *i)
 389 {
 390   Bit32u op1_32, result_32;
 391   unsigned count;
 392   unsigned cf, of;
 393
 394   bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
 395
 396   /* pointer, segment address pair */
 397   op1_32 = read_RMW_virtual_dword(i->seg(), eaddr);
 398
 399   if (i->b1() == 0xd3)
 400     count = CL;
 401   else // 0xc1 or 0xd1
 402     count = i->Ib();
 403
 404   count &= 0x1f;
 405   if (!count) return;
 406
 407   /* count < 32, since only lower 5 bits used */
 408   result_32 = (op1_32 << count);
 409
 410   write_RMW_virtual_dword(result_32);
 411
 412   cf = (op1_32 >> (32 - count)) & 0x1;
 413   of = cf ^ (result_32 >> 31);
 414   SET_FLAGS_OSZAPC_LOGIC_32(result_32); /* handle SF, ZF and AF flags */
 415   SET_FLAGS_OxxxxC(of, cf);
 416 }
 417
 418 void BX_CPP_AttrRegparmN(1) BX_CPU_C::SHL_EdR(bxInstruction_c *i)
 419 {
 420   Bit32u op1_32, result_32;
 421   unsigned count;
 422   unsigned cf, of;
 423
 424   if (i->b1() == 0xd3)
 425     count = CL;
 426   else // 0xc1 or 0xd1
 427     count = i->Ib();
 428
 429   count &= 0x1f;
 430   if (!count) return;
 431
 432   op1_32 = BX_READ_32BIT_REG(i->rm());
 433
 434   /* count < 32, since only lower 5 bits used */
 435   result_32 = (op1_32 << count);
 436   cf = (op1_32 >> (32 - count)) & 0x1;
 437   of = cf ^ (result_32 >> 31);
 438
 439   BX_WRITE_32BIT_REGZ(i->rm(), result_32);
 440
 441   SET_FLAGS_OSZAPC_LOGIC_32(result_32); /* handle SF, ZF and AF flags */
 442   SET_FLAGS_OxxxxC(of, cf);
 443 }
 444
 445 void BX_CPP_AttrRegparmN(1) BX_CPU_C::SHR_EdM(bxInstruction_c *i)
 446 {
 447   Bit32u op1_32, result_32;
 448   unsigned count;
 449   unsigned of, cf;
 450
 451   bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
 452
 453   /* pointer, segment address pair */
 454   op1_32 = read_RMW_virtual_dword(i->seg(), eaddr);
 455
 456   if (i->b1() == 0xd3)
 457     count = CL;
 458   else // 0xc1 or 0xd1
 459     count = i->Ib();
 460
 461   count &= 0x1f;
 462   if (!count) return;
 463
 464   result_32 = (op1_32 >> count);
 465
 466   write_RMW_virtual_dword(result_32);
 467
 468   cf = (op1_32 >> (count - 1)) & 0x1;
 469   // note, that of == result31 if count == 1 and
 470   //            of == 0        if count >= 2
 471   of = ((result_32 << 1) ^ result_32) >> 31;
 472
 473   SET_FLAGS_OSZAPC_LOGIC_32(result_32); /* handle SF, ZF and AF flags */
 474   SET_FLAGS_OxxxxC(of, cf);
 475 }
 476
 477 void BX_CPP_AttrRegparmN(1) BX_CPU_C::SHR_EdR(bxInstruction_c *i)
 478 {
 479   Bit32u op1_32, result_32;
 480   unsigned count;
 481   unsigned of, cf;
 482
 483   if (i->b1() == 0xd3)
 484     count = CL;
 485   else // 0xc1 or 0xd1
 486     count = i->Ib();
 487
 488   count &= 0x1f;
 489   if (!count) return;
 490
 491   op1_32 = BX_READ_32BIT_REG(i->rm());
 492   result_32 = (op1_32 >> count);
 493   BX_WRITE_32BIT_REGZ(i->rm(), result_32);
 494
 495   cf = (op1_32 >> (count - 1)) & 0x1;
 496   // note, that of == result31 if count == 1 and
 497   //            of == 0        if count >= 2
 498   of = ((result_32 << 1) ^ result_32) >> 31;
 499
 500   SET_FLAGS_OSZAPC_LOGIC_32(result_32); /* handle SF, ZF and AF flags */
 501   SET_FLAGS_OxxxxC(of, cf);
 502 }
 503
 504 void BX_CPP_AttrRegparmN(1) BX_CPU_C::SAR_EdM(bxInstruction_c *i)
 505 {
 506   Bit32u op1_32, result_32;
 507   unsigned count;
 508
 509   bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
 510
 511   /* pointer, segment address pair */
 512   op1_32 = read_RMW_virtual_dword(i->seg(), eaddr);
 513
 514   if (i->b1() == 0xd3)
 515     count = CL;
 516   else // 0xc1 or 0xd1
 517     count = i->Ib();
 518
 519   count &= 0x1f;
 520   if (!count) return;
 521
 522   /* count < 32, since only lower 5 bits used */
 523   if (op1_32 & 0x80000000) {
 524     result_32 = (op1_32 >> count) | (0xffffffff << (32 - count));
 525   }
 526   else {
 527     result_32 = (op1_32 >> count);
 528   }
 529
 530   write_RMW_virtual_dword(result_32);
 531
 532   SET_FLAGS_OSZAPC_LOGIC_32(result_32); /* handle SF, ZF and AF flags */
 533   set_CF((op1_32 >> (count - 1)) & 1);
 534   clear_OF();  /* signed overflow cannot happen in SAR instruction */
 535 }
 536
 537 void BX_CPP_AttrRegparmN(1) BX_CPU_C::SAR_EdR(bxInstruction_c *i)
 538 {
 539   Bit32u op1_32, result_32;
 540   unsigned count;
 541
 542   if (i->b1() == 0xd3)
 543     count = CL;
 544   else // 0xc1 or 0xd1
 545     count = i->Ib();
 546
 547   count &= 0x1f;
 548   if (!count) return;
 549
 550   op1_32 = BX_READ_32BIT_REG(i->rm());
 551
 552   /* count < 32, since only lower 5 bits used */
 553   if (op1_32 & 0x80000000) {
 554     result_32 = (op1_32 >> count) | (0xffffffff << (32 - count));
 555   }
 556   else {
 557     result_32 = (op1_32 >> count);
 558   }
 559
 560   BX_WRITE_32BIT_REGZ(i->rm(), result_32);
 561
 562   SET_FLAGS_OSZAPC_LOGIC_32(result_32); /* handle SF, ZF and AF flags */
 563   set_CF((op1_32 >> (count - 1)) & 1);
 564   clear_OF();  /* signed overflow cannot happen in SAR instruction */
 565 }