fpu/fpu_load_store.cc

   1 /////////////////////////////////////////////////////////////////////////
   2 // $Id: fpu_load_store.cc,v 1.29 2008/09/03 20:13:52 sshwarts Exp $
   3 /////////////////////////////////////////////////////////////////////////
   4 //
   5 //   Copyright (c) 2003 Stanislav Shwartsman
   6 //          Written by Stanislav Shwartsman [sshwarts at sourceforge net]
   7 //
   8 //  This library is free software; you can redistribute it and/or
   9 //  modify it under the terms of the GNU Lesser General Public
  10 //  License as published by the Free Software Foundation; either
  11 //  version 2 of the License, or (at your option) any later version.
  12 //
  13 //  This library is distributed in the hope that it will be useful,
  14 //  but WITHOUT ANY WARRANTY; without even the implied warranty of
  15 //  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  16 //  Lesser General Public License for more details.
  17 //
  18 //  You should have received a copy of the GNU Lesser General Public
  19 //  License along with this library; if not, write to the Free Software
  20 //  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  21 //
  22 /////////////////////////////////////////////////////////////////////////
  23
  24 #define NEED_CPU_REG_SHORTCUTS 1
  25 #include "bochs.h"
  26 #include "cpu/cpu.h"
  27 #define LOG_THIS BX_CPU_THIS_PTR
  28
  29 #if BX_SUPPORT_FPU
  30
  31 extern float_status_t FPU_pre_exception_handling(Bit16u control_word);
  32
  33 #include "softfloatx80.h"
  34
  35 void BX_CPP_AttrRegparmN(1) BX_CPU_C::FLD_STi(bxInstruction_c *i)
  36 {
  37 #if BX_SUPPORT_FPU
  38   BX_CPU_THIS_PTR prepareFPU(i);
  39
  40   clear_C1();
  41
  42   if (! IS_TAG_EMPTY(-1))
  43   {
  44     BX_CPU_THIS_PTR FPU_stack_overflow();
  45     return;
  46   }
  47
  48   floatx80 sti_reg = floatx80_default_nan;
  49
  50   if (IS_TAG_EMPTY(i->rm()))
  51   {
  52     FPU_exception(FPU_EX_Stack_Underflow);
  53
  54     if (! BX_CPU_THIS_PTR the_i387.is_IA_masked())
  55       return;
  56   }
  57   else {
  58     sti_reg = BX_READ_FPU_REG(i->rm());
  59   }
  60
  61   BX_CPU_THIS_PTR the_i387.FPU_push();
  62   BX_WRITE_FPU_REG(sti_reg, 0);
  63 #else
  64   BX_INFO(("FLD_STi: required FPU, configure --enable-fpu"));
  65 #endif
  66 }
  67
  68 void BX_CPP_AttrRegparmN(1) BX_CPU_C::FLD_SINGLE_REAL(bxInstruction_c *i)
  69 {
  70 #if BX_SUPPORT_FPU
  71   BX_CPU_THIS_PTR prepareFPU(i);
  72
  73   float32 load_reg = read_virtual_dword(i->seg(), RMAddr(i));
  74
  75   clear_C1();
  76
  77   if (! IS_TAG_EMPTY(-1)) {
  78     BX_CPU_THIS_PTR FPU_stack_overflow();
  79     return;
  80   }
  81
  82   float_status_t status =
  83      FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
  84
  85   // convert to floatx80 format
  86   floatx80 result = float32_to_floatx80(load_reg, status);
  87
  88   if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
  89     return;
  90
  91   BX_CPU_THIS_PTR the_i387.FPU_push();
  92   BX_WRITE_FPU_REG(result, 0);
  93 #else
  94   BX_INFO(("FLD_SINGLE_REAL: required FPU, configure --enable-fpu"));
  95 #endif
  96 }
  97
  98 void BX_CPP_AttrRegparmN(1) BX_CPU_C::FLD_DOUBLE_REAL(bxInstruction_c *i)
  99 {
 100 #if BX_SUPPORT_FPU
 101   BX_CPU_THIS_PTR prepareFPU(i);
 102
 103   float64 load_reg = read_virtual_qword(i->seg(), RMAddr(i));
 104
 105   clear_C1();
 106
 107   if (! IS_TAG_EMPTY(-1)) {
 108     BX_CPU_THIS_PTR FPU_stack_overflow();
 109     return;
 110   }
 111
 112   float_status_t status =
 113      FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
 114
 115   // convert to floatx80 format
 116   floatx80 result = float64_to_floatx80(load_reg, status);
 117
 118   if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
 119     return;
 120
 121   BX_CPU_THIS_PTR the_i387.FPU_push();
 122   BX_WRITE_FPU_REG(result, 0);
 123 #else
 124   BX_INFO(("FLD_DOUBLE_REAL: required FPU, configure --enable-fpu"));
 125 #endif
 126 }
 127
 128 void BX_CPP_AttrRegparmN(1) BX_CPU_C::FLD_EXTENDED_REAL(bxInstruction_c *i)
 129 {
 130 #if BX_SUPPORT_FPU
 131   BX_CPU_THIS_PTR prepareFPU(i);
 132
 133   floatx80 result;
 134   result.fraction = read_virtual_qword(i->seg(), RMAddr(i));
 135   result.exp      = read_virtual_word (i->seg(), RMAddr(i)+8);
 136
 137   clear_C1();
 138
 139   if (! IS_TAG_EMPTY(-1)) {
 140     BX_CPU_THIS_PTR FPU_stack_overflow();
 141     return;
 142   }
 143
 144   BX_CPU_THIS_PTR the_i387.FPU_push();
 145
 146   BX_WRITE_FPU_REG(result, 0);
 147 #else
 148   BX_INFO(("FLD_EXTENDED_REAL: required FPU, configure --enable-fpu"));
 149 #endif
 150 }
 151
 152 /* DF /0 */
 153 void BX_CPP_AttrRegparmN(1) BX_CPU_C::FILD_WORD_INTEGER(bxInstruction_c *i)
 154 {
 155 #if BX_SUPPORT_FPU
 156   BX_CPU_THIS_PTR prepareFPU(i);
 157
 158   Bit16s load_reg = (Bit16s) read_virtual_word(i->seg(), RMAddr(i));
 159
 160   clear_C1();
 161
 162   if (! IS_TAG_EMPTY(-1)) {
 163     BX_CPU_THIS_PTR FPU_stack_overflow();
 164     return;
 165   }
 166
 167   floatx80 result = int32_to_floatx80((Bit32s) load_reg);
 168   BX_CPU_THIS_PTR the_i387.FPU_push();
 169   BX_WRITE_FPU_REG(result, 0);
 170 #else
 171   BX_INFO(("FILD_WORD_INTEGER: required FPU, configure --enable-fpu"));
 172 #endif
 173 }
 174
 175 /* DB /0 */
 176 void BX_CPP_AttrRegparmN(1) BX_CPU_C::FILD_DWORD_INTEGER(bxInstruction_c *i)
 177 {
 178 #if BX_SUPPORT_FPU
 179   BX_CPU_THIS_PTR prepareFPU(i);
 180
 181   Bit32s load_reg = (Bit32s) read_virtual_dword(i->seg(), RMAddr(i));
 182
 183   clear_C1();
 184
 185   if (! IS_TAG_EMPTY(-1)) {
 186     BX_CPU_THIS_PTR FPU_stack_overflow();
 187     return;
 188   }
 189
 190   floatx80 result = int32_to_floatx80(load_reg);
 191   BX_CPU_THIS_PTR the_i387.FPU_push();
 192   BX_WRITE_FPU_REG(result, 0);
 193 #else
 194   BX_INFO(("FILD_DWORD_INTEGER: required FPU, configure --enable-fpu"));
 195 #endif
 196 }
 197
 198 /* DF /5 */
 199 void BX_CPP_AttrRegparmN(1) BX_CPU_C::FILD_QWORD_INTEGER(bxInstruction_c *i)
 200 {
 201 #if BX_SUPPORT_FPU
 202   BX_CPU_THIS_PTR prepareFPU(i);
 203
 204   Bit64s load_reg = (Bit64s) read_virtual_qword(i->seg(), RMAddr(i));
 205
 206   clear_C1();
 207
 208   if (! IS_TAG_EMPTY(-1)) {
 209     BX_CPU_THIS_PTR FPU_stack_overflow();
 210     return;
 211   }
 212
 213   floatx80 result = int64_to_floatx80(load_reg);
 214   BX_CPU_THIS_PTR the_i387.FPU_push();
 215   BX_WRITE_FPU_REG(result, 0);
 216 #else
 217   BX_INFO(("FILD_QWORD_INTEGER: required FPU, configure --enable-fpu"));
 218 #endif
 219 }
 220
 221 /* DF /4 */
 222 void BX_CPP_AttrRegparmN(1) BX_CPU_C::FBLD_PACKED_BCD(bxInstruction_c *i)
 223 {
 224 #if BX_SUPPORT_FPU
 225   BX_CPU_THIS_PTR prepareFPU(i);
 226
 227   // read packed bcd from memory
 228   Bit16u hi2 = read_virtual_word (i->seg(), RMAddr(i) + 8);
 229   Bit64u lo8 = read_virtual_qword(i->seg(), RMAddr(i));
 230
 231   clear_C1();
 232
 233   if (! IS_TAG_EMPTY(-1))
 234   {
 235     BX_CPU_THIS_PTR FPU_stack_overflow();
 236     return;
 237   }
 238
 239   // convert packed BCD to 64-bit integer
 240   Bit64s scale = 1;
 241   Bit64s val64 = 0;
 242
 243   for (int n = 0; n < 16; n++)
 244   {
 245     val64 += (lo8 & 0x0f) * scale;
 246     lo8 >>= 4;
 247     scale *= 10;
 248   }
 249
 250   val64 += (hi2 & 0x0f) * scale;
 251   val64 += ((hi2>>4) & 0x0f) * scale * 10;
 252
 253   floatx80 result = int64_to_floatx80(val64);
 254   if (hi2 & 0x8000)     // set negative
 255       floatx80_chs(result);
 256
 257   BX_CPU_THIS_PTR the_i387.FPU_push();
 258   BX_WRITE_FPU_REG(result, 0);
 259 #else
 260   BX_INFO(("FBLD_PACKED_BCD: required FPU, configure --enable-fpu"));
 261 #endif
 262 }
 263
 264 void BX_CPP_AttrRegparmN(1) BX_CPU_C::FST_STi(bxInstruction_c *i)
 265 {
 266 #if BX_SUPPORT_FPU
 267   BX_CPU_THIS_PTR prepareFPU(i);
 268
 269   int pop_stack = i->nnn() & 1;
 270   // handle special case of FSTP opcode @ 0xDF 0xD0..D7
 271   if (i->b1() == 0xdf)
 272     pop_stack = 1;
 273
 274   clear_C1();
 275
 276   if (IS_TAG_EMPTY(0)) {
 277     BX_CPU_THIS_PTR FPU_stack_underflow(i->rm(), pop_stack);
 278     return;
 279   }
 280
 281   floatx80 st0_reg = BX_READ_FPU_REG(0);
 282
 283   BX_WRITE_FPU_REG(st0_reg, i->rm());
 284   if (pop_stack)
 285      BX_CPU_THIS_PTR the_i387.FPU_pop();
 286 #else
 287   BX_INFO(("FST(P)_STi: required FPU, configure --enable-fpu"));
 288 #endif
 289 }
 290
 291 void BX_CPP_AttrRegparmN(1) BX_CPU_C::FST_SINGLE_REAL(bxInstruction_c *i)
 292 {
 293 #if BX_SUPPORT_FPU
 294   BX_CPU_THIS_PTR prepareFPU(i);
 295
 296   clear_C1();
 297
 298   float32 save_reg = float32_default_nan; /* The masked response */
 299
 300   int pop_stack = i->nnn() & 1;
 301
 302   if (IS_TAG_EMPTY(0))
 303   {
 304      BX_CPU_THIS_PTR FPU_exception(FPU_EX_Stack_Underflow);
 305
 306      if (! BX_CPU_THIS_PTR the_i387.is_IA_masked())
 307         return;
 308   }
 309   else
 310   {
 311      float_status_t status =
 312          FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
 313
 314      save_reg = floatx80_to_float32(BX_READ_FPU_REG(0), status);
 315
 316      if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags, 1))
 317         return;
 318   }
 319
 320   write_virtual_dword(i->seg(), RMAddr(i), save_reg);
 321
 322   if (pop_stack)
 323      BX_CPU_THIS_PTR the_i387.FPU_pop();
 324 #else
 325   BX_INFO(("FST(P)_SINGLE_REAL: required FPU, configure --enable-fpu"));
 326 #endif
 327 }
 328
 329 void BX_CPP_AttrRegparmN(1) BX_CPU_C::FST_DOUBLE_REAL(bxInstruction_c *i)
 330 {
 331 #if BX_SUPPORT_FPU
 332   BX_CPU_THIS_PTR prepareFPU(i);
 333
 334   clear_C1();
 335
 336   float64 save_reg = float64_default_nan; /* The masked response */
 337
 338   int pop_stack = i->nnn() & 1;
 339
 340   if (IS_TAG_EMPTY(0))
 341   {
 342      BX_CPU_THIS_PTR FPU_exception(FPU_EX_Stack_Underflow);
 343
 344      if (! BX_CPU_THIS_PTR the_i387.is_IA_masked())
 345         return;
 346   }
 347   else
 348   {
 349      float_status_t status =
 350          FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
 351
 352      save_reg = floatx80_to_float64(BX_READ_FPU_REG(0), status);
 353
 354      if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags, 1))
 355         return;
 356   }
 357
 358   write_virtual_qword(i->seg(), RMAddr(i), save_reg);
 359
 360   if (pop_stack)
 361      BX_CPU_THIS_PTR the_i387.FPU_pop();
 362 #else
 363   BX_INFO(("FST(P)_DOUBLE_REAL: required FPU, configure --enable-fpu"));
 364 #endif
 365 }
 366
 367 /* DB /7 */
 368 void BX_CPP_AttrRegparmN(1) BX_CPU_C::FSTP_EXTENDED_REAL(bxInstruction_c *i)
 369 {
 370 #if BX_SUPPORT_FPU
 371   BX_CPU_THIS_PTR prepareFPU(i);
 372
 373   clear_C1();
 374
 375   floatx80 save_reg = floatx80_default_nan; /* The masked response */
 376
 377   if (IS_TAG_EMPTY(0))
 378   {
 379      BX_CPU_THIS_PTR FPU_exception(FPU_EX_Stack_Underflow);
 380
 381      if (! BX_CPU_THIS_PTR the_i387.is_IA_masked())
 382         return;
 383   }
 384   else
 385   {
 386      save_reg = BX_READ_FPU_REG(0);
 387   }
 388
 389   write_virtual_qword(i->seg(), RMAddr(i),     save_reg.fraction);
 390   write_virtual_word (i->seg(), RMAddr(i) + 8, save_reg.exp);
 391
 392   BX_CPU_THIS_PTR the_i387.FPU_pop();
 393 #else
 394   BX_INFO(("FSTP_EXTENDED_REAL: required FPU, configure --enable-fpu"));
 395 #endif
 396 }
 397
 398 void BX_CPP_AttrRegparmN(1) BX_CPU_C::FIST_WORD_INTEGER(bxInstruction_c *i)
 399 {
 400 #if BX_SUPPORT_FPU
 401   BX_CPU_THIS_PTR prepareFPU(i);
 402
 403   Bit16s save_reg = int16_indefinite;
 404
 405   int pop_stack = i->nnn() & 1;
 406
 407   clear_C1();
 408
 409   if (IS_TAG_EMPTY(0))
 410   {
 411      BX_CPU_THIS_PTR FPU_exception(FPU_EX_Stack_Underflow);
 412
 413      if (! BX_CPU_THIS_PTR the_i387.is_IA_masked())
 414         return;
 415   }
 416   else
 417   {
 418      float_status_t status =
 419          FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
 420
 421      save_reg = floatx80_to_int16(BX_READ_FPU_REG(0), status);
 422
 423      if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags, 1))
 424         return;
 425   }
 426
 427   write_virtual_word(i->seg(), RMAddr(i), (Bit16u)(save_reg));
 428
 429   if (pop_stack)
 430      BX_CPU_THIS_PTR the_i387.FPU_pop();
 431 #else
 432   BX_INFO(("FIST(P)_WORD_INTEGER: required FPU, configure --enable-fpu"));
 433 #endif
 434 }
 435
 436 void BX_CPP_AttrRegparmN(1) BX_CPU_C::FIST_DWORD_INTEGER(bxInstruction_c *i)
 437 {
 438 #if BX_SUPPORT_FPU
 439   BX_CPU_THIS_PTR prepareFPU(i);
 440
 441   Bit32s save_reg = int32_indefinite; /* The masked response */
 442
 443   int pop_stack = i->nnn() & 1;
 444
 445   clear_C1();
 446
 447   if (IS_TAG_EMPTY(0))
 448   {
 449      BX_CPU_THIS_PTR FPU_exception(FPU_EX_Stack_Underflow);
 450
 451      if (! BX_CPU_THIS_PTR the_i387.is_IA_masked())
 452         return;
 453   }
 454   else
 455   {
 456      float_status_t status =
 457          FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
 458
 459      save_reg = floatx80_to_int32(BX_READ_FPU_REG(0), status);
 460
 461      if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags, 1))
 462          return;
 463   }
 464
 465   write_virtual_dword(i->seg(), RMAddr(i), (Bit32u)(save_reg));
 466
 467   if (pop_stack)
 468      BX_CPU_THIS_PTR the_i387.FPU_pop();
 469 #else
 470   BX_INFO(("FIST(P)_DWORD_INTEGER: required FPU, configure --enable-fpu"));
 471 #endif
 472 }
 473
 474 void BX_CPP_AttrRegparmN(1) BX_CPU_C::FISTP_QWORD_INTEGER(bxInstruction_c *i)
 475 {
 476 #if BX_SUPPORT_FPU
 477   BX_CPU_THIS_PTR prepareFPU(i);
 478
 479   Bit64s save_reg = int64_indefinite; /* The masked response */
 480
 481   clear_C1();
 482
 483   if (IS_TAG_EMPTY(0))
 484   {
 485      BX_CPU_THIS_PTR FPU_exception(FPU_EX_Stack_Underflow);
 486
 487      if (! BX_CPU_THIS_PTR the_i387.is_IA_masked())
 488         return;
 489   }
 490   else
 491   {
 492      float_status_t status =
 493          FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
 494
 495      save_reg = floatx80_to_int64(BX_READ_FPU_REG(0), status);
 496
 497      if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags, 1))
 498          return;
 499   }
 500
 501   write_virtual_qword(i->seg(), RMAddr(i), (Bit64u)(save_reg));
 502   BX_CPU_THIS_PTR the_i387.FPU_pop();
 503 #else
 504   BX_INFO(("FISTP_QWORD_INTEGER: required FPU, configure --enable-fpu"));
 505 #endif
 506 }
 507
 508 void BX_CPP_AttrRegparmN(1) BX_CPU_C::FBSTP_PACKED_BCD(bxInstruction_c *i)
 509 {
 510 #if BX_SUPPORT_FPU
 511   BX_CPU_THIS_PTR prepareFPU(i);
 512
 513   /*
 514    * The packed BCD integer indefinite encoding (FFFFC000000000000000H)
 515    * is stored in response to a masked floating-point invalid-operation
 516    * exception.
 517    */
 518   Bit16u save_reg_hi = 0xFFFF;
 519   Bit64u save_reg_lo = BX_CONST64(0xC000000000000000);
 520
 521   clear_C1();
 522
 523   if (IS_TAG_EMPTY(0))
 524   {
 525      BX_CPU_THIS_PTR FPU_exception(FPU_EX_Stack_Underflow);
 526
 527      if (! BX_CPU_THIS_PTR the_i387.is_IA_masked())
 528         return;
 529   }
 530   else
 531   {
 532      float_status_t status =
 533         FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
 534
 535      floatx80 reg = BX_READ_FPU_REG(0);
 536
 537      Bit64s save_val = floatx80_to_int64(reg, status);
 538
 539      int sign = (reg.exp & 0x8000) != 0;
 540      if (sign)
 541         save_val = -save_val;
 542
 543      if (save_val > BX_CONST64(999999999999999999))
 544      {
 545         float_raise(status, float_flag_invalid);
 546      }
 547
 548      if (! (status.float_exception_flags & float_flag_invalid))
 549      {
 550         save_reg_hi = (sign) ? 0x8000 : 0;
 551         save_reg_lo = 0;
 552
 553         for (int i=0; i<16; i++)
 554         {
 555            save_reg_lo += ((Bit64u)(save_val % 10)) << (4*i);
 556            save_val /= 10;
 557         }
 558
 559         save_reg_hi += (Bit16u)(save_val % 10);
 560         save_val /= 10;
 561         save_reg_hi += (Bit16u)(save_val % 10) << 4;
 562     }
 563
 564     /* check for fpu arithmetic exceptions */
 565     if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags, 1))
 566         return;
 567   }
 568
 569   // write packed bcd to memory
 570   write_virtual_qword(i->seg(), RMAddr(i),     save_reg_lo);
 571   write_virtual_word (i->seg(), RMAddr(i) + 8, save_reg_hi);
 572
 573   BX_CPU_THIS_PTR the_i387.FPU_pop();
 574 #else
 575   BX_INFO(("FBSTP_PACKED_BCD: required FPU, configure --enable-fpu"));
 576 #endif
 577 }
 578
 579 /* DF /1 */
 580 void BX_CPP_AttrRegparmN(1) BX_CPU_C::FISTTP16(bxInstruction_c *i)
 581 {
 582 #if BX_SUPPORT_SSE >= 3
 583   BX_CPU_THIS_PTR prepareFPU(i);
 584
 585   Bit16s save_reg = int16_indefinite; /* The masked response */
 586
 587   clear_C1();
 588
 589   if (IS_TAG_EMPTY(0))
 590   {
 591      BX_CPU_THIS_PTR FPU_exception(FPU_EX_Stack_Underflow);
 592
 593      if (! BX_CPU_THIS_PTR the_i387.is_IA_masked())
 594         return;
 595   }
 596   else
 597   {
 598      float_status_t status =
 599          FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
 600
 601      save_reg = floatx80_to_int16_round_to_zero(BX_READ_FPU_REG(0), status);
 602
 603      if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags, 1))
 604         return;
 605   }
 606
 607   write_virtual_word(i->seg(), RMAddr(i), (Bit16u)(save_reg));
 608   BX_CPU_THIS_PTR the_i387.FPU_pop();
 609 #else
 610   BX_INFO(("FISTTP16: required SSE3, use --enable-sse option"));
 611   exception(BX_UD_EXCEPTION, 0, 0);
 612 #endif
 613 }
 614
 615 /* DB /1 */
 616 void BX_CPP_AttrRegparmN(1) BX_CPU_C::FISTTP32(bxInstruction_c *i)
 617 {
 618 #if BX_SUPPORT_SSE >= 3
 619   BX_CPU_THIS_PTR prepareFPU(i);
 620
 621   Bit32s save_reg = int32_indefinite; /* The masked response */
 622
 623   clear_C1();
 624
 625   if (IS_TAG_EMPTY(0))
 626   {
 627      BX_CPU_THIS_PTR FPU_exception(FPU_EX_Stack_Underflow);
 628
 629      if (! BX_CPU_THIS_PTR the_i387.is_IA_masked())
 630         return;
 631   }
 632   else
 633   {
 634      float_status_t status =
 635          FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
 636
 637      save_reg = floatx80_to_int32_round_to_zero(BX_READ_FPU_REG(0), status);
 638
 639      if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags, 1))
 640          return;
 641   }
 642
 643   write_virtual_dword(i->seg(), RMAddr(i), (Bit32u)(save_reg));
 644   BX_CPU_THIS_PTR the_i387.FPU_pop();
 645 #else
 646   BX_INFO(("FISTTP32: required SSE3, use --enable-sse option"));
 647   exception(BX_UD_EXCEPTION, 0, 0);
 648 #endif
 649 }
 650
 651 /* DD /1 */
 652 void BX_CPP_AttrRegparmN(1) BX_CPU_C::FISTTP64(bxInstruction_c *i)
 653 {
 654 #if BX_SUPPORT_SSE >= 3
 655   BX_CPU_THIS_PTR prepareFPU(i);
 656
 657   Bit64s save_reg = int64_indefinite; /* The masked response */
 658
 659   clear_C1();
 660
 661   if (IS_TAG_EMPTY(0))
 662   {
 663      BX_CPU_THIS_PTR FPU_exception(FPU_EX_Stack_Underflow);
 664
 665      if (! BX_CPU_THIS_PTR the_i387.is_IA_masked())
 666         return;
 667   }
 668   else
 669   {
 670      float_status_t status =
 671          FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
 672
 673      save_reg = floatx80_to_int64_round_to_zero(BX_READ_FPU_REG(0), status);
 674
 675      if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags, 1))
 676          return;
 677   }
 678
 679   write_virtual_qword(i->seg(), RMAddr(i), (Bit64u)(save_reg));
 680   BX_CPU_THIS_PTR the_i387.FPU_pop();
 681 #else
 682   BX_INFO(("FISTTP64: required SSE3, use --enable-sse option"));
 683   exception(BX_UD_EXCEPTION, 0, 0);
 684 #endif
 685 }
 686
 687 #endif