memory/memory.cc

   1 /////////////////////////////////////////////////////////////////////////
   2 // $Id: memory.cc,v 1.71 2008/10/18 18:10:14 sshwarts Exp $
   3 /////////////////////////////////////////////////////////////////////////
   4 //
   5 //  Copyright (C) 2001  MandrakeSoft S.A.
   6 //
   7 //    MandrakeSoft S.A.
   8 //    43, rue d'Aboukir
   9 //    75002 Paris - France
  10 //    http://www.linux-mandrake.com/
  11 //    http://www.mandrakesoft.com/
  12 //
  13 //  This library is free software; you can redistribute it and/or
  14 //  modify it under the terms of the GNU Lesser General Public
  15 //  License as published by the Free Software Foundation; either
  16 //  version 2 of the License, or (at your option) any later version.
  17 //
  18 //  This library is distributed in the hope that it will be useful,
  19 //  but WITHOUT ANY WARRANTY; without even the implied warranty of
  20 //  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  21 //  Lesser General Public License for more details.
  22 //
  23 //  You should have received a copy of the GNU Lesser General Public
  24 //  License along with this library; if not, write to the Free Software
  25 //  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  26 //
  27 /////////////////////////////////////////////////////////////////////////
  28
  29 #include "bochs.h"
  30 #include "cpu/cpu.h"
  31 #include "iodev/iodev.h"
  32 #define LOG_THIS BX_MEM_THIS
  33
  34 #if BX_PROVIDE_CPU_MEMORY
  35
  36 //
  37 // Memory map inside the 1st megabyte:
  38 //
  39 // 0x00000 - 0x7ffff    DOS area (512K)
  40 // 0x80000 - 0x9ffff    Optional fixed memory hole (128K)
  41 // 0xa0000 - 0xbffff    Standard PCI/ISA Video Mem / SMMRAM (128K)
  42 // 0xc0000 - 0xdffff    Expansion Card BIOS and Buffer Area (128K)
  43 // 0xe0000 - 0xeffff    Lower BIOS Area (64K)
  44 // 0xf0000 - 0xfffff    Upper BIOS Area (64K)
  45 //
  46
  47 void BX_MEM_C::writePhysicalPage(BX_CPU_C *cpu, bx_phy_address addr, unsigned len, void *data)
  48 {
  49   Bit8u *data_ptr;
  50   bx_phy_address a20addr = A20ADDR(addr);
  51   struct memory_handler_struct *memory_handler = NULL;
  52
  53   // Note: accesses should always be contained within a single page now
  54   if ((addr>>12) != ((addr+len-1)>>12)) {
  55     BX_PANIC(("writePhysicalPage: cross page access at address 0x" FMT_PHY_ADDRX ", len=%d", addr, len));
  56   }
  57
  58 #if BX_SUPPORT_MONITOR_MWAIT
  59   BX_MEM_THIS check_monitor(a20addr, len);
  60 #endif
  61
  62   if (cpu != NULL) {
  63 #if BX_SUPPORT_IODEBUG
  64     bx_iodebug_c::mem_write(cpu, a20addr, len, data);
  65 #endif
  66
  67     BX_INSTR_PHY_WRITE(cpu->which_cpu(), a20addr, len);
  68
  69 #if BX_SUPPORT_APIC
  70     bx_generic_apic_c *local_apic = &cpu->local_apic;
  71     if (local_apic->is_selected(a20addr, len)) {
  72       local_apic->write(a20addr, (Bit32u *)data, len);
  73       return;
  74     }
  75 #endif
  76
  77     if ((a20addr & 0xfffe0000) == 0x000a0000 && (BX_MEM_THIS smram_available))
  78     {
  79       // SMRAM memory space
  80       if (BX_MEM_THIS smram_enable || (cpu->smm_mode() && !BX_MEM_THIS smram_restricted))
  81         goto mem_write;
  82     }
  83   }
  84
  85   memory_handler = BX_MEM_THIS memory_handlers[a20addr >> 20];
  86   while (memory_handler) {
  87     if (memory_handler->begin <= a20addr &&
  88           memory_handler->end >= a20addr &&
  89           memory_handler->write_handler(a20addr, len, data, memory_handler->param))
  90     {
  91       return;
  92     }
  93     memory_handler = memory_handler->next;
  94   }
  95
  96 mem_write:
  97
  98   // all memory access feets in single 4K page
  99   if (a20addr < BX_MEM_THIS len) {
 100 #if BX_SUPPORT_ICACHE
 101     pageWriteStampTable.decWriteStamp(a20addr);
 102 #endif
 103     // all of data is within limits of physical memory
 104     if ((a20addr & 0xfff80000) != 0x00080000 || (a20addr <= 0x0009ffff))
 105     {
 106       if (len == 8) {
 107         WriteHostQWordToLittleEndian(BX_MEM_THIS get_vector(a20addr), *(Bit64u*)data);
 108         return;
 109       }
 110       if (len == 4) {
 111         WriteHostDWordToLittleEndian(BX_MEM_THIS get_vector(a20addr), *(Bit32u*)data);
 112         return;
 113       }
 114       if (len == 2) {
 115         WriteHostWordToLittleEndian(BX_MEM_THIS get_vector(a20addr), *(Bit16u*)data);
 116         return;
 117       }
 118       if (len == 1) {
 119         * (BX_MEM_THIS get_vector(a20addr)) = * (Bit8u *) data;
 120         return;
 121       }
 122       // len == other, just fall thru to special cases handling
 123     }
 124
 125 #ifdef BX_LITTLE_ENDIAN
 126     data_ptr = (Bit8u *) data;
 127 #else // BX_BIG_ENDIAN
 128     data_ptr = (Bit8u *) data + (len - 1);
 129 #endif
 130
 131     if ((a20addr & 0xfff80000) != 0x00080000 || (a20addr <= 0x0009ffff))
 132     {
 133       while(1) {
 134         // addr *not* in range 000A0000 .. 000FFFFF
 135         *(BX_MEM_THIS get_vector(a20addr)) = *data_ptr;
 136         if (len == 1) return;
 137         len--;
 138         a20addr++;
 139 #ifdef BX_LITTLE_ENDIAN
 140         data_ptr++;
 141 #else // BX_BIG_ENDIAN
 142         data_ptr--;
 143 #endif
 144       }
 145     }
 146
 147     // addr must be in range 000A0000 .. 000FFFFF
 148
 149     for(unsigned i=0; i<len; i++) {
 150
 151       // SMMRAM
 152       if (a20addr <= 0x000bffff) {
 153         // devices are not allowed to access SMMRAM under VGA memory
 154         if (cpu) {
 155           *(BX_MEM_THIS get_vector(a20addr)) = *data_ptr;
 156         }
 157         goto inc_one;
 158       }
 159
 160       // adapter ROM     C0000 .. DFFFF
 161       // ROM BIOS memory E0000 .. FFFFF
 162 #if BX_SUPPORT_PCI == 0
 163       // ignore write to ROM
 164 #else
 165       // Write Based on 440fx Programming
 166       if (BX_MEM_THIS pci_enabled && ((a20addr & 0xfffc0000) == 0x000c0000))
 167       {
 168         switch (DEV_pci_wr_memtype(a20addr)) {
 169           case 0x1:   // Writes to ShadowRAM
 170             BX_DEBUG(("Writing to ShadowRAM: address 0x" FMT_PHY_ADDRX ", data %02x", a20addr, *data_ptr));
 171             *(BX_MEM_THIS get_vector(a20addr)) = *data_ptr;
 172             break;
 173
 174           case 0x0:   // Writes to ROM, Inhibit
 175             BX_DEBUG(("Write to ROM ignored: address 0x" FMT_PHY_ADDRX ", data %02x", a20addr, *data_ptr));
 176             break;
 177
 178           default:
 179             BX_PANIC(("writePhysicalPage: default case"));
 180         }
 181       }
 182 #endif
 183
 184 inc_one:
 185       a20addr++;
 186 #ifdef BX_LITTLE_ENDIAN
 187       data_ptr++;
 188 #else // BX_BIG_ENDIAN
 189       data_ptr--;
 190 #endif
 191
 192     }
 193   }
 194   else {
 195     // access outside limits of physical memory, ignore
 196     BX_DEBUG(("Write outside the limits of physical memory (0x"FMT_PHY_ADDRX") (ignore)", a20addr));
 197   }
 198 }
 199
 200 void BX_MEM_C::readPhysicalPage(BX_CPU_C *cpu, bx_phy_address addr, unsigned len, void *data)
 201 {
 202   Bit8u *data_ptr;
 203   bx_phy_address a20addr = A20ADDR(addr);
 204   struct memory_handler_struct *memory_handler = NULL;
 205
 206   // Note: accesses should always be contained within a single page now
 207   if ((addr>>12) != ((addr+len-1)>>12)) {
 208     BX_PANIC(("readPhysicalPage: cross page access at address 0x" FMT_PHY_ADDRX ", len=%d", addr, len));
 209   }
 210
 211   if (cpu != NULL) {
 212 #if BX_SUPPORT_IODEBUG
 213     bx_iodebug_c::mem_read(cpu, a20addr, len, data);
 214 #endif
 215
 216     BX_INSTR_PHY_READ(cpu->which_cpu(), a20addr, len);
 217
 218 #if BX_SUPPORT_APIC
 219     bx_generic_apic_c *local_apic = &cpu->local_apic;
 220     if (local_apic->is_selected (a20addr, len)) {
 221       local_apic->read(a20addr, data, len);
 222       return;
 223     }
 224 #endif
 225
 226     if ((a20addr & 0xfffe0000) == 0x000a0000 && (BX_MEM_THIS smram_available))
 227     {
 228       // SMRAM memory space
 229       if (BX_MEM_THIS smram_enable || (cpu->smm_mode() && !BX_MEM_THIS smram_restricted))
 230         goto mem_read;
 231     }
 232   }
 233
 234   memory_handler = BX_MEM_THIS memory_handlers[a20addr >> 20];
 235   while (memory_handler) {
 236     if (memory_handler->begin <= a20addr &&
 237           memory_handler->end >= a20addr &&
 238           memory_handler->read_handler(a20addr, len, data, memory_handler->param))
 239     {
 240       return;
 241     }
 242     memory_handler = memory_handler->next;
 243   }
 244
 245 mem_read:
 246
 247   if (a20addr <= BX_MEM_THIS len) {
 248     // all of data is within limits of physical memory
 249     if ((a20addr & 0xfff80000) != 0x00080000 || (a20addr <= 0x0009ffff))
 250     {
 251       if (len == 8) {
 252         ReadHostQWordFromLittleEndian(BX_MEM_THIS get_vector(a20addr), * (Bit64u*) data);
 253         return;
 254       }
 255       if (len == 4) {
 256         ReadHostDWordFromLittleEndian(BX_MEM_THIS get_vector(a20addr), * (Bit32u*) data);
 257         return;
 258       }
 259       if (len == 2) {
 260         ReadHostWordFromLittleEndian(BX_MEM_THIS get_vector(a20addr), * (Bit16u*) data);
 261         return;
 262       }
 263       if (len == 1) {
 264         * (Bit8u *) data = * (BX_MEM_THIS get_vector(a20addr));
 265         return;
 266       }
 267       // len == other case can just fall thru to special cases handling
 268     }
 269
 270 #ifdef BX_LITTLE_ENDIAN
 271     data_ptr = (Bit8u *) data;
 272 #else // BX_BIG_ENDIAN
 273     data_ptr = (Bit8u *) data + (len - 1);
 274 #endif
 275
 276     if ((a20addr & 0xfff80000) != 0x00080000 || (a20addr <= 0x0009ffff))
 277     {
 278       while(1) {
 279         // addr *not* in range 00080000 .. 000FFFFF
 280         *data_ptr = *(BX_MEM_THIS get_vector(a20addr));
 281         if (len == 1) return;
 282         len--;
 283         a20addr++;
 284 #ifdef BX_LITTLE_ENDIAN
 285         data_ptr++;
 286 #else // BX_BIG_ENDIAN
 287         data_ptr--;
 288 #endif
 289       }
 290     }
 291
 292     // addr must be in range 000A0000 .. 000FFFFF
 293
 294     for (unsigned i=0; i<len; i++) {
 295
 296       // SMMRAM
 297       if (a20addr <= 0x000bffff) {
 298         // devices are not allowed to access SMMRAM under VGA memory
 299         if (cpu) *data_ptr = *(BX_MEM_THIS get_vector(a20addr));
 300         goto inc_one;
 301       }
 302
 303 #if BX_SUPPORT_PCI
 304       if (BX_MEM_THIS pci_enabled && ((a20addr & 0xfffc0000) == 0x000c0000))
 305       {
 306         switch (DEV_pci_rd_memtype(a20addr)) {
 307           case 0x0:  // Read from ROM
 308             if ((a20addr & 0xfffe0000) == 0x000e0000) {
 309               *data_ptr = BX_MEM_THIS rom[a20addr & BIOS_MASK];
 310             }
 311             else {
 312               *data_ptr = BX_MEM_THIS rom[(a20addr & EXROM_MASK) + BIOSROMSZ];
 313             }
 314             break;
 315           case 0x1:  // Read from ShadowRAM
 316             *data_ptr = *(BX_MEM_THIS get_vector(a20addr));
 317             break;
 318           default:
 319             BX_PANIC(("readPhysicalPage: default case"));
 320         }
 321       }
 322       else
 323 #endif  // #if BX_SUPPORT_PCI
 324       {
 325         if ((a20addr & 0xfffc0000) != 0x000c0000) {
 326           *data_ptr = *(BX_MEM_THIS get_vector(a20addr));
 327         }
 328         else if ((a20addr & 0xfffe0000) == 0x000e0000) {
 329           *data_ptr = BX_MEM_THIS rom[a20addr & BIOS_MASK];
 330         }
 331         else {
 332           *data_ptr = BX_MEM_THIS rom[(a20addr & EXROM_MASK) + BIOSROMSZ];
 333         }
 334       }
 335
 336 inc_one:
 337       a20addr++;
 338 #ifdef BX_LITTLE_ENDIAN
 339       data_ptr++;
 340 #else // BX_BIG_ENDIAN
 341       data_ptr--;
 342 #endif
 343
 344     }
 345   }
 346   else
 347   {  // access outside limits of physical memory
 348
 349 #ifdef BX_LITTLE_ENDIAN
 350     data_ptr = (Bit8u *) data;
 351 #else // BX_BIG_ENDIAN
 352     data_ptr = (Bit8u *) data + (len - 1);
 353 #endif
 354
 355     for (unsigned i = 0; i < len; i++) {
 356 #if BX_PHY_ADDRESS_LONG
 357       if (a20addr >= BX_CONST64(0xFFFFFFFF))
 358         *data_ptr = 0xff;
 359       else
 360 #endif
 361       if (a20addr >= (bx_phy_address)~BIOS_MASK)
 362         *data_ptr = BX_MEM_THIS rom[a20addr & BIOS_MASK];
 363       else
 364         *data_ptr = 0xff;
 365       addr++;
 366       a20addr = (addr);
 367 #ifdef BX_LITTLE_ENDIAN
 368       data_ptr++;
 369 #else // BX_BIG_ENDIAN
 370       data_ptr--;
 371 #endif
 372     }
 373   }
 374 }
 375
 376 #endif // #if BX_PROVIDE_CPU_MEMORY