bx_debug/debug.h

   1 /////////////////////////////////////////////////////////////////////////
   2 // $Id: debug.h,v 1.47 2008/10/08 17:13:35 sshwarts Exp $
   3 /////////////////////////////////////////////////////////////////////////
   4 //
   5 //  Copyright (C) 2001  MandrakeSoft S.A.
   6 //
   7 //    MandrakeSoft S.A.
   8 //    43, rue d'Aboukir
   9 //    75002 Paris - France
  10 //    http://www.linux-mandrake.com/
  11 //    http://www.mandrakesoft.com/
  12 //
  13 //  This library is free software; you can redistribute it and/or
  14 //  modify it under the terms of the GNU Lesser General Public
  15 //  License as published by the Free Software Foundation; either
  16 //  version 2 of the License, or (at your option) any later version.
  17 //
  18 //  This library is distributed in the hope that it will be useful,
  19 //  but WITHOUT ANY WARRANTY; without even the implied warranty of
  20 //  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  21 //  Lesser General Public License for more details.
  22 //
  23 //  You should have received a copy of the GNU Lesser General Public
  24 //  License along with this library; if not, write to the Free Software
  25 //  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  26
  27
  28 // if including from C parser, need basic types etc
  29 #include "config.h"
  30 #include "osdep.h"
  31
  32 #define BX_DBG_NO_HANDLE 1000
  33
  34 extern Bit32u dbg_cpu;
  35
  36 Bit32u crc32(const Bit8u *buf, int len);
  37
  38 #if BX_DEBUGGER
  39
  40 // some strict C declarations needed by the parser/lexer
  41 #ifdef __cplusplus
  42 extern "C" {
  43 #endif
  44
  45 void dbg_printf (const char *fmt, ...);
  46
  47 typedef enum {
  48   BX_DBG_SREG_ES,
  49   BX_DBG_SREG_CS,
  50   BX_DBG_SREG_SS,
  51   BX_DBG_SREG_DS,
  52   BX_DBG_SREG_FS,
  53   BX_DBG_SREG_GS
  54 } SRegs;
  55
  56 #if BX_SUPPORT_X86_64
  57 # define BX_DBG_GEN_REGISTERS 16
  58 #else
  59 # define BX_DBG_GEN_REGISTERS 8
  60 #endif
  61
  62 typedef enum {
  63   BX_DBG_REG8H_AH,
  64   BX_DBG_REG8H_CH,
  65   BX_DBG_REG8H_DH,
  66   BX_DBG_REG8H_BH,
  67 } Regs8H;
  68
  69 #if BX_SUPPORT_X86_64
  70
  71 typedef enum {
  72   BX_DBG_REG8L_AL,
  73   BX_DBG_REG8L_CL,
  74   BX_DBG_REG8L_DL,
  75   BX_DBG_REG8L_BL,
  76   BX_DBG_REG8L_SPL,
  77   BX_DBG_REG8L_BPL,
  78   BX_DBG_REG8L_SIL,
  79   BX_DBG_REG8L_DIL,
  80   BX_DBG_REG8L_R8,
  81   BX_DBG_REG8L_R9,
  82   BX_DBG_REG8L_R10,
  83   BX_DBG_REG8L_R11,
  84   BX_DBG_REG8L_R12,
  85   BX_DBG_REG8L_R13,
  86   BX_DBG_REG8L_R14,
  87   BX_DBG_REG8L_R15
  88 } Regs8L;
  89
  90 typedef enum {
  91   BX_DBG_REG16_AX,
  92   BX_DBG_REG16_CX,
  93   BX_DBG_REG16_DX,
  94   BX_DBG_REG16_BX,
  95   BX_DBG_REG16_SP,
  96   BX_DBG_REG16_BP,
  97   BX_DBG_REG16_SI,
  98   BX_DBG_REG16_DI,
  99   BX_DBG_REG16_R8,
 100   BX_DBG_REG16_R9,
 101   BX_DBG_REG16_R10,
 102   BX_DBG_REG16_R11,
 103   BX_DBG_REG16_R12,
 104   BX_DBG_REG16_R13,
 105   BX_DBG_REG16_R14,
 106   BX_DBG_REG16_R15
 107 } Regs16;
 108
 109 typedef enum {
 110   BX_DBG_REG32_EAX,
 111   BX_DBG_REG32_ECX,
 112   BX_DBG_REG32_EDX,
 113   BX_DBG_REG32_EBX,
 114   BX_DBG_REG32_ESP,
 115   BX_DBG_REG32_EBP,
 116   BX_DBG_REG32_ESI,
 117   BX_DBG_REG32_EDI,
 118   BX_DBG_REG32_R8,
 119   BX_DBG_REG32_R9,
 120   BX_DBG_REG32_R10,
 121   BX_DBG_REG32_R11,
 122   BX_DBG_REG32_R12,
 123   BX_DBG_REG32_R13,
 124   BX_DBG_REG32_R14,
 125   BX_DBG_REG32_R15
 126 } Regs32;
 127
 128 typedef enum {
 129   BX_DBG_REG64_RAX,
 130   BX_DBG_REG64_RCX,
 131   BX_DBG_REG64_RDX,
 132   BX_DBG_REG64_RBX,
 133   BX_DBG_REG64_RSP,
 134   BX_DBG_REG64_RBP,
 135   BX_DBG_REG64_RSI,
 136   BX_DBG_REG64_RDI,
 137   BX_DBG_REG64_R8,
 138   BX_DBG_REG64_R9,
 139   BX_DBG_REG64_R10,
 140   BX_DBG_REG64_R11,
 141   BX_DBG_REG64_R12,
 142   BX_DBG_REG64_R13,
 143   BX_DBG_REG64_R14,
 144   BX_DBG_REG64_R15
 145 } Regs64;
 146
 147 #else
 148
 149 typedef enum {
 150   BX_DBG_REG8L_AL,
 151   BX_DBG_REG8L_CL,
 152   BX_DBG_REG8L_DL,
 153   BX_DBG_REG8L_BL
 154 } Regs8L;
 155
 156 typedef enum {
 157   BX_DBG_REG16_AX,
 158   BX_DBG_REG16_CX,
 159   BX_DBG_REG16_DX,
 160   BX_DBG_REG16_BX,
 161   BX_DBG_REG16_SP,
 162   BX_DBG_REG16_BP,
 163   BX_DBG_REG16_SI,
 164   BX_DBG_REG16_DI
 165 } Regs16;
 166
 167 typedef enum {
 168   BX_DBG_REG32_EAX,
 169   BX_DBG_REG32_ECX,
 170   BX_DBG_REG32_EDX,
 171   BX_DBG_REG32_EBX,
 172   BX_DBG_REG32_ESP,
 173   BX_DBG_REG32_EBP,
 174   BX_DBG_REG32_ESI,
 175   BX_DBG_REG32_EDI
 176 } Regs32;
 177
 178 #endif
 179
 180 typedef enum
 181 {
 182   bkRegular,
 183   bkAtIP,
 184   bkStepOver
 185 } BreakpointKind;
 186
 187 typedef enum _show_flags {
 188   Flag_call    = 0x1,
 189   Flag_ret     = 0x2,
 190   Flag_softint = 0x4,
 191   Flag_iret    = 0x8,
 192   Flag_intsig  = 0x10,
 193   Flag_mode    = 0x20
 194 } show_flags_t;
 195
 196 // Flex defs
 197 extern int bxlex(void);
 198 extern char *bxtext;  // Using the pointer option rather than array
 199 extern int bxwrap(void);
 200 void bx_add_lex_input(char *buf);
 201
 202 // Yacc defs
 203 extern int bxparse(void);
 204 extern void bxerror(char *s);
 205
 206 #define EMPTY_ARG (-1)
 207
 208 Bit16u bx_dbg_get_selector_value(unsigned int seg_no);
 209 Bit16u bx_dbg_get_ip (void);
 210 Bit32u bx_dbg_get_eip(void);
 211 bx_address bx_dbg_get_instruction_pointer(void);
 212 Bit8u bx_dbg_get_reg8l_value(unsigned reg);
 213 Bit8u bx_dbg_get_reg8h_value(unsigned reg);
 214 Bit16u bx_dbg_get_reg16_value(unsigned reg);
 215 Bit32u bx_dbg_get_reg32_value(unsigned reg);
 216 Bit64u bx_dbg_get_reg64_value(unsigned reg);
 217 void bx_dbg_set_reg8l_value(unsigned reg, Bit8u value);
 218 void bx_dbg_set_reg8h_value(unsigned reg, Bit8u value);
 219 void bx_dbg_set_reg16_value(unsigned reg, Bit16u value);
 220 void bx_dbg_set_reg32_value(unsigned reg, Bit32u value);
 221 void bx_dbg_set_reg64_value(unsigned reg, Bit64u value);
 222 Bit32u bx_dbg_get_laddr(Bit16u sel, Bit32u ofs);
 223 void bx_dbg_step_over_command(void);
 224 void bx_dbg_trace_command(bx_bool enable);
 225 void bx_dbg_trace_reg_command(bx_bool enable);
 226 void bx_dbg_trace_mem_command(bx_bool enable);
 227 void bx_dbg_ptime_command(void);
 228 void bx_dbg_timebp_command(bx_bool absolute, Bit64u time);
 229 #define MAX_CONCURRENT_BPS 5
 230 extern int timebp_timer;
 231 extern Bit64u timebp_queue[MAX_CONCURRENT_BPS];
 232 extern int timebp_queue_size;
 233 void bx_dbg_record_command(char*);
 234 void bx_dbg_playback_command(char*);
 235 void bx_dbg_modebp_command(void);
 236 void bx_dbg_where_command(void);
 237 void bx_dbg_print_string_command(bx_address addr);
 238 void bx_dbg_xlate_address(bx_lin_address address);
 239 void bx_dbg_show_command(const char*);
 240 void bx_dbg_print_stack_command(unsigned nwords);
 241 extern bx_bool watchpoint_continue;
 242 void bx_dbg_watch(int type, bx_phy_address address);
 243 void bx_dbg_unwatch(bx_phy_address handle);
 244 void bx_dbg_continue_command(void);
 245 void bx_dbg_stepN_command(Bit32u count);
 246 void bx_dbg_set_auto_disassemble(bx_bool enable);
 247 void bx_dbg_disassemble_switch_mode(void);
 248 void bx_dbg_set_disassemble_size(unsigned size);
 249 void bx_dbg_del_breakpoint_command(unsigned handle);
 250 void bx_dbg_en_dis_breakpoint_command(unsigned handle, bx_bool enable);
 251 bx_bool bx_dbg_en_dis_pbreak(unsigned handle, bx_bool enable);
 252 bx_bool bx_dbg_en_dis_lbreak(unsigned handle, bx_bool enable);
 253 bx_bool bx_dbg_en_dis_vbreak(unsigned handle, bx_bool enable);
 254 bx_bool bx_dbg_del_pbreak(unsigned handle);
 255 bx_bool bx_dbg_del_lbreak(unsigned handle);
 256 bx_bool bx_dbg_del_vbreak(unsigned handle);
 257 int bx_dbg_vbreakpoint_command(BreakpointKind bk, Bit32u cs, bx_address eip);
 258 int bx_dbg_lbreakpoint_command(BreakpointKind bk, bx_address laddress);
 259 int bx_dbg_pbreakpoint_command(BreakpointKind bk, bx_phy_address paddress);
 260 void bx_dbg_info_bpoints_command(void);
 261 void bx_dbg_quit_command(void);
 262 #define BX_INFO_GENERAL_PURPOSE_REGS 1 /* bitmasks - choices for bx_dbg_info_registers_command */
 263 #define BX_INFO_FPU_REGS 2
 264 #define BX_INFO_MMX_REGS 4
 265 #define BX_INFO_SSE_REGS 8
 266 void bx_dbg_info_registers_command(int);
 267 void bx_dbg_info_dirty_command(void);
 268 void bx_dbg_info_ivt_command(unsigned from, unsigned to);
 269 void bx_dbg_info_idt_command(unsigned from, unsigned to);
 270 void bx_dbg_info_gdt_command(unsigned from, unsigned to);
 271 void bx_dbg_info_ldt_command(unsigned from, unsigned to);
 272 void bx_dbg_info_tss_command(void);
 273 void bx_dbg_info_control_regs_command(void);
 274 void bx_dbg_info_segment_regs_command(void);
 275 void bx_dbg_info_flags(void);
 276 void bx_dbg_info_linux_command(void);
 277 void bx_dbg_examine_command(char *command, char *format, bx_bool format_passed,
 278                     bx_address addr, bx_bool addr_passed);
 279 void bx_dbg_setpmem_command(bx_phy_address addr, unsigned len, Bit32u val);
 280 void bx_dbg_query_command(const char *);
 281 void bx_dbg_take_command(const char *, unsigned n);
 282 void bx_dbg_disassemble_current(const char *);
 283 void bx_dbg_disassemble_command(const char *, Bit64u from, Bit64u to);
 284 void bx_dbg_instrument_command(const char *);
 285 void bx_dbg_doit_command(unsigned);
 286 void bx_dbg_crc_command(bx_phy_address addr1, bx_phy_address addr2);
 287 void bx_dbg_linux_syscall(unsigned which_cpu);
 288 void bx_dbg_info_ne2k(int page, int reg);
 289 void bx_dbg_info_pic(void);
 290 void bx_dbg_info_vga(void);
 291 void bx_dbg_info_pci(void);
 292 void bx_dbg_print_help(void);
 293 void bx_dbg_calc_command(Bit64u value);
 294 void bx_dbg_dump_table(void);
 295
 296 // callbacks from CPU
 297 void bx_dbg_exception(unsigned cpu, Bit8u vector, Bit16u error_code);
 298 void bx_dbg_interrupt(unsigned cpu, Bit8u vector, Bit16u error_code);
 299 void bx_dbg_halt(unsigned cpu);
 300
 301 // memory trace callbacks from CPU, len=1,2,4 or 8
 302 void bx_dbg_lin_memory_access(unsigned cpu, bx_address lin, bx_phy_address phy, unsigned len, unsigned pl, unsigned rw, Bit8u *data);
 303 void bx_dbg_phy_memory_access(unsigned cpu, bx_phy_address phy, unsigned len, unsigned rw, Bit8u *data);
 304
 305 // check memory access for watchpoints
 306 void bx_dbg_check_memory_watchpoints(unsigned cpu, bx_phy_address phy, unsigned len, unsigned rw);
 307
 308 // commands that work with Bochs param tree
 309 void bx_dbg_restore_command(const char *param_name, const char *path);
 310 void bx_dbg_show_param_command(char *param);
 311
 312 int bx_dbg_show_symbolic(void);
 313 void bx_dbg_set_symbol_command(char *symbol, Bit32u val);
 314 char* bx_dbg_symbolic_address(Bit32u context, Bit32u eip, Bit32u base);
 315 char* bx_dbg_symbolic_address_16bit(Bit32u eip, Bit32u cs);
 316 int bx_dbg_symbol_command(char* filename, bx_bool global, Bit32u offset);
 317 void bx_dbg_info_symbols_command(char *Symbol);
 318 int bx_dbg_lbreakpoint_symbol_command(char *Symbol);
 319 Bit32u bx_dbg_get_symbol_value(char *Symbol);
 320 char* bx_dbg_disasm_symbolic_address(Bit32u eip, Bit32u base);
 321
 322 #ifdef __cplusplus
 323 }
 324 #endif
 325
 326 // the rest for C++
 327 #ifdef __cplusplus
 328
 329 typedef enum {
 330   STOP_NO_REASON = 0,
 331   STOP_TIME_BREAK_POINT,
 332   STOP_READ_WATCH_POINT,
 333   STOP_WRITE_WATCH_POINT,
 334   STOP_MAGIC_BREAK_POINT,
 335   STOP_MODE_BREAK_POINT,
 336   STOP_CPU_HALTED
 337 } stop_reason_t;
 338
 339 typedef enum {
 340   BREAK_POINT_MAGIC, BREAK_POINT_READ, BREAK_POINT_WRITE, BREAK_POINT_TIME
 341 } break_point_t;
 342
 343 #define BX_DBG_REG_EIP          10
 344 #define BX_DBG_REG_EFLAGS       11
 345 #define BX_DBG_REG_CS           20
 346 #define BX_DBG_REG_SS           21
 347 #define BX_DBG_REG_DS           22
 348 #define BX_DBG_REG_ES           23
 349 #define BX_DBG_REG_FS           24
 350 #define BX_DBG_REG_GS           25
 351 #define BX_DBG_REG_CR0          30
 352 #define BX_DBG_REG_CR2          32
 353 #define BX_DBG_REG_CR3          33
 354 #define BX_DBG_REG_CR4          34
 355
 356 #define BX_DBG_PENDING_DMA 1
 357 #define BX_DBG_PENDING_IRQ 2
 358
 359 void bx_debug_break(void);
 360
 361 void bx_dbg_exit(int code);
 362 #if BX_DBG_EXTENSIONS
 363     int bx_dbg_extensions(char *command);
 364 #else
 365 #define bx_dbg_extensions(command) 0
 366 #endif
 367
 368 //
 369 // code for guards...
 370 //
 371
 372 #define BX_DBG_GUARD_IADDR_VIR     0x0001
 373 #define BX_DBG_GUARD_IADDR_LIN     0x0002
 374 #define BX_DBG_GUARD_IADDR_PHY     0x0004
 375 #define BX_DBG_GUARD_IADDR_ALL (BX_DBG_GUARD_IADDR_VIR | \
 376                                 BX_DBG_GUARD_IADDR_LIN | \
 377                                 BX_DBG_GUARD_IADDR_PHY)
 378
 379 #define BX_DBG_GUARD_CTRL_C        0x0100
 380
 381 typedef struct {
 382   unsigned long guard_for;
 383
 384   // instruction address breakpoints
 385   struct {
 386 #if (BX_DBG_MAX_VIR_BPOINTS > 0)
 387     unsigned num_virtual;
 388     struct {
 389       Bit32u cs;  // only use 16 bits
 390       bx_address eip;
 391       unsigned bpoint_id;
 392       bx_bool enabled;
 393     } vir[BX_DBG_MAX_VIR_BPOINTS];
 394 #endif
 395
 396 #if (BX_DBG_MAX_LIN_BPOINTS > 0)
 397     unsigned num_linear;
 398     struct {
 399       bx_address addr;
 400       unsigned bpoint_id;
 401       bx_bool enabled;
 402     } lin[BX_DBG_MAX_LIN_BPOINTS];
 403 #endif
 404
 405 #if (BX_DBG_MAX_PHY_BPOINTS > 0)
 406     unsigned num_physical;
 407     struct {
 408       bx_phy_address addr; // physical address is 32 bits only
 409       unsigned bpoint_id;
 410       bx_bool enabled;
 411     } phy[BX_DBG_MAX_PHY_BPOINTS];
 412 #endif
 413   } iaddr;
 414
 415   // user typed Ctrl-C, requesting simulator stop at next convient spot
 416   volatile bx_bool interrupt_requested;
 417
 418   // booleans to control whether simulator should report events
 419   // to debug controller
 420   struct {
 421     bx_bool irq;
 422     bx_bool a20;
 423     bx_bool io;
 424     bx_bool ucmem;
 425     bx_bool dma;
 426   } report;
 427
 428   struct {
 429     bx_bool irq;  // should process IRQs asynchronously
 430     bx_bool dma;  // should process DMAs asynchronously
 431   } async;
 432
 433 #define BX_DBG_ASYNC_PENDING_A20   0x01
 434 #define BX_DBG_ASYNC_PENDING_RESET 0x02
 435 #define BX_DBG_ASYNC_PENDING_NMI   0x04
 436
 437   // Asynchronous changes which are pending.  These are Q'd by
 438   // the debugger, as the master simulator is notified of a pending
 439   // async change.  At the simulator's next point, where it checks for
 440   // such events, it notifies the debugger with acknowlegement.  This
 441   // field contains a logically or'd list of all events which should
 442   // be checked, and ack'd.
 443   struct {
 444     unsigned which; // logical OR of above constants
 445     bx_bool a20;
 446     bx_bool reset;
 447     bx_bool nmi;
 448   } async_changes_pending;
 449 } bx_guard_t;
 450
 451 // working information for each simulator to update when a guard
 452 // is reached (found)
 453 typedef struct bx_guard_found_t {
 454   unsigned long guard_found;
 455   unsigned iaddr_index;
 456   Bit64u icount; // number of completed instructions from last breakpoint hit
 457   Bit32u  cs; // cs:eip and linear addr of instruction at guard point
 458   bx_address eip;
 459   bx_address laddr;
 460   bx_bool is_32bit_code; // CS seg size at guard point
 461   bx_bool is_64bit_code;
 462   bx_bool ctrl_c; // simulator stopped due to Ctrl-C request
 463   Bit64u  time_tick; // time tick when guard reached
 464 } bx_guard_found_t;
 465
 466 extern bx_guard_t bx_guard;
 467
 468 void bx_dbg_init_infile(void);
 469 int  bx_dbg_set_rcfile(const char *rcfile);
 470 int  bx_dbg_main(void);
 471 void bx_dbg_user_input_loop(void);
 472 void bx_dbg_interpret_line(char *cmd);
 473
 474 typedef struct {
 475   Bit16u sel;
 476   Bit32u des_l, des_h, valid;
 477 } bx_dbg_sreg_t;
 478
 479 typedef struct {
 480   bx_address base;
 481   Bit16u limit;
 482 } bx_dbg_global_sreg_t;
 483
 484 void bx_dbg_dma_report(bx_phy_address addr, unsigned len, unsigned what, Bit32u val);
 485 void bx_dbg_iac_report(unsigned vector, unsigned irq);
 486 void bx_dbg_a20_report(unsigned val);
 487 void bx_dbg_io_report(Bit32u port, unsigned size, unsigned op, Bit32u val);
 488 void bx_dbg_ucmem_report(Bit32u addr, unsigned size, unsigned op, Bit32u val);
 489 void bx_dbg_disassemble_current(int which_cpu, int print_time);
 490
 491 #endif // #ifdef __cplusplus
 492
 493 #endif // #if BX_DEBUGGER