package/dhcp/S80dhcp-server: allow empty INTERFACES
[buildroot-gz.git] / arch / Config.in.x86
blob771c20f475438d664da0f1d9c12f69799704899a
1 # i386/x86_64 cpu features
2 config BR2_X86_CPU_HAS_MMX
3 bool
4 config BR2_X86_CPU_HAS_SSE
5 bool
6 config BR2_X86_CPU_HAS_SSE2
7 bool
8 config BR2_X86_CPU_HAS_SSE3
9 bool
10 config BR2_X86_CPU_HAS_SSSE3
11 bool
12 config BR2_X86_CPU_HAS_SSE4
13 bool
14 config BR2_X86_CPU_HAS_SSE42
15 bool
16 config BR2_X86_CPU_HAS_AVX
17 bool
18 config BR2_X86_CPU_HAS_AVX2
19 bool
21 choice
22 prompt "Target Architecture Variant"
23 depends on BR2_i386 || BR2_x86_64
24 default BR2_x86_i586 if BR2_i386
25 help
26 Specific CPU variant to use
28 config BR2_x86_i386
29 bool "i386"
30 depends on !BR2_x86_64
31 config BR2_x86_i486
32 bool "i486"
33 depends on !BR2_x86_64
34 config BR2_x86_i586
35 bool "i586"
36 depends on !BR2_x86_64
37 config BR2_x86_x1000
38 bool "x1000"
39 depends on !BR2_x86_64
40 help
41 The Intel X1000 is a Pentium class microprocessor in the
42 Quark (sub-Atom) Product Line. The X1000 has a bug on the
43 lock prefix requiring that prefix must be stripped at build
44 time.
46 See https://en.wikipedia.org/wiki/Intel_Quark
48 config BR2_x86_i686
49 bool "i686"
50 depends on !BR2_x86_64
51 config BR2_x86_pentiumpro
52 bool "pentium pro"
53 depends on !BR2_x86_64
54 config BR2_x86_pentium_mmx
55 bool "pentium MMX"
56 select BR2_X86_CPU_HAS_MMX
57 depends on !BR2_x86_64
58 config BR2_x86_pentium_m
59 bool "pentium mobile"
60 select BR2_X86_CPU_HAS_MMX
61 select BR2_X86_CPU_HAS_SSE
62 depends on !BR2_x86_64
63 config BR2_x86_pentium2
64 bool "pentium2"
65 select BR2_X86_CPU_HAS_MMX
66 depends on !BR2_x86_64
67 config BR2_x86_pentium3
68 bool "pentium3"
69 select BR2_X86_CPU_HAS_MMX
70 select BR2_X86_CPU_HAS_SSE
71 depends on !BR2_x86_64
72 config BR2_x86_pentium4
73 bool "pentium4"
74 select BR2_X86_CPU_HAS_MMX
75 select BR2_X86_CPU_HAS_SSE
76 select BR2_X86_CPU_HAS_SSE2
77 depends on !BR2_x86_64
78 config BR2_x86_prescott
79 bool "prescott"
80 select BR2_X86_CPU_HAS_MMX
81 select BR2_X86_CPU_HAS_SSE
82 select BR2_X86_CPU_HAS_SSE2
83 select BR2_X86_CPU_HAS_SSE3
84 depends on !BR2_x86_64
85 config BR2_x86_nocona
86 bool "nocona"
87 select BR2_X86_CPU_HAS_MMX
88 select BR2_X86_CPU_HAS_SSE
89 select BR2_X86_CPU_HAS_SSE2
90 select BR2_X86_CPU_HAS_SSE3
91 config BR2_x86_core2
92 bool "core2"
93 select BR2_X86_CPU_HAS_MMX
94 select BR2_X86_CPU_HAS_SSE
95 select BR2_X86_CPU_HAS_SSE2
96 select BR2_X86_CPU_HAS_SSE3
97 select BR2_X86_CPU_HAS_SSSE3
98 config BR2_x86_corei7
99 bool "corei7"
100 select BR2_X86_CPU_HAS_MMX
101 select BR2_X86_CPU_HAS_SSE
102 select BR2_X86_CPU_HAS_SSE2
103 select BR2_X86_CPU_HAS_SSE3
104 select BR2_X86_CPU_HAS_SSSE3
105 select BR2_X86_CPU_HAS_SSE4
106 select BR2_X86_CPU_HAS_SSE42
107 config BR2_x86_corei7_avx
108 bool "corei7-avx"
109 select BR2_X86_CPU_HAS_MMX
110 select BR2_X86_CPU_HAS_SSE
111 select BR2_X86_CPU_HAS_SSE2
112 select BR2_X86_CPU_HAS_SSE3
113 select BR2_X86_CPU_HAS_SSSE3
114 select BR2_X86_CPU_HAS_SSE4
115 select BR2_X86_CPU_HAS_SSE42
116 select BR2_X86_CPU_HAS_AVX
117 config BR2_x86_core_avx2
118 bool "core-avx2"
119 select BR2_X86_CPU_HAS_MMX
120 select BR2_X86_CPU_HAS_SSE
121 select BR2_X86_CPU_HAS_SSE2
122 select BR2_X86_CPU_HAS_SSE3
123 select BR2_X86_CPU_HAS_SSSE3
124 select BR2_X86_CPU_HAS_SSE4
125 select BR2_X86_CPU_HAS_SSE42
126 select BR2_X86_CPU_HAS_AVX
127 select BR2_X86_CPU_HAS_AVX2
128 config BR2_x86_atom
129 bool "atom"
130 select BR2_X86_CPU_HAS_MMX
131 select BR2_X86_CPU_HAS_SSE
132 select BR2_X86_CPU_HAS_SSE2
133 select BR2_X86_CPU_HAS_SSE3
134 select BR2_X86_CPU_HAS_SSSE3
135 config BR2_x86_k6
136 bool "k6"
137 select BR2_X86_CPU_HAS_MMX
138 depends on !BR2_x86_64
139 config BR2_x86_k6_2
140 bool "k6-2"
141 select BR2_X86_CPU_HAS_MMX
142 depends on !BR2_x86_64
143 config BR2_x86_athlon
144 bool "athlon"
145 select BR2_X86_CPU_HAS_MMX
146 depends on !BR2_x86_64
147 config BR2_x86_athlon_4
148 bool "athlon-4"
149 select BR2_X86_CPU_HAS_MMX
150 select BR2_X86_CPU_HAS_SSE
151 depends on !BR2_x86_64
152 config BR2_x86_opteron
153 bool "opteron"
154 select BR2_X86_CPU_HAS_MMX
155 select BR2_X86_CPU_HAS_SSE
156 select BR2_X86_CPU_HAS_SSE2
157 config BR2_x86_opteron_sse3
158 bool "opteron w/ SSE3"
159 select BR2_X86_CPU_HAS_MMX
160 select BR2_X86_CPU_HAS_SSE
161 select BR2_X86_CPU_HAS_SSE2
162 select BR2_X86_CPU_HAS_SSE3
163 config BR2_x86_barcelona
164 bool "barcelona"
165 select BR2_X86_CPU_HAS_MMX
166 select BR2_X86_CPU_HAS_SSE
167 select BR2_X86_CPU_HAS_SSE2
168 select BR2_X86_CPU_HAS_SSE3
169 config BR2_x86_jaguar
170 bool "jaguar"
171 select BR2_X86_CPU_HAS_MMX
172 select BR2_X86_CPU_HAS_SSE
173 select BR2_X86_CPU_HAS_SSE2
174 select BR2_X86_CPU_HAS_SSE3
175 select BR2_X86_CPU_HAS_SSSE3
176 select BR2_X86_CPU_HAS_SSE4
177 select BR2_X86_CPU_HAS_SSE42
178 config BR2_x86_steamroller
179 bool "steamroller"
180 select BR2_X86_CPU_HAS_MMX
181 select BR2_X86_CPU_HAS_SSE
182 select BR2_X86_CPU_HAS_SSE2
183 select BR2_X86_CPU_HAS_SSE3
184 select BR2_X86_CPU_HAS_SSSE3
185 select BR2_X86_CPU_HAS_SSE4
186 select BR2_X86_CPU_HAS_SSE42
187 config BR2_x86_geode
188 bool "geode"
189 # Don't include MMX support because there several variant of geode
190 # processor, some with MMX support, some without.
191 # See: http://en.wikipedia.org/wiki/Geode_%28processor%29
192 depends on !BR2_x86_64
193 config BR2_x86_c3
194 bool "Via/Cyrix C3 (Samuel/Ezra cores)"
195 select BR2_X86_CPU_HAS_MMX
196 depends on !BR2_x86_64
197 config BR2_x86_c32
198 bool "Via C3-2 (Nehemiah cores)"
199 select BR2_X86_CPU_HAS_MMX
200 select BR2_X86_CPU_HAS_SSE
201 depends on !BR2_x86_64
202 config BR2_x86_winchip_c6
203 bool "IDT Winchip C6"
204 select BR2_X86_CPU_HAS_MMX
205 depends on !BR2_x86_64
206 config BR2_x86_winchip2
207 bool "IDT Winchip 2"
208 select BR2_X86_CPU_HAS_MMX
209 depends on !BR2_x86_64
210 endchoice
212 config BR2_ARCH
213 default "i386" if BR2_x86_i386
214 default "i486" if BR2_x86_i486
215 default "i586" if BR2_x86_i586
216 default "i586" if BR2_x86_x1000
217 default "i586" if BR2_x86_pentium_mmx
218 default "i586" if BR2_x86_geode
219 default "i586" if BR2_x86_c3
220 default "i686" if BR2_x86_c32
221 default "i586" if BR2_x86_winchip_c6
222 default "i586" if BR2_x86_winchip2
223 default "i686" if BR2_x86_i686
224 default "i686" if BR2_x86_pentium2
225 default "i686" if BR2_x86_pentium3
226 default "i686" if BR2_x86_pentium4
227 default "i686" if BR2_x86_pentium_m
228 default "i686" if BR2_x86_pentiumpro
229 default "i686" if BR2_x86_prescott
230 default "i686" if BR2_x86_nocona && BR2_i386
231 default "i686" if BR2_x86_core2 && BR2_i386
232 default "i686" if BR2_x86_corei7 && BR2_i386
233 default "i686" if BR2_x86_atom && BR2_i386
234 default "i686" if BR2_x86_opteron && BR2_i386
235 default "i686" if BR2_x86_opteron_sse3 && BR2_i386
236 default "i686" if BR2_x86_barcelona && BR2_i386
237 default "i686" if BR2_x86_jaguar && BR2_i386
238 default "i686" if BR2_x86_steamroller && BR2_i386
239 default "i686" if BR2_x86_k6
240 default "i686" if BR2_x86_k6_2
241 default "i686" if BR2_x86_athlon
242 default "i686" if BR2_x86_athlon_4
243 default "x86_64" if BR2_x86_64
245 config BR2_ENDIAN
246 default "LITTLE"
248 config BR2_ARCH_HAS_ATOMICS
249 default y if !BR2_x86_i386
251 config BR2_GCC_TARGET_ARCH
252 default "i386" if BR2_x86_i386
253 default "i486" if BR2_x86_i486
254 default "i586" if BR2_x86_i586
255 default "i586" if BR2_x86_x1000
256 default "pentium-mmx" if BR2_x86_pentium_mmx
257 default "i686" if BR2_x86_i686
258 default "pentiumpro" if BR2_x86_pentiumpro
259 default "pentium-m" if BR2_x86_pentium_m
260 default "pentium2" if BR2_x86_pentium2
261 default "pentium3" if BR2_x86_pentium3
262 default "pentium4" if BR2_x86_pentium4
263 default "prescott" if BR2_x86_prescott
264 default "nocona" if BR2_x86_nocona
265 default "core2" if BR2_x86_core2
266 default "corei7" if BR2_x86_corei7
267 default "corei7-avx" if BR2_x86_corei7_avx
268 default "core-avx2" if BR2_x86_core_avx2
269 default "atom" if BR2_x86_atom
270 default "k8" if BR2_x86_opteron
271 default "k8-sse3" if BR2_x86_opteron_sse3
272 default "barcelona" if BR2_x86_barcelona
273 default "btver2" if BR2_x86_jaguar
274 default "bdver3" if BR2_x86_steamroller
275 default "k6" if BR2_x86_k6
276 default "k6-2" if BR2_x86_k6_2
277 default "athlon" if BR2_x86_athlon
278 default "athlon-4" if BR2_x86_athlon_4
279 default "winchip-c6" if BR2_x86_winchip_c6
280 default "winchip2" if BR2_x86_winchip2
281 default "c3" if BR2_x86_c3
282 default "c3-2" if BR2_x86_c32
283 default "geode" if BR2_x86_geode