1 From 7a09ed68e203a813d88fb7fc6eeb1e92209561a5 Mon Sep 17 00:00:00 2001
2 From: Mike Frysinger <vapier@gentoo.org>
3 Date: Mon, 8 Aug 2016 13:06:49 +0800
4 Subject: [PATCH] sim: bfin: split out common mach/model defines into arch.h
7 The current machs.h mixes common enums with Blackfin-specific defines.
8 This causes us troubles with header inclusion order such that we can't
9 drop the old SIM_CPU typedef (which is duplicated in common code). By
10 splitting the two up, we can unwind this dependency chain, and drop the
11 old typedef. It also fixes building with older gcc versions.
13 [Romain: backport from gdb 7.12]
14 Signed-off-by: Romain Naour <romain.naour@gmail.com>
17 sim/bfin/ChangeLog | 9 +++++++++
18 sim/bfin/arch.h | 44 ++++++++++++++++++++++++++++++++++++++++++++
19 sim/bfin/machs.h | 20 --------------------
20 sim/bfin/sim-main.h | 8 ++------
21 4 files changed, 55 insertions(+), 26 deletions(-)
22 create mode 100644 sim/bfin/arch.h
24 diff --git a/sim/bfin/ChangeLog b/sim/bfin/ChangeLog
25 index 3dea7c9..a995436 100644
26 --- a/sim/bfin/ChangeLog
27 +++ b/sim/bfin/ChangeLog
29 +2016-08-13 Mike Frysinger <vapier@gentoo.org>
32 + * machs.h (MODEL_TYPE, MACH_ATTR, BFIN_INSN_*): Move ...
33 + * arch.h: ... to this new header file.
34 + * sim-main.h (SIM_CPU): Delete.
35 + Include arch.h before sim-base.h, and move sim-base.h before
38 2016-01-10 Mike Frysinger <vapier@gentoo.org>
40 * config.in, configure: Regenerate.
41 diff --git a/sim/bfin/arch.h b/sim/bfin/arch.h
43 index 0000000..b86d3e9
47 +/* Simulator for Analog Devices Blackfin processors.
49 + Copyright (C) 2005-2016 Free Software Foundation, Inc.
50 + Contributed by Analog Devices, Inc.
52 + This file is part of simulators.
54 + This program is free software; you can redistribute it and/or modify
55 + it under the terms of the GNU General Public License as published by
56 + the Free Software Foundation; either version 3 of the License, or
57 + (at your option) any later version.
59 + This program is distributed in the hope that it will be useful,
60 + but WITHOUT ANY WARRANTY; without even the implied warranty of
61 + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
62 + GNU General Public License for more details.
64 + You should have received a copy of the GNU General Public License
65 + along with this program. If not, see <http://www.gnu.org/licenses/>. */
70 +typedef enum model_type {
71 +#define P(n) MODEL_BF##n,
72 +#include "proc_list.def"
77 +typedef enum mach_attr {
84 +#define I(insn) BFIN_INSN_##insn,
85 +#include "insn_list.def"
91 diff --git a/sim/bfin/machs.h b/sim/bfin/machs.h
92 index 0372982..36819ae 100644
93 --- a/sim/bfin/machs.h
94 +++ b/sim/bfin/machs.h
96 #ifndef _BFIN_MACHS_H_
97 #define _BFIN_MACHS_H_
99 -typedef enum model_type {
100 -#define P(n) MODEL_BF##n,
101 -#include "proc_list.def"
106 -typedef enum mach_attr {
112 #define CPU_MODEL_NUM(cpu) MODEL_NUM (CPU_MODEL (cpu))
114 /* XXX: Some of this probably belongs in CPU_MODEL. */
115 @@ -46,13 +33,6 @@ void bfin_model_cpu_init (SIM_DESC, SIM_CPU *);
116 bu32 bfin_model_get_chipid (SIM_DESC);
117 bu32 bfin_model_get_dspid (SIM_DESC);
120 -#define I(insn) BFIN_INSN_##insn,
121 -#include "insn_list.def"
126 #define BFIN_COREMMR_CEC_BASE 0xFFE02100
127 #define BFIN_COREMMR_CEC_SIZE (4 * 5)
128 #define BFIN_COREMMR_CTIMER_BASE 0xFFE03000
129 diff --git a/sim/bfin/sim-main.h b/sim/bfin/sim-main.h
130 index 51fb87e..34fd153 100644
131 --- a/sim/bfin/sim-main.h
132 +++ b/sim/bfin/sim-main.h
135 #include "sim-basics.h"
136 #include "sim-signal.h"
138 -/* TODO: Delete this. Need to convert bu32/etc... to common sim types
139 - and unwind the bfin-sim.h/machs.h include below first though. */
140 -typedef struct _sim_cpu SIM_CPU;
142 +#include "sim-base.h"
144 #include "bfin-sim.h"
148 -#include "sim-base.h"
151 /* ... simulator specific members ... */
152 struct bfin_cpu_state state;