arch/Config.in.arm

   1 # arm cpu features
   2 config BR2_ARM_CPU_HAS_NEON
   3         bool
   4
   5 # for some cores, NEON support is optional
   6 config BR2_ARM_CPU_MAYBE_HAS_NEON
   7         bool
   8
   9 # for some cores, VFPv2 is optional
  10 config BR2_ARM_CPU_MAYBE_HAS_VFPV2
  11         bool
  12
  13 config BR2_ARM_CPU_HAS_VFPV2
  14         bool
  15
  16 # for some cores, VFPv3 is optional
  17 config BR2_ARM_CPU_MAYBE_HAS_VFPV3
  18         bool
  19         select BR2_ARM_CPU_MAYBE_HAS_VFPV2
  20
  21 config BR2_ARM_CPU_HAS_VFPV3
  22         bool
  23         select BR2_ARM_CPU_HAS_VFPV2
  24
  25 # for some cores, VFPv4 is optional
  26 config BR2_ARM_CPU_MAYBE_HAS_VFPV4
  27         bool
  28         select BR2_ARM_CPU_MAYBE_HAS_VFPV3
  29
  30 config BR2_ARM_CPU_HAS_VFPV4
  31         bool
  32         select BR2_ARM_CPU_HAS_VFPV3
  33
  34 config BR2_ARM_CPU_HAS_FP_ARMV8
  35         bool
  36         select BR2_ARM_CPU_HAS_VFPV4
  37
  38 config BR2_ARM_CPU_HAS_ARM
  39         bool
  40
  41 config BR2_ARM_CPU_HAS_THUMB
  42         bool
  43
  44 config BR2_ARM_CPU_HAS_THUMB2
  45         bool
  46
  47 config BR2_ARM_CPU_ARMV4
  48         bool
  49
  50 config BR2_ARM_CPU_ARMV5
  51         bool
  52
  53 config BR2_ARM_CPU_ARMV6
  54         bool
  55
  56 config BR2_ARM_CPU_ARMV7A
  57         bool
  58
  59 config BR2_ARM_CPU_ARMV7M
  60         bool
  61
  62 config BR2_ARM_CPU_ARMV8
  63         bool
  64
  65 choice
  66         prompt "Target Architecture Variant"
  67         default BR2_arm926t
  68         help
  69           Specific CPU variant to use
  70
  71 config BR2_arm920t
  72         bool "arm920t"
  73         select BR2_ARM_CPU_HAS_ARM
  74         select BR2_ARM_CPU_HAS_THUMB
  75         select BR2_ARM_CPU_ARMV4
  76         select BR2_ARCH_HAS_MMU_OPTIONAL
  77         depends on !BR2_ARCH_IS_64
  78 config BR2_arm922t
  79         bool "arm922t"
  80         select BR2_ARM_CPU_HAS_ARM
  81         select BR2_ARM_CPU_HAS_THUMB
  82         select BR2_ARM_CPU_ARMV4
  83         select BR2_ARCH_HAS_MMU_OPTIONAL
  84         depends on !BR2_ARCH_IS_64
  85 config BR2_arm926t
  86         bool "arm926t"
  87         select BR2_ARM_CPU_HAS_ARM
  88         select BR2_ARM_CPU_MAYBE_HAS_VFPV2
  89         select BR2_ARM_CPU_HAS_THUMB
  90         select BR2_ARM_CPU_ARMV5
  91         select BR2_ARCH_HAS_MMU_OPTIONAL
  92         depends on !BR2_ARCH_IS_64
  93 config BR2_arm1136j_s
  94         bool "arm1136j-s"
  95         select BR2_ARM_CPU_HAS_ARM
  96         select BR2_ARM_CPU_HAS_THUMB
  97         select BR2_ARM_CPU_ARMV6
  98         select BR2_ARCH_HAS_MMU_OPTIONAL
  99         depends on !BR2_ARCH_IS_64
 100 config BR2_arm1136jf_s
 101         bool "arm1136jf-s"
 102         select BR2_ARM_CPU_HAS_ARM
 103         select BR2_ARM_CPU_HAS_VFPV2
 104         select BR2_ARM_CPU_HAS_THUMB
 105         select BR2_ARM_CPU_ARMV6
 106         select BR2_ARCH_HAS_MMU_OPTIONAL
 107         depends on !BR2_ARCH_IS_64
 108 config BR2_arm1176jz_s
 109         bool "arm1176jz-s"
 110         select BR2_ARM_CPU_HAS_ARM
 111         select BR2_ARM_CPU_HAS_THUMB
 112         select BR2_ARM_CPU_ARMV6
 113         select BR2_ARCH_HAS_MMU_OPTIONAL
 114         depends on !BR2_ARCH_IS_64
 115 config BR2_arm1176jzf_s
 116         bool "arm1176jzf-s"
 117         select BR2_ARM_CPU_HAS_ARM
 118         select BR2_ARM_CPU_HAS_VFPV2
 119         select BR2_ARM_CPU_HAS_THUMB
 120         select BR2_ARM_CPU_ARMV6
 121         select BR2_ARCH_HAS_MMU_OPTIONAL
 122         depends on !BR2_ARCH_IS_64
 123 config BR2_arm11mpcore
 124         bool "mpcore"
 125         select BR2_ARM_CPU_HAS_ARM
 126         select BR2_ARM_CPU_MAYBE_HAS_VFPV2
 127         select BR2_ARM_CPU_HAS_THUMB
 128         select BR2_ARM_CPU_ARMV6
 129         select BR2_ARCH_HAS_MMU_OPTIONAL
 130         depends on !BR2_ARCH_IS_64
 131 config BR2_cortex_a5
 132         bool "cortex-A5"
 133         select BR2_ARM_CPU_HAS_ARM
 134         select BR2_ARM_CPU_MAYBE_HAS_NEON
 135         select BR2_ARM_CPU_MAYBE_HAS_VFPV4
 136         select BR2_ARM_CPU_HAS_THUMB2
 137         select BR2_ARM_CPU_ARMV7A
 138         select BR2_ARCH_HAS_MMU_OPTIONAL
 139         depends on !BR2_ARCH_IS_64
 140 config BR2_cortex_a7
 141         bool "cortex-A7"
 142         select BR2_ARM_CPU_HAS_ARM
 143         select BR2_ARM_CPU_HAS_NEON
 144         select BR2_ARM_CPU_HAS_VFPV4
 145         select BR2_ARM_CPU_HAS_THUMB2
 146         select BR2_ARM_CPU_ARMV7A
 147         select BR2_ARCH_HAS_MMU_OPTIONAL
 148         depends on !BR2_ARCH_IS_64
 149 config BR2_cortex_a8
 150         bool "cortex-A8"
 151         select BR2_ARM_CPU_HAS_ARM
 152         select BR2_ARM_CPU_HAS_NEON
 153         select BR2_ARM_CPU_HAS_VFPV3
 154         select BR2_ARM_CPU_HAS_THUMB2
 155         select BR2_ARM_CPU_ARMV7A
 156         select BR2_ARCH_HAS_MMU_OPTIONAL
 157         depends on !BR2_ARCH_IS_64
 158 config BR2_cortex_a9
 159         bool "cortex-A9"
 160         select BR2_ARM_CPU_HAS_ARM
 161         select BR2_ARM_CPU_MAYBE_HAS_NEON
 162         select BR2_ARM_CPU_MAYBE_HAS_VFPV3
 163         select BR2_ARM_CPU_HAS_THUMB2
 164         select BR2_ARM_CPU_ARMV7A
 165         select BR2_ARCH_HAS_MMU_OPTIONAL
 166         depends on !BR2_ARCH_IS_64
 167 config BR2_cortex_a12
 168         bool "cortex-A12"
 169         select BR2_ARM_CPU_HAS_ARM
 170         select BR2_ARM_CPU_HAS_NEON
 171         select BR2_ARM_CPU_HAS_VFPV4
 172         select BR2_ARM_CPU_HAS_THUMB2
 173         select BR2_ARM_CPU_ARMV7A
 174         select BR2_ARCH_HAS_MMU_OPTIONAL
 175         depends on !BR2_ARCH_IS_64
 176 config BR2_cortex_a15
 177         bool "cortex-A15"
 178         select BR2_ARM_CPU_HAS_ARM
 179         select BR2_ARM_CPU_HAS_NEON
 180         select BR2_ARM_CPU_HAS_VFPV4
 181         select BR2_ARM_CPU_HAS_THUMB2
 182         select BR2_ARM_CPU_ARMV7A
 183         select BR2_ARCH_HAS_MMU_OPTIONAL
 184         depends on !BR2_ARCH_IS_64
 185 config BR2_cortex_a17
 186         bool "cortex-A17"
 187         select BR2_ARM_CPU_HAS_ARM
 188         select BR2_ARM_CPU_HAS_NEON
 189         select BR2_ARM_CPU_HAS_VFPV4
 190         select BR2_ARM_CPU_HAS_THUMB2
 191         select BR2_ARM_CPU_ARMV7A
 192         select BR2_ARCH_HAS_MMU_OPTIONAL
 193         depends on !BR2_ARCH_IS_64
 194 config BR2_cortex_a53
 195         bool "cortex-A53"
 196         select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
 197         select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
 198         select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 199         select BR2_ARM_CPU_HAS_FP_ARMV8
 200         select BR2_ARM_CPU_ARMV8
 201         select BR2_ARCH_HAS_MMU_OPTIONAL
 202 config BR2_cortex_a57
 203         bool "cortex-A57"
 204         select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
 205         select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
 206         select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 207         select BR2_ARM_CPU_HAS_FP_ARMV8
 208         select BR2_ARM_CPU_ARMV8
 209         select BR2_ARCH_HAS_MMU_OPTIONAL
 210 config BR2_cortex_a72
 211         bool "cortex-A72"
 212         select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
 213         select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
 214         select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 215         select BR2_ARM_CPU_HAS_FP_ARMV8
 216         select BR2_ARM_CPU_ARMV8
 217         select BR2_ARCH_HAS_MMU_OPTIONAL
 218 config BR2_cortex_m3
 219         bool "cortex-M3"
 220         select BR2_ARM_CPU_HAS_THUMB2
 221         select BR2_ARM_CPU_ARMV7M
 222         depends on !BR2_ARCH_IS_64
 223 config BR2_cortex_m4
 224         bool "cortex-M4"
 225         select BR2_ARM_CPU_HAS_THUMB2
 226         select BR2_ARM_CPU_ARMV7M
 227         depends on !BR2_ARCH_IS_64
 228 config BR2_fa526
 229         bool "fa526/626"
 230         select BR2_ARM_CPU_HAS_ARM
 231         select BR2_ARM_CPU_ARMV4
 232         select BR2_ARCH_HAS_MMU_OPTIONAL
 233         depends on !BR2_ARCH_IS_64
 234 config BR2_pj4
 235         bool "pj4"
 236         select BR2_ARM_CPU_HAS_ARM
 237         select BR2_ARM_CPU_HAS_VFPV3
 238         select BR2_ARM_CPU_ARMV7A
 239         select BR2_ARCH_HAS_MMU_OPTIONAL
 240         depends on !BR2_ARCH_IS_64
 241 config BR2_strongarm
 242         bool "strongarm sa110/sa1100"
 243         select BR2_ARM_CPU_HAS_ARM
 244         select BR2_ARM_CPU_ARMV4
 245         select BR2_ARCH_HAS_MMU_OPTIONAL
 246         depends on !BR2_ARCH_IS_64
 247 config BR2_xscale
 248         bool "xscale"
 249         select BR2_ARM_CPU_HAS_ARM
 250         select BR2_ARM_CPU_HAS_THUMB
 251         select BR2_ARM_CPU_ARMV5
 252         select BR2_ARCH_HAS_MMU_OPTIONAL
 253         depends on !BR2_ARCH_IS_64
 254 config BR2_iwmmxt
 255         bool "iwmmxt"
 256         select BR2_ARM_CPU_HAS_ARM
 257         select BR2_ARM_CPU_ARMV5
 258         select BR2_ARCH_HAS_MMU_OPTIONAL
 259         depends on !BR2_ARCH_IS_64
 260 endchoice
 261
 262 config BR2_ARM_ENABLE_NEON
 263         bool "Enable NEON SIMD extension support"
 264         depends on BR2_ARM_CPU_MAYBE_HAS_NEON
 265         select BR2_ARM_CPU_HAS_NEON
 266         help
 267           For some CPU cores, the NEON SIMD extension is optional.
 268           Select this option if you are certain your particular
 269           implementation has NEON support and you want to use it.
 270
 271 config BR2_ARM_ENABLE_VFP
 272         bool "Enable VFP extension support"
 273         depends on BR2_ARM_CPU_MAYBE_HAS_VFPV2
 274         select BR2_ARM_CPU_HAS_VFPV4 if BR2_ARM_CPU_MAYBE_HAS_VFPV4
 275         select BR2_ARM_CPU_HAS_VFPV3 if BR2_ARM_CPU_MAYBE_HAS_VFPV3
 276         select BR2_ARM_CPU_HAS_VFPV2 if BR2_ARM_CPU_MAYBE_HAS_VFPV2
 277         help
 278           For some CPU cores, the VFP extension is optional. Select
 279           this option if you are certain your particular
 280           implementation has VFP support and you want to use it.
 281
 282 choice
 283         prompt "Target ABI"
 284         depends on BR2_arm || BR2_armeb
 285         default BR2_ARM_EABIHF if BR2_ARM_CPU_HAS_VFPV2
 286         default BR2_ARM_EABI
 287         help
 288           Application Binary Interface to use. The Application Binary
 289           Interface describes the calling conventions (how arguments
 290           are passed to functions, how the return value is passed, how
 291           system calls are made, etc.).
 292
 293 config BR2_ARM_EABI
 294         bool "EABI"
 295         help
 296           The EABI is currently the standard ARM ABI, which is used in
 297           most projects. It supports both the 'soft' floating point
 298           model (in which floating point instructions are emulated in
 299           software) and the 'softfp' floating point model (in which
 300           floating point instructions are executed using an hardware
 301           floating point unit, but floating point arguments to
 302           functions are passed in integer registers).
 303
 304           The 'softfp' floating point model is link-compatible with
 305           the 'soft' floating point model, i.e you can link a library
 306           built 'soft' with some other code built 'softfp'.
 307
 308           However, passing the floating point arguments in integer
 309           registers is a bit inefficient, so if your ARM processor has
 310           a floating point unit, and you don't have pre-compiled
 311           'soft' or 'softfp' code, using the EABIhf ABI will provide
 312           better floating point performances.
 313
 314           If your processor does not have a floating point unit, then
 315           you must use this ABI.
 316
 317 config BR2_ARM_EABIHF
 318         bool "EABIhf"
 319         depends on BR2_ARM_CPU_HAS_VFPV2
 320         help
 321           The EABIhf is an extension of EABI which supports the 'hard'
 322           floating point model. This model uses the floating point
 323           unit to execute floating point instructions, and passes
 324           floating point arguments in floating point registers.
 325
 326           It is more efficient than EABI for floating point related
 327           workload. However, it does not allow to link against code
 328           that has been pre-built for the 'soft' or 'softfp' floating
 329           point models.
 330
 331           If your processor has a floating point unit, and you don't
 332           depend on existing pre-compiled code, this option is most
 333           likely the best choice.
 334
 335 endchoice
 336
 337 choice
 338         prompt "Floating point strategy"
 339         default BR2_ARM_FPU_FP_ARMV8 if BR2_ARM_CPU_HAS_FP_ARMV8
 340         default BR2_ARM_FPU_VFPV4D16 if BR2_ARM_CPU_HAS_VFPV4
 341         default BR2_ARM_FPU_VFPV3D16 if BR2_ARM_CPU_HAS_VFPV3
 342         default BR2_ARM_FPU_VFPV2 if BR2_ARM_CPU_HAS_VFPV2
 343         default BR2_ARM_SOFT_FLOAT if !BR2_ARM_CPU_HAS_VFPV2
 344
 345 config BR2_ARM_SOFT_FLOAT
 346         bool "Soft float"
 347         depends on BR2_ARM_EABI
 348         select BR2_SOFT_FLOAT
 349         help
 350           This option allows to use software emulated floating
 351           point. It should be used for ARM cores that do not include a
 352           Vector Floating Point unit, such as ARMv5 cores (ARM926 for
 353           example) or certain ARMv6 cores.
 354
 355 config BR2_ARM_FPU_VFPV2
 356         bool "VFPv2"
 357         depends on BR2_ARM_CPU_HAS_VFPV2
 358         help
 359           This option allows to use the VFPv2 floating point unit, as
 360           available in some ARMv5 processors (ARM926EJ-S) and some
 361           ARMv6 processors (ARM1136JF-S, ARM1176JZF-S and ARM11
 362           MPCore).
 363
 364           Note that this option is also safe to use for newer cores
 365           such as Cortex-A, because the VFPv3 and VFPv4 units are
 366           backward compatible with VFPv2.
 367
 368 config BR2_ARM_FPU_VFPV3
 369         bool "VFPv3"
 370         depends on BR2_ARM_CPU_HAS_VFPV3
 371         help
 372           This option allows to use the VFPv3 floating point unit, as
 373           available in some ARMv7 processors (Cortex-A{8, 9}). This
 374           option requires a VFPv3 unit that has 32 double-precision
 375           registers, which is not necessarily the case in all SOCs
 376           based on Cortex-A{8, 9}. If you're unsure, use VFPv3-D16
 377           instead, which is guaranteed to work on all Cortex-A{8, 9}.
 378
 379           Note that this option is also safe to use for newer cores
 380           that have a VFPv4 unit, because VFPv4 is backward compatible
 381           with VFPv3. They must of course also have 32
 382           double-precision registers.
 383
 384 config BR2_ARM_FPU_VFPV3D16
 385         bool "VFPv3-D16"
 386         depends on BR2_ARM_CPU_HAS_VFPV3
 387         help
 388           This option allows to use the VFPv3 floating point unit, as
 389           available in some ARMv7 processors (Cortex-A{8, 9}). This
 390           option requires a VFPv3 unit that has 16 double-precision
 391           registers, which is generally the case in all SOCs based on
 392           Cortex-A{8, 9}, even though VFPv3 is technically optional on
 393           Cortex-A9. This is the safest option for those cores.
 394
 395           Note that this option is also safe to use for newer cores
 396           such that have a VFPv4 unit, because the VFPv4 is backward
 397           compatible with VFPv3.
 398
 399 config BR2_ARM_FPU_VFPV4
 400         bool "VFPv4"
 401         depends on BR2_ARM_CPU_HAS_VFPV4
 402         help
 403           This option allows to use the VFPv4 floating point unit, as
 404           available in some ARMv7 processors (Cortex-A{5, 7, 12,
 405           15}). This option requires a VFPv4 unit that has 32
 406           double-precision registers, which is not necessarily the
 407           case in all SOCs based on Cortex-A{5, 7, 12, 15}. If you're
 408           unsure, you should probably use VFPv4-D16 instead.
 409
 410           Note that if you want binary code that works on all ARMv7
 411           cores, including the earlier Cortex-A{8, 9}, you should
 412           instead select VFPv3.
 413
 414 config BR2_ARM_FPU_VFPV4D16
 415         bool "VFPv4-D16"
 416         depends on BR2_ARM_CPU_HAS_VFPV4
 417         help
 418           This option allows to use the VFPv4 floating point unit, as
 419           available in some ARMv7 processors (Cortex-A{5, 7, 12,
 420           15}). This option requires a VFPv4 unit that has 16
 421           double-precision registers, which is always available on
 422           Cortex-A12 and Cortex-A15, but optional on Cortex-A5 and
 423           Cortex-A7.
 424
 425           Note that if you want binary code that works on all ARMv7
 426           cores, including the earlier Cortex-A{8, 9}, you should
 427           instead select VFPv3-D16.
 428
 429 config BR2_ARM_FPU_NEON
 430         bool "NEON"
 431         depends on BR2_ARM_CPU_HAS_NEON
 432         help
 433           This option allows to use the NEON SIMD unit, as available
 434           in some ARMv7 processors, as a floating-point unit. It
 435           should however be noted that using NEON for floating point
 436           operations doesn't provide a complete compatibility with the
 437           IEEE 754.
 438
 439 config BR2_ARM_FPU_NEON_VFPV4
 440         bool "NEON/VFPv4"
 441         depends on BR2_ARM_CPU_HAS_VFPV4
 442         depends on BR2_ARM_CPU_HAS_NEON
 443         help
 444           This option allows to use both the VFPv4 and the NEON SIMD
 445           units for floating point operations. Note that some ARMv7
 446           cores do not necessarily have VFPv4 and/or NEON support, for
 447           example on Cortex-A5 and Cortex-A7, support for VFPv4 and
 448           NEON is optional.
 449
 450 config BR2_ARM_FPU_FP_ARMV8
 451         bool "FP-ARMv8"
 452         depends on BR2_ARM_CPU_HAS_FP_ARMV8
 453         help
 454           This option allows to use the ARMv8 floating point unit.
 455
 456 config BR2_ARM_FPU_NEON_FP_ARMV8
 457         bool "NEON/FP-ARMv8"
 458         depends on BR2_ARM_CPU_HAS_FP_ARMV8
 459         depends on BR2_ARM_CPU_HAS_NEON
 460         help
 461           This option allows to use both the ARMv8 floating point unit
 462           and the NEON SIMD unit for floating point operations.
 463
 464 endchoice
 465
 466 choice
 467         prompt "ARM instruction set"
 468         depends on BR2_arm || BR2_armeb
 469
 470 config BR2_ARM_INSTRUCTIONS_ARM
 471         bool "ARM"
 472         depends on BR2_ARM_CPU_HAS_ARM
 473         help
 474           This option instructs the compiler to generate regular ARM
 475           instructions, that are all 32 bits wide.
 476
 477 config BR2_ARM_INSTRUCTIONS_THUMB
 478         bool "Thumb"
 479         depends on BR2_ARM_CPU_HAS_THUMB
 480         # Thumb-1 and VFP are not compatible
 481         depends on BR2_ARM_SOFT_FLOAT
 482         help
 483           This option instructions the compiler to generate Thumb
 484           instructions, which allows to mix 16 bits instructions and
 485           32 bits instructions. This generally provides a much smaller
 486           compiled binary size.
 487
 488 comment "Thumb1 is not compatible with VFP"
 489         depends on BR2_ARM_CPU_HAS_THUMB
 490         depends on !BR2_ARM_SOFT_FLOAT
 491
 492 config BR2_ARM_INSTRUCTIONS_THUMB2
 493         bool "Thumb2"
 494         depends on BR2_ARM_CPU_HAS_THUMB2
 495         help
 496           This option instructions the compiler to generate Thumb2
 497           instructions, which allows to mix 16 bits instructions and
 498           32 bits instructions. This generally provides a much smaller
 499           compiled binary size.
 500
 501 endchoice
 502
 503 config BR2_ARCH
 504         default "arm"           if BR2_arm
 505         default "armeb"         if BR2_armeb
 506         default "aarch64"       if BR2_aarch64
 507         default "aarch64_be"    if BR2_aarch64_be
 508
 509 config BR2_ENDIAN
 510         default "LITTLE" if (BR2_arm || BR2_aarch64)
 511         default "BIG"    if (BR2_armeb || BR2_aarch64_be)
 512
 513 config BR2_GCC_TARGET_CPU
 514         default "arm920t"       if BR2_arm920t
 515         default "arm922t"       if BR2_arm922t
 516         default "arm926ej-s"    if BR2_arm926t
 517         default "arm1136j-s"    if BR2_arm1136j_s
 518         default "arm1136jf-s"   if BR2_arm1136jf_s
 519         default "arm1176jz-s"   if BR2_arm1176jz_s
 520         default "arm1176jzf-s"  if BR2_arm1176jzf_s
 521         default "mpcore"        if BR2_arm11mpcore && BR2_ARM_CPU_HAS_VFPV2
 522         default "mpcorenovfp"   if BR2_arm11mpcore
 523         default "cortex-a5"     if BR2_cortex_a5
 524         default "cortex-a7"     if BR2_cortex_a7
 525         default "cortex-a8"     if BR2_cortex_a8
 526         default "cortex-a9"     if BR2_cortex_a9
 527         default "cortex-a12"    if BR2_cortex_a12
 528         default "cortex-a15"    if BR2_cortex_a15
 529         default "cortex-a17"    if BR2_cortex_a17
 530         default "cortex-m3"     if BR2_cortex_m3
 531         default "cortex-m4"     if BR2_cortex_m4
 532         default "fa526"         if BR2_fa526
 533         default "marvell-pj4"   if BR2_pj4
 534         default "strongarm"     if BR2_strongarm
 535         default "xscale"        if BR2_xscale
 536         default "iwmmxt"        if BR2_iwmmxt
 537         default "cortex-a53"            if (BR2_cortex_a53 && !BR2_ARCH_IS_64)
 538         default "cortex-a53+fp"         if (BR2_cortex_a53 && BR2_ARCH_IS_64 && BR2_ARM_FPU_FP_ARMV8)
 539         default "cortex-a53+fp+simd"    if (BR2_cortex_a53 && BR2_ARCH_IS_64 && BR2_ARM_FPU_NEON_FP_ARMV8)
 540         default "cortex-a57"            if (BR2_cortex_a57 && !BR2_ARCH_IS_64)
 541         default "cortex-a57+fp"         if (BR2_cortex_a57 && BR2_ARCH_IS_64 && BR2_ARM_FPU_FP_ARMV8)
 542         default "cortex-a57+fp+simd"    if (BR2_cortex_a57 && BR2_ARCH_IS_64 && BR2_ARM_FPU_NEON_FP_ARMV8)
 543         default "cortex-a72"            if (BR2_cortex_a72 && !BR2_ARCH_IS_64)
 544         default "cortex-a72+fp"         if (BR2_cortex_a72 && BR2_ARCH_IS_64 && BR2_ARM_FPU_FP_ARMV8)
 545         default "cortex-a72+fp+simd"    if (BR2_cortex_a72 && BR2_ARCH_IS_64 && BR2_ARM_FPU_NEON_FP_ARMV8)
 546
 547 config BR2_GCC_TARGET_ABI
 548         default "aapcs-linux"   if BR2_arm || BR2_armeb
 549         default "lp64"          if BR2_aarch64 || BR2_aarch64_be
 550
 551 config BR2_GCC_TARGET_FPU
 552         depends on BR2_arm || BR2_armeb
 553         default "vfp"           if BR2_ARM_FPU_VFPV2
 554         default "vfpv3"         if BR2_ARM_FPU_VFPV3
 555         default "vfpv3-d16"     if BR2_ARM_FPU_VFPV3D16
 556         default "vfpv4"         if BR2_ARM_FPU_VFPV4
 557         default "vfpv4-d16"     if BR2_ARM_FPU_VFPV4D16
 558         default "neon"          if BR2_ARM_FPU_NEON
 559         default "neon-vfpv4"    if BR2_ARM_FPU_NEON_VFPV4
 560         default "fp-armv8"      if BR2_ARM_FPU_FP_ARMV8
 561         default "neon-fp-armv8" if BR2_ARM_FPU_NEON_FP_ARMV8
 562
 563 config BR2_GCC_TARGET_FLOAT_ABI
 564         default "soft"          if BR2_ARM_SOFT_FLOAT
 565         default "softfp"        if !BR2_ARM_SOFT_FLOAT && BR2_ARM_EABI
 566         default "hard"          if !BR2_ARM_SOFT_FLOAT && BR2_ARM_EABIHF
 567
 568 config BR2_GCC_TARGET_MODE
 569         default "arm"           if BR2_ARM_INSTRUCTIONS_ARM
 570         default "thumb"         if BR2_ARM_INSTRUCTIONS_THUMB || BR2_ARM_INSTRUCTIONS_THUMB2