arch/Config.in.arm

   1 # arm cpu features
   2 config BR2_ARM_CPU_HAS_NEON
   3         bool
   4
   5 # for some cores, NEON support is optional
   6 config BR2_ARM_CPU_MAYBE_HAS_NEON
   7         bool
   8
   9 # for some cores, VFPv2 is optional
  10 config BR2_ARM_CPU_MAYBE_HAS_VFPV2
  11         bool
  12
  13 config BR2_ARM_CPU_HAS_VFPV2
  14         bool
  15
  16 # for some cores, VFPv3 is optional
  17 config BR2_ARM_CPU_MAYBE_HAS_VFPV3
  18         bool
  19         select BR2_ARM_CPU_MAYBE_HAS_VFPV2
  20
  21 config BR2_ARM_CPU_HAS_VFPV3
  22         bool
  23         select BR2_ARM_CPU_HAS_VFPV2
  24
  25 # for some cores, VFPv4 is optional
  26 config BR2_ARM_CPU_MAYBE_HAS_VFPV4
  27         bool
  28         select BR2_ARM_CPU_MAYBE_HAS_VFPV3
  29
  30 config BR2_ARM_CPU_HAS_VFPV4
  31         bool
  32         select BR2_ARM_CPU_HAS_VFPV3
  33
  34 config BR2_ARM_CPU_HAS_THUMB
  35         bool
  36
  37 config BR2_ARM_CPU_HAS_THUMB2
  38         bool
  39
  40 choice
  41         prompt "Target Architecture Variant"
  42         depends on BR2_arm || BR2_armeb
  43         default BR2_arm926t
  44         help
  45           Specific CPU variant to use
  46
  47 config BR2_arm920t
  48         bool "arm920t"
  49         select BR2_ARM_CPU_HAS_THUMB
  50 config BR2_arm922t
  51         bool "arm922t"
  52         select BR2_ARM_CPU_HAS_THUMB
  53 config BR2_arm926t
  54         bool "arm926t"
  55         select BR2_ARM_CPU_MAYBE_HAS_VFPV2
  56         select BR2_ARM_CPU_HAS_THUMB
  57 config BR2_arm10t
  58         bool "arm10t"
  59         select BR2_ARM_CPU_HAS_THUMB
  60 config BR2_arm1136jf_s_r0
  61         bool "arm1136jf_s rev0"
  62         select BR2_ARM_CPU_HAS_VFPV2
  63         select BR2_ARM_CPU_HAS_THUMB
  64 config BR2_arm1136jf_s_r1
  65         bool "arm1136jf_s rev1"
  66         select BR2_ARM_CPU_HAS_VFPV2
  67         select BR2_ARM_CPU_HAS_THUMB
  68 config BR2_arm1176jz_s
  69         bool "arm1176jz-s"
  70         select BR2_ARM_CPU_HAS_THUMB
  71 config BR2_arm1176jzf_s
  72         bool "arm1176jzf-s"
  73         select BR2_ARM_CPU_HAS_VFPV2
  74         select BR2_ARM_CPU_HAS_THUMB
  75 config BR2_cortex_a5
  76         bool "cortex-A5"
  77         select BR2_ARM_CPU_MAYBE_HAS_NEON
  78         select BR2_ARM_CPU_MAYBE_HAS_VFPV4
  79         select BR2_ARM_CPU_HAS_THUMB2
  80 config BR2_cortex_a7
  81         bool "cortex-A7"
  82         select BR2_ARM_CPU_HAS_NEON
  83         select BR2_ARM_CPU_HAS_VFPV4
  84         select BR2_ARM_CPU_HAS_THUMB2
  85 config BR2_cortex_a8
  86         bool "cortex-A8"
  87         select BR2_ARM_CPU_HAS_NEON
  88         select BR2_ARM_CPU_HAS_VFPV3
  89         select BR2_ARM_CPU_HAS_THUMB2
  90 config BR2_cortex_a9
  91         bool "cortex-A9"
  92         select BR2_ARM_CPU_MAYBE_HAS_NEON
  93         select BR2_ARM_CPU_MAYBE_HAS_VFPV3
  94         select BR2_ARM_CPU_HAS_THUMB2
  95 config BR2_cortex_a12
  96         bool "cortex-A12"
  97         select BR2_ARM_CPU_HAS_NEON
  98         select BR2_ARM_CPU_HAS_VFPV4
  99         select BR2_ARM_CPU_HAS_THUMB2
 100 config BR2_cortex_a15
 101         bool "cortex-A15"
 102         select BR2_ARM_CPU_HAS_NEON
 103         select BR2_ARM_CPU_HAS_VFPV4
 104         select BR2_ARM_CPU_HAS_THUMB2
 105 config BR2_fa526
 106         bool "fa526/626"
 107 config BR2_pj4
 108         bool "pj4"
 109         select BR2_ARM_CPU_HAS_VFPV3
 110 config BR2_strongarm
 111         bool "strongarm sa110/sa1100"
 112 config BR2_xscale
 113         bool "xscale"
 114         select BR2_ARM_CPU_HAS_THUMB
 115 config BR2_iwmmxt
 116         bool "iwmmxt"
 117 endchoice
 118
 119 config BR2_arm1136jf_s
 120         bool
 121         default BR2_arm1136jf_s_r0 || BR2_arm1136jf_s_r1
 122
 123 choice
 124         prompt "Target ABI"
 125         depends on BR2_arm || BR2_armeb
 126         default BR2_ARM_EABI
 127         help
 128           Application Binary Interface to use. The Application Binary
 129           Interface describes the calling conventions (how arguments
 130           are passed to functions, how the return value is passed, how
 131           system calls are made, etc.).
 132
 133 config BR2_ARM_EABI
 134         bool "EABI"
 135         help
 136           The EABI is currently the standard ARM ABI, which is used in
 137           most projects. It supports both the 'soft' floating point
 138           model (in which floating point instructions are emulated in
 139           software) and the 'softfp' floating point model (in which
 140           floating point instructions are executed using an hardware
 141           floating point unit, but floating point arguments to
 142           functions are passed in integer registers).
 143
 144           The 'softfp' floating point model is link-compatible with
 145           the 'soft' floating point model, i.e you can link a library
 146           built 'soft' with some other code built 'softfp'.
 147
 148           However, passing the floating point arguments in integer
 149           registers is a bit inefficient, so if your ARM processor has
 150           a floating point unit, and you don't have pre-compiled
 151           'soft' or 'softfp' code, using the EABIhf ABI will provide
 152           better floating point performances.
 153
 154           If your processor does not have a floating point unit, then
 155           you must use this ABI.
 156
 157 config BR2_ARM_EABIHF
 158         bool "EABIhf"
 159         depends on BR2_ARM_CPU_MAYBE_HAS_VFPV2 || BR2_ARM_CPU_HAS_VFPV2
 160         help
 161           The EABIhf is an extension of EABI which supports the 'hard'
 162           floating point model. This model uses the floating point
 163           unit to execute floating point instructions, and passes
 164           floating point arguments in floating point registers.
 165
 166           It is more efficient than EABI for floating point related
 167           workload. However, it does not allow to link against code
 168           that has been pre-built for the 'soft' or 'softfp' floating
 169           point models.
 170
 171           If your processor has a floating point unit, and you don't
 172           depend on existing pre-compiled code, this option is most
 173           likely the best choice.
 174
 175 endchoice
 176
 177 config BR2_ARM_ENABLE_NEON
 178         bool "Enable NEON SIMD extension support"
 179         depends on BR2_ARM_CPU_MAYBE_HAS_NEON
 180         select BR2_ARM_CPU_HAS_NEON
 181         help
 182           For some CPU cores, the NEON SIMD extension is optional.
 183           Select this option if you are certain your particular
 184           implementation has NEON support and you want to use it.
 185
 186 choice
 187         prompt "Floating point strategy"
 188         depends on BR2_ARM_EABI || BR2_ARM_EABIHF
 189         default BR2_ARM_FPU_VFPV4D16 if BR2_ARM_CPU_HAS_VFPV4
 190         default BR2_ARM_FPU_VFPV3D16 if BR2_ARM_CPU_HAS_VFPV3
 191         default BR2_ARM_FPU_VFPV2 if BR2_ARM_CPU_HAS_VFPV2
 192         default BR2_ARM_SOFT_FLOAT if !BR2_ARM_CPU_HAS_VFPV2
 193
 194 config BR2_ARM_SOFT_FLOAT
 195         bool "Soft float"
 196         depends on BR2_ARM_EABI
 197         select BR2_SOFT_FLOAT
 198         help
 199           This option allows to use software emulated floating
 200           point. It should be used for ARM cores that do not include a
 201           Vector Floating Point unit, such as ARMv5 cores (ARM926 for
 202           example) or certain ARMv6 cores.
 203
 204 config BR2_ARM_FPU_VFPV2
 205         bool "VFPv2"
 206         depends on BR2_ARM_CPU_HAS_VFPV2 || BR2_ARM_CPU_MAYBE_HAS_VFPV2
 207         help
 208           This option allows to use the VFPv2 floating point unit, as
 209           available in some ARMv5 processors (ARM926EJ-S) and some
 210           ARMv6 processors (ARM1136JF-S, ARM1176JZF-S and ARM11
 211           MPCore).
 212
 213           Note that this option is also safe to use for newer cores
 214           such as Cortex-A, because the VFPv3 and VFPv4 units are
 215           backward compatible with VFPv2.
 216
 217 config BR2_ARM_FPU_VFPV3
 218         bool "VFPv3"
 219         depends on BR2_ARM_CPU_HAS_VFPV3 || BR2_ARM_CPU_MAYBE_HAS_VFPV3
 220         help
 221           This option allows to use the VFPv3 floating point unit, as
 222           available in some ARMv7 processors (Cortex-A{8, 9}). This
 223           option requires a VFPv3 unit that has 32 double-precision
 224           registers, which is not necessarily the case in all SOCs
 225           based on Cortex-A{8, 9}. If you're unsure, use VFPv3-D16
 226           instead, which is guaranteed to work on all Cortex-A{8, 9}.
 227
 228           Note that this option is also safe to use for newer cores
 229           that have a VFPv4 unit, because VFPv4 is backward compatible
 230           with VFPv3. They must of course also have 32
 231           double-precision registers.
 232
 233 config BR2_ARM_FPU_VFPV3D16
 234         bool "VFPv3-D16"
 235         depends on BR2_ARM_CPU_HAS_VFPV3 || BR2_ARM_CPU_MAYBE_HAS_VFPV3
 236         help
 237           This option allows to use the VFPv3 floating point unit, as
 238           available in some ARMv7 processors (Cortex-A{8, 9}). This
 239           option requires a VFPv3 unit that has 16 double-precision
 240           registers, which is generally the case in all SOCs based on
 241           Cortex-A{8, 9}, even though VFPv3 is technically optional on
 242           Cortex-A9. This is the safest option for those cores.
 243
 244           Note that this option is also safe to use for newer cores
 245           such that have a VFPv4 unit, because the VFPv4 is backward
 246           compatible with VFPv3.
 247
 248 config BR2_ARM_FPU_VFPV4
 249         bool "VFPv4"
 250         depends on BR2_ARM_CPU_HAS_VFPV4 || BR2_ARM_CPU_MAYBE_HAS_VFPV4
 251         help
 252           This option allows to use the VFPv4 floating point unit, as
 253           available in some ARMv7 processors (Cortex-A{5, 7, 12,
 254           15}). This option requires a VFPv4 unit that has 32
 255           double-precision registers, which is not necessarily the
 256           case in all SOCs based on Cortex-A{5, 7, 12, 15}. If you're
 257           unsure, you should probably use VFPv4-D16 instead.
 258
 259           Note that if you want binary code that works on all ARMv7
 260           cores, including the earlier Cortex-A{8, 9}, you should
 261           instead select VFPv3.
 262
 263 config BR2_ARM_FPU_VFPV4D16
 264         bool "VFPv4-D16"
 265         depends on BR2_ARM_CPU_HAS_VFPV4 || BR2_ARM_CPU_MAYBE_HAS_VFPV4
 266         help
 267           This option allows to use the VFPv4 floating point unit, as
 268           available in some ARMv7 processors (Cortex-A{5, 7, 12,
 269           15}). This option requires a VFPv4 unit that has 16
 270           double-precision registers, which is always available on
 271           Cortex-A12 and Cortex-A15, but optional on Cortex-A5 and
 272           Cortex-A7.
 273
 274           Note that if you want binary code that works on all ARMv7
 275           cores, including the earlier Cortex-A{8, 9}, you should
 276           instead select VFPv3-D16.
 277
 278 config BR2_ARM_FPU_NEON
 279         bool "NEON"
 280         depends on BR2_ARM_CPU_HAS_NEON
 281         help
 282           This option allows to use the NEON SIMD unit, as available
 283           in some ARMv7 processors, as a floating-point unit. It
 284           should however be noted that using NEON for floating point
 285           operations doesn't provide a complete compatibility with the
 286           IEEE 754.
 287
 288 config BR2_ARM_FPU_NEON_VFPV4
 289         bool "NEON/VFPv4"
 290         depends on BR2_ARM_CPU_HAS_VFPV4 || BR2_ARM_CPU_MAYBE_HAS_VFPV4
 291         depends on BR2_ARM_CPU_HAS_NEON
 292         help
 293           This option allows to use both the VFPv4 and the NEON SIMD
 294           units for floating point operations. Note that some ARMv7
 295           cores do not necessarily have VFPv4 and/or NEON support, for
 296           example on Cortex-A5 and Cortex-A7, support for VFPv4 and
 297           NEON is optional.
 298
 299 endchoice
 300
 301 choice
 302         prompt "ARM instruction set"
 303         depends on BR2_ARM_CPU_HAS_THUMB || BR2_ARM_CPU_HAS_THUMB2
 304
 305 config BR2_ARM_INSTRUCTIONS_ARM_CHOICE
 306         bool "ARM"
 307         help
 308           This option instructs the compiler to generate regular ARM
 309           instructions, that are all 32 bits wide.
 310
 311 config BR2_ARM_INSTRUCTIONS_THUMB
 312         bool "Thumb"
 313         depends on BR2_ARM_CPU_HAS_THUMB
 314         help
 315           This option instructions the compiler to generate Thumb
 316           instructions, which allows to mix 16 bits instructions and
 317           32 bits instructions. This generally provides a much smaller
 318           compiled binary size.
 319
 320 config BR2_ARM_INSTRUCTIONS_THUMB2
 321         bool "Thumb2"
 322         depends on BR2_ARM_CPU_HAS_THUMB2
 323         help
 324           This option instructions the compiler to generate Thumb2
 325           instructions, which allows to mix 16 bits instructions and
 326           32 bits instructions. This generally provides a much smaller
 327           compiled binary size.
 328
 329 endchoice
 330
 331 config BR2_ARM_INSTRUCTIONS_ARM
 332         def_bool y
 333         depends on !(BR2_ARM_INSTRUCTIONS_THUMB || BR2_ARM_INSTRUCTIONS_THUMB2)
 334
 335 config BR2_ARCH
 336         default "arm"   if BR2_arm
 337         default "armeb" if BR2_armeb
 338
 339 config BR2_ENDIAN
 340         default "LITTLE" if BR2_arm
 341         default "BIG"    if BR2_armeb
 342
 343 config BR2_GCC_TARGET_CPU
 344         default "arm920"        if BR2_arm920
 345         default "arm920t"       if BR2_arm920t
 346         default "arm922t"       if BR2_arm922t
 347         default "arm926ej-s"    if BR2_arm926t
 348         default "arm1136j-s"    if BR2_arm1136j_s
 349         default "arm1136jf-s"   if BR2_arm1136jf_s
 350         default "arm1176jz-s"   if BR2_arm1176jz_s
 351         default "arm1176jzf-s"  if BR2_arm1176jzf_s
 352         default "cortex-a5"     if BR2_cortex_a5
 353         default "cortex-a7"     if BR2_cortex_a7
 354         default "cortex-a8"     if BR2_cortex_a8
 355         default "cortex-a9"     if BR2_cortex_a9
 356         default "cortex-a12"    if BR2_cortex_a12
 357         default "cortex-a15"    if BR2_cortex_a15
 358         default "fa526"         if BR2_fa526
 359         default "marvell-pj4"   if BR2_pj4
 360         default "strongarm"     if BR2_strongarm
 361         default "xscale"        if BR2_xscale
 362         default "iwmmxt"        if BR2_iwmmxt
 363
 364 config BR2_GCC_TARGET_ARCH
 365         default "armv4t"        if BR2_arm920t
 366         default "armv4t"        if BR2_arm922t
 367         default "armv5te"       if BR2_arm926t
 368         default "armv5t"        if BR2_arm10t
 369         default "armv6j"        if BR2_arm1136jf_s_r0
 370         default "armv6k"        if BR2_arm1136jf_s_r1
 371         default "armv6zk"       if BR2_arm1176jz_s
 372         default "armv6zk"       if BR2_arm1176jzf_s
 373         default "armv7-a"       if BR2_cortex_a5
 374         default "armv7-a"       if BR2_cortex_a7
 375         default "armv7-a"       if BR2_cortex_a8
 376         default "armv7-a"       if BR2_cortex_a9
 377         default "armv7-a"       if BR2_cortex_a12
 378         default "armv7-a"       if BR2_cortex_a15
 379         default "armv4"         if BR2_fa526
 380         default "armv7-a"       if BR2_pj4
 381         default "armv4"         if BR2_strongarm
 382         default "armv5te"       if BR2_xscale
 383         default "iwmmxt"        if BR2_iwmmxt
 384
 385 config BR2_GCC_TARGET_ABI
 386         default "aapcs-linux"
 387
 388 config BR2_GCC_TARGET_FPU
 389         default "vfp"           if BR2_ARM_FPU_VFPV2
 390         default "vfpv3"         if BR2_ARM_FPU_VFPV3
 391         default "vfpv3-d16"     if BR2_ARM_FPU_VFPV3D16
 392         default "vfpv4"         if BR2_ARM_FPU_VFPV4
 393         default "vfpv4-d16"     if BR2_ARM_FPU_VFPV4D16
 394         default "neon"          if BR2_ARM_FPU_NEON
 395         default "neon-vfpv4"    if BR2_ARM_FPU_NEON_VFPV4
 396
 397 config BR2_GCC_TARGET_FLOAT_ABI
 398         default "soft"          if BR2_ARM_SOFT_FLOAT
 399         default "softfp"        if !BR2_ARM_SOFT_FLOAT && BR2_ARM_EABI
 400         default "hard"          if !BR2_ARM_SOFT_FLOAT && BR2_ARM_EABIHF
 401
 402 config BR2_GCC_TARGET_MODE
 403         default "arm"           if BR2_ARM_INSTRUCTIONS_ARM
 404         default "thumb"         if BR2_ARM_INSTRUCTIONS_THUMB || BR2_ARM_INSTRUCTIONS_THUMB2