arch/Config.in.arm

   1 # arm cpu features
   2 config BR2_ARM_CPU_HAS_NEON
   3         bool
   4
   5 # for some cores, NEON support is optional
   6 config BR2_ARM_CPU_MAYBE_HAS_NEON
   7         bool
   8
   9 # for some cores, VFPv2 is optional
  10 config BR2_ARM_CPU_MAYBE_HAS_VFPV2
  11         bool
  12
  13 config BR2_ARM_CPU_HAS_VFPV2
  14         bool
  15
  16 # for some cores, VFPv3 is optional
  17 config BR2_ARM_CPU_MAYBE_HAS_VFPV3
  18         bool
  19         select BR2_ARM_CPU_MAYBE_HAS_VFPV2
  20
  21 config BR2_ARM_CPU_HAS_VFPV3
  22         bool
  23         select BR2_ARM_CPU_HAS_VFPV2
  24
  25 # for some cores, VFPv4 is optional
  26 config BR2_ARM_CPU_MAYBE_HAS_VFPV4
  27         bool
  28         select BR2_ARM_CPU_MAYBE_HAS_VFPV3
  29
  30 config BR2_ARM_CPU_HAS_VFPV4
  31         bool
  32         select BR2_ARM_CPU_HAS_VFPV3
  33
  34 config BR2_ARM_CPU_HAS_FP_ARMV8
  35         bool
  36         select BR2_ARM_CPU_HAS_VFPV4
  37
  38 config BR2_ARM_CPU_HAS_ARM
  39         bool
  40
  41 config BR2_ARM_CPU_HAS_THUMB
  42         bool
  43
  44 config BR2_ARM_CPU_HAS_THUMB2
  45         bool
  46
  47 config BR2_ARM_CPU_ARMV4
  48         bool
  49
  50 config BR2_ARM_CPU_ARMV5
  51         bool
  52
  53 config BR2_ARM_CPU_ARMV6
  54         bool
  55
  56 config BR2_ARM_CPU_ARMV7A
  57         bool
  58
  59 config BR2_ARM_CPU_ARMV7M
  60         bool
  61
  62 config BR2_ARM_CPU_ARMV8
  63         bool
  64
  65 choice
  66         prompt "Target Architecture Variant"
  67         default BR2_arm926t
  68         help
  69           Specific CPU variant to use
  70
  71 config BR2_arm920t
  72         bool "arm920t"
  73         select BR2_ARM_CPU_HAS_ARM
  74         select BR2_ARM_CPU_HAS_THUMB
  75         select BR2_ARM_CPU_ARMV4
  76         select BR2_ARCH_HAS_MMU_OPTIONAL
  77         depends on !BR2_ARCH_IS_64
  78 config BR2_arm922t
  79         bool "arm922t"
  80         select BR2_ARM_CPU_HAS_ARM
  81         select BR2_ARM_CPU_HAS_THUMB
  82         select BR2_ARM_CPU_ARMV4
  83         select BR2_ARCH_HAS_MMU_OPTIONAL
  84         depends on !BR2_ARCH_IS_64
  85 config BR2_arm926t
  86         bool "arm926t"
  87         select BR2_ARM_CPU_HAS_ARM
  88         select BR2_ARM_CPU_MAYBE_HAS_VFPV2
  89         select BR2_ARM_CPU_HAS_THUMB
  90         select BR2_ARM_CPU_ARMV5
  91         select BR2_ARCH_HAS_MMU_OPTIONAL
  92         depends on !BR2_ARCH_IS_64
  93 config BR2_arm1136j_s
  94         bool "arm1136j-s"
  95         select BR2_ARM_CPU_HAS_ARM
  96         select BR2_ARM_CPU_HAS_THUMB
  97         select BR2_ARM_CPU_ARMV6
  98         select BR2_ARCH_HAS_MMU_OPTIONAL
  99         depends on !BR2_ARCH_IS_64
 100 config BR2_arm1136jf_s
 101         bool "arm1136jf-s"
 102         select BR2_ARM_CPU_HAS_ARM
 103         select BR2_ARM_CPU_HAS_VFPV2
 104         select BR2_ARM_CPU_HAS_THUMB
 105         select BR2_ARM_CPU_ARMV6
 106         select BR2_ARCH_HAS_MMU_OPTIONAL
 107         depends on !BR2_ARCH_IS_64
 108 config BR2_arm1176jz_s
 109         bool "arm1176jz-s"
 110         select BR2_ARM_CPU_HAS_ARM
 111         select BR2_ARM_CPU_HAS_THUMB
 112         select BR2_ARM_CPU_ARMV6
 113         select BR2_ARCH_HAS_MMU_OPTIONAL
 114         depends on !BR2_ARCH_IS_64
 115 config BR2_arm1176jzf_s
 116         bool "arm1176jzf-s"
 117         select BR2_ARM_CPU_HAS_ARM
 118         select BR2_ARM_CPU_HAS_VFPV2
 119         select BR2_ARM_CPU_HAS_THUMB
 120         select BR2_ARM_CPU_ARMV6
 121         select BR2_ARCH_HAS_MMU_OPTIONAL
 122         depends on !BR2_ARCH_IS_64
 123 config BR2_arm11mpcore
 124         bool "mpcore"
 125         select BR2_ARM_CPU_HAS_ARM
 126         select BR2_ARM_CPU_MAYBE_HAS_VFPV2
 127         select BR2_ARM_CPU_HAS_THUMB
 128         select BR2_ARM_CPU_ARMV6
 129         select BR2_ARCH_HAS_MMU_OPTIONAL
 130         depends on !BR2_ARCH_IS_64
 131 config BR2_cortex_a5
 132         bool "cortex-A5"
 133         select BR2_ARM_CPU_HAS_ARM
 134         select BR2_ARM_CPU_MAYBE_HAS_NEON
 135         select BR2_ARM_CPU_MAYBE_HAS_VFPV4
 136         select BR2_ARM_CPU_HAS_THUMB2
 137         select BR2_ARM_CPU_ARMV7A
 138         select BR2_ARCH_HAS_MMU_OPTIONAL
 139         depends on !BR2_ARCH_IS_64
 140 config BR2_cortex_a7
 141         bool "cortex-A7"
 142         select BR2_ARM_CPU_HAS_ARM
 143         select BR2_ARM_CPU_HAS_NEON
 144         select BR2_ARM_CPU_HAS_VFPV4
 145         select BR2_ARM_CPU_HAS_THUMB2
 146         select BR2_ARM_CPU_ARMV7A
 147         select BR2_ARCH_HAS_MMU_OPTIONAL
 148         depends on !BR2_ARCH_IS_64
 149 config BR2_cortex_a8
 150         bool "cortex-A8"
 151         select BR2_ARM_CPU_HAS_ARM
 152         select BR2_ARM_CPU_HAS_NEON
 153         select BR2_ARM_CPU_HAS_VFPV3
 154         select BR2_ARM_CPU_HAS_THUMB2
 155         select BR2_ARM_CPU_ARMV7A
 156         select BR2_ARCH_HAS_MMU_OPTIONAL
 157         depends on !BR2_ARCH_IS_64
 158 config BR2_cortex_a9
 159         bool "cortex-A9"
 160         select BR2_ARM_CPU_HAS_ARM
 161         select BR2_ARM_CPU_MAYBE_HAS_NEON
 162         select BR2_ARM_CPU_MAYBE_HAS_VFPV3
 163         select BR2_ARM_CPU_HAS_THUMB2
 164         select BR2_ARM_CPU_ARMV7A
 165         select BR2_ARCH_HAS_MMU_OPTIONAL
 166         depends on !BR2_ARCH_IS_64
 167 config BR2_cortex_a12
 168         bool "cortex-A12"
 169         select BR2_ARM_CPU_HAS_ARM
 170         select BR2_ARM_CPU_HAS_NEON
 171         select BR2_ARM_CPU_HAS_VFPV4
 172         select BR2_ARM_CPU_HAS_THUMB2
 173         select BR2_ARM_CPU_ARMV7A
 174         select BR2_ARCH_HAS_MMU_OPTIONAL
 175         depends on !BR2_ARCH_IS_64
 176 config BR2_cortex_a15
 177         bool "cortex-A15"
 178         select BR2_ARM_CPU_HAS_ARM
 179         select BR2_ARM_CPU_HAS_NEON
 180         select BR2_ARM_CPU_HAS_VFPV4
 181         select BR2_ARM_CPU_HAS_THUMB2
 182         select BR2_ARM_CPU_ARMV7A
 183         select BR2_ARCH_HAS_MMU_OPTIONAL
 184         depends on !BR2_ARCH_IS_64
 185 config BR2_cortex_a17
 186         bool "cortex-A17"
 187         select BR2_ARM_CPU_HAS_ARM
 188         select BR2_ARM_CPU_HAS_NEON
 189         select BR2_ARM_CPU_HAS_VFPV4
 190         select BR2_ARM_CPU_HAS_THUMB2
 191         select BR2_ARM_CPU_ARMV7A
 192         select BR2_ARCH_HAS_MMU_OPTIONAL
 193         depends on !BR2_ARCH_IS_64
 194 config BR2_cortex_a53
 195         bool "cortex-A53"
 196         select BR2_ARM_CPU_HAS_ARM
 197         select BR2_ARM_CPU_HAS_NEON
 198         select BR2_ARM_CPU_HAS_FP_ARMV8
 199         select BR2_ARM_CPU_ARMV8
 200         select BR2_ARCH_HAS_MMU_OPTIONAL
 201 config BR2_cortex_a57
 202         bool "cortex-A57"
 203         select BR2_ARM_CPU_HAS_ARM
 204         select BR2_ARM_CPU_HAS_NEON
 205         select BR2_ARM_CPU_HAS_FP_ARMV8
 206         select BR2_ARM_CPU_ARMV8
 207         select BR2_ARCH_HAS_MMU_OPTIONAL
 208 config BR2_cortex_a72
 209         bool "cortex-A72"
 210         select BR2_ARM_CPU_HAS_ARM
 211         select BR2_ARM_CPU_HAS_NEON
 212         select BR2_ARM_CPU_HAS_FP_ARMV8
 213         select BR2_ARM_CPU_ARMV8
 214         select BR2_ARCH_HAS_MMU_OPTIONAL
 215 config BR2_cortex_m3
 216         bool "cortex-M3"
 217         select BR2_ARM_CPU_HAS_THUMB2
 218         select BR2_ARM_CPU_ARMV7M
 219         depends on !BR2_ARCH_IS_64
 220 config BR2_cortex_m4
 221         bool "cortex-M4"
 222         select BR2_ARM_CPU_HAS_THUMB2
 223         select BR2_ARM_CPU_ARMV7M
 224         depends on !BR2_ARCH_IS_64
 225 config BR2_fa526
 226         bool "fa526/626"
 227         select BR2_ARM_CPU_HAS_ARM
 228         select BR2_ARM_CPU_ARMV4
 229         select BR2_ARCH_HAS_MMU_OPTIONAL
 230         depends on !BR2_ARCH_IS_64
 231 config BR2_pj4
 232         bool "pj4"
 233         select BR2_ARM_CPU_HAS_ARM
 234         select BR2_ARM_CPU_HAS_VFPV3
 235         select BR2_ARM_CPU_ARMV7A
 236         select BR2_ARCH_HAS_MMU_OPTIONAL
 237         depends on !BR2_ARCH_IS_64
 238 config BR2_strongarm
 239         bool "strongarm sa110/sa1100"
 240         select BR2_ARM_CPU_HAS_ARM
 241         select BR2_ARM_CPU_ARMV4
 242         select BR2_ARCH_HAS_MMU_OPTIONAL
 243         depends on !BR2_ARCH_IS_64
 244 config BR2_xscale
 245         bool "xscale"
 246         select BR2_ARM_CPU_HAS_ARM
 247         select BR2_ARM_CPU_HAS_THUMB
 248         select BR2_ARM_CPU_ARMV5
 249         select BR2_ARCH_HAS_MMU_OPTIONAL
 250         depends on !BR2_ARCH_IS_64
 251 config BR2_iwmmxt
 252         bool "iwmmxt"
 253         select BR2_ARM_CPU_HAS_ARM
 254         select BR2_ARM_CPU_ARMV5
 255         select BR2_ARCH_HAS_MMU_OPTIONAL
 256         depends on !BR2_ARCH_IS_64
 257 endchoice
 258
 259 config BR2_ARM_ENABLE_NEON
 260         bool "Enable NEON SIMD extension support"
 261         depends on BR2_ARM_CPU_MAYBE_HAS_NEON
 262         select BR2_ARM_CPU_HAS_NEON
 263         help
 264           For some CPU cores, the NEON SIMD extension is optional.
 265           Select this option if you are certain your particular
 266           implementation has NEON support and you want to use it.
 267
 268 config BR2_ARM_ENABLE_VFP
 269         bool "Enable VFP extension support"
 270         depends on BR2_ARM_CPU_MAYBE_HAS_VFPV2
 271         select BR2_ARM_CPU_HAS_VFPV4 if BR2_ARM_CPU_MAYBE_HAS_VFPV4
 272         select BR2_ARM_CPU_HAS_VFPV3 if BR2_ARM_CPU_MAYBE_HAS_VFPV3
 273         select BR2_ARM_CPU_HAS_VFPV2 if BR2_ARM_CPU_MAYBE_HAS_VFPV2
 274         help
 275           For some CPU cores, the VFP extension is optional. Select
 276           this option if you are certain your particular
 277           implementation has VFP support and you want to use it.
 278
 279 choice
 280         prompt "Target ABI"
 281         depends on BR2_arm || BR2_armeb
 282         default BR2_ARM_EABIHF if BR2_ARM_CPU_HAS_VFPV2
 283         default BR2_ARM_EABI
 284         help
 285           Application Binary Interface to use. The Application Binary
 286           Interface describes the calling conventions (how arguments
 287           are passed to functions, how the return value is passed, how
 288           system calls are made, etc.).
 289
 290 config BR2_ARM_EABI
 291         bool "EABI"
 292         help
 293           The EABI is currently the standard ARM ABI, which is used in
 294           most projects. It supports both the 'soft' floating point
 295           model (in which floating point instructions are emulated in
 296           software) and the 'softfp' floating point model (in which
 297           floating point instructions are executed using an hardware
 298           floating point unit, but floating point arguments to
 299           functions are passed in integer registers).
 300
 301           The 'softfp' floating point model is link-compatible with
 302           the 'soft' floating point model, i.e you can link a library
 303           built 'soft' with some other code built 'softfp'.
 304
 305           However, passing the floating point arguments in integer
 306           registers is a bit inefficient, so if your ARM processor has
 307           a floating point unit, and you don't have pre-compiled
 308           'soft' or 'softfp' code, using the EABIhf ABI will provide
 309           better floating point performances.
 310
 311           If your processor does not have a floating point unit, then
 312           you must use this ABI.
 313
 314 config BR2_ARM_EABIHF
 315         bool "EABIhf"
 316         depends on BR2_ARM_CPU_HAS_VFPV2
 317         help
 318           The EABIhf is an extension of EABI which supports the 'hard'
 319           floating point model. This model uses the floating point
 320           unit to execute floating point instructions, and passes
 321           floating point arguments in floating point registers.
 322
 323           It is more efficient than EABI for floating point related
 324           workload. However, it does not allow to link against code
 325           that has been pre-built for the 'soft' or 'softfp' floating
 326           point models.
 327
 328           If your processor has a floating point unit, and you don't
 329           depend on existing pre-compiled code, this option is most
 330           likely the best choice.
 331
 332 endchoice
 333
 334 choice
 335         prompt "Floating point strategy"
 336         default BR2_ARM_FPU_FP_ARMV8 if BR2_ARM_CPU_HAS_FP_ARMV8
 337         default BR2_ARM_FPU_VFPV4D16 if BR2_ARM_CPU_HAS_VFPV4
 338         default BR2_ARM_FPU_VFPV3D16 if BR2_ARM_CPU_HAS_VFPV3
 339         default BR2_ARM_FPU_VFPV2 if BR2_ARM_CPU_HAS_VFPV2
 340         default BR2_ARM_SOFT_FLOAT if !BR2_ARM_CPU_HAS_VFPV2
 341
 342 config BR2_ARM_SOFT_FLOAT
 343         bool "Soft float"
 344         depends on BR2_ARM_EABI
 345         select BR2_SOFT_FLOAT
 346         help
 347           This option allows to use software emulated floating
 348           point. It should be used for ARM cores that do not include a
 349           Vector Floating Point unit, such as ARMv5 cores (ARM926 for
 350           example) or certain ARMv6 cores.
 351
 352 config BR2_ARM_FPU_VFPV2
 353         bool "VFPv2"
 354         depends on BR2_ARM_CPU_HAS_VFPV2
 355         help
 356           This option allows to use the VFPv2 floating point unit, as
 357           available in some ARMv5 processors (ARM926EJ-S) and some
 358           ARMv6 processors (ARM1136JF-S, ARM1176JZF-S and ARM11
 359           MPCore).
 360
 361           Note that this option is also safe to use for newer cores
 362           such as Cortex-A, because the VFPv3 and VFPv4 units are
 363           backward compatible with VFPv2.
 364
 365 config BR2_ARM_FPU_VFPV3
 366         bool "VFPv3"
 367         depends on BR2_ARM_CPU_HAS_VFPV3
 368         help
 369           This option allows to use the VFPv3 floating point unit, as
 370           available in some ARMv7 processors (Cortex-A{8, 9}). This
 371           option requires a VFPv3 unit that has 32 double-precision
 372           registers, which is not necessarily the case in all SOCs
 373           based on Cortex-A{8, 9}. If you're unsure, use VFPv3-D16
 374           instead, which is guaranteed to work on all Cortex-A{8, 9}.
 375
 376           Note that this option is also safe to use for newer cores
 377           that have a VFPv4 unit, because VFPv4 is backward compatible
 378           with VFPv3. They must of course also have 32
 379           double-precision registers.
 380
 381 config BR2_ARM_FPU_VFPV3D16
 382         bool "VFPv3-D16"
 383         depends on BR2_ARM_CPU_HAS_VFPV3
 384         help
 385           This option allows to use the VFPv3 floating point unit, as
 386           available in some ARMv7 processors (Cortex-A{8, 9}). This
 387           option requires a VFPv3 unit that has 16 double-precision
 388           registers, which is generally the case in all SOCs based on
 389           Cortex-A{8, 9}, even though VFPv3 is technically optional on
 390           Cortex-A9. This is the safest option for those cores.
 391
 392           Note that this option is also safe to use for newer cores
 393           such that have a VFPv4 unit, because the VFPv4 is backward
 394           compatible with VFPv3.
 395
 396 config BR2_ARM_FPU_VFPV4
 397         bool "VFPv4"
 398         depends on BR2_ARM_CPU_HAS_VFPV4
 399         help
 400           This option allows to use the VFPv4 floating point unit, as
 401           available in some ARMv7 processors (Cortex-A{5, 7, 12,
 402           15}). This option requires a VFPv4 unit that has 32
 403           double-precision registers, which is not necessarily the
 404           case in all SOCs based on Cortex-A{5, 7, 12, 15}. If you're
 405           unsure, you should probably use VFPv4-D16 instead.
 406
 407           Note that if you want binary code that works on all ARMv7
 408           cores, including the earlier Cortex-A{8, 9}, you should
 409           instead select VFPv3.
 410
 411 config BR2_ARM_FPU_VFPV4D16
 412         bool "VFPv4-D16"
 413         depends on BR2_ARM_CPU_HAS_VFPV4
 414         help
 415           This option allows to use the VFPv4 floating point unit, as
 416           available in some ARMv7 processors (Cortex-A{5, 7, 12,
 417           15}). This option requires a VFPv4 unit that has 16
 418           double-precision registers, which is always available on
 419           Cortex-A12 and Cortex-A15, but optional on Cortex-A5 and
 420           Cortex-A7.
 421
 422           Note that if you want binary code that works on all ARMv7
 423           cores, including the earlier Cortex-A{8, 9}, you should
 424           instead select VFPv3-D16.
 425
 426 config BR2_ARM_FPU_NEON
 427         bool "NEON"
 428         depends on BR2_ARM_CPU_HAS_NEON
 429         help
 430           This option allows to use the NEON SIMD unit, as available
 431           in some ARMv7 processors, as a floating-point unit. It
 432           should however be noted that using NEON for floating point
 433           operations doesn't provide a complete compatibility with the
 434           IEEE 754.
 435
 436 config BR2_ARM_FPU_NEON_VFPV4
 437         bool "NEON/VFPv4"
 438         depends on BR2_ARM_CPU_HAS_VFPV4
 439         depends on BR2_ARM_CPU_HAS_NEON
 440         help
 441           This option allows to use both the VFPv4 and the NEON SIMD
 442           units for floating point operations. Note that some ARMv7
 443           cores do not necessarily have VFPv4 and/or NEON support, for
 444           example on Cortex-A5 and Cortex-A7, support for VFPv4 and
 445           NEON is optional.
 446
 447 config BR2_ARM_FPU_FP_ARMV8
 448         bool "FP-ARMv8"
 449         depends on BR2_ARM_CPU_HAS_FP_ARMV8
 450         help
 451           This option allows to use the ARMv8 floating point unit.
 452
 453 config BR2_ARM_FPU_NEON_FP_ARMV8
 454         bool "NEON/FP-ARMv8"
 455         depends on BR2_ARM_CPU_HAS_FP_ARMV8
 456         depends on BR2_ARM_CPU_HAS_NEON
 457         help
 458           This option allows to use both the ARMv8 floating point unit
 459           and the NEON SIMD unit for floating point operations.
 460
 461 endchoice
 462
 463 choice
 464         prompt "ARM instruction set"
 465         depends on BR2_arm || BR2_armeb
 466
 467 config BR2_ARM_INSTRUCTIONS_ARM
 468         bool "ARM"
 469         depends on BR2_ARM_CPU_HAS_ARM
 470         help
 471           This option instructs the compiler to generate regular ARM
 472           instructions, that are all 32 bits wide.
 473
 474 config BR2_ARM_INSTRUCTIONS_THUMB
 475         bool "Thumb"
 476         depends on BR2_ARM_CPU_HAS_THUMB
 477         # Thumb-1 and VFP are not compatible
 478         depends on BR2_ARM_SOFT_FLOAT
 479         help
 480           This option instructions the compiler to generate Thumb
 481           instructions, which allows to mix 16 bits instructions and
 482           32 bits instructions. This generally provides a much smaller
 483           compiled binary size.
 484
 485 comment "Thumb1 is not compatible with VFP"
 486         depends on BR2_ARM_CPU_HAS_THUMB
 487         depends on !BR2_ARM_SOFT_FLOAT
 488
 489 config BR2_ARM_INSTRUCTIONS_THUMB2
 490         bool "Thumb2"
 491         depends on BR2_ARM_CPU_HAS_THUMB2
 492         help
 493           This option instructions the compiler to generate Thumb2
 494           instructions, which allows to mix 16 bits instructions and
 495           32 bits instructions. This generally provides a much smaller
 496           compiled binary size.
 497
 498 endchoice
 499
 500 config BR2_ARCH
 501         default "arm"           if BR2_arm
 502         default "armeb"         if BR2_armeb
 503         default "aarch64"       if BR2_aarch64
 504         default "aarch64_be"    if BR2_aarch64_be
 505
 506 config BR2_ENDIAN
 507         default "LITTLE" if (BR2_arm || BR2_aarch64)
 508         default "BIG"    if (BR2_armeb || BR2_aarch64_be)
 509
 510 config BR2_GCC_TARGET_CPU
 511         default "arm920t"       if BR2_arm920t
 512         default "arm922t"       if BR2_arm922t
 513         default "arm926ej-s"    if BR2_arm926t
 514         default "arm1136j-s"    if BR2_arm1136j_s
 515         default "arm1136jf-s"   if BR2_arm1136jf_s
 516         default "arm1176jz-s"   if BR2_arm1176jz_s
 517         default "arm1176jzf-s"  if BR2_arm1176jzf_s
 518         default "mpcore"        if BR2_arm11mpcore && BR2_ARM_CPU_HAS_VFPV2
 519         default "mpcorenovfp"   if BR2_arm11mpcore
 520         default "cortex-a5"     if BR2_cortex_a5
 521         default "cortex-a7"     if BR2_cortex_a7
 522         default "cortex-a8"     if BR2_cortex_a8
 523         default "cortex-a9"     if BR2_cortex_a9
 524         default "cortex-a12"    if BR2_cortex_a12
 525         default "cortex-a15"    if BR2_cortex_a15
 526         default "cortex-a17"    if BR2_cortex_a17
 527         default "cortex-m3"     if BR2_cortex_m3
 528         default "cortex-m4"     if BR2_cortex_m4
 529         default "fa526"         if BR2_fa526
 530         default "marvell-pj4"   if BR2_pj4
 531         default "strongarm"     if BR2_strongarm
 532         default "xscale"        if BR2_xscale
 533         default "iwmmxt"        if BR2_iwmmxt
 534         default "cortex-a53"            if (BR2_cortex_a53 && !BR2_ARCH_IS_64)
 535         default "cortex-a53+fp"         if (BR2_cortex_a53 && BR2_ARCH_IS_64 && BR2_ARM_FPU_FP_ARMV8)
 536         default "cortex-a53+fp+simd"    if (BR2_cortex_a53 && BR2_ARCH_IS_64 && BR2_ARM_FPU_NEON_FP_ARMV8)
 537         default "cortex-a57"            if (BR2_cortex_a57 && !BR2_ARCH_IS_64)
 538         default "cortex-a57+fp"         if (BR2_cortex_a57 && BR2_ARCH_IS_64 && BR2_ARM_FPU_FP_ARMV8)
 539         default "cortex-a57+fp+simd"    if (BR2_cortex_a57 && BR2_ARCH_IS_64 && BR2_ARM_FPU_NEON_FP_ARMV8)
 540         default "cortex-a72"            if (BR2_cortex_a72 && !BR2_ARCH_IS_64)
 541         default "cortex-a72+fp"         if (BR2_cortex_a72 && BR2_ARCH_IS_64 && BR2_ARM_FPU_FP_ARMV8)
 542         default "cortex-a72+fp+simd"    if (BR2_cortex_a72 && BR2_ARCH_IS_64 && BR2_ARM_FPU_NEON_FP_ARMV8)
 543
 544 config BR2_GCC_TARGET_ABI
 545         default "aapcs-linux"   if BR2_arm || BR2_armeb
 546         default "lp64"          if BR2_aarch64 || BR2_aarch64_be
 547
 548 config BR2_GCC_TARGET_FPU
 549         depends on BR2_arm || BR2_armeb
 550         default "vfp"           if BR2_ARM_FPU_VFPV2
 551         default "vfpv3"         if BR2_ARM_FPU_VFPV3
 552         default "vfpv3-d16"     if BR2_ARM_FPU_VFPV3D16
 553         default "vfpv4"         if BR2_ARM_FPU_VFPV4
 554         default "vfpv4-d16"     if BR2_ARM_FPU_VFPV4D16
 555         default "neon"          if BR2_ARM_FPU_NEON
 556         default "neon-vfpv4"    if BR2_ARM_FPU_NEON_VFPV4
 557         default "fp-armv8"      if BR2_ARM_FPU_FP_ARMV8
 558         default "neon-fp-armv8" if BR2_ARM_FPU_NEON_FP_ARMV8
 559
 560 config BR2_GCC_TARGET_FLOAT_ABI
 561         default "soft"          if BR2_ARM_SOFT_FLOAT
 562         default "softfp"        if !BR2_ARM_SOFT_FLOAT && BR2_ARM_EABI
 563         default "hard"          if !BR2_ARM_SOFT_FLOAT && BR2_ARM_EABIHF
 564
 565 config BR2_GCC_TARGET_MODE
 566         default "arm"           if BR2_ARM_INSTRUCTIONS_ARM
 567         default "thumb"         if BR2_ARM_INSTRUCTIONS_THUMB || BR2_ARM_INSTRUCTIONS_THUMB2