| blob | c85568cad395ca4d02a8dcb0be0d2922bbb94b36 |
1 Patch borrowed from OpenEmbedded, available at
2 recipes/libaio/libaio-0.3.106/00_arches.patch in their source
3 tree. The patch has been adapted to remove the ARM-related
4 definitions, since they have been merged in later versions of libaio.
6 The patch adds various architecture specific definitions (syscall
7 number and macros) for m68k, MIPS, PA/RISC and Sparc. Amongst these,
8 Buildroot mostly only cares about MIPS, but it was just easier to take
9 the whole OpenEmbedded patch.
11 Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
12 ---
13 src/libaio.h | 24 +++++
14 src/syscall-m68k.h | 78 +++++++++++++++++
15 src/syscall-mips.h | 223 +++++++++++++++++++++++++++++++++++++++++++++++++++
16 src/syscall-parisc.h | 146 +++++++++++++++++++++++++++++++++
17 src/syscall-sparc.h | 130 +++++++++++++++++++++++++++++
18 src/syscall.h | 8 +
19 7 files changed, 725 insertions(+)
21 Index: libaio-0.3.109/src/libaio.h
22 ===================================================================
23 --- libaio-0.3.109.orig/src/libaio.h
24 +++ libaio-0.3.109/src/libaio.h
25 @@ -83,6 +83,30 @@
26 #define PADDEDptr(x, y) x; unsigned y
27 #define PADDEDul(x, y) unsigned long x; unsigned y
28 # endif
29 +#elif defined(__m68k__) /* big endian, 32 bits */
30 +#define PADDED(x, y) unsigned y; x
31 +#define PADDEDptr(x, y) unsigned y; x
32 +#define PADDEDul(x, y) unsigned y; unsigned long x
33 +#elif defined(__sparc__) /* big endian, 32 bits */
34 +#define PADDED(x, y) unsigned y; x
35 +#define PADDEDptr(x, y) unsigned y; x
36 +#define PADDEDul(x, y) unsigned y; unsigned long x
37 +#elif defined(__hppa__) /* big endian, 32 bits */
38 +#define PADDED(x, y) unsigned y; x
39 +#define PADDEDptr(x, y) unsigned y; x
40 +#define PADDEDul(x, y) unsigned y; unsigned long x
41 +#elif defined(__mips__)
42 +# if defined (__MIPSEB__) /* big endian, 32 bits */
43 +#define PADDED(x, y) unsigned y; x
44 +#define PADDEDptr(x, y) unsigned y; x
45 +#define PADDEDul(x, y) unsigned y; unsigned long x
46 +# elif defined(__MIPSEL__) /* little endian, 32 bits */
47 +#define PADDED(x, y) x; unsigned y
48 +#define PADDEDptr(x, y) x; unsigned y
49 +#define PADDEDul(x, y) unsigned long x; unsigned y
50 +# else
51 +# error "neither mipseb nor mipsel?"
52 +# endif
53 #else
54 #error endian?
55 #endif
56 Index: libaio-0.3.109/src/syscall-m68k.h
57 ===================================================================
58 --- /dev/null
59 +++ libaio-0.3.109/src/syscall-m68k.h
60 @@ -0,0 +1,78 @@
61 +#define __NR_io_setup 241
62 +#define __NR_io_destroy 242
63 +#define __NR_io_getevents 243
64 +#define __NR_io_submit 244
65 +#define __NR_io_cancel 245
66 +
67 +#define io_syscall1(type,fname,sname,atype,a) \
68 +type fname(atype a) \
69 +{ \
70 +register long __res __asm__ ("%d0") = __NR_##sname; \
71 +register long __a __asm__ ("%d1") = (long)(a); \
72 +__asm__ __volatile__ ("trap #0" \
73 + : "+d" (__res) \
74 + : "d" (__a) ); \
75 +return (type) __res; \
76 +}
77 +
78 +#define io_syscall2(type,fname,sname,atype,a,btype,b) \
79 +type fname(atype a,btype b) \
80 +{ \
81 +register long __res __asm__ ("%d0") = __NR_##sname; \
82 +register long __a __asm__ ("%d1") = (long)(a); \
83 +register long __b __asm__ ("%d2") = (long)(b); \
84 +__asm__ __volatile__ ("trap #0" \
85 + : "+d" (__res) \
86 + : "d" (__a), "d" (__b) \
87 + ); \
88 +return (type) __res; \
89 +}
90 +
91 +#define io_syscall3(type,fname,sname,atype,a,btype,b,ctype,c) \
92 +type fname(atype a,btype b,ctype c) \
93 +{ \
94 +register long __res __asm__ ("%d0") = __NR_##sname; \
95 +register long __a __asm__ ("%d1") = (long)(a); \
96 +register long __b __asm__ ("%d2") = (long)(b); \
97 +register long __c __asm__ ("%d3") = (long)(c); \
98 +__asm__ __volatile__ ("trap #0" \
99 + : "+d" (__res) \
100 + : "d" (__a), "d" (__b), \
101 + "d" (__c) \
102 + ); \
103 +return (type) __res; \
104 +}
105 +
106 +#define io_syscall4(type,fname,sname,atype,a,btype,b,ctype,c,dtype,d) \
107 +type fname (atype a, btype b, ctype c, dtype d) \
108 +{ \
109 +register long __res __asm__ ("%d0") = __NR_##sname; \
110 +register long __a __asm__ ("%d1") = (long)(a); \
111 +register long __b __asm__ ("%d2") = (long)(b); \
112 +register long __c __asm__ ("%d3") = (long)(c); \
113 +register long __d __asm__ ("%d4") = (long)(d); \
114 +__asm__ __volatile__ ("trap #0" \
115 + : "+d" (__res) \
116 + : "d" (__a), "d" (__b), \
117 + "d" (__c), "d" (__d) \
118 + ); \
119 +return (type) __res; \
120 +}
121 +
122 +#define io_syscall5(type,fname,sname,atype,a,btype,b,ctype,c,dtype,d,etype,e) \
123 +type fname (atype a,btype b,ctype c,dtype d,etype e) \
124 +{ \
125 +register long __res __asm__ ("%d0") = __NR_##sname; \
126 +register long __a __asm__ ("%d1") = (long)(a); \
127 +register long __b __asm__ ("%d2") = (long)(b); \
128 +register long __c __asm__ ("%d3") = (long)(c); \
129 +register long __d __asm__ ("%d4") = (long)(d); \
130 +register long __e __asm__ ("%d5") = (long)(e); \
131 +__asm__ __volatile__ ("trap #0" \
132 + : "+d" (__res) \
133 + : "d" (__a), "d" (__b), \
134 + "d" (__c), "d" (__d), "d" (__e) \
135 + ); \
136 +return (type) __res; \
137 +}
138 +
139 Index: libaio-0.3.109/src/syscall-mips.h
140 ===================================================================
141 --- /dev/null
142 +++ libaio-0.3.109/src/syscall-mips.h
143 @@ -0,0 +1,223 @@
144 +/*
145 + * This file is subject to the terms and conditions of the GNU General Public
146 + * License. See the file "COPYING" in the main directory of this archive
147 + * for more details.
148 + *
149 + * Copyright (C) 1995, 96, 97, 98, 99, 2000 by Ralf Baechle
150 + * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
151 + *
152 + * Changed system calls macros _syscall5 - _syscall7 to push args 5 to 7 onto
153 + * the stack. Robin Farine for ACN S.A, Copyright (C) 1996 by ACN S.A
154 + */
155 +
156 +#ifndef _MIPS_SIM_ABI32
157 +#define _MIPS_SIM_ABI32 1
158 +#define _MIPS_SIM_NABI32 2
159 +#define _MIPS_SIM_ABI64 3
160 +#endif
161 +
162 +#if _MIPS_SIM == _MIPS_SIM_ABI32
163 +
164 +/*
165 + * Linux o32 style syscalls are in the range from 4000 to 4999.
166 + */
167 +#define __NR_Linux 4000
168 +#define __NR_io_setup (__NR_Linux + 241)
169 +#define __NR_io_destroy (__NR_Linux + 242)
170 +#define __NR_io_getevents (__NR_Linux + 243)
171 +#define __NR_io_submit (__NR_Linux + 244)
172 +#define __NR_io_cancel (__NR_Linux + 245)
173 +
174 +#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
175 +
176 +#if _MIPS_SIM == _MIPS_SIM_ABI64
177 +
178 +/*
179 + * Linux 64-bit syscalls are in the range from 5000 to 5999.
180 + */
181 +#define __NR_Linux 5000
182 +#define __NR_io_setup (__NR_Linux + 200)
183 +#define __NR_io_destroy (__NR_Linux + 201)
184 +#define __NR_io_getevents (__NR_Linux + 202)
185 +#define __NR_io_submit (__NR_Linux + 203)
186 +#define __NR_io_cancel (__NR_Linux + 204)
187 +#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */
188 +
189 +#if _MIPS_SIM == _MIPS_SIM_NABI32
190 +
191 +/*
192 + * Linux N32 syscalls are in the range from 6000 to 6999.
193 + */
194 +#define __NR_Linux 6000
195 +#define __NR_io_setup (__NR_Linux + 200)
196 +#define __NR_io_destroy (__NR_Linux + 201)
197 +#define __NR_io_getevents (__NR_Linux + 202)
198 +#define __NR_io_submit (__NR_Linux + 203)
199 +#define __NR_io_cancel (__NR_Linux + 204)
200 +#endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */
201 +
202 +#define io_syscall1(type,fname,sname,atype,a) \
203 +type fname(atype a) \
204 +{ \
205 + register unsigned long __a0 asm("$4") = (unsigned long) a; \
206 + register unsigned long __a3 asm("$7"); \
207 + unsigned long __v0; \
208 + \
209 + __asm__ volatile ( \
210 + ".set\tnoreorder\n\t" \
211 + "li\t$2, %3\t\t\t# " #fname "\n\t" \
212 + "syscall\n\t" \
213 + "move\t%0, $2\n\t" \
214 + ".set\treorder" \
215 + : "=&r" (__v0), "=r" (__a3) \
216 + : "r" (__a0), "i" (__NR_##sname) \
217 + : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \
218 + "memory"); \
219 + \
220 + if (__a3 == 0) \
221 + return (type) __v0; \
222 + return (type) -1; \
223 +}
224 +
225 +#define io_syscall2(type,fname,sname,atype,a,btype,b) \
226 +type fname(atype a, btype b) \
227 +{ \
228 + register unsigned long __a0 asm("$4") = (unsigned long) a; \
229 + register unsigned long __a1 asm("$5") = (unsigned long) b; \
230 + register unsigned long __a3 asm("$7"); \
231 + unsigned long __v0; \
232 + \
233 + __asm__ volatile ( \
234 + ".set\tnoreorder\n\t" \
235 + "li\t$2, %4\t\t\t# " #fname "\n\t" \
236 + "syscall\n\t" \
237 + "move\t%0, $2\n\t" \
238 + ".set\treorder" \
239 + : "=&r" (__v0), "=r" (__a3) \
240 + : "r" (__a0), "r" (__a1), "i" (__NR_##sname) \
241 + : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \
242 + "memory"); \
243 + \
244 + if (__a3 == 0) \
245 + return (type) __v0; \
246 + return (type) -1; \
247 +}
248 +
249 +#define io_syscall3(type,fname,sname,atype,a,btype,b,ctype,c) \
250 +type fname(atype a, btype b, ctype c) \
251 +{ \
252 + register unsigned long __a0 asm("$4") = (unsigned long) a; \
253 + register unsigned long __a1 asm("$5") = (unsigned long) b; \
254 + register unsigned long __a2 asm("$6") = (unsigned long) c; \
255 + register unsigned long __a3 asm("$7"); \
256 + unsigned long __v0; \
257 + \
258 + __asm__ volatile ( \
259 + ".set\tnoreorder\n\t" \
260 + "li\t$2, %5\t\t\t# " #fname "\n\t" \
261 + "syscall\n\t" \
262 + "move\t%0, $2\n\t" \
263 + ".set\treorder" \
264 + : "=&r" (__v0), "=r" (__a3) \
265 + : "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##sname) \
266 + : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \
267 + "memory"); \
268 + \
269 + if (__a3 == 0) \
270 + return (type) __v0; \
271 + return (type) -1; \
272 +}
273 +
274 +#define io_syscall4(type,fname,sname,atype,a,btype,b,ctype,c,dtype,d) \
275 +type fname(atype a, btype b, ctype c, dtype d) \
276 +{ \
277 + register unsigned long __a0 asm("$4") = (unsigned long) a; \
278 + register unsigned long __a1 asm("$5") = (unsigned long) b; \
279 + register unsigned long __a2 asm("$6") = (unsigned long) c; \
280 + register unsigned long __a3 asm("$7") = (unsigned long) d; \
281 + unsigned long __v0; \
282 + \
283 + __asm__ volatile ( \
284 + ".set\tnoreorder\n\t" \
285 + "li\t$2, %5\t\t\t# " #fname "\n\t" \
286 + "syscall\n\t" \
287 + "move\t%0, $2\n\t" \
288 + ".set\treorder" \
289 + : "=&r" (__v0), "+r" (__a3) \
290 + : "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##sname) \
291 + : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \
292 + "memory"); \
293 + \
294 + if (__a3 == 0) \
295 + return (type) __v0; \
296 + return (type) -1; \
297 +}
298 +
299 +#if (_MIPS_SIM == _MIPS_SIM_ABI32)
300 +
301 +/*
302 + * Using those means your brain needs more than an oil change ;-)
303 + */
304 +
305 +#define io_syscall5(type,fname,sname,atype,a,btype,b,ctype,c,dtype,d,etype,e) \
306 +type fname(atype a, btype b, ctype c, dtype d, etype e) \
307 +{ \
308 + register unsigned long __a0 asm("$4") = (unsigned long) a; \
309 + register unsigned long __a1 asm("$5") = (unsigned long) b; \
310 + register unsigned long __a2 asm("$6") = (unsigned long) c; \
311 + register unsigned long __a3 asm("$7") = (unsigned long) d; \
312 + unsigned long __v0; \
313 + \
314 + __asm__ volatile ( \
315 + ".set\tnoreorder\n\t" \
316 + "lw\t$2, %6\n\t" \
317 + "subu\t$29, 32\n\t" \
318 + "sw\t$2, 16($29)\n\t" \
319 + "li\t$2, %5\t\t\t# " #fname "\n\t" \
320 + "syscall\n\t" \
321 + "move\t%0, $2\n\t" \
322 + "addiu\t$29, 32\n\t" \
323 + ".set\treorder" \
324 + : "=&r" (__v0), "+r" (__a3) \
325 + : "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##sname), \
326 + "m" ((unsigned long)e) \
327 + : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \
328 + "memory"); \
329 + \
330 + if (__a3 == 0) \
331 + return (type) __v0; \
332 + return (type) -1; \
333 +}
334 +
335 +#endif /* (_MIPS_SIM == _MIPS_SIM_ABI32) */
336 +
337 +#if (_MIPS_SIM == _MIPS_SIM_NABI32) || (_MIPS_SIM == _MIPS_SIM_ABI64)
338 +
339 +#define io_syscall5(type,fname,sname,atype,a,btype,b,ctype,c,dtype,d,etype,e) \
340 +type fname (atype a,btype b,ctype c,dtype d,etype e) \
341 +{ \
342 + register unsigned long __a0 asm("$4") = (unsigned long) a; \
343 + register unsigned long __a1 asm("$5") = (unsigned long) b; \
344 + register unsigned long __a2 asm("$6") = (unsigned long) c; \
345 + register unsigned long __a3 asm("$7") = (unsigned long) d; \
346 + register unsigned long __a4 asm("$8") = (unsigned long) e; \
347 + unsigned long __v0; \
348 + \
349 + __asm__ volatile ( \
350 + ".set\tnoreorder\n\t" \
351 + "li\t$2, %6\t\t\t# " #fname "\n\t" \
352 + "syscall\n\t" \
353 + "move\t%0, $2\n\t" \
354 + ".set\treorder" \
355 + : "=&r" (__v0), "+r" (__a3) \
356 + : "r" (__a0), "r" (__a1), "r" (__a2), "r" (__a4), "i" (__NR_##sname) \
357 + : "$2", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \
358 + "memory"); \
359 + \
360 + if (__a3 == 0) \
361 + return (type) __v0; \
362 + return (type) -1; \
363 +}
364 +
365 +#endif /* (_MIPS_SIM == _MIPS_SIM_NABI32) || (_MIPS_SIM == _MIPS_SIM_ABI64) */
366 +
367 Index: libaio-0.3.109/src/syscall-parisc.h
368 ===================================================================
369 --- /dev/null
370 +++ libaio-0.3.109/src/syscall-parisc.h
371 @@ -0,0 +1,146 @@
372 +/*
373 + * Linux system call numbers.
374 + *
375 + * Cary Coutant says that we should just use another syscall gateway
376 + * page to avoid clashing with the HPUX space, and I think he's right:
377 + * it will would keep a branch out of our syscall entry path, at the
378 + * very least. If we decide to change it later, we can ``just'' tweak
379 + * the LINUX_GATEWAY_ADDR define at the bottom and make __NR_Linux be
380 + * 1024 or something. Oh, and recompile libc. =)
381 + *
382 + * 64-bit HPUX binaries get the syscall gateway address passed in a register
383 + * from the kernel at startup, which seems a sane strategy.
384 + */
385 +
386 +#define __NR_Linux 0
387 +#define __NR_io_setup (__NR_Linux + 215)
388 +#define __NR_io_destroy (__NR_Linux + 216)
389 +#define __NR_io_getevents (__NR_Linux + 217)
390 +#define __NR_io_submit (__NR_Linux + 218)
391 +#define __NR_io_cancel (__NR_Linux + 219)
392 +
393 +#define SYS_ify(syscall_name) __NR_##syscall_name
394 +
395 +/* Assume all syscalls are done from PIC code just to be
396 + * safe. The worst case scenario is that you lose a register
397 + * and save/restore r19 across the syscall. */
398 +#define PIC
399 +
400 +/* Definition taken from glibc 2.3.3
401 + * sysdeps/unix/sysv/linux/hppa/sysdep.h
402 + */
403 +
404 +#ifdef PIC
405 +/* WARNING: CANNOT BE USED IN A NOP! */
406 +# define K_STW_ASM_PIC " copy %%r19, %%r4\n"
407 +# define K_LDW_ASM_PIC " copy %%r4, %%r19\n"
408 +# define K_USING_GR4 "%r4",
409 +#else
410 +# define K_STW_ASM_PIC " \n"
411 +# define K_LDW_ASM_PIC " \n"
412 +# define K_USING_GR4
413 +#endif
414 +
415 +/* GCC has to be warned that a syscall may clobber all the ABI
416 + registers listed as "caller-saves", see page 8, Table 2
417 + in section 2.2.6 of the PA-RISC RUN-TIME architecture
418 + document. However! r28 is the result and will conflict with
419 + the clobber list so it is left out. Also the input arguments
420 + registers r20 -> r26 will conflict with the list so they
421 + are treated specially. Although r19 is clobbered by the syscall
422 + we cannot say this because it would violate ABI, thus we say
423 + r4 is clobbered and use that register to save/restore r19
424 + across the syscall. */
425 +
426 +#define K_CALL_CLOB_REGS "%r1", "%r2", K_USING_GR4 \
427 + "%r20", "%r29", "%r31"
428 +
429 +#undef K_INLINE_SYSCALL
430 +#define K_INLINE_SYSCALL(name, nr, args...) ({ \
431 + long __sys_res; \
432 + { \
433 + register unsigned long __res __asm__("r28"); \
434 + K_LOAD_ARGS_##nr(args) \
435 + /* FIXME: HACK stw/ldw r19 around syscall */ \
436 + __asm__ volatile( \
437 + K_STW_ASM_PIC \
438 + " ble 0x100(%%sr2, %%r0)\n" \
439 + " ldi %1, %%r20\n" \
440 + K_LDW_ASM_PIC \
441 + : "=r" (__res) \
442 + : "i" (SYS_ify(name)) K_ASM_ARGS_##nr \
443 + : "memory", K_CALL_CLOB_REGS K_CLOB_ARGS_##nr \
444 + ); \
445 + __sys_res = (long)__res; \
446 + } \
447 + __sys_res; \
448 +})
449 +
450 +#define K_LOAD_ARGS_0()
451 +#define K_LOAD_ARGS_1(r26) \
452 + register unsigned long __r26 __asm__("r26") = (unsigned long)(r26); \
453 + K_LOAD_ARGS_0()
454 +#define K_LOAD_ARGS_2(r26,r25) \
455 + register unsigned long __r25 __asm__("r25") = (unsigned long)(r25); \
456 + K_LOAD_ARGS_1(r26)
457 +#define K_LOAD_ARGS_3(r26,r25,r24) \
458 + register unsigned long __r24 __asm__("r24") = (unsigned long)(r24); \
459 + K_LOAD_ARGS_2(r26,r25)
460 +#define K_LOAD_ARGS_4(r26,r25,r24,r23) \
461 + register unsigned long __r23 __asm__("r23") = (unsigned long)(r23); \
462 + K_LOAD_ARGS_3(r26,r25,r24)
463 +#define K_LOAD_ARGS_5(r26,r25,r24,r23,r22) \
464 + register unsigned long __r22 __asm__("r22") = (unsigned long)(r22); \
465 + K_LOAD_ARGS_4(r26,r25,r24,r23)
466 +#define K_LOAD_ARGS_6(r26,r25,r24,r23,r22,r21) \
467 + register unsigned long __r21 __asm__("r21") = (unsigned long)(r21); \
468 + K_LOAD_ARGS_5(r26,r25,r24,r23,r22)
469 +
470 +/* Even with zero args we use r20 for the syscall number */
471 +#define K_ASM_ARGS_0
472 +#define K_ASM_ARGS_1 K_ASM_ARGS_0, "r" (__r26)
473 +#define K_ASM_ARGS_2 K_ASM_ARGS_1, "r" (__r25)
474 +#define K_ASM_ARGS_3 K_ASM_ARGS_2, "r" (__r24)
475 +#define K_ASM_ARGS_4 K_ASM_ARGS_3, "r" (__r23)
476 +#define K_ASM_ARGS_5 K_ASM_ARGS_4, "r" (__r22)
477 +#define K_ASM_ARGS_6 K_ASM_ARGS_5, "r" (__r21)
478 +
479 +/* The registers not listed as inputs but clobbered */
480 +#define K_CLOB_ARGS_6
481 +#define K_CLOB_ARGS_5 K_CLOB_ARGS_6, "%r21"
482 +#define K_CLOB_ARGS_4 K_CLOB_ARGS_5, "%r22"
483 +#define K_CLOB_ARGS_3 K_CLOB_ARGS_4, "%r23"
484 +#define K_CLOB_ARGS_2 K_CLOB_ARGS_3, "%r24"
485 +#define K_CLOB_ARGS_1 K_CLOB_ARGS_2, "%r25"
486 +#define K_CLOB_ARGS_0 K_CLOB_ARGS_1, "%r26"
487 +
488 +#define io_syscall1(type,fname,sname,type1,arg1) \
489 +type fname(type1 arg1) \
490 +{ \
491 + return K_INLINE_SYSCALL(sname, 1, arg1); \
492 +}
493 +
494 +#define io_syscall2(type,fname,sname,type1,arg1,type2,arg2) \
495 +type fname(type1 arg1, type2 arg2) \
496 +{ \
497 + return K_INLINE_SYSCALL(sname, 2, arg1, arg2); \
498 +}
499 +
500 +#define io_syscall3(type,fname,sname,type1,arg1,type2,arg2,type3,arg3) \
501 +type fname(type1 arg1, type2 arg2, type3 arg3) \
502 +{ \
503 + return K_INLINE_SYSCALL(sname, 3, arg1, arg2, arg3); \
504 +}
505 +
506 +#define io_syscall4(type,fname,sname,type1,arg1,type2,arg2,type3,arg3,type4,arg4) \
507 +type fname(type1 arg1, type2 arg2, type3 arg3, type4 arg4) \
508 +{ \
509 + return K_INLINE_SYSCALL(sname, 4, arg1, arg2, arg3, arg4); \
510 +}
511 +
512 +#define io_syscall5(type,fname,sname,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5) \
513 +type fname(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5) \
514 +{ \
515 + return K_INLINE_SYSCALL(sname, 5, arg1, arg2, arg3, arg4, arg5); \
516 +}
517 +
518 Index: libaio-0.3.109/src/syscall-sparc.h
519 ===================================================================
520 --- /dev/null
521 +++ libaio-0.3.109/src/syscall-sparc.h
522 @@ -0,0 +1,130 @@
523 +/* $Id: unistd.h,v 1.74 2002/02/08 03:57:18 davem Exp $ */
524 +
525 +/*
526 + * System calls under the Sparc.
527 + *
528 + * Don't be scared by the ugly clobbers, it is the only way I can
529 + * think of right now to force the arguments into fixed registers
530 + * before the trap into the system call with gcc 'asm' statements.
531 + *
532 + * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
533 + *
534 + * SunOS compatibility based upon preliminary work which is:
535 + *
536 + * Copyright (C) 1995 Adrian M. Rodriguez (adrian@remus.rutgers.edu)
537 + */
538 +
539 +
540 +#define __NR_io_setup 268
541 +#define __NR_io_destroy 269
542 +#define __NR_io_submit 270
543 +#define __NR_io_cancel 271
544 +#define __NR_io_getevents 272
545 +
546 +
547 +#define io_syscall1(type,fname,sname,type1,arg1) \
548 +type fname(type1 arg1) \
549 +{ \
550 +long __res; \
551 +register long __g1 __asm__ ("g1") = __NR_##sname; \
552 +register long __o0 __asm__ ("o0") = (long)(arg1); \
553 +__asm__ __volatile__ ("t 0x10\n\t" \
554 + "bcc 1f\n\t" \
555 + "mov %%o0, %0\n\t" \
556 + "sub %%g0, %%o0, %0\n\t" \
557 + "1:\n\t" \
558 + : "=r" (__res), "=&r" (__o0) \
559 + : "1" (__o0), "r" (__g1) \
560 + : "cc"); \
561 +if (__res < -255 || __res >= 0) \
562 + return (type) __res; \
563 +return -1; \
564 +}
565 +
566 +#define io_syscall2(type,fname,sname,type1,arg1,type2,arg2) \
567 +type fname(type1 arg1,type2 arg2) \
568 +{ \
569 +long __res; \
570 +register long __g1 __asm__ ("g1") = __NR_##sname; \
571 +register long __o0 __asm__ ("o0") = (long)(arg1); \
572 +register long __o1 __asm__ ("o1") = (long)(arg2); \
573 +__asm__ __volatile__ ("t 0x10\n\t" \
574 + "bcc 1f\n\t" \
575 + "mov %%o0, %0\n\t" \
576 + "sub %%g0, %%o0, %0\n\t" \
577 + "1:\n\t" \
578 + : "=r" (__res), "=&r" (__o0) \
579 + : "1" (__o0), "r" (__o1), "r" (__g1) \
580 + : "cc"); \
581 +if (__res < -255 || __res >= 0) \
582 + return (type) __res; \
583 +return -1; \
584 +}
585 +
586 +#define io_syscall3(type,fname,sname,type1,arg1,type2,arg2,type3,arg3) \
587 +type fname(type1 arg1,type2 arg2,type3 arg3) \
588 +{ \
589 +long __res; \
590 +register long __g1 __asm__ ("g1") = __NR_##sname; \
591 +register long __o0 __asm__ ("o0") = (long)(arg1); \
592 +register long __o1 __asm__ ("o1") = (long)(arg2); \
593 +register long __o2 __asm__ ("o2") = (long)(arg3); \
594 +__asm__ __volatile__ ("t 0x10\n\t" \
595 + "bcc 1f\n\t" \
596 + "mov %%o0, %0\n\t" \
597 + "sub %%g0, %%o0, %0\n\t" \
598 + "1:\n\t" \
599 + : "=r" (__res), "=&r" (__o0) \
600 + : "1" (__o0), "r" (__o1), "r" (__o2), "r" (__g1) \
601 + : "cc"); \
602 +if (__res < -255 || __res>=0) \
603 + return (type) __res; \
604 +return -1; \
605 +}
606 +
607 +#define io_syscall4(type,fname,sname,type1,arg1,type2,arg2,type3,arg3,type4,arg4) \
608 +type fname(type1 arg1, type2 arg2, type3 arg3, type4 arg4) \
609 +{ \
610 +long __res; \
611 +register long __g1 __asm__ ("g1") = __NR_##sname; \
612 +register long __o0 __asm__ ("o0") = (long)(arg1); \
613 +register long __o1 __asm__ ("o1") = (long)(arg2); \
614 +register long __o2 __asm__ ("o2") = (long)(arg3); \
615 +register long __o3 __asm__ ("o3") = (long)(arg4); \
616 +__asm__ __volatile__ ("t 0x10\n\t" \
617 + "bcc 1f\n\t" \
618 + "mov %%o0, %0\n\t" \
619 + "sub %%g0, %%o0, %0\n\t" \
620 + "1:\n\t" \
621 + : "=r" (__res), "=&r" (__o0) \
622 + : "1" (__o0), "r" (__o1), "r" (__o2), "r" (__o3), "r" (__g1) \
623 + : "cc"); \
624 +if (__res < -255 || __res>=0) \
625 + return (type) __res; \
626 +return -1; \
627 +}
628 +
629 +#define io_syscall5(type,fname,sname,type1,arg1,type2,arg2,type3,arg3,type4,arg4, \
630 + type5,arg5) \
631 +type fname(type1 arg1,type2 arg2,type3 arg3,type4 arg4,type5 arg5) \
632 +{ \
633 +long __res; \
634 +register long __g1 __asm__ ("g1") = __NR_##sname; \
635 +register long __o0 __asm__ ("o0") = (long)(arg1); \
636 +register long __o1 __asm__ ("o1") = (long)(arg2); \
637 +register long __o2 __asm__ ("o2") = (long)(arg3); \
638 +register long __o3 __asm__ ("o3") = (long)(arg4); \
639 +register long __o4 __asm__ ("o4") = (long)(arg5); \
640 +__asm__ __volatile__ ("t 0x10\n\t" \
641 + "bcc 1f\n\t" \
642 + "mov %%o0, %0\n\t" \
643 + "sub %%g0, %%o0, %0\n\t" \
644 + "1:\n\t" \
645 + : "=r" (__res), "=&r" (__o0) \
646 + : "1" (__o0), "r" (__o1), "r" (__o2), "r" (__o3), "r" (__o4), "r" (__g1) \
647 + : "cc"); \
648 +if (__res < -255 || __res>=0) \
649 + return (type) __res; \
650 +return -1; \
651 +}
652 +
653 Index: libaio-0.3.109/src/syscall.h
654 ===================================================================
655 --- libaio-0.3.109.orig/src/syscall.h
656 +++ libaio-0.3.109/src/syscall.h
657 @@ -24,6 +24,14 @@
658 #include "syscall-alpha.h"
659 #elif defined(__arm__)
660 #include "syscall-arm.h"
661 +#elif defined(__m68k__)
662 +#include "syscall-m68k.h"
663 +#elif defined(__sparc__)
664 +#include "syscall-sparc.h"
665 +#elif defined(__hppa__)
666 +#include "syscall-parisc.h"
667 +#elif defined(__mips__)
668 +#include "syscall-mips.h"
669 #else
670 #error "add syscall-arch.h"
671 #endif