1 From e1d54ffb987c346c45c20968be34c50c62a91c07 Mon Sep 17 00:00:00 2001
2 From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
3 Date: Wed, 14 Nov 2012 19:17:47 +0800
4 Subject: [PATCH 2/5] watchdog: add at91sam9 watchdog support
6 with keep alive support
8 Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
10 drivers/watchdog/Kconfig | 7 +++
11 drivers/watchdog/Makefile | 1 +
12 drivers/watchdog/at91sam9_wdt.c | 131 ++++++++++++++++++++++++++++++++++++++++
13 drivers/watchdog/at91sam9_wdt.h | 38 ++++++++++++
14 4 files changed, 177 insertions(+)
15 create mode 100644 drivers/watchdog/at91sam9_wdt.c
16 create mode 100644 drivers/watchdog/at91sam9_wdt.h
18 diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
19 index 0b4dc84..98a21d7 100644
20 --- a/drivers/watchdog/Kconfig
21 +++ b/drivers/watchdog/Kconfig
22 @@ -11,6 +11,13 @@ menuconfig WATCHDOG
26 +config WATCHDOG_AT91SAM9X
27 + tristate "AT91SAM9X / AT91CAP9 watchdog"
28 + depends on ARCH_AT91
30 + Watchdog timer embedded into AT91SAM9X and AT91CAP9 chips. This will
31 + reboot your system when the timeout is reached.
36 diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
37 index f522b88..3d15d52 100644
38 --- a/drivers/watchdog/Makefile
39 +++ b/drivers/watchdog/Makefile
41 obj-$(CONFIG_WATCHDOG) += wd_core.o
42 +obj-$(CONFIG_WATCHDOG_AT91SAM9X) += at91sam9_wdt.o
43 obj-$(CONFIG_WATCHDOG_MXS28) += im28wd.o
44 obj-$(CONFIG_WATCHDOG_IMX_RESET_SOURCE) += imxwd.o
45 diff --git a/drivers/watchdog/at91sam9_wdt.c b/drivers/watchdog/at91sam9_wdt.c
47 index 0000000..203d83a
49 +++ b/drivers/watchdog/at91sam9_wdt.c
52 + * (c) 2012 Juergen Beisert <kernel@pengutronix.de>
54 + * This program is free software; you can redistribute it and/or modify
55 + * it under the terms of the GNU General Public License as published by
56 + * the Free Software Foundation; either version 2 of the License, or
57 + * (at your option) any later version.
59 + * This program is distributed in the hope that it will be useful,
60 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
61 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
62 + * GNU General Public License for more details.
64 + * Note: this driver works for the i.MX28 SoC. It might work for the
65 + * i.MX23 Soc as well, but is not tested yet.
73 +#include <watchdog.h>
75 +#include "at91sam9_wdt.h"
77 +struct at91sam9_wdt {
78 + struct watchdog wdt;
82 +#define to_at91sam9_wdt(h) container_of(h, struct at91sam9_wdt, wdt)
84 +#define wdt_read(at91wdt, field) \
85 + __raw_readl(at91wdt->base + field)
86 +#define wdt_write(at91wdt, field, val) \
87 + __raw_writel((val), at91wdt->base + field)
89 +static void at91sam9_wdt_keep_alive(struct watchdog *wdt)
91 + struct at91sam9_wdt *at91wdt = to_at91sam9_wdt(wdt);
93 + wdt_write(at91wdt, AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT);
96 +static int at91sam9_wdt_settimeout(struct watchdog *wdt, unsigned int timeout)
98 + struct at91sam9_wdt *at91wdt = to_at91sam9_wdt(wdt);
102 + /* Check if disabled */
103 + mr = wdt_read(at91wdt, AT91_WDT_MR);
104 + if (mr & AT91_WDT_WDDIS) {
105 + pr_err("sorry, watchdog is disabled\n");
110 + wdt_write(at91wdt, AT91_WDT_MR, AT91_WDT_WDDIS);
115 + * All counting occurs at SLOW_CLOCK / 128 = 256 Hz
117 + * Since WDV is a 12-bit counter, the maximum period is
118 + * 4096 / 256 = 16 seconds.
120 + reg = AT91_WDT_WDRSTEN /* causes watchdog reset */
121 + /* | AT91_WDT_WDRPROC causes processor reset only */
122 + | AT91_WDT_WDDBGHLT /* disabled in debug mode */
123 + | AT91_WDT_WDD /* restart at any time */
124 + | (timeout & AT91_WDT_WDV); /* timer value */
125 + wdt_write(at91wdt, AT91_WDT_MR, reg);
130 +static int at91sam9_wdt_probe(struct device_d *dev)
132 + struct at91sam9_wdt *priv;
133 + struct watchdog *wdt;
137 + priv = xzalloc(sizeof(struct at91sam9_wdt));
138 + priv->base = dev_request_mem_region(dev, 0);
141 + wdt->set_timeout = at91sam9_wdt_settimeout;
142 + wdt->keep_alive = at91sam9_wdt_keep_alive;
144 + /* Check if disabled */
145 + mr = wdt_read(priv, AT91_WDT_MR);
146 + if (mr & AT91_WDT_WDDIS) {
147 + dev_err(dev, "sorry, watchdog is disabled\n");
152 + ret = watchdog_register(wdt);
164 +static void at91sam9_wdt_remove(struct device_d *dev)
166 + struct at91sam9_wdt *priv= dev->priv;
167 + watchdog_deregister(&priv->wdt);
171 +static struct driver_d at91sam9_wdt_driver = {
172 + .name = "at91sam9_wdt",
173 + .probe = at91sam9_wdt_probe,
174 + .remove = at91sam9_wdt_remove,
177 +static int at91sam9_wdt_init(void)
179 + return platform_driver_register(&at91sam9_wdt_driver);
181 +coredevice_initcall(at91sam9_wdt_init);
182 diff --git a/drivers/watchdog/at91sam9_wdt.h b/drivers/watchdog/at91sam9_wdt.h
184 index 0000000..2b68c1a
186 +++ b/drivers/watchdog/at91sam9_wdt.h
189 + * drivers/watchdog/at91sam9_wdt.h
191 + * Copyright (C) 2007 Andrew Victor
192 + * Copyright (C) 2007 Atmel Corporation.
194 + * Watchdog Timer (WDT) - System peripherals regsters.
195 + * Based on AT91SAM9261 datasheet revision D.
197 + * This program is free software; you can redistribute it and/or modify
198 + * it under the terms of the GNU General Public License as published by
199 + * the Free Software Foundation; either version 2 of the License, or
200 + * (at your option) any later version.
206 +#define AT91_WDT_CR 0x00 /* Watchdog Control Register */
207 +#define AT91_WDT_WDRSTT (1 << 0) /* Restart */
208 +#define AT91_WDT_KEY (0xa5 << 24) /* KEY Password */
210 +#define AT91_WDT_MR 0x04 /* Watchdog Mode Register */
211 +#define AT91_WDT_WDV (0xfff << 0) /* Counter Value */
212 +#define AT91_WDT_WDFIEN (1 << 12) /* Fault Interrupt Enable */
213 +#define AT91_WDT_WDRSTEN (1 << 13) /* Reset Processor */
214 +#define AT91_WDT_WDRPROC (1 << 14) /* Timer Restart */
215 +#define AT91_WDT_WDDIS (1 << 15) /* Watchdog Disable */
216 +#define AT91_WDT_WDD (0xfff << 16) /* Delta Value */
217 +#define AT91_WDT_WDDBGHLT (1 << 28) /* Debug Halt */
218 +#define AT91_WDT_WDIDLEHLT (1 << 29) /* Idle Halt */
220 +#define AT91_WDT_SR 0x08 /* Watchdog Status Register */
221 +#define AT91_WDT_WDUNF (1 << 0) /* Watchdog Underflow */
222 +#define AT91_WDT_WDERR (1 << 1) /* Watchdog Error */