applied AkhIL's cinelerra-cv surround patch
[cinelerra_cv/ct.git] / mpeg2enc / mmx.h
blobc78e1859d0ecdf4fc15ecb363a92a162a4eccb49
1 /*
2 * mmx.h
3 * Copyright (C) 1997-1999 H. Dietz and R. Fisher
5 * This file is part of mpeg2dec, a free MPEG-2 video stream decoder.
7 * mpeg2dec is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * mpeg2dec is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 #include "attributes.h"
25 * The type of an value that fits in an MMX register (note that long
26 * long constant values MUST be suffixed by LL and unsigned long long
27 * values by ULL, lest they be truncated by the compiler)
30 typedef union {
31 int64_t q; /* Quadword (64-bit) value */
32 uint64_t uq; /* Unsigned Quadword */
33 int32_t d[2]; /* 2 Doubleword (32-bit) values */
34 uint32_t ud[2]; /* 2 Unsigned Doubleword */
35 int16_t w[4]; /* 4 Word (16-bit) values */
36 uint16_t uw[4]; /* 4 Unsigned Word */
37 int8_t b[8]; /* 8 Byte (8-bit) values */
38 uint8_t ub[8]; /* 8 Unsigned Byte */
39 float s[2]; /* Single-precision (32-bit) value */
40 } ATTR_ALIGN(8) mmx_t; /* On an 8-byte (64-bit) boundary */
43 #define mmx_si2r(op,imm,reg) \
44 __asm__ __volatile__ (#op " %0, %%" #reg \
45 : /* nothing */ \
46 : "J" (imm) )
48 #define mmx_m2r(op,mem,reg) \
49 __asm__ __volatile__ (#op " %0, %%" #reg \
50 : /* nothing */ \
51 : "m" (mem))
53 #define mmx_r2m(op,reg,mem) \
54 __asm__ __volatile__ (#op " %%" #reg ", %0" \
55 : "=m" (mem) \
56 : /* nothing */ )
58 #define mmx_g2r(op,mem,reg) \
59 __asm__ __volatile__ (#op " %0, %%" #reg \
60 : /* nothing */ \
61 : "rm" (mem))
63 #define mmx_r2g(op,reg,mem) \
64 __asm__ __volatile__ (#op " %%" #reg ", %0" \
65 : "=rm" (mem) \
66 : /* nothing */ )
68 #define mmx_r2r(op,regs,regd) \
69 __asm__ __volatile__ (#op " %" #regs ", %" #regd)
72 #define emms() __asm__ __volatile__ ("emms")
73 #define femms() __asm__ __volatile__ ("femms")
75 #define movd_m2r(var,reg) mmx_m2r (movd, var, reg)
76 #define movd_r2m(reg,var) mmx_r2m (movd, reg, var)
77 #define movd_g2r(var,reg) mmx_g2r (movd, var, reg)
78 #define movd_r2g(reg,var) mmx_r2g (movd, reg, var)
79 #define movd_r2r(regs,regd) mmx_r2r (movd, regs, regd)
81 #define movq_m2r(var,reg) mmx_m2r (movq, var, reg)
82 #define movq_r2m(reg,var) mmx_r2m (movq, reg, var)
83 #define movq_r2r(regs,regd) mmx_r2r (movq, regs, regd)
85 #define packssdw_m2r(var,reg) mmx_m2r (packssdw, var, reg)
86 #define packssdw_r2r(regs,regd) mmx_r2r (packssdw, regs, regd)
87 #define packsswb_m2r(var,reg) mmx_m2r (packsswb, var, reg)
88 #define packsswb_r2r(regs,regd) mmx_r2r (packsswb, regs, regd)
90 #define packuswb_m2r(var,reg) mmx_m2r (packuswb, var, reg)
91 #define packuswb_r2r(regs,regd) mmx_r2r (packuswb, regs, regd)
93 #define paddb_m2r(var,reg) mmx_m2r (paddb, var, reg)
94 #define paddb_r2r(regs,regd) mmx_r2r (paddb, regs, regd)
95 #define paddd_m2r(var,reg) mmx_m2r (paddd, var, reg)
96 #define paddd_r2r(regs,regd) mmx_r2r (paddd, regs, regd)
97 #define paddw_m2r(var,reg) mmx_m2r (paddw, var, reg)
98 #define paddw_r2r(regs,regd) mmx_r2r (paddw, regs, regd)
100 #define paddsb_m2r(var,reg) mmx_m2r (paddsb, var, reg)
101 #define paddsb_r2r(regs,regd) mmx_r2r (paddsb, regs, regd)
102 #define paddsw_m2r(var,reg) mmx_m2r (paddsw, var, reg)
103 #define paddsw_r2r(regs,regd) mmx_r2r (paddsw, regs, regd)
105 #define paddusb_m2r(var,reg) mmx_m2r (paddusb, var, reg)
106 #define paddusb_r2r(regs,regd) mmx_r2r (paddusb, regs, regd)
107 #define paddusw_m2r(var,reg) mmx_m2r (paddusw, var, reg)
108 #define paddusw_r2r(regs,regd) mmx_r2r (paddusw, regs, regd)
110 #define pand_m2r(var,reg) mmx_m2r (pand, var, reg)
111 #define pand_r2r(regs,regd) mmx_r2r (pand, regs, regd)
113 #define pandn_m2r(var,reg) mmx_m2r (pandn, var, reg)
114 #define pandn_r2r(regs,regd) mmx_r2r (pandn, regs, regd)
116 #define pcmpeqb_m2r(var,reg) mmx_m2r (pcmpeqb, var, reg)
117 #define pcmpeqb_r2r(regs,regd) mmx_r2r (pcmpeqb, regs, regd)
118 #define pcmpeqd_m2r(var,reg) mmx_m2r (pcmpeqd, var, reg)
119 #define pcmpeqd_r2r(regs,regd) mmx_r2r (pcmpeqd, regs, regd)
120 #define pcmpeqw_m2r(var,reg) mmx_m2r (pcmpeqw, var, reg)
121 #define pcmpeqw_r2r(regs,regd) mmx_r2r (pcmpeqw, regs, regd)
123 #define pcmpgtb_m2r(var,reg) mmx_m2r (pcmpgtb, var, reg)
124 #define pcmpgtb_r2r(regs,regd) mmx_r2r (pcmpgtb, regs, regd)
125 #define pcmpgtd_m2r(var,reg) mmx_m2r (pcmpgtd, var, reg)
126 #define pcmpgtd_r2r(regs,regd) mmx_r2r (pcmpgtd, regs, regd)
127 #define pcmpgtw_m2r(var,reg) mmx_m2r (pcmpgtw, var, reg)
128 #define pcmpgtw_r2r(regs,regd) mmx_r2r (pcmpgtw, regs, regd)
130 #define pmaddwd_m2r(var,reg) mmx_m2r (pmaddwd, var, reg)
131 #define pmaddwd_r2r(regs,regd) mmx_r2r (pmaddwd, regs, regd)
133 #define pmulhw_m2r(var,reg) mmx_m2r (pmulhw, var, reg)
134 #define pmulhw_r2r(regs,regd) mmx_r2r (pmulhw, regs, regd)
136 #define pmullw_m2r(var,reg) mmx_m2r (pmullw, var, reg)
137 #define pmullw_r2r(regs,regd) mmx_r2r (pmullw, regs, regd)
139 #define por_m2r(var,reg) mmx_m2r (por, var, reg)
140 #define por_r2r(regs,regd) mmx_r2r (por, regs, regd)
142 #define pslld_i2r(imm,reg) mmx_si2r (pslld, imm, reg)
143 #define pslld_m2r(var,reg) mmx_m2r (pslld, var, reg)
144 #define pslld_r2r(regs,regd) mmx_r2r (pslld, regs, regd)
145 #define psllq_i2r(imm,reg) mmx_si2r (psllq, imm, reg)
146 #define psllq_m2r(var,reg) mmx_m2r (psllq, var, reg)
147 #define psllq_r2r(regs,regd) mmx_r2r (psllq, regs, regd)
148 #define psllw_i2r(imm,reg) mmx_si2r (psllw, imm, reg)
149 #define psllw_m2r(var,reg) mmx_m2r (psllw, var, reg)
150 #define psllw_r2r(regs,regd) mmx_r2r (psllw, regs, regd)
152 #define psrad_i2r(imm,reg) mmx_si2r (psrad, imm, reg)
153 #define psrad_m2r(var,reg) mmx_m2r (psrad, var, reg)
154 #define psrad_r2r(regs,regd) mmx_r2r (psrad, regs, regd)
155 #define psraw_i2r(imm,reg) mmx_si2r (psraw, imm, reg)
156 #define psraw_m2r(var,reg) mmx_m2r (psraw, var, reg)
157 #define psraw_r2r(regs,regd) mmx_r2r (psraw, regs, regd)
159 #define psrld_i2r(imm,reg) mmx_si2r (psrld, imm, reg)
160 #define psrld_m2r(var,reg) mmx_m2r (psrld, var, reg)
161 #define psrld_r2r(regs,regd) mmx_r2r (psrld, regs, regd)
162 #define psrlq_i2r(imm,reg) mmx_si2r (psrlq, imm, reg)
163 #define psrlq_m2r(var,reg) mmx_m2r (psrlq, var, reg)
164 #define psrlq_r2r(regs,regd) mmx_r2r (psrlq, regs, regd)
165 #define psrlw_i2r(imm,reg) mmx_si2r (psrlw, imm, reg)
166 #define psrlw_m2r(var,reg) mmx_m2r (psrlw, var, reg)
167 #define psrlw_r2r(regs,regd) mmx_r2r (psrlw, regs, regd)
169 #define psubb_m2r(var,reg) mmx_m2r (psubb, var, reg)
170 #define psubb_r2r(regs,regd) mmx_r2r (psubb, regs, regd)
171 #define psubd_m2r(var,reg) mmx_m2r (psubd, var, reg)
172 #define psubd_r2r(regs,regd) mmx_r2r (psubd, regs, regd)
173 #define psubw_m2r(var,reg) mmx_m2r (psubw, var, reg)
174 #define psubw_r2r(regs,regd) mmx_r2r (psubw, regs, regd)
176 #define psubsb_m2r(var,reg) mmx_m2r (psubsb, var, reg)
177 #define psubsb_r2r(regs,regd) mmx_r2r (psubsb, regs, regd)
178 #define psubsw_m2r(var,reg) mmx_m2r (psubsw, var, reg)
179 #define psubsw_r2r(regs,regd) mmx_r2r (psubsw, regs, regd)
181 #define psubusb_m2r(var,reg) mmx_m2r (psubusb, var, reg)
182 #define psubusb_r2r(regs,regd) mmx_r2r (psubusb, regs, regd)
183 #define psubusw_m2r(var,reg) mmx_m2r (psubusw, var, reg)
184 #define psubusw_r2r(regs,regd) mmx_r2r (psubusw, regs, regd)
186 #define punpckhbw_m2r(var,reg) mmx_m2r (punpckhbw, var, reg)
187 #define punpckhbw_r2r(regs,regd) mmx_r2r (punpckhbw, regs, regd)
188 #define punpckhdq_m2r(var,reg) mmx_m2r (punpckhdq, var, reg)
189 #define punpckhdq_r2r(regs,regd) mmx_r2r (punpckhdq, regs, regd)
190 #define punpckhwd_m2r(var,reg) mmx_m2r (punpckhwd, var, reg)
191 #define punpckhwd_r2r(regs,regd) mmx_r2r (punpckhwd, regs, regd)
193 #define punpcklbw_m2r(var,reg) mmx_m2r (punpcklbw, var, reg)
194 #define punpcklbw_r2r(regs,regd) mmx_r2r (punpcklbw, regs, regd)
195 #define punpckldq_m2r(var,reg) mmx_m2r (punpckldq, var, reg)
196 #define punpckldq_r2r(regs,regd) mmx_r2r (punpckldq, regs, regd)
197 #define punpcklwd_m2r(var,reg) mmx_m2r (punpcklwd, var, reg)
198 #define punpcklwd_r2r(regs,regd) mmx_r2r (punpcklwd, regs, regd)
200 #define pxor_m2r(var, reg) mmx_m2r (pxor, var, reg)
201 #define pxor_r2r(regs, regd) mmx_r2r (pxor, regs, regd)
203 /* AMD MMX extensions - also available in intel SSE */
206 #define mmx_m2ri(op,mem,reg,imm) \
207 __asm__ __volatile__ (#op " %1, %0, %%" #reg \
208 : /* nothing */ \
209 : "m" (mem), "i" (imm))
210 #define mmx_r2ri(op,regs,regd,imm) \
211 __asm__ __volatile__ (#op " %0, %%" #regs ", %%" #regd \
212 : /* nothing */ \
213 : "i" (imm) )
215 #define mmx_fetch(mem,hint) \
216 __asm__ __volatile__ ("prefetch" #hint " %0" \
217 : /* nothing */ \
218 : "m" (mem))
220 /* 3DNow goodies */
221 #define pfmul_m2r(var,reg) mmx_m2r( pfmul, var, reg )
222 #define pfmul_r2r(regs,regd) mmx_r2r( pfmul, regs, regd )
223 #define pfadd_m2r(var,reg) mmx_m2r( pfadd, var, reg )
224 #define pfadd_r2r(regs,regd) mmx_r2r( pfadd, regs, regd )
225 #define pf2id_r2r(regs,regd) mmx_r2r( pf2id, regs, regd )
226 #define pi2fd_r2r(regs,regd) mmx_r2r( pi2fd, regs, regd )
228 /* SSE goodies */
229 #define addps_m2r( var, regd) mmx_m2r( addps, var, regd )
230 #define addps_r2r( regs, regd) mmx_r2r( addps, regs, regd )
231 #define subps_r2r( regs, regd) mmx_r2r( subps, regs, regd )
233 #define minps_r2r( regs, regd) mmx_r2r( minps, regs, regd )
234 #define maxps_r2r( regs, regd) mmx_r2r( maxps, regs, regd )
236 #define mulps_r2r( regs, regd) mmx_r2r( mulps, regs, regd )
237 #define mulps_m2r( var, regd) mmx_m2r( mulps, var, regd )
238 #define movups_r2r(reg1, reg2) mmx_r2r( movups, reg1, reg2 )
239 #define movups_m2r(var, reg) mmx_m2r( movups, var, reg )
240 #define movaps_m2r(var, reg) mmx_m2r( movaps, var, reg )
241 #define movaps_r2r(reg1, reg2) mmx_r2r( movaps, reg1, reg2 )
242 #define movlps_m2r(var, reg) mmx_m2r( movlps, var, reg )
243 #define movlps_r2m(reg, var) mmx_r2m( movlps, reg, var )
244 #define movlhps_m2r(var, reg) mmx_m2r( movlhps, var, reg )
245 #define movlhps_r2r(reg1, reg2) mmx_r2r( movlhps, reg1, reg2 )
246 #define movhlps_r2r(reg1, reg2) mmx_r2r( movhlps, reg1, reg2 )
247 #define movups_r2m(reg, var) mmx_r2m( movups, reg, var )
248 #define movaps_r2m(reg, var) mmx_r2m( movaps, reg, var )
250 #define movss_r2m(reg, var) mmx_r2m( movss, reg, var )
252 #define cvttps2pi_r2r(regs,regd) mmx_r2r( cvttps2pi, regs, regd )
253 #define cvtps2pi_r2r(regs,regd) mmx_r2r( cvtps2pi, regs, regd )
254 #define cvtpi2ps_r2r(regs,regd) mmx_r2r( cvtpi2ps, regs, regd )
255 #define shufps_r2ri(regs, regd, imm) mmx_r2ri( shufps, regs, regd, imm )
256 #define unpcklps_r2r(reg1, reg2) mmx_r2r( unpcklps, reg1, reg2 )
257 #define unpckhps_r2r(reg1, reg2) mmx_r2r( unpckhps, reg1, reg2 )
260 #define maskmovq(regs,maskreg) mmx_r2ri (maskmovq, regs, maskreg)
262 #define movntq_r2m(mmreg,var) mmx_r2m (movntq, mmreg, var)
264 #define pavgb_m2r(var,reg) mmx_m2r (pavgb, var, reg)
265 #define pavgb_r2r(regs,regd) mmx_r2r (pavgb, regs, regd)
266 #define pavgw_m2r(var,reg) mmx_m2r (pavgw, var, reg)
267 #define pavgw_r2r(regs,regd) mmx_r2r (pavgw, regs, regd)
269 #define pextrw_r2r(mmreg,reg,imm) mmx_r2ri (pextrw, mmreg, reg, imm)
271 #define pinsrw_r2r(reg,mmreg,imm) mmx_r2ri (pinsrw, reg, mmreg, imm)
273 #define pmaxsw_m2r(var,reg) mmx_m2r (pmaxsw, var, reg)
274 #define pmaxsw_r2r(regs,regd) mmx_r2r (pmaxsw, regs, regd)
276 #define pmaxub_m2r(var,reg) mmx_m2r (pmaxub, var, reg)
277 #define pmaxub_r2r(regs,regd) mmx_r2r (pmaxub, regs, regd)
279 #define pminsw_m2r(var,reg) mmx_m2r (pminsw, var, reg)
280 #define pminsw_r2r(regs,regd) mmx_r2r (pminsw, regs, regd)
282 #define pminub_m2r(var,reg) mmx_m2r (pminub, var, reg)
283 #define pminub_r2r(regs,regd) mmx_r2r (pminub, regs, regd)
285 #define pmovmskb(mmreg,reg) \
286 __asm__ __volatile__ ("movmskps %" #mmreg ", %" #reg)
288 #define pmulhuw_m2r(var,reg) mmx_m2r (pmulhuw, var, reg)
289 #define pmulhuw_r2r(regs,regd) mmx_r2r (pmulhuw, regs, regd)
291 #define prefetcht0(mem) mmx_fetch (mem, t0)
292 #define prefetcht1(mem) mmx_fetch (mem, t1)
293 #define prefetcht2(mem) mmx_fetch (mem, t2)
294 #define prefetchnta(mem) mmx_fetch (mem, nta)
296 #define psadbw_m2r(var,reg) mmx_m2r (psadbw, var, reg)
297 #define psadbw_r2r(regs,regd) mmx_r2r (psadbw, regs, regd)
299 #define pshufw_m2ri(var,reg,imm) mmx_m2ri( pshufw, var, reg, imm)
300 #define pshufw_r2ri(regs,regd,imm) mmx_r2ri( pshufw, regs, regd, imm)
302 #define sfence() __asm__ __volatile__ ("sfence\n\t")