ARM: cpu topology: Add debugfs interface for cpu_power
[cmplus.git] / arch / arm / mach-mxs / mach-mx28evk.c
blobeacdc6b0e70abeb497e542d1084031b0a3d5da07
1 /*
2 * Copyright 2010 Freescale Semiconductor, Inc. All Rights Reserved.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
15 #include <linux/delay.h>
16 #include <linux/platform_device.h>
17 #include <linux/gpio.h>
18 #include <linux/irq.h>
19 #include <linux/clk.h>
21 #include <asm/mach-types.h>
22 #include <asm/mach/arch.h>
23 #include <asm/mach/time.h>
25 #include <mach/common.h>
26 #include <mach/iomux-mx28.h>
28 #include "devices-mx28.h"
29 #include "gpio.h"
31 #define MX28EVK_FLEXCAN_SWITCH MXS_GPIO_NR(2, 13)
32 #define MX28EVK_FEC_PHY_POWER MXS_GPIO_NR(2, 15)
33 #define MX28EVK_BL_ENABLE MXS_GPIO_NR(3, 18)
34 #define MX28EVK_LCD_ENABLE MXS_GPIO_NR(3, 30)
35 #define MX28EVK_FEC_PHY_RESET MXS_GPIO_NR(4, 13)
37 #define MX28EVK_MMC0_WRITE_PROTECT MXS_GPIO_NR(2, 12)
38 #define MX28EVK_MMC1_WRITE_PROTECT MXS_GPIO_NR(0, 28)
39 #define MX28EVK_MMC0_SLOT_POWER MXS_GPIO_NR(3, 28)
40 #define MX28EVK_MMC1_SLOT_POWER MXS_GPIO_NR(3, 29)
42 static const iomux_cfg_t mx28evk_pads[] __initconst = {
43 /* duart */
44 MX28_PAD_PWM0__DUART_RX | MXS_PAD_CTRL,
45 MX28_PAD_PWM1__DUART_TX | MXS_PAD_CTRL,
47 /* auart0 */
48 MX28_PAD_AUART0_RX__AUART0_RX | MXS_PAD_CTRL,
49 MX28_PAD_AUART0_TX__AUART0_TX | MXS_PAD_CTRL,
50 MX28_PAD_AUART0_CTS__AUART0_CTS | MXS_PAD_CTRL,
51 MX28_PAD_AUART0_RTS__AUART0_RTS | MXS_PAD_CTRL,
52 /* auart3 */
53 MX28_PAD_AUART3_RX__AUART3_RX | MXS_PAD_CTRL,
54 MX28_PAD_AUART3_TX__AUART3_TX | MXS_PAD_CTRL,
55 MX28_PAD_AUART3_CTS__AUART3_CTS | MXS_PAD_CTRL,
56 MX28_PAD_AUART3_RTS__AUART3_RTS | MXS_PAD_CTRL,
58 #define MXS_PAD_FEC (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP)
59 /* fec0 */
60 MX28_PAD_ENET0_MDC__ENET0_MDC | MXS_PAD_FEC,
61 MX28_PAD_ENET0_MDIO__ENET0_MDIO | MXS_PAD_FEC,
62 MX28_PAD_ENET0_RX_EN__ENET0_RX_EN | MXS_PAD_FEC,
63 MX28_PAD_ENET0_RXD0__ENET0_RXD0 | MXS_PAD_FEC,
64 MX28_PAD_ENET0_RXD1__ENET0_RXD1 | MXS_PAD_FEC,
65 MX28_PAD_ENET0_TX_EN__ENET0_TX_EN | MXS_PAD_FEC,
66 MX28_PAD_ENET0_TXD0__ENET0_TXD0 | MXS_PAD_FEC,
67 MX28_PAD_ENET0_TXD1__ENET0_TXD1 | MXS_PAD_FEC,
68 MX28_PAD_ENET_CLK__CLKCTRL_ENET | MXS_PAD_FEC,
69 /* fec1 */
70 MX28_PAD_ENET0_CRS__ENET1_RX_EN | MXS_PAD_FEC,
71 MX28_PAD_ENET0_RXD2__ENET1_RXD0 | MXS_PAD_FEC,
72 MX28_PAD_ENET0_RXD3__ENET1_RXD1 | MXS_PAD_FEC,
73 MX28_PAD_ENET0_COL__ENET1_TX_EN | MXS_PAD_FEC,
74 MX28_PAD_ENET0_TXD2__ENET1_TXD0 | MXS_PAD_FEC,
75 MX28_PAD_ENET0_TXD3__ENET1_TXD1 | MXS_PAD_FEC,
76 /* phy power line */
77 MX28_PAD_SSP1_DATA3__GPIO_2_15 | MXS_PAD_CTRL,
78 /* phy reset line */
79 MX28_PAD_ENET0_RX_CLK__GPIO_4_13 | MXS_PAD_CTRL,
81 /* flexcan0 */
82 MX28_PAD_GPMI_RDY2__CAN0_TX,
83 MX28_PAD_GPMI_RDY3__CAN0_RX,
84 /* flexcan1 */
85 MX28_PAD_GPMI_CE2N__CAN1_TX,
86 MX28_PAD_GPMI_CE3N__CAN1_RX,
87 /* transceiver power control */
88 MX28_PAD_SSP1_CMD__GPIO_2_13,
90 /* mxsfb (lcdif) */
91 MX28_PAD_LCD_D00__LCD_D0 | MXS_PAD_CTRL,
92 MX28_PAD_LCD_D01__LCD_D1 | MXS_PAD_CTRL,
93 MX28_PAD_LCD_D02__LCD_D2 | MXS_PAD_CTRL,
94 MX28_PAD_LCD_D03__LCD_D3 | MXS_PAD_CTRL,
95 MX28_PAD_LCD_D04__LCD_D4 | MXS_PAD_CTRL,
96 MX28_PAD_LCD_D05__LCD_D5 | MXS_PAD_CTRL,
97 MX28_PAD_LCD_D06__LCD_D6 | MXS_PAD_CTRL,
98 MX28_PAD_LCD_D07__LCD_D7 | MXS_PAD_CTRL,
99 MX28_PAD_LCD_D08__LCD_D8 | MXS_PAD_CTRL,
100 MX28_PAD_LCD_D09__LCD_D9 | MXS_PAD_CTRL,
101 MX28_PAD_LCD_D10__LCD_D10 | MXS_PAD_CTRL,
102 MX28_PAD_LCD_D11__LCD_D11 | MXS_PAD_CTRL,
103 MX28_PAD_LCD_D12__LCD_D12 | MXS_PAD_CTRL,
104 MX28_PAD_LCD_D13__LCD_D13 | MXS_PAD_CTRL,
105 MX28_PAD_LCD_D14__LCD_D14 | MXS_PAD_CTRL,
106 MX28_PAD_LCD_D15__LCD_D15 | MXS_PAD_CTRL,
107 MX28_PAD_LCD_D16__LCD_D16 | MXS_PAD_CTRL,
108 MX28_PAD_LCD_D17__LCD_D17 | MXS_PAD_CTRL,
109 MX28_PAD_LCD_D18__LCD_D18 | MXS_PAD_CTRL,
110 MX28_PAD_LCD_D19__LCD_D19 | MXS_PAD_CTRL,
111 MX28_PAD_LCD_D20__LCD_D20 | MXS_PAD_CTRL,
112 MX28_PAD_LCD_D21__LCD_D21 | MXS_PAD_CTRL,
113 MX28_PAD_LCD_D22__LCD_D22 | MXS_PAD_CTRL,
114 MX28_PAD_LCD_D23__LCD_D23 | MXS_PAD_CTRL,
115 MX28_PAD_LCD_RD_E__LCD_VSYNC | MXS_PAD_CTRL,
116 MX28_PAD_LCD_WR_RWN__LCD_HSYNC | MXS_PAD_CTRL,
117 MX28_PAD_LCD_RS__LCD_DOTCLK | MXS_PAD_CTRL,
118 MX28_PAD_LCD_CS__LCD_ENABLE | MXS_PAD_CTRL,
119 /* LCD panel enable */
120 MX28_PAD_LCD_RESET__GPIO_3_30 | MXS_PAD_CTRL,
121 /* backlight control */
122 MX28_PAD_PWM2__GPIO_3_18 | MXS_PAD_CTRL,
123 /* mmc0 */
124 MX28_PAD_SSP0_DATA0__SSP0_D0 |
125 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
126 MX28_PAD_SSP0_DATA1__SSP0_D1 |
127 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
128 MX28_PAD_SSP0_DATA2__SSP0_D2 |
129 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
130 MX28_PAD_SSP0_DATA3__SSP0_D3 |
131 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
132 MX28_PAD_SSP0_DATA4__SSP0_D4 |
133 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
134 MX28_PAD_SSP0_DATA5__SSP0_D5 |
135 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
136 MX28_PAD_SSP0_DATA6__SSP0_D6 |
137 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
138 MX28_PAD_SSP0_DATA7__SSP0_D7 |
139 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
140 MX28_PAD_SSP0_CMD__SSP0_CMD |
141 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
142 MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT |
143 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
144 MX28_PAD_SSP0_SCK__SSP0_SCK |
145 (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
146 /* write protect */
147 MX28_PAD_SSP1_SCK__GPIO_2_12 |
148 (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
149 /* slot power enable */
150 MX28_PAD_PWM3__GPIO_3_28 |
151 (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
153 /* mmc1 */
154 MX28_PAD_GPMI_D00__SSP1_D0 |
155 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
156 MX28_PAD_GPMI_D01__SSP1_D1 |
157 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
158 MX28_PAD_GPMI_D02__SSP1_D2 |
159 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
160 MX28_PAD_GPMI_D03__SSP1_D3 |
161 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
162 MX28_PAD_GPMI_D04__SSP1_D4 |
163 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
164 MX28_PAD_GPMI_D05__SSP1_D5 |
165 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
166 MX28_PAD_GPMI_D06__SSP1_D6 |
167 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
168 MX28_PAD_GPMI_D07__SSP1_D7 |
169 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
170 MX28_PAD_GPMI_RDY1__SSP1_CMD |
171 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
172 MX28_PAD_GPMI_RDY0__SSP1_CARD_DETECT |
173 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
174 MX28_PAD_GPMI_WRN__SSP1_SCK |
175 (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
176 /* write protect */
177 MX28_PAD_GPMI_RESETN__GPIO_0_28 |
178 (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
179 /* slot power enable */
180 MX28_PAD_PWM4__GPIO_3_29 |
181 (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
184 /* fec */
185 static void __init mx28evk_fec_reset(void)
187 int ret;
188 struct clk *clk;
190 /* Enable fec phy clock */
191 clk = clk_get_sys("pll2", NULL);
192 if (!IS_ERR(clk))
193 clk_enable(clk);
195 /* Power up fec phy */
196 ret = gpio_request(MX28EVK_FEC_PHY_POWER, "fec-phy-power");
197 if (ret) {
198 pr_err("Failed to request gpio fec-phy-%s: %d\n", "power", ret);
199 return;
202 ret = gpio_direction_output(MX28EVK_FEC_PHY_POWER, 0);
203 if (ret) {
204 pr_err("Failed to drive gpio fec-phy-%s: %d\n", "power", ret);
205 return;
208 /* Reset fec phy */
209 ret = gpio_request(MX28EVK_FEC_PHY_RESET, "fec-phy-reset");
210 if (ret) {
211 pr_err("Failed to request gpio fec-phy-%s: %d\n", "reset", ret);
212 return;
215 gpio_direction_output(MX28EVK_FEC_PHY_RESET, 0);
216 if (ret) {
217 pr_err("Failed to drive gpio fec-phy-%s: %d\n", "reset", ret);
218 return;
221 mdelay(1);
222 gpio_set_value(MX28EVK_FEC_PHY_RESET, 1);
225 static struct fec_platform_data mx28_fec_pdata[] __initdata = {
227 /* fec0 */
228 .phy = PHY_INTERFACE_MODE_RMII,
229 }, {
230 /* fec1 */
231 .phy = PHY_INTERFACE_MODE_RMII,
235 static int __init mx28evk_fec_get_mac(void)
237 int i;
238 u32 val;
239 const u32 *ocotp = mxs_get_ocotp();
241 if (!ocotp)
242 goto error;
245 * OCOTP only stores the last 4 octets for each mac address,
246 * so hard-code Freescale OUI (00:04:9f) here.
248 for (i = 0; i < 2; i++) {
249 val = ocotp[i * 4];
250 mx28_fec_pdata[i].mac[0] = 0x00;
251 mx28_fec_pdata[i].mac[1] = 0x04;
252 mx28_fec_pdata[i].mac[2] = 0x9f;
253 mx28_fec_pdata[i].mac[3] = (val >> 16) & 0xff;
254 mx28_fec_pdata[i].mac[4] = (val >> 8) & 0xff;
255 mx28_fec_pdata[i].mac[5] = (val >> 0) & 0xff;
258 return 0;
260 error:
261 pr_err("%s: timeout when reading fec mac from OCOTP\n", __func__);
262 return -ETIMEDOUT;
266 * MX28EVK_FLEXCAN_SWITCH is shared between both flexcan controllers
268 static int flexcan0_en, flexcan1_en;
270 static void mx28evk_flexcan_switch(void)
272 if (flexcan0_en || flexcan1_en)
273 gpio_set_value(MX28EVK_FLEXCAN_SWITCH, 1);
274 else
275 gpio_set_value(MX28EVK_FLEXCAN_SWITCH, 0);
278 static void mx28evk_flexcan0_switch(int enable)
280 flexcan0_en = enable;
281 mx28evk_flexcan_switch();
284 static void mx28evk_flexcan1_switch(int enable)
286 flexcan1_en = enable;
287 mx28evk_flexcan_switch();
290 static const struct flexcan_platform_data
291 mx28evk_flexcan_pdata[] __initconst = {
293 .transceiver_switch = mx28evk_flexcan0_switch,
294 }, {
295 .transceiver_switch = mx28evk_flexcan1_switch,
299 /* mxsfb (lcdif) */
300 static struct fb_videomode mx28evk_video_modes[] = {
302 .name = "Seiko-43WVF1G",
303 .refresh = 60,
304 .xres = 800,
305 .yres = 480,
306 .pixclock = 29851, /* picosecond (33.5 MHz) */
307 .left_margin = 89,
308 .right_margin = 164,
309 .upper_margin = 23,
310 .lower_margin = 10,
311 .hsync_len = 10,
312 .vsync_len = 10,
313 .sync = FB_SYNC_DATA_ENABLE_HIGH_ACT |
314 FB_SYNC_DOTCLK_FAILING_ACT,
318 static const struct mxsfb_platform_data mx28evk_mxsfb_pdata __initconst = {
319 .mode_list = mx28evk_video_modes,
320 .mode_count = ARRAY_SIZE(mx28evk_video_modes),
321 .default_bpp = 32,
322 .ld_intf_width = STMLCDIF_24BIT,
325 static struct mxs_mmc_platform_data mx28evk_mmc_pdata[] __initdata = {
327 /* mmc0 */
328 .wp_gpio = MX28EVK_MMC0_WRITE_PROTECT,
329 .flags = SLOTF_8_BIT_CAPABLE,
330 }, {
331 /* mmc1 */
332 .wp_gpio = MX28EVK_MMC1_WRITE_PROTECT,
333 .flags = SLOTF_8_BIT_CAPABLE,
337 static void __init mx28evk_init(void)
339 int ret;
341 mxs_iomux_setup_multiple_pads(mx28evk_pads, ARRAY_SIZE(mx28evk_pads));
343 mx28_add_duart();
344 mx28_add_auart0();
345 mx28_add_auart3();
347 if (mx28evk_fec_get_mac())
348 pr_warn("%s: failed on fec mac setup\n", __func__);
350 mx28evk_fec_reset();
351 mx28_add_fec(0, &mx28_fec_pdata[0]);
352 mx28_add_fec(1, &mx28_fec_pdata[1]);
354 ret = gpio_request_one(MX28EVK_FLEXCAN_SWITCH, GPIOF_DIR_OUT,
355 "flexcan-switch");
356 if (ret) {
357 pr_err("failed to request gpio flexcan-switch: %d\n", ret);
358 } else {
359 mx28_add_flexcan(0, &mx28evk_flexcan_pdata[0]);
360 mx28_add_flexcan(1, &mx28evk_flexcan_pdata[1]);
363 ret = gpio_request_one(MX28EVK_LCD_ENABLE, GPIOF_DIR_OUT, "lcd-enable");
364 if (ret)
365 pr_warn("failed to request gpio lcd-enable: %d\n", ret);
366 else
367 gpio_set_value(MX28EVK_LCD_ENABLE, 1);
369 ret = gpio_request_one(MX28EVK_BL_ENABLE, GPIOF_DIR_OUT, "bl-enable");
370 if (ret)
371 pr_warn("failed to request gpio bl-enable: %d\n", ret);
372 else
373 gpio_set_value(MX28EVK_BL_ENABLE, 1);
375 mx28_add_mxsfb(&mx28evk_mxsfb_pdata);
377 /* power on mmc slot by writing 0 to the gpio */
378 ret = gpio_request_one(MX28EVK_MMC0_SLOT_POWER, GPIOF_OUT_INIT_LOW,
379 "mmc0-slot-power");
380 if (ret)
381 pr_warn("failed to request gpio mmc0-slot-power: %d\n", ret);
382 mx28_add_mxs_mmc(0, &mx28evk_mmc_pdata[0]);
384 ret = gpio_request_one(MX28EVK_MMC1_SLOT_POWER, GPIOF_OUT_INIT_LOW,
385 "mmc1-slot-power");
386 if (ret)
387 pr_warn("failed to request gpio mmc1-slot-power: %d\n", ret);
388 mx28_add_mxs_mmc(1, &mx28evk_mmc_pdata[1]);
391 static void __init mx28evk_timer_init(void)
393 mx28_clocks_init();
396 static struct sys_timer mx28evk_timer = {
397 .init = mx28evk_timer_init,
400 MACHINE_START(MX28EVK, "Freescale MX28 EVK")
401 /* Maintainer: Freescale Semiconductor, Inc. */
402 .map_io = mx28_map_io,
403 .init_irq = mx28_init_irq,
404 .init_machine = mx28evk_init,
405 .timer = &mx28evk_timer,
406 MACHINE_END