ARM: cpu topology: Add debugfs interface for cpu_power
[cmplus.git] / arch / arm / mach-omap2 / board-tuna-modems.c
blob73b5dc8ddb723e3242cd47e5d08e3c4fea48171c
1 /* linux/arch/arm/mach-xxxx/board-tuna-modems.c
2 * Copyright (C) 2010 Samsung Electronics. All rights reserved.
4 * This software is licensed under the terms of the GNU General Public
5 * License version 2, as published by the Free Software Foundation, and
6 * may be copied, distributed, and modified under those terms.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
14 #include <linux/kernel.h>
15 #include <linux/init.h>
16 #include <linux/platform_device.h>
17 #include <linux/irq.h>
18 #include <linux/gpio.h>
19 #include <linux/clk.h>
20 #include <linux/err.h>
21 #include <linux/delay.h>
23 #include <mach/omap4-common.h>
24 #include <linux/platform_data/modem.h>
25 #include "board-tuna.h"
26 #include "mux.h"
28 #define OMAP_GPIO_MIPI_HSI_CP_ON 53
29 #define OMAP_GPIO_MIPI_HSI_RESET_REQ_N 50
30 #define OMAP_GPIO_MIPI_HSI_CP_RST 15
31 #define OMAP_GPIO_MIPI_HSI_PDA_ACTIVE 119
32 #define OMAP_GPIO_MIPI_HSI_PHONE_ACTIVE 120
33 #define OMAP_GPIO_MIPI_HSI_CP_DUMP_INT 95
34 #define OMAP_GPIO_MIPI_HSI_GPS_UART_SEL 164
36 #define OMAP_GPIO_DPRAM_VIA_RST 15
37 #define OMAP_GPIO_DPRAM_PDA_ACTIVE 119
38 #define OMAP_GPIO_DPRAM_PHONE_ACTIVE 120
39 #define OMAP_GPIO_DPRAM_PWRHOLD_OFF 53
40 #define OMAP_GPIO_DPRAM_INT_N 62
42 #define OMAP_GPIO_CMC_SPI_CLK_ACK 178
43 #define OMAP_GPIO_CMC_SPI_CLK_REQ 164
44 #define OMAP_GPIO_CMC_SPI_WAKEUP_INT 134
45 #define OMAP_GPIO_LTE_ACTIVE 47
46 #define OMAP_GPIO_CMC2AP_INT1 61
47 #define OMAP_GPIO_CMC2AP_INT2 160
48 #define OMAP_GPIO_AP2CMC_INT1 18
49 #define OMAP_GPIO_AP2CMC_INT2 28
50 #define OMAP_GPIO_221_PMIC_PWRON 41
51 #define OMAP_GPIO_CMC_RST 50
52 #define OMAP_GPIO_221_PMIC_PWRHOLD_OFF 163
54 #define DPRAM_START_ADDRESS 0x04000000
55 #define DPRAM_SIZE 0x4000
56 #define DPRAM_END_ADDRESS (DPRAM_START_ADDRESS + DPRAM_SIZE - 1)
58 #define GPMC_CONTROL_BASE_ADDR 0x50000000
59 #define GPMC_CONFIG1_1 (GPMC_CONTROL_BASE_ADDR + 0x90)
60 #define GPMC_CONFIG2_1 (GPMC_CONTROL_BASE_ADDR + 0x94)
61 #define GPMC_CONFIG3_1 (GPMC_CONTROL_BASE_ADDR + 0x98)
62 #define GPMC_CONFIG4_1 (GPMC_CONTROL_BASE_ADDR + 0x9C)
63 #define GPMC_CONFIG5_1 (GPMC_CONTROL_BASE_ADDR + 0xA0)
64 #define GPMC_CONFIG6_1 (GPMC_CONTROL_BASE_ADDR + 0xA4)
65 #define GPMC_CONFIG7_1 (GPMC_CONTROL_BASE_ADDR + 0xA8)
67 #define DPRAM_GPMC_CONFIG1 0x00001201
68 #define DPRAM_GPMC_CONFIG2 0x000f1200
69 #define DPRAM_GPMC_CONFIG3 0x44040400
70 #define DPRAM_GPMC_CONFIG4 0x0e05f155
71 #define DPRAM_GPMC_CONFIG5 0x000e1016
72 #define DPRAM_GPMC_CONFIG6 0x060603c3
73 #define DPRAM_GPMC_CONFIG7 0x00000F44
75 /* umts target platform data */
76 static struct modem_io_t umts_io_devices[] = {
77 [0] = {
78 .name = "umts_ipc0",
79 .id = 0x1,
80 .format = IPC_FMT,
81 .io_type = IODEV_MISC,
82 .link = LINKDEV_MIPI,
84 [1] = {
85 .name = "umts_rfs0",
86 .id = 0x41,
87 .format = IPC_RFS,
88 .io_type = IODEV_MISC,
89 .link = LINKDEV_MIPI,
91 [2] = {
92 .name = "rmnet0",
93 .id = 0x2A,
94 .format = IPC_RAW,
95 .io_type = IODEV_NET,
96 .link = LINKDEV_MIPI,
98 [3] = {
99 .name = "umts_boot0",
100 .id = 0x0,
101 .format = IPC_BOOT,
102 .io_type = IODEV_MISC,
103 .link = LINKDEV_MIPI,
105 [4] = {
106 .name = "rmnet1",
107 .id = 0x2B,
108 .format = IPC_RAW,
109 .io_type = IODEV_NET,
110 .link = LINKDEV_MIPI,
112 [5] = {
113 .name = "rmnet2",
114 .id = 0x2C,
115 .format = IPC_RAW,
116 .io_type = IODEV_NET,
117 .link = LINKDEV_MIPI,
119 [6] = {
120 .name = "multipdp",
121 .id = 0x1,
122 .format = IPC_MULTI_RAW,
123 .io_type = IODEV_DUMMY,
124 .link = LINKDEV_MIPI,
126 [7] = {
127 .name = "umts_ramdump0",
128 .id = 0x0,
129 .format = IPC_RAMDUMP,
130 .io_type = IODEV_MISC,
131 .link = LINKDEV_MIPI,
133 [8] = {
134 .name = "umts_boot1",
135 .id = 0x1,
136 .format = IPC_BOOT,
137 .io_type = IODEV_MISC,
138 .link = LINKDEV_MIPI,
142 static struct modem_data umts_modem_data = {
143 .name = "xmm6260",
145 .gpio_cp_on = OMAP_GPIO_MIPI_HSI_CP_ON,
146 .gpio_reset_req_n = OMAP_GPIO_MIPI_HSI_RESET_REQ_N,
147 .gpio_cp_reset = OMAP_GPIO_MIPI_HSI_CP_RST,
148 .gpio_pda_active = OMAP_GPIO_MIPI_HSI_PDA_ACTIVE,
149 .gpio_phone_active = OMAP_GPIO_MIPI_HSI_PHONE_ACTIVE,
150 .gpio_cp_dump_int = OMAP_GPIO_MIPI_HSI_CP_DUMP_INT,
151 .gpio_flm_uart_sel = OMAP_GPIO_MIPI_HSI_GPS_UART_SEL,
152 .gpio_cp_warm_reset = 0,
154 .modem_type = IMC_XMM6260,
155 .link_type = LINKDEV_MIPI,
156 .modem_net = UMTS_NETWORK,
158 .num_iodevs = ARRAY_SIZE(umts_io_devices),
159 .iodevs = umts_io_devices,
162 static void umts_modem_cfg_gpio(void)
164 unsigned gpio_reset_req_n = umts_modem_data.gpio_reset_req_n;
165 unsigned gpio_cp_on = umts_modem_data.gpio_cp_on;
166 unsigned gpio_cp_rst = umts_modem_data.gpio_cp_reset;
167 unsigned gpio_pda_active = umts_modem_data.gpio_pda_active;
168 unsigned gpio_phone_active = umts_modem_data.gpio_phone_active;
169 unsigned gpio_cp_dump_int = umts_modem_data.gpio_cp_dump_int;
170 unsigned gpio_flm_uart_sel = umts_modem_data.gpio_flm_uart_sel;
172 /* gpio mux setting */
173 omap_mux_init_signal("gpmc_ncs0.gpio_50", OMAP_PIN_OUTPUT |
174 OMAP_OFF_EN | OMAP_OFFOUT_VAL);
175 omap_mux_init_signal("gpmc_ncs3.gpio_53", OMAP_PIN_OUTPUT |
176 OMAP_OFF_EN);
177 omap_mux_init_signal("dpm_emu4.gpio_15", OMAP_PIN_OUTPUT |
178 OMAP_OFF_EN | OMAP_OFFOUT_VAL);
179 omap_mux_init_signal("abe_dmic_clk1.gpio_119", OMAP_PIN_OUTPUT |
180 OMAP_OFF_EN);
181 omap_mux_init_signal("abe_dmic_din1.gpio_120", OMAP_PIN_INPUT);
182 omap_mux_init_signal("usbb1_ulpitll_dat7.gpio_95", OMAP_PIN_INPUT);
183 omap_mux_init_signal("usbb2_ulpitll_dat3.gpio_164", OMAP_PIN_OUTPUT |
184 OMAP_OFF_EN | OMAP_OFFOUT_VAL);
185 omap_mux_init_signal("uart3_cts_rctx.uart1_tx", OMAP_PIN_INPUT);
186 omap_mux_init_signal("mcspi1_cs1.uart1_rx", OMAP_PIN_INPUT);
188 if (gpio_reset_req_n) {
189 gpio_request(gpio_reset_req_n, "RESET_REQ_N");
190 gpio_direction_output(gpio_reset_req_n, 0);
193 if (gpio_cp_on) {
194 gpio_request(gpio_cp_on, "CP_ON");
195 gpio_direction_output(gpio_cp_on, 0);
198 if (gpio_cp_rst) {
199 gpio_request(gpio_cp_rst, "CP_RST");
200 gpio_direction_output(gpio_cp_rst, 0);
203 if (gpio_pda_active) {
204 gpio_request(gpio_pda_active, "PDA_ACTIVE");
205 gpio_direction_output(gpio_pda_active, 0);
208 if (gpio_phone_active) {
209 gpio_request(gpio_phone_active, "PHONE_ACTIVE");
210 gpio_direction_input(gpio_phone_active);
213 if (gpio_cp_dump_int) {
214 gpio_request(gpio_cp_dump_int, "CP_DUMP_INT");
215 gpio_direction_input(gpio_cp_dump_int);
218 if (gpio_flm_uart_sel) {
219 gpio_request(gpio_flm_uart_sel, "GPS_UART_SEL");
220 gpio_direction_output(gpio_flm_uart_sel, 1);
223 if (gpio_phone_active)
224 irq_set_irq_type(
225 OMAP_GPIO_IRQ(OMAP_GPIO_MIPI_HSI_PHONE_ACTIVE),
226 IRQ_TYPE_LEVEL_HIGH);
228 pr_debug("umts_modem_cfg_gpio done\n");
231 /* To get modem state, register phone active irq using resource */
232 static struct resource umts_modem_res[] = {
233 [0] = {
234 .name = "umts_phone_active",
235 .start = OMAP_GPIO_IRQ(OMAP_GPIO_MIPI_HSI_PHONE_ACTIVE),
236 .end = OMAP_GPIO_IRQ(OMAP_GPIO_MIPI_HSI_PHONE_ACTIVE),
237 .flags = IORESOURCE_IRQ,
241 /* if use more than one modem device, then set id num */
242 static struct platform_device umts_modem = {
243 .name = "modem_if",
244 .id = -1,
245 .num_resources = ARRAY_SIZE(umts_modem_res),
246 .resource = umts_modem_res,
247 .dev = {
248 .platform_data = &umts_modem_data,
252 static struct modem_io_t cdma_io_devices[] = {
253 [0] = {
254 .name = "multipdp",
255 .id = 0x1,
256 .format = IPC_MULTI_RAW,
257 .io_type = IODEV_DUMMY,
258 .link = LINKDEV_DPRAM,
260 [1] = {
261 .name = "cdma_ipc0",
262 .id = 0x1,
263 .format = IPC_FMT,
264 .io_type = IODEV_MISC,
265 .link = LINKDEV_DPRAM,
267 [2] = {
268 .name = "cdma_boot0",
269 .id = 0x1,
270 .format = IPC_BOOT,
271 .io_type = IODEV_MISC,
272 .link = LINKDEV_DPRAM,
274 [3] = {
275 .name = "cdma_rmnet0",
276 .id = 0x2A,
277 .format = IPC_RAW,
278 .io_type = IODEV_NET,
279 .link = LINKDEV_DPRAM,
281 [4] = {
282 .name = "cdma_rmnet1",
283 .id = 0x2B,
284 .format = IPC_RAW,
285 .io_type = IODEV_NET,
286 .link = LINKDEV_DPRAM,
288 [5] = {
289 .name = "cdma_rmnet2",
290 .id = 0x2C,
291 .format = IPC_RAW,
292 .io_type = IODEV_NET,
293 .link = LINKDEV_DPRAM,
295 [6] = {
296 .name = "cdma_rmnet3",
297 .id = 0x2D,
298 .format = IPC_RAW,
299 .io_type = IODEV_NET,
300 .link = LINKDEV_DPRAM,
302 [7] = {
303 .name = "cdma_rmnet4",
304 .id = 0x27,
305 .format = IPC_RAW,
306 .io_type = IODEV_NET,
307 .link = LINKDEV_DPRAM,
309 [8] = {
310 .name = "cdma_rmnet5", /* DM Port io-device */
311 .id = 0x3A,
312 .format = IPC_RAW,
313 .io_type = IODEV_MISC,
314 .link = LINKDEV_DPRAM,
316 [9] = {
317 .name = "cdma_ramdump0",
318 .id = 0x1,
319 .format = IPC_RAMDUMP,
320 .io_type = IODEV_MISC,
321 .link = LINKDEV_DPRAM,
323 [10] = {
324 .name = "cdma_rmnet6", /* AT CMD io-device */
325 .id = 0x31,
326 .format = IPC_RAW,
327 .io_type = IODEV_MISC,
328 .link = LINKDEV_DPRAM,
332 /* cdma target platform data */
333 static struct modem_data cdma_modem_data = {
334 .name = "cbp7.1",
336 /*ToDo: always power on vbat 3.3v it is not cennected GPIO*/
337 .gpio_cp_on = 0,
338 .gpio_reset_req_n = 0,
339 .gpio_cp_reset = OMAP_GPIO_DPRAM_VIA_RST,
340 .gpio_pda_active = OMAP_GPIO_DPRAM_PDA_ACTIVE,
341 .gpio_phone_active = OMAP_GPIO_DPRAM_PHONE_ACTIVE,
342 .gpio_cp_dump_int = 0, /*ToDo:*/
343 .gpio_cp_warm_reset = 0,
344 .gpio_cp_off = OMAP_GPIO_DPRAM_PWRHOLD_OFF,
346 .modem_type = VIA_CBP71,
347 .link_type = LINKDEV_DPRAM,
348 .modem_net = CDMA_NETWORK,
350 .num_iodevs = ARRAY_SIZE(cdma_io_devices),
351 .iodevs = cdma_io_devices,
354 static void dpram_cfg_gpio(void)
356 int nRetry = 0;
357 int resetdone;
359 omap_mux_init_signal("gpmc_ad0", OMAP_PULL_ENA|OMAP_PULL_UP|OMAP_INPUT_EN);
360 omap_mux_init_signal("gpmc_ad1", OMAP_PULL_ENA|OMAP_PULL_UP|OMAP_INPUT_EN);
361 omap_mux_init_signal("gpmc_ad2", OMAP_PULL_ENA|OMAP_PULL_UP|OMAP_INPUT_EN);
362 omap_mux_init_signal("gpmc_ad3", OMAP_PULL_ENA|OMAP_PULL_UP|OMAP_INPUT_EN);
363 omap_mux_init_signal("gpmc_ad4", OMAP_PULL_ENA|OMAP_PULL_UP|OMAP_INPUT_EN);
364 omap_mux_init_signal("gpmc_ad5", OMAP_PULL_ENA|OMAP_PULL_UP|OMAP_INPUT_EN);
365 omap_mux_init_signal("gpmc_ad6", OMAP_PULL_ENA|OMAP_PULL_UP|OMAP_INPUT_EN);
366 omap_mux_init_signal("gpmc_ad7", OMAP_PULL_ENA|OMAP_PULL_UP|OMAP_INPUT_EN);
367 omap_mux_init_signal("gpmc_ad8", OMAP_PULL_ENA|OMAP_PULL_UP|OMAP_INPUT_EN);
368 omap_mux_init_signal("gpmc_ad9", OMAP_PULL_ENA|OMAP_PULL_UP|OMAP_INPUT_EN);
369 omap_mux_init_signal("gpmc_ad10", OMAP_PULL_ENA|OMAP_PULL_UP|OMAP_INPUT_EN);
370 omap_mux_init_signal("gpmc_ad11", OMAP_PULL_ENA|OMAP_PULL_UP|OMAP_INPUT_EN);
371 omap_mux_init_signal("gpmc_ad12", OMAP_PULL_ENA|OMAP_PULL_UP|OMAP_INPUT_EN);
372 omap_mux_init_signal("gpmc_ad13", OMAP_PULL_ENA|OMAP_PULL_UP|OMAP_INPUT_EN);
373 omap_mux_init_signal("gpmc_ad14", OMAP_PULL_ENA|OMAP_PULL_UP|OMAP_INPUT_EN);
374 omap_mux_init_signal("gpmc_ad15", OMAP_PULL_ENA|OMAP_PULL_UP|OMAP_INPUT_EN);
376 omap_mux_init_signal("gpmc_nadv_ale", 0);
377 omap_mux_init_signal("gpmc_nwe", 0);
378 omap_mux_init_signal("gpmc_nbe0_cle", 0);
379 omap_mux_init_signal("gpmc_ncs1", 0);
380 omap_mux_init_signal("gpmc_nbe1", 0);
382 omap_mux_init_signal("gpmc_wait1.gpio_62", OMAP_WAKEUP_EN | OMAP_INPUT_EN);
383 omap_mux_init_signal("dpm_emu3", OMAP_MUX_MODE3);
384 omap_mux_init_signal("gpmc_ncs3.gpio_53", OMAP_PIN_OUTPUT);
386 gpio_request(OMAP_GPIO_DPRAM_INT_N, "dpram_int");
387 gpio_direction_input(OMAP_GPIO_DPRAM_INT_N);
388 irq_set_irq_type(OMAP_GPIO_IRQ(OMAP_GPIO_DPRAM_INT_N),
389 IRQ_TYPE_LEVEL_LOW);
391 /*dpram platform init setting*/
392 __raw_writel(0x02, OMAP4_GPMC_IO_ADDRESS((OMAP44XX_GPMC_BASE + 0x10)));
394 while (nRetry < 100) {
395 msleep(20);
396 resetdone = __raw_readl(OMAP4_GPMC_IO_ADDRESS(OMAP44XX_GPMC_BASE
397 + 0x14));
398 if (resetdone == 0x1)
399 break;
401 nRetry++;
404 __raw_writel(0x10, OMAP4_GPMC_IO_ADDRESS((OMAP44XX_GPMC_BASE + 0x10)));
406 __raw_writel((u32)DPRAM_GPMC_CONFIG1,
407 OMAP4_GPMC_IO_ADDRESS(GPMC_CONFIG1_1));
408 __raw_writel((u32)DPRAM_GPMC_CONFIG2,
409 OMAP4_GPMC_IO_ADDRESS(GPMC_CONFIG2_1));
410 __raw_writel((u32)DPRAM_GPMC_CONFIG3,
411 OMAP4_GPMC_IO_ADDRESS(GPMC_CONFIG3_1));
412 __raw_writel((u32)DPRAM_GPMC_CONFIG4,
413 OMAP4_GPMC_IO_ADDRESS(GPMC_CONFIG4_1));
414 __raw_writel((u32)DPRAM_GPMC_CONFIG5,
415 OMAP4_GPMC_IO_ADDRESS(GPMC_CONFIG5_1));
416 __raw_writel((u32)DPRAM_GPMC_CONFIG6,
417 OMAP4_GPMC_IO_ADDRESS(GPMC_CONFIG6_1));
419 __raw_writel((u32)0xF04, OMAP4_GPMC_IO_ADDRESS(GPMC_CONFIG7_1));
420 msleep(50);
421 __raw_writel((u32)(0xF04 | 0x040),
422 OMAP4_GPMC_IO_ADDRESS(GPMC_CONFIG7_1));
425 static int dpram_cfg_gpmc_clk(void)
427 struct clk *dpram_gpmc_ck;
428 struct clk *dpram_gpmc_ick;
430 dpram_gpmc_ck = clk_get(NULL, "gpmc_ck");
431 if (IS_ERR(dpram_gpmc_ck)) {
432 pr_err("Could not get GPMC clock gpmc_ck\n");
433 return -ENOENT;
435 clk_enable(dpram_gpmc_ck);
437 dpram_gpmc_ick = clk_get(NULL, "gpmc_ick");
438 if (IS_ERR(dpram_gpmc_ick)) {
439 clk_disable(dpram_gpmc_ck);
440 pr_err("Could not get GPMC clock gpmc_ick\n");
441 return -ENOENT;
443 clk_enable(dpram_gpmc_ick);
445 return 0;
448 static void cdma_modem_cfg_gpio(void)
450 unsigned gpio_cp_rst = cdma_modem_data.gpio_cp_reset;
451 unsigned gpio_pda_active = cdma_modem_data.gpio_pda_active;
452 unsigned gpio_phone_active = cdma_modem_data.gpio_phone_active;
453 unsigned gpio_cp_off = cdma_modem_data.gpio_cp_off;
455 dpram_cfg_gpio();
456 if (dpram_cfg_gpmc_clk()) {
457 pr_err("fail to enable GPMC clock\n");
458 return;
461 omap_mux_init_signal("abe_dmic_din1.gpio_120", OMAP_PIN_INPUT);
462 omap_mux_init_signal("abe_dmic_clk1.gpio_119", OMAP_PIN_OUTPUT |
463 OMAP_PIN_OFF_OUTPUT_LOW);
465 /* gpio mux setting */
466 if (gpio_cp_rst) {
467 gpio_request(gpio_cp_rst, "CP_RST");
468 gpio_direction_output(gpio_cp_rst, 0);
471 if (gpio_pda_active) {
472 gpio_request(gpio_pda_active, "PDA_ACTIVE");
473 gpio_direction_output(gpio_pda_active, 0);
476 if (gpio_phone_active) {
477 gpio_request(gpio_phone_active, "PHONE_ACTIVE");
478 gpio_direction_input(gpio_phone_active);
481 if (gpio_cp_off) {
482 gpio_request(gpio_cp_off, "VIA_OFF");
483 gpio_direction_output(gpio_cp_off, 1);
486 if (gpio_phone_active)
487 irq_set_irq_type(
488 OMAP_GPIO_IRQ(OMAP_GPIO_DPRAM_PHONE_ACTIVE),
489 IRQ_TYPE_LEVEL_HIGH);
492 static struct resource cdma_modem_res[] = {
493 [0] = {
494 .name = "cdma_phone_active",
495 .start = OMAP_GPIO_IRQ(OMAP_GPIO_DPRAM_PHONE_ACTIVE),
496 .end = OMAP_GPIO_IRQ(OMAP_GPIO_DPRAM_PHONE_ACTIVE),
497 .flags = IORESOURCE_IRQ,
499 [1] = {
500 .name = "cdma_dpram_int",
501 .start = OMAP_GPIO_IRQ(OMAP_GPIO_DPRAM_INT_N),
502 .end = OMAP_GPIO_IRQ(OMAP_GPIO_DPRAM_INT_N),
503 .flags = IORESOURCE_IRQ,
505 [2] = {
506 .name = "cdma_dpram",
507 .start = DPRAM_START_ADDRESS,
508 .end = DPRAM_END_ADDRESS,
509 .flags = IORESOURCE_MEM,
513 static struct platform_device cdma_modem = {
514 .name = "modem_if",
515 .id = 1,
516 .num_resources = ARRAY_SIZE(cdma_modem_res),
517 .resource = cdma_modem_res,
518 .dev = {
519 .platform_data = &cdma_modem_data,
523 /* lte target platform data */
524 static struct modem_io_t lte_io_devices[] = {
525 [0] = {
526 .name = "lte_ipc0",
527 .id = 0x1,
528 .format = IPC_FMT,
529 .io_type = IODEV_MISC,
530 .link = LINKDEV_USB,
532 [1] = {
533 .name = "lte_rmnet0",
534 .id = 0x2A,
535 .format = IPC_RAW,
536 .io_type = IODEV_NET,
537 .link = LINKDEV_USB,
539 [2] = {
540 .name = "lte_rfs0",
541 .id = 0x0,
542 .format = IPC_RFS,
543 .io_type = IODEV_MISC,
544 .link = LINKDEV_USB,
546 [3] = {
547 .name = "lte_boot0",
548 .id = 0x0,
549 .format = IPC_BOOT,
550 .io_type = IODEV_MISC,
551 .link = LINKDEV_USB,
553 [4] = {
554 .name = "lte_rmnet1",
555 .id = 0x2B,
556 .format = IPC_RAW,
557 .io_type = IODEV_NET,
558 .link = LINKDEV_USB,
560 [5] = {
561 .name = "lte_rmnet2",
562 .id = 0x2C,
563 .format = IPC_RAW,
564 .io_type = IODEV_NET,
565 .link = LINKDEV_USB,
567 [6] = {
568 .name = "lte_rmnet3",
569 .id = 0x2D,
570 .format = IPC_RAW,
571 .io_type = IODEV_NET,
572 .link = LINKDEV_USB,
574 [7] = {
575 .name = "lte_multipdp",
576 .id = 0x1,
577 .format = IPC_MULTI_RAW,
578 .io_type = IODEV_DUMMY,
579 .link = LINKDEV_USB,
581 [8] = {
582 .name = "lte_rmnet4", /* DM Port io-device */
583 .id = 0x3F,
584 .format = IPC_RAW,
585 .io_type = IODEV_MISC,
586 .link = LINKDEV_USB,
588 [9] = {
589 .name = "lte_ramdump0",
590 .id = 0x0,
591 .format = IPC_RAMDUMP,
592 .io_type = IODEV_MISC,
593 .link = LINKDEV_USB,
598 Prime vs P4 usage
599 CMC2AP_INT1 vs CMC2AP_STATUS
600 AP2CMC_INT1 vs AP2CMC_STATUS
601 CMC2AP_INT2 vs CMC2AP_WAKEUP
602 AP2CMC_INT2 vs AP2CMC_WAKEUP
604 static struct modem_data lte_modem_data = {
605 .name = "cmc221",
607 .gpio_cp_on = OMAP_GPIO_221_PMIC_PWRON,
608 .gpio_reset_req_n = 0,
609 .gpio_cp_reset = OMAP_GPIO_CMC_RST,
610 .gpio_pda_active = 0,/*NOT YET CONNECTED*/
611 .gpio_phone_active = OMAP_GPIO_LTE_ACTIVE,
612 .gpio_cp_dump_int = OMAP_GPIO_LTE_ACTIVE,/*TO BE CHECKED*/
614 .gpio_cp_warm_reset = 0,
615 #ifdef CONFIG_LTE_MODEM_CMC221
616 .gpio_cp_off = OMAP_GPIO_221_PMIC_PWRHOLD_OFF,
617 .gpio_slave_wakeup = OMAP_GPIO_AP2CMC_INT2,
618 .gpio_host_wakeup = OMAP_GPIO_CMC2AP_INT2,
619 .gpio_host_active = OMAP_GPIO_AP2CMC_INT1,
620 #endif
622 .modem_type = SEC_CMC221,
623 .link_type = LINKDEV_USB,
624 .modem_net = LTE_NETWORK,
626 .num_iodevs = ARRAY_SIZE(lte_io_devices),
627 .iodevs = lte_io_devices,
630 static void omap_lte_mux_init(void)
632 pr_debug("[MODEM_IF] %s IN!\n", __func__);
634 omap_mux_init_signal("gpmc_a17.gpio_41", OMAP_PIN_OUTPUT);
635 omap_mux_init_signal("usbb2_ulpitll_dat2.gpio_163", OMAP_PIN_OUTPUT);
636 omap_mux_init_signal("gpmc_ncs0.gpio_50", OMAP_PIN_OUTPUT);
637 omap_mux_init_signal("dpm_emu7.gpio_18", OMAP_PIN_OUTPUT);
638 omap_mux_init_signal("usbb2_ulpitll_nxt.gpio_160",
639 OMAP_PIN_INPUT | OMAP_PIN_OFF_WAKEUPENABLE);
640 omap_mux_init_signal("dpm_emu17.gpio_28", OMAP_PIN_OUTPUT);
641 omap_mux_init_signal("gpmc_a23.gpio_47", OMAP_PIN_INPUT_PULLDOWN);
644 static void lte_modem_cfg_gpio(void)
646 unsigned gpio_cp_on = lte_modem_data.gpio_cp_on;
647 unsigned gpio_cp_rst = lte_modem_data.gpio_cp_reset;
648 unsigned gpio_phone_active = lte_modem_data.gpio_phone_active;
649 #ifdef CONFIG_LTE_MODEM_CMC221
650 unsigned gpio_cp_off = lte_modem_data.gpio_cp_off;
651 unsigned gpio_slave_wakeup = lte_modem_data.gpio_slave_wakeup;
652 unsigned gpio_host_wakeup = lte_modem_data.gpio_host_wakeup;
653 unsigned gpio_host_active = lte_modem_data.gpio_host_active;
654 #endif
656 omap_lte_mux_init();
657 if (gpio_cp_on) {
658 gpio_request(gpio_cp_on, "LTE_ON");
659 gpio_direction_output(gpio_cp_on, 0);
662 if (gpio_cp_rst) {
663 gpio_request(gpio_cp_rst, "LTE_RST");
664 gpio_direction_output(gpio_cp_rst, 0);
667 if (gpio_phone_active) {
668 gpio_request(gpio_phone_active, "LTE_ACTIVE");
669 gpio_direction_input(gpio_phone_active);
672 #ifdef CONFIG_LTE_MODEM_CMC221
673 if (gpio_cp_off) {
674 gpio_request(gpio_cp_off, "LTE_OFF");
675 gpio_direction_output(gpio_cp_off, 1);
678 if (gpio_slave_wakeup) {
679 gpio_request(gpio_slave_wakeup, "LTE_SLAVE_WAKEUP");
680 gpio_direction_output(gpio_slave_wakeup, 0);
683 if (gpio_host_wakeup) {
684 gpio_request(gpio_host_wakeup, "LTE_HOST_WAKEUP");
685 gpio_direction_input(gpio_host_wakeup);
688 if (gpio_host_active) {
689 gpio_request(gpio_host_active, "LTE_HOST_ACTIVE");
690 gpio_direction_output(gpio_host_active, 1);
692 #endif
695 static struct resource lte_modem_res[] = {
696 [0] = {
697 .name = "lte_phone_active",
698 /* phone active irq */
699 .start = OMAP_GPIO_IRQ(OMAP_GPIO_LTE_ACTIVE),
700 .end = OMAP_GPIO_IRQ(OMAP_GPIO_LTE_ACTIVE),
701 .flags = IORESOURCE_IRQ,
703 [1] = {
704 .name = "lte_host_wakeup",
705 /* host wakeup irq */
706 .start = OMAP_GPIO_IRQ(OMAP_GPIO_CMC2AP_INT2),
707 .end = OMAP_GPIO_IRQ(OMAP_GPIO_CMC2AP_INT2),
708 .flags = IORESOURCE_IRQ,
712 static struct platform_device lte_modem_wake = {
713 .name = "modem_lte_wake",
714 .id = -1,
717 static struct platform_device lte_modem = {
718 .name = "modem_if",
719 .id = 2,
720 .num_resources = ARRAY_SIZE(lte_modem_res),
721 .resource = lte_modem_res,
722 .dev = {
723 .platform_data = &lte_modem_data,
727 /* lte_modem_wake must be registered before the ehci driver */
728 void __init modem_toro_init(void)
730 lte_modem_wake.dev.platform_data = &lte_modem_data;
731 platform_device_register(&lte_modem_wake);
734 static int __init init_modem(void)
736 pr_debug("[MODEM_IF] init_modem\n");
738 switch (omap4_tuna_get_type()) {
739 case TUNA_TYPE_MAGURO: /* HSPA */
740 /* umts gpios configuration */
741 umts_modem_cfg_gpio();
742 platform_device_register(&umts_modem);
743 break;
745 case TUNA_TYPE_TORO: /* LTE */
746 /* cdma gpios configuration */
747 cdma_modem_cfg_gpio();
748 platform_device_register(&cdma_modem);
750 /* lte gpios configuration */
751 lte_modem_cfg_gpio();
752 platform_device_register(&lte_modem);
753 break;
755 default:
756 break;
758 return 0;
760 late_initcall(init_modem);