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ARM: cpu topology: Add debugfs interface for cpu_power
[cmplus.git] / arch / arm / mach-omap2 / board-tuna.c
blob01a1a75518dad7eed9a64c667388bdf004d46344
1 /* Board support file for Samsung Tuna Board.
2 *
3 * Copyright (C) 2011 Google, Inc.
4 * Copyright (C) 2010 Texas Instruments
5 *
6 * Based on mach-omap2/board-omap4panda.c
7 *
8 * This software is licensed under the terms of the GNU General Public
9 * License version 2, as published by the Free Software Foundation, and
10 * may be copied, distributed, and modified under those terms.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 */
17
18 #include <linux/kernel.h>
19 #include <linux/init.h>
20 #include <linux/platform_device.h>
21 #include <linux/clk.h>
22 #include <linux/io.h>
23 #include <linux/ion.h>
24 #include <linux/leds.h>
25 #include <linux/gpio.h>
26 #include <linux/memblock.h>
27 #include <linux/omap_ion.h>
28 #include <linux/usb/otg.h>
29 #include <linux/i2c/twl.h>
30 #include <linux/regulator/machine.h>
31 #include <linux/regulator/fixed.h>
32 #include <linux/wl12xx.h>
33 #include <linux/reboot.h>
34 #include <linux/memblock.h>
35 #include <linux/sysfs.h>
36 #include <linux/uaccess.h>
37 #include <linux/proc_fs.h>
38 #include <linux/spi/spi.h>
39 #include <linux/spi/flash.h>
40 #include <linux/platform_data/lte_modem_bootloader.h>
41 #include <linux/platform_data/ram_console.h>
42 #include <plat/mcspi.h>
43 #include <linux/i2c-gpio.h>
44
45 #include <mach/hardware.h>
46 #include <mach/omap4-common.h>
47 #include <asm/mach-types.h>
48 #include <asm/mach/arch.h>
49 #include <asm/mach/map.h>
50
51 #include <plat/board-tuna-bluetooth.h>
52 #include <plat/omap-serial.h>
53 #include <plat/board.h>
54 #include <plat/common.h>
55 #include <plat/cpu.h>
56 #include <plat/usb.h>
57 #include <plat/mmc.h>
58 #include <plat/remoteproc.h>
59 #include <plat/omap-serial.h>
60
61 #include <mach/omap_fiq_debugger.h>
62
63 #include <mach/id.h>
64 #include "timer-gp.h"
65
66 #include "omap4-sar-layout.h"
67 #include "hsmmc.h"
68 #include "control.h"
69 #include "mux.h"
70 #include "board-tuna.h"
71 #include "resetreason.h"
72 #include <mach/dmm.h>
73
74 #define TUNA_RAMCONSOLE_START (PLAT_PHYS_OFFSET + SZ_512M)
75 #define TUNA_RAMCONSOLE_SIZE SZ_2M
76
77 struct class *sec_class;
78 EXPORT_SYMBOL(sec_class);
79
80 /* For LTE(CMC221) */
81 #define OMAP_GPIO_LTE_ACTIVE 47
82 #define OMAP_GPIO_CMC2AP_INT1 61
83
84 #define GPIO_AUD_PWRON 127
85 #define GPIO_AUD_PWRON_TORO_V1 20
86
87 /* GPS GPIO Setting */
88 #define GPIO_AP_AGPS_TSYNC 18
89 #define GPIO_GPS_nRST 136
90 #define GPIO_GPS_PWR_EN 137
91 #define GPIO_GPS_UART_SEL 164
92
93 #define GPIO_MHL_SCL_18V 99
94 #define GPIO_MHL_SDA_18V 98
95
96 #define REBOOT_FLAG_RECOVERY 0x52564352
97 #define REBOOT_FLAG_FASTBOOT 0x54534146
98 #define REBOOT_FLAG_NORMAL 0x4D524F4E
99 #define REBOOT_FLAG_POWER_OFF 0x46464F50
100
101 #define UART_NUM_FOR_GPS 0
102
103 static int tuna_hw_rev;
104
105 static struct gpio tuna_hw_rev_gpios[] = {
106 {76, GPIOF_IN, "hw_rev0"},
107 {75, GPIOF_IN, "hw_rev1"},
108 {74, GPIOF_IN, "hw_rev2"},
109 {73, GPIOF_IN, "hw_rev3"},
110 {170, GPIOF_IN, "hw_rev4"},
111 };
112
113 static const char const *omap4_tuna_hw_name_maguro[] = {
114 [0x00] = "Toro Lunchbox #1",
115 [0x01] = "Maguro 1st Sample",
116 [0x02] = "Maguro 2nd Sample",
117 [0x03] = "Maguro 4th Sample",
118 [0x05] = "Maguro 5th Sample",
119 [0x07] = "Maguro 6th Sample",
120 [0x08] = "Maguro 7th Sample",
121 [0x09] = "Maguro 8th Sample",
122 };
123
124 static const char const *omap4_tuna_hw_name_toro[] = {
125 [0x00] = "Toro Lunchbox #2",
126 [0x01] = "Toro 1st Sample",
127 [0x02] = "Toro 2nd Sample",
128 [0x03] = "Toro 4th Sample",
129 [0x05] = "Toro 5th Sample",
130 [0x06] = "Toro 8th Sample",
131 [0x08] = "Toro 8th Sample",
132 [0x09] = "Toro 8-1th Sample",
133 [0x0e] = "Toro Plus 1st Sample",
134 };
135
136 int omap4_tuna_get_revision(void)
137 {
138 return tuna_hw_rev & TUNA_REV_MASK;
139 }
140
141 int omap4_tuna_get_type(void)
142 {
143 return tuna_hw_rev & TUNA_TYPE_MASK;
144 }
145
146
147 static const char *omap4_tuna_hw_rev_name(void) {
148 const char *ret;
149 const char **names;
150 int num;
151 int rev;
152
153 if (omap4_tuna_get_type() == TUNA_TYPE_MAGURO) {
154 names = omap4_tuna_hw_name_maguro;
155 num = ARRAY_SIZE(omap4_tuna_hw_name_maguro);
156 ret = "Maguro unknown";
157 } else {
158 names = omap4_tuna_hw_name_toro;
159 num = ARRAY_SIZE(omap4_tuna_hw_name_toro);
160 ret = "Toro unknown";
161 }
162
163 rev = omap4_tuna_get_revision();
164 if (rev >= num || !names[rev])
165 return ret;
166
167 return names[rev];
168 }
169
170 /*
171 * Store a handy board information string which we can use elsewhere like
172 * like in panic situation
173 */
174 static char omap4_tuna_bd_info_string[255];
175 static void omap4_tuna_init_hw_rev(void)
176 {
177 int ret;
178 int i;
179 u32 r;
180
181 /* Disable weak driver pulldown on usbb2_hsic_strobe */
182 r = omap4_ctrl_pad_readl(OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_USBB_HSIC);
183 r &= ~OMAP4_USBB2_HSIC_STROBE_WD_MASK;
184 omap4_ctrl_pad_writel(r, OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_USBB_HSIC);
185
186 ret = gpio_request_array(tuna_hw_rev_gpios,
187 ARRAY_SIZE(tuna_hw_rev_gpios));
188
189 BUG_ON(ret);
190
191 for (i = 0; i < ARRAY_SIZE(tuna_hw_rev_gpios); i++)
192 tuna_hw_rev |= gpio_get_value(tuna_hw_rev_gpios[i].gpio) << i;
193
194 snprintf(omap4_tuna_bd_info_string,
195 ARRAY_SIZE(omap4_tuna_bd_info_string),
196 "Tuna HW revision: %02x (%s), cpu %s ES%d.%d ",
197 tuna_hw_rev,
198 omap4_tuna_hw_rev_name(),
199 cpu_is_omap443x() ? "OMAP4430" : "OMAP4460",
200 (GET_OMAP_REVISION() >> 4) & 0xf,
201 GET_OMAP_REVISION() & 0xf);
202
203 pr_info("%s\n", omap4_tuna_bd_info_string);
204 mach_panic_string = omap4_tuna_bd_info_string;
205 }
206
207 /* wl127x BT, FM, GPS connectivity chip */
208 static int wl1271_gpios[] = {46, -1, -1};
209 static struct platform_device wl1271_device = {
210 .name = "kim",
211 .id = -1,
212 .dev = {
213 .platform_data = &wl1271_gpios,
214 },
215 };
216
217 static struct resource ramconsole_resources[] = {
218 {
219 .flags = IORESOURCE_MEM,
220 .start = TUNA_RAMCONSOLE_START,
221 .end = TUNA_RAMCONSOLE_START + TUNA_RAMCONSOLE_SIZE - 1,
222 },
223 };
224
225 static struct ram_console_platform_data ramconsole_pdata;
226
227 static struct platform_device ramconsole_device = {
228 .name = "ram_console",
229 .id = -1,
230 .num_resources = ARRAY_SIZE(ramconsole_resources),
231 .resource = ramconsole_resources,
232 .dev = {
233 .platform_data = &ramconsole_pdata,
234 },
235 };
236
237 static struct platform_device bcm4330_bluetooth_device = {
238 .name = "bcm4330_bluetooth",
239 .id = -1,
240 };
241
242 static void __init tuna_bt_init(void)
243 {
244 /* BT_EN - GPIO 104 */
245 omap_mux_init_signal("gpmc_ncs6.gpio_103", OMAP_PIN_OUTPUT);
246 /*BT_nRST - GPIO 42 */
247 omap_mux_init_signal("gpmc_a18.gpio_42", OMAP_PIN_OUTPUT);
248 /* BT_WAKE - GPIO 27 */
249 omap_mux_init_signal("dpm_emu16.gpio_27", OMAP_PIN_OUTPUT);
250 /* BT_HOST_WAKE - GPIO 177 */
251 omap_mux_init_signal("kpd_row5.gpio_177", OMAP_WAKEUP_EN | OMAP_PIN_INPUT);
252
253 platform_device_register(&bcm4330_bluetooth_device);
254 }
255
256 static struct twl4030_madc_platform_data twl6030_madc = {
257 .irq_line = -1,
258 };
259
260 static struct platform_device twl6030_madc_device = {
261 .name = "twl6030_madc",
262 .id = -1,
263 .dev = {
264 .platform_data = &twl6030_madc,
265 },
266 };
267
268
269 static struct i2c_gpio_platform_data tuna_gpio_i2c5_pdata = {
270 .sda_pin = GPIO_MHL_SDA_18V,
271 .scl_pin = GPIO_MHL_SCL_18V,
272 .udelay = 3,
273 .timeout = 0,
274 };
275
276 static struct platform_device tuna_gpio_i2c5_device = {
277 .name = "i2c-gpio",
278 .id = 5,
279 .dev = {
280 .platform_data = &tuna_gpio_i2c5_pdata,
281 }
282 };
283
284 #define PHYS_ADDR_SMC_SIZE (SZ_1M * 3)
285 #define PHYS_ADDR_DUCATI_SIZE (SZ_1M * 105)
286 #define OMAP_TUNA_ION_HEAP_SECURE_INPUT_SIZE (SZ_1M * 90)
287 #define OMAP_TUNA_ION_HEAP_TILER_SIZE (SZ_1M * 81)
288 #define OMAP_TUNA_ION_HEAP_NONSECURE_TILER_SIZE (SZ_1M * 15)
289
290 #define PHYS_ADDR_SMC_MEM (0x80000000 + SZ_1G - PHYS_ADDR_SMC_SIZE)
291 #define PHYS_ADDR_DUCATI_MEM (PHYS_ADDR_SMC_MEM - \
292 PHYS_ADDR_DUCATI_SIZE - \
293 OMAP_TUNA_ION_HEAP_SECURE_INPUT_SIZE)
294
295 static struct ion_platform_data tuna_ion_data = {
296 .nr = 3,
297 .heaps = {
298 {
299 .type = ION_HEAP_TYPE_CARVEOUT,
300 .id = OMAP_ION_HEAP_SECURE_INPUT,
301 .name = "secure_input",
302 .base = PHYS_ADDR_SMC_MEM -
303 OMAP_TUNA_ION_HEAP_SECURE_INPUT_SIZE,
304 .size = OMAP_TUNA_ION_HEAP_SECURE_INPUT_SIZE,
305 },
306 { .type = OMAP_ION_HEAP_TYPE_TILER,
307 .id = OMAP_ION_HEAP_TILER,
308 .name = "tiler",
309 .base = PHYS_ADDR_DUCATI_MEM -
310 OMAP_TUNA_ION_HEAP_TILER_SIZE,
311 .size = OMAP_TUNA_ION_HEAP_TILER_SIZE,
312 },
313 { .type = OMAP_ION_HEAP_TYPE_TILER,
314 .id = OMAP_ION_HEAP_NONSECURE_TILER,
315 .name = "nonsecure_tiler",
316 .base = PHYS_ADDR_DUCATI_MEM -
317 OMAP_TUNA_ION_HEAP_TILER_SIZE -
318 OMAP_TUNA_ION_HEAP_NONSECURE_TILER_SIZE,
319 .size = OMAP_TUNA_ION_HEAP_NONSECURE_TILER_SIZE,
320 },
321 },
322 };
323
324 static struct platform_device tuna_ion_device = {
325 .name = "ion-omap4",
326 .id = -1,
327 .dev = {
328 .platform_data = &tuna_ion_data,
329 },
330 };
331
332 static struct platform_device tuna_spdif_dit_device = {
333 .name = "spdif-dit",
334 .id = 0,
335 };
336
337 static struct platform_device *tuna_devices[] __initdata = {
338 &ramconsole_device,
339 &wl1271_device,
340 &twl6030_madc_device,
341 &tuna_ion_device,
342 &tuna_gpio_i2c5_device,
343 &tuna_spdif_dit_device,
344 };
345
346 /*
347 * The UART1 is for GPS, and CSR GPS chip should control uart1 rts level
348 * for gps firmware download.
349 */
350 static int uart1_rts_ctrl_write(struct file *file, const char __user *buffer,
351 size_t count, loff_t *offs)
352 {
353 char buf[10] = {0,};
354
355 if (omap4_tuna_get_revision() < TUNA_REV_SAMPLE_4)
356 return -ENXIO;
357 if (count > sizeof(buf) - 1)
358 return -EINVAL;
359 if (copy_from_user(buf, buffer, count))
360 return -EFAULT;
361
362 if (!strncmp(buf, "1", 1)) {
363 omap_rts_mux_write(OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE7,
364 UART_NUM_FOR_GPS);
365 } else if (!strncmp(buf, "0", 1)) {
366 omap_rts_mux_write(OMAP_PIN_OUTPUT | OMAP_MUX_MODE1,
367 UART_NUM_FOR_GPS);
368 }
369
370 return count;
371 }
372
373 static const struct file_operations uart1_rts_ctrl_proc_fops = {
374 .write = uart1_rts_ctrl_write,
375 };
376
377 static int __init tuna_gps_rts_ctrl_init(void)
378 {
379 struct proc_dir_entry *p_entry;
380
381 p_entry = proc_create("mcspi1_cs3_ctrl", 0666, NULL,
382 &uart1_rts_ctrl_proc_fops);
383
384 if (!p_entry)
385 return -ENOMEM;
386
387 return 0;
388 }
389
390 static void tuna_gsd4t_gps_gpio(void)
391 {
392 /* AP_AGPS_TSYNC - GPIO 18 */
393 omap_mux_init_signal("dpm_emu7.gpio_18", OMAP_PIN_OUTPUT);
394 /* GPS_nRST - GPIO 136 */
395 omap_mux_init_signal("mcspi1_simo.gpio_136", OMAP_PIN_OUTPUT);
396 /* GPS_PWR_EN - GPIO 137 */
397 omap_mux_init_signal("mcspi1_cs0.gpio_137", OMAP_PIN_OUTPUT);
398 /* GPS_UART_SEL - GPIO 164 */
399 omap_mux_init_signal("usbb2_ulpitll_dat3.gpio_164", OMAP_PIN_OUTPUT);
400 }
401
402 static void tuna_gsd4t_gps_init(void)
403 {
404 struct device *gps_dev;
405
406 gps_dev = device_create(sec_class, NULL, 0, NULL, "gps");
407 if (IS_ERR(gps_dev)) {
408 pr_err("Failed to create device(gps)!\n");
409 goto err;
410 }
411 tuna_gsd4t_gps_gpio();
412
413 gpio_request(GPIO_AP_AGPS_TSYNC, "AP_AGPS_TSYNC");
414 gpio_direction_output(GPIO_AP_AGPS_TSYNC, 0);
415
416 gpio_request(GPIO_GPS_nRST, "GPS_nRST");
417 gpio_direction_output(GPIO_GPS_nRST, 1);
418
419 gpio_request(GPIO_GPS_PWR_EN, "GPS_PWR_EN");
420 gpio_direction_output(GPIO_GPS_PWR_EN, 0);
421
422 gpio_request(GPIO_GPS_UART_SEL , "GPS_UART_SEL");
423 gpio_direction_output(GPIO_GPS_UART_SEL , 0);
424
425 gpio_export(GPIO_GPS_nRST, 1);
426 gpio_export(GPIO_GPS_PWR_EN, 1);
427
428 gpio_export_link(gps_dev, "GPS_nRST", GPIO_GPS_nRST);
429 gpio_export_link(gps_dev, "GPS_PWR_EN", GPIO_GPS_PWR_EN);
430
431 tuna_gps_rts_ctrl_init();
432
433 err:
434 return;
435 }
436
437 static int __init sec_common_init(void)
438 {
439 sec_class = class_create(THIS_MODULE, "sec");
440 if (IS_ERR(sec_class))
441 pr_err("Failed to create class(sec)!\n");
442
443 return 0;
444 }
445
446 static void __init tuna_init_early(void)
447 {
448 omap2_init_common_infrastructure();
449 omap2_init_common_devices(NULL, NULL);
450 }
451
452 static struct omap_musb_board_data musb_board_data = {
453 .interface_type = MUSB_INTERFACE_UTMI,
454 #ifdef CONFIG_USB_MUSB_OTG
455 .mode = MUSB_OTG,
456 #else
457 .mode = MUSB_PERIPHERAL,
458 #endif
459 .power = 500,
460 };
461
462 static struct omap2_hsmmc_info mmc[] = {
463 {
464 .mmc = 1,
465 .nonremovable = true,
466 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
467 .ocr_mask = MMC_VDD_165_195,
468 .gpio_wp = -EINVAL,
469 .gpio_cd = -EINVAL,
470 },
471 {
472 .name = "omap_wlan",
473 .mmc = 5,
474 .caps = MMC_CAP_4_BIT_DATA,
475 .gpio_wp = -EINVAL,
476 .gpio_cd = -EINVAL,
477 .ocr_mask = MMC_VDD_165_195 | MMC_VDD_20_21,
478 .nonremovable = false,
479 .mmc_data = &tuna_wifi_data,
480 },
481 {} /* Terminator */
482 };
483
484 static struct regulator_consumer_supply tuna_vmmc_supply[] = {
485 {
486 .supply = "vmmc",
487 .dev_name = "omap_hsmmc.0",
488 },
489 {
490 .supply = "vmmc",
491 .dev_name = "omap_hsmmc.1",
492 },
493 };
494
495 static struct regulator_init_data tuna_vaux1 = {
496 .constraints = {
497 .min_uV = 3000000,
498 .max_uV = 3000000,
499 .apply_uV = true,
500 .valid_modes_mask = REGULATOR_MODE_NORMAL
501 | REGULATOR_MODE_STANDBY,
502 .valid_ops_mask = REGULATOR_CHANGE_MODE
503 | REGULATOR_CHANGE_STATUS,
504 .always_on = true,
505 },
506 };
507
508 static struct regulator_init_data tuna_vaux2 = {
509 .constraints = {
510 .min_uV = 1200000,
511 .max_uV = 2800000,
512 .apply_uV = true,
513 .valid_modes_mask = REGULATOR_MODE_NORMAL
514 | REGULATOR_MODE_STANDBY,
515 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
516 | REGULATOR_CHANGE_MODE
517 | REGULATOR_CHANGE_STATUS,
518 .state_mem = {
519 .disabled = true,
520 },
521 .initial_state = PM_SUSPEND_MEM,
522 },
523 };
524
525 static struct regulator_consumer_supply tuna_vaux3_supplies[] = {
526 {
527 .supply = "vlcd",
528 },
529 };
530
531 static struct regulator_init_data tuna_vaux3 = {
532 .constraints = {
533 .min_uV = 2700000,
534 .max_uV = 2700000,
535 .apply_uV = true,
536 .valid_modes_mask = REGULATOR_MODE_NORMAL
537 | REGULATOR_MODE_STANDBY,
538 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
539 | REGULATOR_CHANGE_MODE
540 | REGULATOR_CHANGE_STATUS,
541 .state_mem = {
542 .disabled = true,
543 },
544 },
545 .num_consumer_supplies = ARRAY_SIZE(tuna_vaux3_supplies),
546 .consumer_supplies = tuna_vaux3_supplies,
547 };
548
549 static struct regulator_init_data tuna_vmmc = {
550 .constraints = {
551 .min_uV = 1800000,
552 .max_uV = 1800000,
553 .apply_uV = true,
554 .valid_modes_mask = REGULATOR_MODE_NORMAL
555 | REGULATOR_MODE_STANDBY,
556 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
557 | REGULATOR_CHANGE_MODE
558 | REGULATOR_CHANGE_STATUS,
559 },
560 .num_consumer_supplies = 2,
561 .consumer_supplies = tuna_vmmc_supply,
562 };
563
564 static struct regulator_init_data tuna_vpp = {
565 .constraints = {
566 .min_uV = 1800000,
567 .max_uV = 2500000,
568 .apply_uV = true,
569 .valid_modes_mask = REGULATOR_MODE_NORMAL
570 | REGULATOR_MODE_STANDBY,
571 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
572 | REGULATOR_CHANGE_MODE
573 | REGULATOR_CHANGE_STATUS,
574 .state_mem = {
575 .disabled = true,
576 },
577 .initial_state = PM_SUSPEND_MEM,
578 },
579 };
580
581 static struct regulator_consumer_supply tuna_vusim_supplies[] = {
582 {
583 .supply = "vlcd-iovcc",
584 },
585 };
586
587 static struct regulator_init_data tuna_vusim = {
588 .constraints = {
589 .min_uV = 1700000,
590 .max_uV = 1700000,
591 .apply_uV = true,
592 .valid_modes_mask = REGULATOR_MODE_NORMAL
593 | REGULATOR_MODE_STANDBY,
594 .valid_ops_mask = REGULATOR_CHANGE_MODE
595 | REGULATOR_CHANGE_STATUS,
596 .state_mem = {
597 .disabled = true,
598 },
599 },
600 .num_consumer_supplies = ARRAY_SIZE(tuna_vusim_supplies),
601 .consumer_supplies = tuna_vusim_supplies,
602 };
603
604 static struct regulator_init_data tuna_vana = {
605 .constraints = {
606 .min_uV = 2100000,
607 .max_uV = 2100000,
608 .valid_modes_mask = REGULATOR_MODE_NORMAL
609 | REGULATOR_MODE_STANDBY,
610 .valid_ops_mask = REGULATOR_CHANGE_MODE
611 | REGULATOR_CHANGE_STATUS,
612 .always_on = true,
613 },
614 };
615
616 static struct regulator_consumer_supply tuna_vcxio_supply[] = {
617 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dss"),
618 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
619 };
620
621 static struct regulator_init_data tuna_vcxio = {
622 .constraints = {
623 .min_uV = 1800000,
624 .max_uV = 1800000,
625 .valid_modes_mask = REGULATOR_MODE_NORMAL
626 | REGULATOR_MODE_STANDBY,
627 .valid_ops_mask = REGULATOR_CHANGE_MODE
628 | REGULATOR_CHANGE_STATUS,
629 },
630 .num_consumer_supplies = ARRAY_SIZE(tuna_vcxio_supply),
631 .consumer_supplies = tuna_vcxio_supply,
632
633 };
634
635 static struct regulator_consumer_supply tuna_vdac_supply[] = {
636 {
637 .supply = "hdmi_vref",
638 },
639 };
640
641 static struct regulator_init_data tuna_vdac = {
642 .constraints = {
643 .min_uV = 1800000,
644 .max_uV = 1800000,
645 .valid_modes_mask = REGULATOR_MODE_NORMAL
646 | REGULATOR_MODE_STANDBY,
647 .valid_ops_mask = REGULATOR_CHANGE_MODE
648 | REGULATOR_CHANGE_STATUS,
649 },
650 .num_consumer_supplies = ARRAY_SIZE(tuna_vdac_supply),
651 .consumer_supplies = tuna_vdac_supply,
652 };
653
654 static struct regulator_consumer_supply tuna_vusb_supply[] = {
655 REGULATOR_SUPPLY("vusb", "tuna_otg"),
656 };
657
658 static struct regulator_init_data tuna_vusb = {
659 .constraints = {
660 .min_uV = 3300000,
661 .max_uV = 3300000,
662 .valid_modes_mask = REGULATOR_MODE_NORMAL
663 | REGULATOR_MODE_STANDBY,
664 .valid_ops_mask = REGULATOR_CHANGE_MODE
665 | REGULATOR_CHANGE_STATUS,
666 .state_mem = {
667 .disabled = true,
668 },
669 .initial_state = PM_SUSPEND_MEM,
670 },
671 .num_consumer_supplies = ARRAY_SIZE(tuna_vusb_supply),
672 .consumer_supplies = tuna_vusb_supply,
673 };
674
675 /* clk32kg is a twl6030 32khz clock modeled as a regulator, used by GPS */
676 static struct regulator_init_data tuna_clk32kg = {
677 .constraints = {
678 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
679 .always_on = true,
680 },
681 };
682
683 static struct regulator_consumer_supply tuna_clk32kaudio_supply[] = {
684 {
685 .supply = "clk32kaudio",
686 },
687 {
688 .supply = "twl6040_clk32k",
689 }
690 };
691
692 static struct regulator_init_data tuna_clk32kaudio = {
693 .constraints = {
694 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
695 .boot_on = true,
696 },
697 .num_consumer_supplies = ARRAY_SIZE(tuna_clk32kaudio_supply),
698 .consumer_supplies = tuna_clk32kaudio_supply,
699 };
700
701
702 static struct regulator_init_data tuna_vdd3 = {
703 .constraints = {
704 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
705 .state_mem = {
706 .disabled = true,
707 },
708 .initial_state = PM_SUSPEND_MEM,
709 },
710 };
711
712 /*
713 * VMEM is unused. Register it to regulator framework and let it
714 * be in disabled state.
715 */
716 static struct regulator_init_data tuna_vmem = {
717 .constraints = {
718 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
719 .state_mem = {
720 .disabled = true,
721 },
722 .initial_state = PM_SUSPEND_MEM,
723 },
724 };
725
726 static struct regulator_init_data tuna_v2v1 = {
727 .constraints = {
728 .min_uV = 2100000,
729 .max_uV = 2100000,
730 .valid_modes_mask = REGULATOR_MODE_NORMAL
731 | REGULATOR_MODE_STANDBY,
732 .valid_ops_mask = REGULATOR_CHANGE_MODE
733 | REGULATOR_CHANGE_STATUS,
734 .always_on = true,
735 },
736 };
737
738 static struct twl4030_codec_audio_data twl6040_audio = {
739 /* single-step ramp for headset and handsfree */
740 .hs_left_step = 0x0f,
741 .hs_right_step = 0x0f,
742 .hf_left_step = 0x1d,
743 .hf_right_step = 0x1d,
744 .ep_step = 0x0f,
745 };
746
747 static struct twl4030_codec_data twl6040_codec = {
748 .audio = &twl6040_audio,
749 .naudint_irq = OMAP44XX_IRQ_SYS_2N,
750 .irq_base = TWL6040_CODEC_IRQ_BASE,
751 };
752
753 static struct twl4030_platform_data tuna_twldata = {
754 .irq_base = TWL6030_IRQ_BASE,
755 .irq_end = TWL6030_IRQ_END,
756
757 /* Regulators */
758 .vmmc = &tuna_vmmc,
759 .vpp = &tuna_vpp,
760 .vusim = &tuna_vusim,
761 .vana = &tuna_vana,
762 .vcxio = &tuna_vcxio,
763 .vdac = &tuna_vdac,
764 .vusb = &tuna_vusb,
765 .vaux1 = &tuna_vaux1,
766 .vaux2 = &tuna_vaux2,
767 .vaux3 = &tuna_vaux3,
768 .clk32kg = &tuna_clk32kg,
769 .clk32kaudio = &tuna_clk32kaudio,
770
771 /* children */
772 .codec = &twl6040_codec,
773 .madc = &twl6030_madc,
774
775 /* SMPS */
776 .vdd3 = &tuna_vdd3,
777 .vmem = &tuna_vmem,
778 .v2v1 = &tuna_v2v1,
779 };
780
781 static void tuna_audio_init(void)
782 {
783 unsigned int aud_pwron;
784
785 /* twl6040 naudint */
786 omap_mux_init_signal("sys_nirq2.sys_nirq2", \
787 OMAP_PIN_INPUT_PULLUP);
788
789 /* aud_pwron */
790 if (omap4_tuna_get_type() == TUNA_TYPE_TORO &&
791 omap4_tuna_get_revision() >= 1)
792 aud_pwron = GPIO_AUD_PWRON_TORO_V1;
793 else
794 aud_pwron = GPIO_AUD_PWRON;
795 omap_mux_init_gpio(aud_pwron, OMAP_PIN_OUTPUT);
796 twl6040_codec.audpwron_gpio = aud_pwron;
797
798 omap_mux_init_signal("gpmc_a24.gpio_48", OMAP_PIN_OUTPUT | OMAP_MUX_MODE3);
799 omap_mux_init_signal("kpd_col3.gpio_171", OMAP_PIN_OUTPUT | OMAP_MUX_MODE3);
800 }
801
802 static struct i2c_board_info __initdata tuna_i2c1_boardinfo[] = {
803 {
804 I2C_BOARD_INFO("twl6030", 0x48),
805 .flags = I2C_CLIENT_WAKE,
806 .irq = OMAP44XX_IRQ_SYS_1N,
807 .platform_data = &tuna_twldata,
808 },
809 };
810
811 static struct i2c_board_info __initdata tuna_i2c2_boardinfo[] = {
812 {
813 I2C_BOARD_INFO("ducati", 0x20),
814 .irq = OMAP44XX_IRQ_I2C2,
815 .ext_master = true,
816 },
817 };
818
819 static struct i2c_board_info __initdata tuna_i2c4_boardinfo[] = {
820 {
821 I2C_BOARD_INFO("an30259a", 0x30),
822 },
823 };
824
825 static int __init tuna_i2c_init(void)
826 {
827 u32 r;
828
829 omap_mux_init_signal("sys_nirq1", OMAP_PIN_INPUT_PULLUP |
830 OMAP_WAKEUP_EN);
831 omap_mux_init_signal("i2c1_scl.i2c1_scl", OMAP_PIN_INPUT_PULLUP);
832 omap_mux_init_signal("i2c1_sda.i2c1_sda", OMAP_PIN_INPUT_PULLUP);
833
834 /*
835 * This will allow unused regulator to be shutdown. This flag
836 * should be set in the board file. Before regulators are registered.
837 */
838 regulator_has_full_constraints();
839
840 /*
841 * Phoenix Audio IC needs I2C1 to
842 * start with 400 KHz or less
843 */
844 omap_register_i2c_bus(1, 400, tuna_i2c1_boardinfo,
845 ARRAY_SIZE(tuna_i2c1_boardinfo));
846 omap_register_i2c_bus(2, 400, tuna_i2c2_boardinfo,
847 ARRAY_SIZE(tuna_i2c2_boardinfo));
848 omap_register_i2c_bus(3, 400, NULL, 0);
849
850 /* Disable internal pullup on i2c.4 line:
851 * as external 2.2K is already present
852 */
853 r = omap4_ctrl_pad_readl(OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_I2C_0);
854 r |= (1 << OMAP4_I2C4_SDA_PULLUPRESX_SHIFT);
855 omap4_ctrl_pad_writel(r, OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_I2C_0);
856
857 omap_register_i2c_bus(4, 400, NULL, 0);
858
859 /*
860 * Drive MSECURE high for TWL6030 write access.
861 */
862 omap_mux_init_signal("fref_clk0_out.gpio_wk6", OMAP_PIN_OUTPUT);
863 gpio_request(6, "msecure");
864 gpio_direction_output(6, 1);
865
866 return 0;
867 }
868
869 #ifdef CONFIG_OMAP_MUX
870 static struct omap_board_mux board_mux[] __initdata = {
871 /* camera gpios */
872 OMAP4_MUX(MCSPI1_SOMI,
873 OMAP_MUX_MODE3 | OMAP_PIN_INPUT_PULLDOWN), /* gpio_135 */
874 OMAP4_MUX(KPD_COL0,
875 OMAP_MUX_MODE3 | OMAP_PIN_INPUT_PULLDOWN), /* gpio_173 */
876 OMAP4_MUX(GPMC_A19,
877 OMAP_MUX_MODE3 | OMAP_PIN_INPUT_PULLDOWN), /* gpio_43 */
878 /* hwrev */
879 OMAP4_MUX(CSI21_DY4, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
880 OMAP4_MUX(CSI21_DX4, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
881 OMAP4_MUX(CSI21_DY3, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
882 OMAP4_MUX(CSI21_DX3, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
883 OMAP4_MUX(USBB2_HSIC_STROBE, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
884 /* fRom */
885 OMAP4_MUX(USBB2_ULPITLL_DAT4,
886 OMAP_MUX_MODE4 | OMAP_PIN_INPUT), /* mcpsi3_somi */
887 OMAP4_MUX(USBB2_ULPITLL_DAT5,
888 OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLDOWN), /* mcpsi3_cs0 */
889 OMAP4_MUX(USBB2_ULPITLL_DAT6,
890 OMAP_MUX_MODE4 | OMAP_PIN_INPUT), /* mcpsi3_simo */
891 OMAP4_MUX(USBB2_ULPITLL_DAT7,
892 OMAP_MUX_MODE4 | OMAP_PIN_INPUT), /* mcpsi3_clk */
893 { .reg_offset = OMAP_MUX_TERMINATOR },
894 };
895
896 static struct omap_board_mux board_wkup_mux[] __initdata = {
897 /* power button */
898 OMAP4_MUX(SIM_CD, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
899 { .reg_offset = OMAP_MUX_TERMINATOR },
900 };
901
902 #else
903 #define board_mux NULL
904 #define board_wkup_mux NULL
905 #endif
906
907 /* sample4+ adds gps rts/cts lines */
908 static struct omap_device_pad tuna_uart1_pads_sample4[] __initdata = {
909 {
910 .name = "mcspi1_cs3.uart1_rts",
911 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE1,
912 },
913 {
914 .name = "mcspi1_cs2.uart1_cts",
915 .enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE1,
916 },
917 {
918 .name = "uart3_cts_rctx.uart1_tx",
919 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE1,
920 },
921 {
922 .name = "mcspi1_cs1.uart1_rx",
923 .flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
924 .enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE1,
925 .idle = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE1,
926 },
927 };
928
929 static struct omap_device_pad tuna_uart1_pads[] __initdata = {
930 {
931 .name = "uart3_cts_rctx.uart1_tx",
932 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE1,
933 },
934 {
935 .name = "mcspi1_cs1.uart1_rx",
936 .flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
937 .enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE1,
938 .idle = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE1,
939 },
940 };
941
942 static struct omap_device_pad tuna_uart2_pads[] __initdata = {
943 {
944 .name = "uart2_cts.uart2_cts",
945 .enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
946 },
947 {
948 .name = "uart2_rts.uart2_rts",
949 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
950 },
951 {
952 .name = "uart2_tx.uart2_tx",
953 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
954 },
955 {
956 .name = "uart2_rx.uart2_rx",
957 .enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
958 },
959 };
960
961 static struct omap_device_pad tuna_uart3_pads[] __initdata = {
962 {
963 .name = "uart3_tx_irtx.uart3_tx_irtx",
964 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
965 },
966 {
967 .name = "uart3_rx_irrx.uart3_rx_irrx",
968 .flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
969 .enable = OMAP_PIN_INPUT | OMAP_MUX_MODE0,
970 .idle = OMAP_PIN_INPUT | OMAP_MUX_MODE0,
971 },
972 };
973
974 static struct omap_device_pad tuna_uart4_pads[] __initdata = {
975 {
976 .name = "uart4_tx.uart4_tx",
977 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
978 },
979 {
980 .name = "uart4_rx.uart4_rx",
981 .enable = OMAP_PIN_INPUT | OMAP_MUX_MODE0,
982 },
983 };
984
985 static struct omap_uart_port_info tuna_uart2_info __initdata = {
986 .use_dma = 0,
987 .dma_rx_buf_size = DEFAULT_RXDMA_BUFSIZE,
988 .dma_rx_poll_rate = DEFAULT_RXDMA_POLLRATE,
989 .dma_rx_timeout = DEFAULT_RXDMA_TIMEOUT,
990 .auto_sus_timeout = 0,
991 .wake_peer = bcm_bt_lpm_exit_lpm_locked,
992 .rts_mux_driver_control = 1,
993 };
994
995 static inline void __init board_serial_init(void)
996 {
997 struct omap_device_pad *uart1_pads;
998 int uart1_pads_sz;
999
1000 if (omap4_tuna_get_revision() >= TUNA_REV_SAMPLE_4) {
1001 uart1_pads = tuna_uart1_pads_sample4;
1002 uart1_pads_sz = ARRAY_SIZE(tuna_uart1_pads_sample4);
1003 } else {
1004 uart1_pads = tuna_uart1_pads;
1005 uart1_pads_sz = ARRAY_SIZE(tuna_uart1_pads);
1006 }
1007
1008 omap_serial_init_port_pads(0, uart1_pads, uart1_pads_sz, NULL);
1009 omap_serial_init_port_pads(1, tuna_uart2_pads,
1010 ARRAY_SIZE(tuna_uart2_pads), &tuna_uart2_info);
1011 omap_serial_init_port_pads(3, tuna_uart4_pads,
1012 ARRAY_SIZE(tuna_uart4_pads), NULL);
1013 }
1014
1015 /* fiq_debugger initializes really early but OMAP resource mgmt
1016 * is not yet ready @ arch_init, so init the serial debugger later */
1017 static int __init board_serial_debug_init(void)
1018 {
1019 return omap_serial_debug_init(2, false, true,
1020 tuna_uart3_pads, ARRAY_SIZE(tuna_uart3_pads));
1021 }
1022 device_initcall(board_serial_debug_init);
1023
1024 /* SPI flash memory in camera module */
1025 #define F_ROM_SPI_BUS_NUM 3
1026 #define F_ROM_SPI_CS 0
1027 #define F_ROM_SPI_SPEED_HZ 24000000
1028
1029 static const struct flash_platform_data w25q80_pdata = {
1030 .name = "w25q80",
1031 .type = "w25q80",
1032 };
1033
1034 static struct omap2_mcspi_device_config f_rom_mcspi_config = {
1035 .turbo_mode = 0,
1036 .single_channel = 1, /* 0: slave, 1: master */
1037 .swap_datalines = 1,
1038 };
1039
1040 static struct spi_board_info tuna_f_rom[] __initdata = {
1041 {
1042 .modalias = "m25p80",
1043 .controller_data = &f_rom_mcspi_config,
1044 .platform_data = &w25q80_pdata,
1045 .bus_num = F_ROM_SPI_BUS_NUM,
1046 .chip_select = F_ROM_SPI_CS,
1047 .max_speed_hz = F_ROM_SPI_SPEED_HZ,
1048 .mode = SPI_MODE_0,
1049 },
1050 };
1051
1052 static void tuna_from_init(void)
1053 {
1054 int err;
1055
1056 if (tuna_hw_rev >= 0x07)
1057 f_rom_mcspi_config.swap_datalines = 0;
1058
1059 err = spi_register_board_info(tuna_f_rom, ARRAY_SIZE(tuna_f_rom));
1060 if (err)
1061 pr_err("failed to register SPI F-ROM\n");
1062 }
1063
1064 /*SPI for LTE modem bootloader*/
1065 #define LTE_MODEM_SPI_BUS_NUM 4
1066 #define LTE_MODEM_SPI_CS 0
1067 #define LTE_MODEM_SPI_MAX_HZ 1500000
1068
1069 struct lte_modem_bootloader_platform_data lte_modem_bootloader_pdata = {
1070 .name = "lte_modem_int",
1071 .gpio_lte2ap_status = OMAP_GPIO_CMC2AP_INT1,
1072 };
1073
1074 static struct omap2_mcspi_device_config lte_mcspi_config = {
1075 .turbo_mode = 0,
1076 .single_channel = 1, /* 0: slave, 1: master */
1077 };
1078
1079 static struct spi_board_info tuna_lte_modem[] __initdata = {
1080 {
1081 .modalias = "lte_modem_spi",
1082 .controller_data = &lte_mcspi_config,
1083 .platform_data = &lte_modem_bootloader_pdata,
1084 .max_speed_hz = LTE_MODEM_SPI_MAX_HZ,
1085 .bus_num = LTE_MODEM_SPI_BUS_NUM,
1086 .chip_select = LTE_MODEM_SPI_CS,
1087 .mode = SPI_MODE_0,
1088 },
1089 };
1090
1091 static int tuna_notifier_call(struct notifier_block *this,
1092 unsigned long code, void *_cmd)
1093 {
1094 void __iomem *sar_base;
1095 unsigned int flag = REBOOT_FLAG_NORMAL;
1096
1097 sar_base = omap4_get_sar_ram_base();
1098
1099 if (!sar_base)
1100 return notifier_from_errno(-ENOMEM);
1101
1102 if (code == SYS_RESTART) {
1103 if (_cmd) {
1104 if (!strcmp(_cmd, "recovery"))
1105 flag = REBOOT_FLAG_RECOVERY;
1106 else if (!strcmp(_cmd, "bootloader"))
1107 flag = REBOOT_FLAG_FASTBOOT;
1108 }
1109 } else if (code == SYS_POWER_OFF) {
1110 flag = REBOOT_FLAG_POWER_OFF;
1111 }
1112
1113 /* The Samsung LOKE bootloader will look for the boot flag at a fixed
1114 * offset from the end of the 1st SAR bank.
1115 */
1116 writel(flag, sar_base + SAR_BANK2_OFFSET - 0xC);
1117
1118 return NOTIFY_DONE;
1119 }
1120
1121 static struct notifier_block tuna_reboot_notifier = {
1122 .notifier_call = tuna_notifier_call,
1123 };
1124
1125 static ssize_t tuna_soc_family_show(struct kobject *kobj,
1126 struct kobj_attribute *attr, char *buf)
1127 {
1128 return sprintf(buf, "OMAP%04x\n", GET_OMAP_TYPE);
1129 }
1130
1131 static ssize_t tuna_soc_revision_show(struct kobject *kobj,
1132 struct kobj_attribute *attr, char *buf)
1133 {
1134 return sprintf(buf, "ES%d.%d\n", (GET_OMAP_REVISION() >> 4) & 0xf,
1135 GET_OMAP_REVISION() & 0xf);
1136 }
1137
1138 static ssize_t tuna_soc_die_id_show(struct kobject *kobj,
1139 struct kobj_attribute *attr, char *buf)
1140 {
1141 struct omap_die_id oid;
1142 omap_get_die_id(&oid);
1143 return sprintf(buf, "%08X-%08X-%08X-%08X\n", oid.id_3, oid.id_2,
1144 oid.id_1, oid.id_0);
1145 }
1146
1147 static ssize_t tuna_soc_prod_id_show(struct kobject *kobj,
1148 struct kobj_attribute *attr, char *buf)
1149 {
1150 struct omap_die_id oid;
1151 omap_get_production_id(&oid);
1152 return sprintf(buf, "%08X-%08X\n", oid.id_1, oid.id_0);
1153 }
1154
1155 static ssize_t tuna_soc_msv_show(struct kobject *kobj,
1156 struct kobj_attribute *attr, char *buf)
1157 {
1158 return sprintf(buf, "%08X\n", omap_ctrl_readl(0x013c));
1159 }
1160
1161 static const char *omap_types[] = {
1162 [OMAP2_DEVICE_TYPE_TEST] = "TST",
1163 [OMAP2_DEVICE_TYPE_EMU] = "EMU",
1164 [OMAP2_DEVICE_TYPE_SEC] = "HS",
1165 [OMAP2_DEVICE_TYPE_GP] = "GP",
1166 [OMAP2_DEVICE_TYPE_BAD] = "BAD",
1167 };
1168
1169 static ssize_t tuna_soc_type_show(struct kobject *kobj,
1170 struct kobj_attribute *attr, char *buf)
1171 {
1172 return sprintf(buf, "%s\n", omap_types[omap_type()]);
1173 }
1174
1175 #define TUNA_ATTR_RO(_type, _name, _show) \
1176 struct kobj_attribute tuna_##_type##_prop_attr_##_name = \
1177 __ATTR(_name, S_IRUGO, _show, NULL)
1178
1179 static TUNA_ATTR_RO(soc, family, tuna_soc_family_show);
1180 static TUNA_ATTR_RO(soc, revision, tuna_soc_revision_show);
1181 static TUNA_ATTR_RO(soc, type, tuna_soc_type_show);
1182 static TUNA_ATTR_RO(soc, die_id, tuna_soc_die_id_show);
1183 static TUNA_ATTR_RO(soc, production_id, tuna_soc_prod_id_show);
1184 static TUNA_ATTR_RO(soc, msv, tuna_soc_msv_show);
1185
1186 static struct attribute *tuna_soc_prop_attrs[] = {
1187 &tuna_soc_prop_attr_family.attr,
1188 &tuna_soc_prop_attr_revision.attr,
1189 &tuna_soc_prop_attr_type.attr,
1190 &tuna_soc_prop_attr_die_id.attr,
1191 &tuna_soc_prop_attr_production_id.attr,
1192 &tuna_soc_prop_attr_msv.attr,
1193 NULL,
1194 };
1195
1196 static struct attribute_group tuna_soc_prop_attr_group = {
1197 .attrs = tuna_soc_prop_attrs,
1198 };
1199
1200 static ssize_t tuna_board_revision_show(struct kobject *kobj,
1201 struct kobj_attribute *attr, char *buf)
1202 {
1203 return sprintf(buf, "%s (0x%02x)\n", omap4_tuna_hw_rev_name(),
1204 tuna_hw_rev);
1205 }
1206
1207 static TUNA_ATTR_RO(board, revision, tuna_board_revision_show);
1208 static struct attribute *tuna_board_prop_attrs[] = {
1209 &tuna_board_prop_attr_revision.attr,
1210 NULL,
1211 };
1212
1213 static struct attribute_group tuna_board_prop_attr_group = {
1214 .attrs = tuna_board_prop_attrs,
1215 };
1216
1217 static void __init omap4_tuna_create_board_props(void)
1218 {
1219 struct kobject *board_props_kobj;
1220 struct kobject *soc_kobj;
1221 int ret = 0;
1222
1223 board_props_kobj = kobject_create_and_add("board_properties", NULL);
1224 if (!board_props_kobj)
1225 goto err_board_obj;
1226
1227 soc_kobj = kobject_create_and_add("soc", board_props_kobj);
1228 if (!soc_kobj)
1229 goto err_soc_obj;
1230
1231 ret = sysfs_create_group(board_props_kobj, &tuna_board_prop_attr_group);
1232 if (ret)
1233 goto err_board_sysfs_create;
1234
1235 ret = sysfs_create_group(soc_kobj, &tuna_soc_prop_attr_group);
1236 if (ret)
1237 goto err_soc_sysfs_create;
1238
1239 return;
1240
1241 err_soc_sysfs_create:
1242 sysfs_remove_group(board_props_kobj, &tuna_board_prop_attr_group);
1243 err_board_sysfs_create:
1244 kobject_put(soc_kobj);
1245 err_soc_obj:
1246 kobject_put(board_props_kobj);
1247 err_board_obj:
1248 if (!board_props_kobj || !soc_kobj || ret)
1249 pr_err("failed to create board_properties\n");
1250 }
1251
1252 #define HSMMC2_MUX (OMAP_MUX_MODE1 | OMAP_PIN_INPUT_PULLUP)
1253 #define HSMMC1_MUX OMAP_PIN_INPUT_PULLUP
1254
1255 static void __init omap4_tuna_led_init(void)
1256 {
1257 i2c_register_board_info(4, tuna_i2c4_boardinfo,
1258 ARRAY_SIZE(tuna_i2c4_boardinfo));
1259 }
1260
1261 /* always reboot into charger mode on "power-off". Let the bootloader
1262 * figure out if we should truly power-off or not.
1263 */
1264 static void tuna_power_off(void)
1265 {
1266 printk(KERN_EMERG "Rebooting into bootloader for power-off.\n");
1267 arm_pm_restart('c', NULL);
1268 }
1269
1270 static void __init tuna_init(void)
1271 {
1272 int package = OMAP_PACKAGE_CBS;
1273
1274 if (omap_rev() == OMAP4430_REV_ES1_0)
1275 package = OMAP_PACKAGE_CBL;
1276 omap4_mux_init(board_mux, board_wkup_mux, package);
1277
1278 omap4_tuna_init_hw_rev();
1279
1280 omap4_tuna_emif_init();
1281
1282 pm_power_off = tuna_power_off;
1283
1284 register_reboot_notifier(&tuna_reboot_notifier);
1285
1286 /* hsmmc d0-d7 */
1287 omap_mux_init_signal("sdmmc1_dat0.sdmmc1_dat0", HSMMC1_MUX);
1288 omap_mux_init_signal("sdmmc1_dat1.sdmmc1_dat1", HSMMC1_MUX);
1289 omap_mux_init_signal("sdmmc1_dat2.sdmmc1_dat2", HSMMC1_MUX);
1290 omap_mux_init_signal("sdmmc1_dat3.sdmmc1_dat3", HSMMC1_MUX);
1291 omap_mux_init_signal("sdmmc1_dat4.sdmmc1_dat4", HSMMC1_MUX);
1292 omap_mux_init_signal("sdmmc1_dat5.sdmmc1_dat5", HSMMC1_MUX);
1293 omap_mux_init_signal("sdmmc1_dat6.sdmmc1_dat6", HSMMC1_MUX);
1294 omap_mux_init_signal("sdmmc1_dat7.sdmmc1_dat7", HSMMC1_MUX);
1295 /* hsmmc cmd */
1296 omap_mux_init_signal("sdmmc1_cmd.sdmmc1_cmd", HSMMC1_MUX);
1297 /* hsmmc clk */
1298 omap_mux_init_signal("sdmmc1_clk.sdmmc1_clk", HSMMC1_MUX);
1299
1300 gpio_request(158, "emmc_en");
1301 gpio_direction_output(158, 1);
1302 omap_mux_init_gpio(158, OMAP_PIN_INPUT_PULLUP);
1303
1304 omap_mux_init_gpio(GPIO_MHL_SDA_18V, OMAP_PIN_INPUT_PULLUP);
1305 omap_mux_init_gpio(GPIO_MHL_SCL_18V, OMAP_PIN_INPUT_PULLUP);
1306
1307 sec_common_init();
1308
1309 if (TUNA_TYPE_TORO == omap4_tuna_get_type()) {
1310 omap_mux_init_signal("gpmc_wait0",
1311 OMAP_MUX_MODE3 | OMAP_PIN_INPUT_PULLDOWN);
1312 gpio_request(OMAP_GPIO_CMC2AP_INT1, "gpio_61");
1313 gpio_direction_input(OMAP_GPIO_CMC2AP_INT1);
1314
1315 omap_mux_init_signal("mcspi4_clk", OMAP_MUX_MODE0);
1316 omap_mux_init_signal("mcspi4_simo", OMAP_MUX_MODE0);
1317 omap_mux_init_signal("mcspi4_somi", OMAP_MUX_MODE0);
1318 omap_mux_init_signal("mcspi4_cs0", OMAP_MUX_MODE0);
1319 }
1320
1321 tuna_wlan_init();
1322 tuna_audio_init();
1323 tuna_i2c_init();
1324 tuna_gsd4t_gps_init();
1325 ramconsole_pdata.bootinfo = omap4_get_resetreason();
1326 platform_add_devices(tuna_devices, ARRAY_SIZE(tuna_devices));
1327 board_serial_init();
1328 tuna_bt_init();
1329 omap2_hsmmc_init(mmc);
1330 usb_musb_init(&musb_board_data);
1331 omap4_tuna_create_board_props();
1332 if (TUNA_TYPE_TORO == omap4_tuna_get_type()) {
1333 spi_register_board_info(tuna_lte_modem,
1334 ARRAY_SIZE(tuna_lte_modem));
1335 }
1336 tuna_from_init();
1337 omap_dmm_init();
1338 omap4_tuna_display_init();
1339 omap4_tuna_input_init();
1340 omap4_tuna_nfc_init();
1341 omap4_tuna_power_init();
1342 omap4_tuna_jack_init();
1343 omap4_tuna_sensors_init();
1344 omap4_tuna_led_init();
1345 omap4_tuna_connector_init();
1346 omap4_tuna_pogo_init();
1347 #ifdef CONFIG_OMAP_HSI_DEVICE
1348 if (TUNA_TYPE_MAGURO == omap4_tuna_get_type())
1349 omap_hsi_init();
1350 #endif
1351 #ifdef CONFIG_USB_EHCI_HCD_OMAP
1352 if (TUNA_TYPE_TORO == omap4_tuna_get_type()) {
1353 #ifdef CONFIG_SEC_MODEM
1354 modem_toro_init();
1355 #endif
1356 omap4_ehci_init();
1357 }
1358 #endif
1359 }
1360
1361 static void __init tuna_map_io(void)
1362 {
1363 omap2_set_globals_443x();
1364 omap44xx_map_common_io();
1365 }
1366
1367 static void __init tuna_reserve(void)
1368 {
1369 int i;
1370 int ret;
1371
1372 /* do the static reservations first */
1373 memblock_remove(TUNA_RAMCONSOLE_START, TUNA_RAMCONSOLE_SIZE);
1374 memblock_remove(PHYS_ADDR_SMC_MEM, PHYS_ADDR_SMC_SIZE);
1375 memblock_remove(PHYS_ADDR_DUCATI_MEM, PHYS_ADDR_DUCATI_SIZE);
1376
1377 for (i = 0; i < tuna_ion_data.nr; i++)
1378 if (tuna_ion_data.heaps[i].type == ION_HEAP_TYPE_CARVEOUT ||
1379 tuna_ion_data.heaps[i].type == OMAP_ION_HEAP_TYPE_TILER) {
1380 ret = memblock_remove(tuna_ion_data.heaps[i].base,
1381 tuna_ion_data.heaps[i].size);
1382 if (ret)
1383 pr_err("memblock remove of %x@%lx failed\n",
1384 tuna_ion_data.heaps[i].size,
1385 tuna_ion_data.heaps[i].base);
1386 }
1387
1388 /* ipu needs to recognize secure input buffer area as well */
1389 omap_ipu_set_static_mempool(PHYS_ADDR_DUCATI_MEM, PHYS_ADDR_DUCATI_SIZE +
1390 OMAP_TUNA_ION_HEAP_SECURE_INPUT_SIZE);
1391 omap_reserve();
1392 }
1393
1394 MACHINE_START(TUNA, "Tuna")
1395 /* Maintainer: Google, Inc */
1396 .boot_params = 0x80000100,
1397 .reserve = tuna_reserve,
1398 .map_io = tuna_map_io,
1399 .init_early = tuna_init_early,
1400 .init_irq = gic_init_irq,
1401 .init_machine = tuna_init,
1402 .timer = &omap_timer,
1403 MACHINE_END