arch/arm/mach-omap2/clockdomain2xxx_3xxx.c

   1 /*
   2  * OMAP2 and OMAP3 clockdomain control
   3  *
   4  * Copyright (C) 2008-2010 Texas Instruments, Inc.
   5  * Copyright (C) 2008-2010 Nokia Corporation
   6  *
   7  * Derived from mach-omap2/clockdomain.c written by Paul Walmsley
   8  * Rajendra Nayak <rnayak@ti.com>
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License version 2 as
  12  * published by the Free Software Foundation.
  13  */
  14
  15 #include <linux/types.h>
  16 #include <linux/errno.h>
  17 #include <plat/prcm.h>
  18 #include "prm.h"
  19 #include "prm2xxx_3xxx.h"
  20 #include "cm.h"
  21 #include "cm2xxx_3xxx.h"
  22 #include "cm-regbits-24xx.h"
  23 #include "cm-regbits-34xx.h"
  24 #include "prm-regbits-24xx.h"
  25 #include "clockdomain.h"
  26
  27 static int omap2_clkdm_add_wkdep(struct clockdomain *clkdm1,
  28                                                 struct clockdomain *clkdm2)
  29 {
  30         omap2_prm_set_mod_reg_bits((1 << clkdm2->dep_bit),
  31                                 clkdm1->pwrdm.ptr->prcm_offs, PM_WKDEP);
  32         return 0;
  33 }
  34
  35 static int omap2_clkdm_del_wkdep(struct clockdomain *clkdm1,
  36                                                  struct clockdomain *clkdm2)
  37 {
  38         omap2_prm_clear_mod_reg_bits((1 << clkdm2->dep_bit),
  39                                 clkdm1->pwrdm.ptr->prcm_offs, PM_WKDEP);
  40         return 0;
  41 }
  42
  43 static int omap2_clkdm_read_wkdep(struct clockdomain *clkdm1,
  44                                                  struct clockdomain *clkdm2)
  45 {
  46         return omap2_prm_read_mod_bits_shift(clkdm1->pwrdm.ptr->prcm_offs,
  47                                 PM_WKDEP, (1 << clkdm2->dep_bit));
  48 }
  49
  50 static int omap2_clkdm_clear_all_wkdeps(struct clockdomain *clkdm)
  51 {
  52         struct clkdm_dep *cd;
  53         u32 mask = 0;
  54
  55         for (cd = clkdm->wkdep_srcs; cd && cd->clkdm_name; cd++) {
  56                 if (!omap_chip_is(cd->omap_chip))
  57                         continue;
  58                 if (!cd->clkdm)
  59                         continue; /* only happens if data is erroneous */
  60
  61                 /* PRM accesses are slow, so minimize them */
  62                 mask |= 1 << cd->clkdm->dep_bit;
  63                 atomic_set(&cd->wkdep_usecount, 0);
  64         }
  65
  66         omap2_prm_clear_mod_reg_bits(mask, clkdm->pwrdm.ptr->prcm_offs,
  67                                  PM_WKDEP);
  68         return 0;
  69 }
  70
  71 static int omap3_clkdm_add_sleepdep(struct clockdomain *clkdm1,
  72                                                  struct clockdomain *clkdm2)
  73 {
  74         omap2_cm_set_mod_reg_bits((1 << clkdm2->dep_bit),
  75                                 clkdm1->pwrdm.ptr->prcm_offs,
  76                                 OMAP3430_CM_SLEEPDEP);
  77         return 0;
  78 }
  79
  80 static int omap3_clkdm_del_sleepdep(struct clockdomain *clkdm1,
  81                                                  struct clockdomain *clkdm2)
  82 {
  83         omap2_cm_clear_mod_reg_bits((1 << clkdm2->dep_bit),
  84                                 clkdm1->pwrdm.ptr->prcm_offs,
  85                                 OMAP3430_CM_SLEEPDEP);
  86         return 0;
  87 }
  88
  89 static int omap3_clkdm_read_sleepdep(struct clockdomain *clkdm1,
  90                                                  struct clockdomain *clkdm2)
  91 {
  92         return omap2_prm_read_mod_bits_shift(clkdm1->pwrdm.ptr->prcm_offs,
  93                                 OMAP3430_CM_SLEEPDEP, (1 << clkdm2->dep_bit));
  94 }
  95
  96 static int omap3_clkdm_clear_all_sleepdeps(struct clockdomain *clkdm)
  97 {
  98         struct clkdm_dep *cd;
  99         u32 mask = 0;
 100
 101         for (cd = clkdm->sleepdep_srcs; cd && cd->clkdm_name; cd++) {
 102                 if (!omap_chip_is(cd->omap_chip))
 103                         continue;
 104                 if (!cd->clkdm)
 105                         continue; /* only happens if data is erroneous */
 106
 107                 /* PRM accesses are slow, so minimize them */
 108                 mask |= 1 << cd->clkdm->dep_bit;
 109                 atomic_set(&cd->sleepdep_usecount, 0);
 110         }
 111         omap2_prm_clear_mod_reg_bits(mask, clkdm->pwrdm.ptr->prcm_offs,
 112                                 OMAP3430_CM_SLEEPDEP);
 113         return 0;
 114 }
 115
 116 static int omap2_clkdm_sleep(struct clockdomain *clkdm)
 117 {
 118         omap2_cm_set_mod_reg_bits(OMAP24XX_FORCESTATE_MASK,
 119                                 clkdm->pwrdm.ptr->prcm_offs,
 120                                 OMAP2_PM_PWSTCTRL);
 121         return 0;
 122 }
 123
 124 static int omap2_clkdm_wakeup(struct clockdomain *clkdm)
 125 {
 126         omap2_cm_clear_mod_reg_bits(OMAP24XX_FORCESTATE_MASK,
 127                                 clkdm->pwrdm.ptr->prcm_offs,
 128                                 OMAP2_PM_PWSTCTRL);
 129         return 0;
 130 }
 131
 132 static void omap2_clkdm_allow_idle(struct clockdomain *clkdm)
 133 {
 134         if (atomic_read(&clkdm->usecount) > 0)
 135                 _clkdm_add_autodeps(clkdm);
 136
 137         omap2xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
 138                                 clkdm->clktrctrl_mask);
 139 }
 140
 141 static void omap2_clkdm_deny_idle(struct clockdomain *clkdm)
 142 {
 143         omap2xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
 144                                 clkdm->clktrctrl_mask);
 145
 146         if (atomic_read(&clkdm->usecount) > 0)
 147                 _clkdm_del_autodeps(clkdm);
 148 }
 149
 150 static int omap2_clkdm_is_idle(struct clockdomain *clkdm)
 151 {
 152         if (!clkdm->clktrctrl_mask)
 153                 return -1;
 154
 155         return omap2_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs,
 156                                 clkdm->clktrctrl_mask);
 157 }
 158
 159 static void _enable_hwsup(struct clockdomain *clkdm)
 160 {
 161         if (cpu_is_omap24xx())
 162                 omap2xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
 163                                                clkdm->clktrctrl_mask);
 164         else if (cpu_is_omap34xx())
 165                 omap3xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
 166                                                clkdm->clktrctrl_mask);
 167 }
 168
 169 static void _disable_hwsup(struct clockdomain *clkdm)
 170 {
 171         if (cpu_is_omap24xx())
 172                 omap2xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
 173                                                 clkdm->clktrctrl_mask);
 174         else if (cpu_is_omap34xx())
 175                 omap3xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
 176                                                 clkdm->clktrctrl_mask);
 177 }
 178
 179
 180 static int omap2_clkdm_clk_enable(struct clockdomain *clkdm)
 181 {
 182         bool hwsup = false;
 183
 184         if (!clkdm->clktrctrl_mask)
 185                 return 0;
 186
 187         hwsup = omap2_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs,
 188                                 clkdm->clktrctrl_mask);
 189
 190         if (hwsup) {
 191                 /* Disable HW transitions when we are changing deps */
 192                 _disable_hwsup(clkdm);
 193                 _clkdm_add_autodeps(clkdm);
 194                 _enable_hwsup(clkdm);
 195         } else {
 196                 clkdm_wakeup(clkdm);
 197         }
 198
 199         return 0;
 200 }
 201
 202 static int omap2_clkdm_clk_disable(struct clockdomain *clkdm)
 203 {
 204         bool hwsup = false;
 205
 206         if (!clkdm->clktrctrl_mask)
 207                 return 0;
 208
 209         hwsup = omap2_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs,
 210                                 clkdm->clktrctrl_mask);
 211
 212         if (hwsup) {
 213                 /* Disable HW transitions when we are changing deps */
 214                 _disable_hwsup(clkdm);
 215                 _clkdm_del_autodeps(clkdm);
 216                 _enable_hwsup(clkdm);
 217         } else {
 218                 clkdm_sleep(clkdm);
 219         }
 220
 221         return 0;
 222 }
 223
 224 static int omap3_clkdm_sleep(struct clockdomain *clkdm)
 225 {
 226         omap3xxx_cm_clkdm_force_sleep(clkdm->pwrdm.ptr->prcm_offs,
 227                                 clkdm->clktrctrl_mask);
 228         return 0;
 229 }
 230
 231 static int omap3_clkdm_wakeup(struct clockdomain *clkdm)
 232 {
 233         omap3xxx_cm_clkdm_force_wakeup(clkdm->pwrdm.ptr->prcm_offs,
 234                                 clkdm->clktrctrl_mask);
 235         return 0;
 236 }
 237
 238 static void omap3_clkdm_allow_idle(struct clockdomain *clkdm)
 239 {
 240         if (atomic_read(&clkdm->usecount) > 0)
 241                 _clkdm_add_autodeps(clkdm);
 242
 243         omap3xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
 244                                 clkdm->clktrctrl_mask);
 245 }
 246
 247 static void omap3_clkdm_deny_idle(struct clockdomain *clkdm)
 248 {
 249         omap3xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
 250                                 clkdm->clktrctrl_mask);
 251
 252         if (atomic_read(&clkdm->usecount) > 0)
 253                 _clkdm_del_autodeps(clkdm);
 254 }
 255
 256 struct clkdm_ops omap2_clkdm_operations = {
 257         .clkdm_add_wkdep        = omap2_clkdm_add_wkdep,
 258         .clkdm_del_wkdep        = omap2_clkdm_del_wkdep,
 259         .clkdm_read_wkdep       = omap2_clkdm_read_wkdep,
 260         .clkdm_clear_all_wkdeps = omap2_clkdm_clear_all_wkdeps,
 261         .clkdm_sleep            = omap2_clkdm_sleep,
 262         .clkdm_wakeup           = omap2_clkdm_wakeup,
 263         .clkdm_allow_idle       = omap2_clkdm_allow_idle,
 264         .clkdm_deny_idle        = omap2_clkdm_deny_idle,
 265         .clkdm_is_idle          = omap2_clkdm_is_idle,
 266         .clkdm_clk_enable       = omap2_clkdm_clk_enable,
 267         .clkdm_clk_disable      = omap2_clkdm_clk_disable,
 268 };
 269
 270 struct clkdm_ops omap3_clkdm_operations = {
 271         .clkdm_add_wkdep        = omap2_clkdm_add_wkdep,
 272         .clkdm_del_wkdep        = omap2_clkdm_del_wkdep,
 273         .clkdm_read_wkdep       = omap2_clkdm_read_wkdep,
 274         .clkdm_clear_all_wkdeps = omap2_clkdm_clear_all_wkdeps,
 275         .clkdm_add_sleepdep     = omap3_clkdm_add_sleepdep,
 276         .clkdm_del_sleepdep     = omap3_clkdm_del_sleepdep,
 277         .clkdm_read_sleepdep    = omap3_clkdm_read_sleepdep,
 278         .clkdm_clear_all_sleepdeps      = omap3_clkdm_clear_all_sleepdeps,
 279         .clkdm_sleep            = omap3_clkdm_sleep,
 280         .clkdm_wakeup           = omap3_clkdm_wakeup,
 281         .clkdm_allow_idle       = omap3_clkdm_allow_idle,
 282         .clkdm_deny_idle        = omap3_clkdm_deny_idle,
 283         .clkdm_is_idle          = omap2_clkdm_is_idle,
 284         .clkdm_clk_enable       = omap2_clkdm_clk_enable,
 285         .clkdm_clk_disable      = omap2_clkdm_clk_disable,
 286 };