arch/arm/mach-omap2/omap_l3_noc.c

   1 /*
   2   * OMAP4XXX L3 Interconnect error handling driver
   3   *
   4   * Copyright (C) 2011 Texas Corporation
   5   *     Santosh Shilimkar <santosh.shilimkar@ti.com>
   6   *     Sricharan <r.sricharan@ti.com>
   7   *
   8   * This program is free software; you can redistribute it and/or modify
   9   * it under the terms of the GNU General Public License as published by
  10   * the Free Software Foundation; either version 2 of the License, or
  11   * (at your option) any later version.
  12   *
  13   * This program is distributed in the hope that it will be useful,
  14   * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15   * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16   * GNU General Public License for more details.
  17   *
  18   * You should have received a copy of the GNU General Public License
  19   * along with this program; if not, write to the Free Software
  20   * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
  21   * USA
  22   */
  23 #include <linux/init.h>
  24 #include <linux/io.h>
  25 #include <linux/platform_device.h>
  26 #include <linux/interrupt.h>
  27 #include <linux/kernel.h>
  28 #include <linux/slab.h>
  29
  30 #include "omap_l3_noc.h"
  31 #include "board-tuna.h"
  32
  33 #define NUM_OF_L3_MASTERS ARRAY_SIZE(l3_masters)
  34
  35 /*
  36  * Interrupt Handler for L3 error detection.
  37  *      1) Identify the L3 clockdomain partition to which the error belongs to.
  38  *      2) Identify the slave where the error information is logged
  39  *      3) Print the logged information.
  40  *      4) Add dump stack to provide kernel trace.
  41  *
  42  * Two Types of errors :
  43  *      1) Custom errors in L3 :
  44  *              Target like DMM/FW/EMIF generates SRESP=ERR error
  45  *      2) Standard L3 error:
  46  *              - Unsupported CMD.
  47  *                      L3 tries to access target while it is idle
  48  *              - OCP disconnect.
  49  *              - Address hole error:
  50  *                      If DSS/ISS/FDIF/USBHOSTFS access a target where they
  51  *                      do not have connectivity, the error is logged in
  52  *                      their default target which is DMM2.
  53  *
  54  *      On High Secure devices, firewall errors are possible and those
  55  *      can be trapped as well. But the trapping is implemented as part
  56  *      secure software and hence need not be implemented here.
  57  */
  58 static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
  59 {
  60
  61         struct omap4_l3         *l3 = _l3;
  62         int inttype, i, j, k;
  63         int err_src = 0;
  64         u32 std_err_main_addr, std_err_main, err_reg;
  65         u32 base, slave_addr, clear, regoffset, masterid;
  66         char *source_name;
  67
  68         /* Get the Type of interrupt */
  69         inttype = irq == l3->app_irq ? L3_APPLICATION_ERROR : L3_DEBUG_ERROR;
  70
  71         for (i = 0; i < L3_MODULES; i++) {
  72                 /*
  73                  * Read the regerr register of the clock domain
  74                  * to determine the source
  75                  */
  76                 base = (u32)l3->l3_base[i];
  77                 err_reg =  readl(base + l3_flagmux[i] + (inttype << 3));
  78
  79                 /* Get the corresponding error and analyse */
  80                 if (err_reg) {
  81                         /* Identify the source from control status register */
  82                         for (j = 0; !(err_reg & (1 << j)); j++)
  83                                                                         ;
  84
  85                         err_src = j;
  86                         /* Read the stderrlog_main_source from clk domain */
  87                         std_err_main_addr = base + *(l3_targ[i] + err_src);
  88                         std_err_main = readl(std_err_main_addr);
  89
  90                         switch (std_err_main & CUSTOM_ERROR) {
  91                         case STANDARD_ERROR:
  92                                 source_name =
  93                                 l3_targ_stderrlog_main_name[i][err_src];
  94                                 regoffset = targ_reg_offset[i][err_src];
  95
  96                                 slave_addr = std_err_main_addr +
  97                                                 L3_SLAVE_ADDRESS_OFFSET;
  98
  99                                 pr_err("L3 standard error: SOURCE:%s at address 0x%x MSTADDR=0x%x hdr=0x%x\n",
 100                                                 source_name, readl(slave_addr),
 101                                                 readl(base + regoffset + L3_MSTADDR),
 102                                                 readl(base + regoffset + L3_HDR));
 103                                 WARN_ONCE(true, "L3 standard error");
 104
 105                                 /* Disable ABE L3 Interrupt on LTE boards */
 106                                 if ((readl(base + regoffset + L3_MSTADDR) == 0xc0) &&
 107                                         (readl(base + regoffset + L3_SLVADDR) == 0x3) &&
 108                                         (omap4_tuna_get_type() == TUNA_TYPE_TORO)) {
 109                                         pr_err("** Disabling ABE L3 interrupt for now....\n");
 110                                         writel(0x1, base + regoffset + L3_MAINCTLREG);
 111                                         writel(0x0, base + regoffset + L3_SVRTSTDLVL);
 112                                         writel(0x0, base + regoffset + L3_SVRTCUSTOMLVL);
 113                                         writel(0x0, base + regoffset + L3_MAIN);
 114                                         writel(0x1F, base + regoffset + L3_ADDRSPACESIZELOG);
 115                                 }
 116
 117                                 /* clear the std error log*/
 118                                 clear = std_err_main | CLEAR_STDERR_LOG;
 119                                 writel(clear, std_err_main_addr);
 120                                 break;
 121
 122                         case CUSTOM_ERROR:
 123                                 source_name =
 124                                 l3_targ_stderrlog_main_name[i][err_src];
 125                                 regoffset = targ_reg_offset[i][err_src];
 126
 127                                 pr_err("L3 CUSTOM SRESP error with SOURCE:%s info=0x%x\n",
 128                                                 source_name,
 129                                                 readl(base + regoffset + L3_CUSTOMINFO_INFO));
 130                                 WARN_ONCE(true, "L3 custom sresp error");
 131
 132                                 masterid = readl(base + regoffset +
 133                                         L3_CUSTOMINFO_MSTADDR);
 134
 135                                 for (k = 0;
 136                                      k < NUM_OF_L3_MASTERS;
 137                                      k++) {
 138                                         if (masterid == l3_masters[k].id) {
 139                                                 pr_err("Master 0x%x %10s\n",
 140                                                         masterid,
 141                                                         l3_masters[k].name);
 142                                                 pr_err("%s OPCODE   0x%08x\n",
 143                                                         source_name,
 144                                                         readl(base + regoffset +
 145                                                         L3_CUSTOMINFO_OPCODE));
 146                                                 break;
 147                                         }
 148                                 }
 149
 150                                 /* clear the std error log*/
 151                                 clear = std_err_main | CLEAR_STDERR_LOG;
 152                                 writel(clear, std_err_main_addr);
 153                                 break;
 154
 155                         default:
 156                                 /* Nothing to be handled here as of now */
 157                                 break;
 158                         }
 159                 /* Error found so break the for loop */
 160                 break;
 161                 }
 162         }
 163         return IRQ_HANDLED;
 164 }
 165
 166 static int __init omap4_l3_probe(struct platform_device *pdev)
 167 {
 168         static struct omap4_l3          *l3;
 169         struct resource         *res;
 170         int                     ret;
 171         int                     irq;
 172
 173         l3 = kzalloc(sizeof(*l3), GFP_KERNEL);
 174         if (!l3)
 175                 return -ENOMEM;
 176
 177         platform_set_drvdata(pdev, l3);
 178         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 179         if (!res) {
 180                 dev_err(&pdev->dev, "couldn't find resource 0\n");
 181                 ret = -ENODEV;
 182                 goto err0;
 183         }
 184
 185         l3->l3_base[0] = ioremap(res->start, resource_size(res));
 186         if (!l3->l3_base[0]) {
 187                 dev_err(&pdev->dev, "ioremap failed\n");
 188                 ret = -ENOMEM;
 189                 goto err0;
 190         }
 191
 192         res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
 193         if (!res) {
 194                 dev_err(&pdev->dev, "couldn't find resource 1\n");
 195                 ret = -ENODEV;
 196                 goto err1;
 197         }
 198
 199         l3->l3_base[1] = ioremap(res->start, resource_size(res));
 200         if (!l3->l3_base[1]) {
 201                 dev_err(&pdev->dev, "ioremap failed\n");
 202                 ret = -ENOMEM;
 203                 goto err1;
 204         }
 205
 206         res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
 207         if (!res) {
 208                 dev_err(&pdev->dev, "couldn't find resource 2\n");
 209                 ret = -ENODEV;
 210                 goto err2;
 211         }
 212
 213         l3->l3_base[2] = ioremap(res->start, resource_size(res));
 214         if (!l3->l3_base[2]) {
 215                 dev_err(&pdev->dev, "ioremap failed\n");
 216                 ret = -ENOMEM;
 217                 goto err2;
 218         }
 219
 220         /*
 221          * Setup interrupt Handlers
 222          */
 223         irq = platform_get_irq(pdev, 0);
 224         ret = request_irq(irq,
 225                         l3_interrupt_handler,
 226                         IRQF_DISABLED, "l3-dbg-irq", l3);
 227         if (ret) {
 228                 pr_crit("L3: request_irq failed to register for 0x%x\n",
 229                                          OMAP44XX_IRQ_L3_DBG);
 230                 goto err3;
 231         }
 232         l3->debug_irq = irq;
 233
 234         irq = platform_get_irq(pdev, 1);
 235         ret = request_irq(irq,
 236                         l3_interrupt_handler,
 237                         IRQF_DISABLED, "l3-app-irq", l3);
 238         if (ret) {
 239                 pr_crit("L3: request_irq failed to register for 0x%x\n",
 240                                          OMAP44XX_IRQ_L3_APP);
 241                 goto err4;
 242         }
 243         l3->app_irq = irq;
 244
 245         return 0;
 246
 247 err4:
 248         free_irq(l3->debug_irq, l3);
 249 err3:
 250         iounmap(l3->l3_base[2]);
 251 err2:
 252         iounmap(l3->l3_base[1]);
 253 err1:
 254         iounmap(l3->l3_base[0]);
 255 err0:
 256         kfree(l3);
 257         return ret;
 258 }
 259
 260 static int __exit omap4_l3_remove(struct platform_device *pdev)
 261 {
 262         struct omap4_l3         *l3 = platform_get_drvdata(pdev);
 263
 264         free_irq(l3->app_irq, l3);
 265         free_irq(l3->debug_irq, l3);
 266         iounmap(l3->l3_base[0]);
 267         iounmap(l3->l3_base[1]);
 268         iounmap(l3->l3_base[2]);
 269         kfree(l3);
 270
 271         return 0;
 272 }
 273
 274 static struct platform_driver omap4_l3_driver = {
 275         .remove         = __exit_p(omap4_l3_remove),
 276         .driver         = {
 277         .name           = "omap_l3_noc",
 278         },
 279 };
 280
 281 static int __init omap4_l3_init(void)
 282 {
 283         return platform_driver_probe(&omap4_l3_driver, omap4_l3_probe);
 284 }
 285 postcore_initcall_sync(omap4_l3_init);
 286
 287 static void __exit omap4_l3_exit(void)
 288 {
 289         platform_driver_unregister(&omap4_l3_driver);
 290 }
 291 module_exit(omap4_l3_exit);